[arm64] Add the full neon regs to the context

[mono.git] / mono / utils / mono-context.h

diff --git a/mono/utils/mono-context.h b/mono/utils/mono-context.h
index bac2fb331a1633ee4e143999f7b101870529e748..290f24f115cb8ef7a412716205b0515e4d846779 100644 (file)
--- a/mono/utils/mono-context.h
+++ b/mono/utils/mono-context.h
@@ -32,6 +32,8 @@ typedef struct __darwin_xmm_reg MonoContextSimdReg;
 #elif defined(__linux__)
 typedef struct _libc_xmmreg MonoContextSimdReg;
 #endif
+#elif defined(TARGET_ARM64)
+typedef __uint128_t MonoContextSimdReg;
 #endif
 
 /*
@@ -425,7 +427,8 @@ typedef struct {
 
 typedef struct {
        mgreg_t regs [32];
-       double fregs [32];
+       /* FIXME not fully saved in trampolines */
+       MonoContextSimdReg fregs [32];
        mgreg_t pc;
        /*
         * fregs might not be initialized if this context was created from a
@@ -478,22 +481,22 @@ typedef struct {
                "stp x30, xzr, [x16], #8\n"     \
                "mov x30, sp\n"                         \
                "str x30, [x16], #8\n"          \
-               "stp d0, d1, [x16], #16\n"      \
-               "stp d2, d3, [x16], #16\n"      \
-               "stp d4, d5, [x16], #16\n"      \
-               "stp d6, d7, [x16], #16\n"      \
-               "stp d8, d9, [x16], #16\n"      \
-               "stp d10, d11, [x16], #16\n"    \
-               "stp d12, d13, [x16], #16\n"    \
-               "stp d14, d15, [x16], #16\n"    \
-               "stp d16, d17, [x16], #16\n"    \
-               "stp d18, d19, [x16], #16\n"    \
-               "stp d20, d21, [x16], #16\n"    \
-               "stp d22, d23, [x16], #16\n"    \
-               "stp d24, d25, [x16], #16\n"    \
-               "stp d26, d27, [x16], #16\n"    \
-               "stp d28, d29, [x16], #16\n"    \
-               "stp d30, d31, [x16], #16\n"    \
+               "stp q0, q1, [x16], #32\n"      \
+               "stp q2, q3, [x16], #32\n"      \
+               "stp q4, q5, [x16], #32\n"      \
+               "stp q6, q7, [x16], #32\n"      \
+               "stp q8, q9, [x16], #32\n"      \
+               "stp q10, q11, [x16], #32\n"    \
+               "stp q12, q13, [x16], #32\n"    \
+               "stp q14, q15, [x16], #32\n"    \
+               "stp q16, q17, [x16], #32\n"    \
+               "stp q18, q19, [x16], #32\n"    \
+               "stp q20, q21, [x16], #32\n"    \
+               "stp q22, q23, [x16], #32\n"    \
+               "stp q24, q25, [x16], #32\n"    \
+               "stp q26, q27, [x16], #32\n"    \
+               "stp q28, q29, [x16], #32\n"    \
+               "stp q30, q31, [x16], #32\n"            \
                :                                                       \
                : "r" (&ctx.regs)                       \
                : "x16", "x30", "memory"                \