From 7b885817d4224b311880d3c50cbfe176e1c7c6b4 Mon Sep 17 00:00:00 2001
From: Bernhard Urban <lewurm@gmail.com>
Date: Thu, 27 May 2010 21:08:54 +0200
Subject: [PATCH] spartan3e: hier auch components verwenden... (hab ich
 vergessen)

---
 src/calc_s3e.vhd | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/src/calc_s3e.vhd b/src/calc_s3e.vhd
index 3c67b22..148be80 100644
--- a/src/calc_s3e.vhd
+++ b/src/calc_s3e.vhd
@@ -76,7 +76,7 @@ begin
 	sys_res_n <= not sys_res;
 
 	-- vga/ipcore
-	textmode_vga_inst : entity work.textmode_vga(struct)
+	textmode_vga_inst : textmode_vga
 	generic map (
 		VGA_CLK_FREQ => 25000000,
 		BLINK_INTERVAL_MS => 500,
@@ -98,14 +98,14 @@ begin
 	);
 
 	-- pll fuer vga
-	clk_vga_s3e_inst : entity work.clk_vga_s3e(beh)
+	clk_vga_s3e_inst : clk_vga_s3e
 	port map (
 		clk50 => CLK_50MHZ,
 		clk25 => vga_clk
 	);
 
 	-- display
-	display_inst : entity work.display(beh)
+	display_inst : display
 	port map (
 		sys_clk => CLK_50MHZ,
 		sys_res_n => sys_res_n,
@@ -125,7 +125,7 @@ begin
 	);
 
 	-- history
-	history_inst : entity work.history(beh)
+	history_inst : history
 	port map (
 		sys_clk => CLK_50MHZ,
 		sys_res_n => sys_res_n,
@@ -160,7 +160,7 @@ begin
 	);
 
 	-- parser
-	parser_inst : entity work.parser(beh)
+	parser_inst : parser
 	port map (
 		sys_clk => CLK_50MHZ,
 		sys_res_n => sys_res_n,
@@ -178,7 +178,7 @@ begin
 	);
 
 	-- scanner
-	scanner_inst : entity work.scanner(beh)
+	scanner_inst : scanner
 	port map (
 		sys_clk => CLK_50MHZ,
 		sys_res_n => sys_res_n,
@@ -196,7 +196,7 @@ begin
 	);
 
 	-- ps/2
-	ps2_inst : entity work.ps2_keyboard_controller(beh)
+	ps2_inst : ps2_keyboard_controller
 	generic map (
 		CLK_FREQ => CLK_FREQ,
 		SYNC_STAGES => 2
@@ -212,7 +212,7 @@ begin
 	);
 
 	-- synchronizer fuer rxd
-	sync_rxd_inst : entity work.sync(beh)
+	sync_rxd_inst : sync
 	generic map (
 		SYNC_STAGES => 2,
 		RESET_VALUE => '1'
@@ -225,7 +225,7 @@ begin
 	);
 
 	-- rs232-rx
-	rs232rx_inst : entity work.uart_rx(beh)
+	rs232rx_inst : uart_rx
 	generic map (
 		CLK_FREQ => CLK_FREQ,
 		BAUDRATE => BAUDRATE
@@ -239,7 +239,7 @@ begin
 	);
 
 	-- rs232-tx
-	rs232tx_inst : entity work.uart_tx(beh)
+	rs232tx_inst : uart_tx
 	generic map (
 		CLK_FREQ => CLK_FREQ,
 		BAUDRATE => BAUDRATE
@@ -254,7 +254,7 @@ begin
 	);
 
 	-- pc-com
-	pc_com_inst : entity work.pc_communication(beh)
+	pc_com_inst : pc_communication
 	port map (
 		sys_clk => CLK_50MHZ,
 		sys_res_n => sys_res_n,
-- 
2.25.1