From: Alexander Oh <oh.a@gmx.at>
Date: Tue, 25 May 2010 00:47:49 +0000 (+0200)
Subject: this is just going from idle to fetch by now
X-Git-Tag: abgabe~46
X-Git-Url: http://wien.tomnetworks.com/gitweb/?p=hwmod.git;a=commitdiff_plain;h=59c46d104154c881734b5dcdae684661dd56e6bd

this is just going from idle to fetch by now
---

diff --git a/src/beh_pc_communication_tb.vhd b/src/beh_pc_communication_tb.vhd
index ebb52b7..4efc777 100644
--- a/src/beh_pc_communication_tb.vhd
+++ b/src/beh_pc_communication_tb.vhd
@@ -81,11 +81,20 @@ begin
 		-- init & reset
 		-- we only simulate pressing of button a by now!
 		sys_res_n <= '0';
-		wait for 100 ns;
+		btn_a <= '0';
+		d_done <= '0';
+		tx_data <= "00000000";
+		rx_data <= "00000000";
+		d_zeile <= "0000000";
+		d_spalte <= "0000000";
+		tx_new <= '0';
+		tx_done <= '0';
+		
+		wait for 90 ns;
 		sys_res_n <= '1';
-
+		wait for 30 ns;
 		btn_a <= '1';
-		wait for 15ns;
+		wait for 15 ns;
 		btn_a <= '0';
 		wait;
 	end process reset_and_button;
diff --git a/src/pc_communication.vhd b/src/pc_communication.vhd
index 5351784..4c3a8b9 100644
--- a/src/pc_communication.vhd
+++ b/src/pc_communication.vhd
@@ -49,7 +49,12 @@ begin
 			state <= IDLE;
 			push_history <= '0';
 			spalte <= "0000000";
+			spalte_next <= "0000000";
 			zeile <= "0000000";
+			zeile_next <= "0000000";
+			d_get <= '0';
+			tx_new <= '0';
+			tx_data <= "00000000";
 		elsif rising_edge(sys_clk) then
 			push_history <= push_history_next;
 			spalte <= spalte_next;
@@ -63,17 +68,19 @@ begin
 
 	process (spalte_up)
 	variable spalte_tmp, zeile_tmp : integer;
+	variable spalte2_tmp, zeile2_tmp : std_logic_vector(7 downto 0);
 	begin
 		if (spalte_up = '1') then
 			if (spalte > X"45") then
 				spalte_next <= "0000000";
-				zeile_tmp := to_integer(unsigned(zeile));
-				zeile_tmp := zeile_tmp + 1;
-				zeile_next <= hbyte(to_unsigned(zeile_tmp,8));
+				zeile_tmp := to_integer(unsigned(zeile)) + 1;
+				zeile2_tmp := std_logic_vector(to_unsigned(zeile_tmp,8));
+				zeile_next <= hzeile(zeile2_tmp(6 downto 0));
 			else
-				spalte_tmp := to_integer(unsigned(spalte));
-				spalte_tmp := spalte_tmp + 1;
-				spalte_next <= hbyte(to_unsigned(spalte_tmp,8));
+				spalte_tmp := to_integer(unsigned(spalte)) + 1;
+				spalte2_tmp := std_logic_vector(to_unsigned(spalte_tmp,8));
+				spalte_next <= hspalte(spalte2_tmp(6 downto 0));
+
 				zeile_next <= zeile;
 			end if;
 			spalte_up <= '0';
@@ -95,15 +102,17 @@ begin
 		end if;
 	end process async_push_history;
 
-	output_pc : process (zeile, spalte)
+	output_pc : process (state, zeile, spalte, char)
 	begin
+		d_get <= '0';
+		spalte_next <= "0000000";
+		zeile_next <= "0000000";
 		case state is 
 			when IDLE =>
-				spalte_next <= "0000000";
-				zeile_next <= "0000000";
+				null;
 			when FETCH =>
-				d_zeile <= zeile;
-				d_spalte <= spalte;
+				d_zeile <= zeile_next;
+				d_spalte <= spalte_next;
 				d_get <= '1';
 				char_en <= '1';
 				-- wait for timer overflow
@@ -118,11 +127,12 @@ begin
 		end case;
 	end process output_pc;
 
-	next_state_pc : process (rx_new, btn_a)
+	next_state_pc : process (rx_new, btn_a, d_done, tx_done)
 	begin
+		spalte_up <= '0';
 		case state is
 			when IDLE =>
-				if rx_new= '1' or btn_a = '1' then
+				if rx_new = '1' or btn_a = '1' then
 					state_next <= FETCH;
 					char <= d_char; --latch
 				end if;
@@ -133,6 +143,7 @@ begin
 			when FORWARD =>
 				if (tx_done = '1') then
 					state_next <= FETCH;
+					spalte_up <= '1';
 				end if;
 			when DONE =>
 				-- be there for a single cycle and then