- postlayout: nochmal testen obs im tilab wirklich ned geht.
+== BUGS ==
+- warum ist in beh_history s_done und finished manchmal 'X'?
+
== low prio ==
- logic elements eliminieren
- coverage fuer abgabe noetig?
- bei -cover funktioniert 's' nicht, siehe http://pastebin.com/p8RwNk7j
- wie detailiert muessen die screenshots der simulationen sein?
+- warum ist auf seite 14 im foliensatz "VHDL_Architecture" "directly at
+ instantation" durchgestrichen? :/ (wird so ziemlich ueberall verwendet hier)
== FAQ =
end process;
process
- function ascii2sc (x : hbyte) return hbyte is
- variable y : hbyte;
- begin
- case x is
- when x"30" => y := SC_KP_0;
- when x"31" => y := SC_KP_1;
- when x"32" => y := SC_KP_2;
- when x"33" => y := SC_KP_3;
- when x"34" => y := SC_KP_4;
- when x"35" => y := SC_KP_5;
- when x"36" => y := SC_KP_6;
- when x"37" => y := SC_KP_7;
- when x"38" => y := SC_KP_8;
- when x"39" => y := SC_KP_9;
- when x"2b" => y := SC_KP_PLUS;
- when x"2d" => y := SC_KP_MINUS;
- when x"2a" => y := SC_KP_MUL;
- when x"2f" => y := SC_KP_DIV;
- when x"20" => y := SC_SPACE;
- when x"1c" => y := SC_ENTER;
- when x"0e" => y := SC_BKSP;
- when others => y := x"41";
- end case;
- return y;
- end function;
-
- function valid_char (x : std_logic_vector(7 downto 0)) return boolean is
- variable y : boolean;
- begin
- case x is
- when SC_KP_0 | SC_KP_1 | SC_KP_2 | SC_KP_3 |
- SC_KP_4 | SC_KP_5 | SC_KP_6 | SC_KP_7 |
- SC_KP_8 | SC_KP_9 | SC_KP_PLUS |
- SC_KP_MINUS | SC_KP_MUL |
- SC_KP_DIV | SC_SPACE |
- SC_BKSP | SC_ENTER =>
- y := true;
- when others => y := false;
- end case;
- return y;
- end function;
-
-- textio stuff
use std.textio.all;
file f : text open read_mode is "../../src/history.test";
next mainl;
end if;
- -- jedes mal release
- new_data <= '1';
- data <= x"f0";
- icwait(sys_clk, 1);
- new_data <= '0';
- icwait(sys_clk, 1);
new_data <= '1';
case input(j) is
when nul => data <= ascii2sc(x"1c"); -- $ (enter)
when '!' => data <= ascii2sc(x"0e"); -- ! (backspace)
+ when '/' =>
+ data <= x"e0";
+ icwait(sys_clk, 1);
+ new_data <= '0';
+ icwait(sys_clk, 1);
+ new_data <= '1';
+ data <= SC_KP_DIV;
when others => data <= ascii2sc(std_logic_vector(to_unsigned(character'pos(input(j)),8)));
end case;
- icwait(sys_clk, 1);
- new_data <= '0';
-- ack'en skippen, falls es ein "spezielles" zeichen ist (steht
-- in abhaengigkeit zum vorherigen zeichen)
end process;
process
- function ascii2sc (x : hbyte) return hbyte is
- variable y : hbyte;
- begin
- case x is
- when x"30" => y := SC_KP_0;
- when x"31" => y := SC_KP_1;
- when x"32" => y := SC_KP_2;
- when x"33" => y := SC_KP_3;
- when x"34" => y := SC_KP_4;
- when x"35" => y := SC_KP_5;
- when x"36" => y := SC_KP_6;
- when x"37" => y := SC_KP_7;
- when x"38" => y := SC_KP_8;
- when x"39" => y := SC_KP_9;
- when x"2b" => y := SC_KP_PLUS;
- when x"2d" => y := SC_KP_MINUS;
- when x"2a" => y := SC_KP_MUL;
- when x"2f" => y := SC_KP_DIV;
- when x"20" => y := SC_SPACE;
- when x"1c" => y := SC_ENTER;
- when x"0e" => y := SC_BKSP;
- when others => y := x"41";
- end case;
- return y;
- end function;
-
- function valid_char (x : std_logic_vector(7 downto 0)) return boolean is
- variable y : boolean;
- begin
- case x is
- when SC_KP_0 | SC_KP_1 | SC_KP_2 | SC_KP_3 |
- SC_KP_4 | SC_KP_5 | SC_KP_6 | SC_KP_7 |
- SC_KP_8 | SC_KP_9 | SC_KP_PLUS |
- SC_KP_MINUS | SC_KP_MUL |
- SC_KP_DIV | SC_SPACE |
- SC_BKSP | SC_ENTER =>
- y := true;
- when others => y := false;
- end case;
- return y;
- end function;
-
-- textio stuff
use std.textio.all;
file f : text open read_mode is "../../src/scanner.test";
S_PUTCH2, S_WAIT, S_NOP1, S_READ_RESULT_0, S_READ_RESULT_1,
S_READ_RESULT_2, S_INIT, S_PS1_0, S_PS1_1, S_PS1_2, S_PS1_3, S_PS1_4,
S_PS1_5);
+ type DISPLAY_ISTATE is (IS_BACK_2_BLANK, IS_BLANK_2_BACK,
+ IS_NL1_2_ZEILEUP, IS_RESULT2_2_CR1, IS_CR1_2_NL1, IS_NL1_2_RESULT0,
+ IS_RESULT0_2_RESULT1, IS_RESULT1_2_RESULT2, IS_ZEILEUP_2_PS10,
+ IS_PS10_2_PS11, IS_PS11_2_PS12, IS_PS12_2_PS13, IS_PS13_2_PS14,
+ IS_PS14_2_PS15, IS_RANDOM_2_IDLE, IS_OTHER_2_NL1);
+
signal state_int, state_next : DISPLAY_STATE;
+ signal istate_next, istate_int : DISPLAY_ISTATE;
signal d_zeile_int, d_zeile_next : hzeile;
signal d_spalte_int, d_spalte_next : hspalte;
signal d_get_int, d_get_next : std_logic;
signal command_int, command_next : std_logic_vector(7 downto 0);
signal command_data_int, command_data_next : std_logic_vector(31 downto 0);
- signal istate_next, istate_int : signed(4 downto 0);
begin
d_zeile <= d_zeile_int;
d_spalte <= d_spalte_int;
if sys_res_n = '0' then
-- internal
state_int <= S_INIT;
- istate_int <= (others => '0');
+ istate_int <= IS_RANDOM_2_IDLE;
-- out
d_zeile_int <= (others => '0');
d_spalte_int <= (others => '0');
state_next <= S_PS1_0;
when S_PS1_0 =>
- istate_next <= b"01001";
+ istate_next <= IS_PS10_2_PS11;
state_next <= S_WAIT;
when S_PS1_1 =>
- istate_next <= b"01010";
+ istate_next <= IS_PS11_2_PS12;
state_next <= S_WAIT;
when S_PS1_2 =>
- istate_next <= b"01011";
+ istate_next <= IS_PS12_2_PS13;
state_next <= S_WAIT;
when S_PS1_3 =>
- istate_next <= b"01100";
+ istate_next <= IS_PS13_2_PS14;
state_next <= S_WAIT;
when S_PS1_4 =>
- istate_next <= b"01101";
+ istate_next <= IS_PS14_2_PS15;
state_next <= S_WAIT;
when S_PS1_5 =>
- istate_next <= b"00111";
+ istate_next <= IS_RANDOM_2_IDLE;
state_next <= S_WAIT;
when SIDLE =>
- istate_next <= b"00111"; -- default: immer wieder ins SIDLE;
+ istate_next <= IS_RANDOM_2_IDLE;
if d_new_bs = '1' then
state_next <= S_NEW_BS;
elsif d_new_eingabe = '1' then
if free = '0' then
state_next <= S_WAIT;
case istate_int is
- when b"00111" => istate_next <= b"00001"; -- => danach S_BLANK und wieder hierher
- when others => istate_next <= b"00111"; -- => danach SIDLE
+ when IS_RANDOM_2_IDLE => istate_next <= IS_BACK_2_BLANK;
+ when others => istate_next <= IS_RANDOM_2_IDLE;
end case;
end if;
when S_BLANK =>
if free = '0' then
state_next <= S_WAIT;
- istate_next <= b"00010"; -- => danach S_BACK
+ istate_next <= IS_BLANK_2_BACK;
end if;
when S_ZEILEUP =>
case istate_int is
- when b"00011" =>
+ when IS_NL1_2_ZEILEUP =>
state_next <= S_WAIT;
- istate_next <= b"01000"; -- => danach S_PS1
+ istate_next <= IS_ZEILEUP_2_PS10;
when others => state_next <= S_CR1;
end case;
if free = '0' then
state_next <= S_WAIT;
case istate_int is
- when b"00110" => istate_next <= b"00101"; -- => danach S_NL1, S_ZEILEUP, S_PS1, SIDLE
- when others => istate_next <= b"00000"; -- => danach S_NL1 und S_COUNTUP
+ when IS_RESULT2_2_CR1 => istate_next <= IS_OTHER_2_NL1;
+ when others => istate_next <= IS_CR1_2_NL1;
end case;
end if;
when S_NL1 =>
if free = '0' then
state_next <= S_WAIT;
case istate_int is
- when b"00101" => istate_next <= b"00011"; -- => danach S_ZEILEUP, PS1
- when others => istate_next <= b"10000"; -- => danach S_READ_RESULT_0
+ when IS_OTHER_2_NL1 => istate_next <= IS_NL1_2_ZEILEUP;
+ when others => istate_next <= IS_NL1_2_RESULT0;
end case;
end if;
when S_READ_RESULT_0 =>
- istate_next <= b"10001";
+ istate_next <= IS_RESULT0_2_RESULT1;
state_next <= S_WAIT;
when S_READ_RESULT_1 =>
- istate_next <= b"10010";
+ istate_next <= IS_RESULT1_2_RESULT2;
state_next <= S_WAIT;
when S_READ_RESULT_2 =>
if unsigned(d_spalte_int) /= 70 then
state_next <= S_COUNTUP;
- istate_next <= b"10010"; -- => wieder nach S_READ_RESULT_2
+ istate_next <= IS_RESULT1_2_RESULT2;
else
state_next <= S_WAIT;
- istate_next <= b"00110"; -- => danach S_CR1 und d_spalte_next clearen und d_zeile_next inkrementieren
+ istate_next <= IS_RESULT2_2_CR1;
end if;
when S_COUNTUP =>
when S_NOP1 =>
if free = '1' then
case istate_int is
- when b"00000" => state_next <= S_NL1;
- when b"00001" => state_next <= S_BLANK;
- when b"00010" => state_next <= S_BACK;
- when b"00011" => state_next <= S_ZEILEUP;
- when b"00110" => state_next <= S_CR1;
- when b"00101" => state_next <= S_NL1;
+ when IS_CR1_2_NL1 => state_next <= S_NL1;
+ when IS_BACK_2_BLANK => state_next <= S_BLANK;
+ when IS_BLANK_2_BACK => state_next <= S_BACK;
+ when IS_NL1_2_ZEILEUP => state_next <= S_ZEILEUP;
+ when IS_RESULT2_2_CR1 => state_next <= S_CR1;
+ when IS_OTHER_2_NL1 => state_next <= S_NL1;
- when b"10000" => state_next <= S_READ_RESULT_0;
- when b"10001" => state_next <= S_READ_RESULT_1;
- when b"10010" => state_next <= S_READ_RESULT_2;
+ when IS_NL1_2_RESULT0 => state_next <= S_READ_RESULT_0;
+ when IS_RESULT0_2_RESULT1 => state_next <= S_READ_RESULT_1;
+ when IS_RESULT1_2_RESULT2 => state_next <= S_READ_RESULT_2;
- when b"01000" => state_next <= S_PS1_0;
- when b"01001" => state_next <= S_PS1_1;
- when b"01010" => state_next <= S_PS1_2;
- when b"01011" => state_next <= S_PS1_3;
- when b"01100" => state_next <= S_PS1_4;
- when b"01101" => state_next <= S_PS1_5;
- when others => state_next <= SIDLE;
+ when IS_ZEILEUP_2_PS10 => state_next <= S_PS1_0;
+ when IS_PS10_2_PS11 => state_next <= S_PS1_1;
+ when IS_PS11_2_PS12 => state_next <= S_PS1_2;
+ when IS_PS12_2_PS13 => state_next <= S_PS1_3;
+ when IS_PS13_2_PS14 => state_next <= S_PS1_4;
+ when IS_PS14_2_PS15 => state_next <= S_PS1_5;
+ when IS_RANDOM_2_IDLE => state_next <= SIDLE;
end case;
end if;
end case;
procedure icwait(signal clk_i : IN std_logic; cycles: natural);
+ function ascii2sc (x : hbyte) return hbyte;
+ function valid_char (x : hbyte) return boolean;
+
-- http://www.marjorie.de/ps2/scancode-set2.htm
- constant SC_KP_0 : std_logic_vector(7 downto 0) := x"70";
- constant SC_KP_1 : std_logic_vector(7 downto 0) := x"69";
- constant SC_KP_2 : std_logic_vector(7 downto 0) := x"72";
- constant SC_KP_3 : std_logic_vector(7 downto 0) := x"7a";
- constant SC_KP_4 : std_logic_vector(7 downto 0) := x"6b";
- constant SC_KP_5 : std_logic_vector(7 downto 0) := x"73";
- constant SC_KP_6 : std_logic_vector(7 downto 0) := x"74";
- constant SC_KP_7 : std_logic_vector(7 downto 0) := x"6c";
- constant SC_KP_8 : std_logic_vector(7 downto 0) := x"75";
- constant SC_KP_9 : std_logic_vector(7 downto 0) := x"7d";
+ constant SC_KP_0 : hbyte := x"70";
+ constant SC_KP_1 : hbyte := x"69";
+ constant SC_KP_2 : hbyte := x"72";
+ constant SC_KP_3 : hbyte := x"7a";
+ constant SC_KP_4 : hbyte := x"6b";
+ constant SC_KP_5 : hbyte := x"73";
+ constant SC_KP_6 : hbyte := x"74";
+ constant SC_KP_7 : hbyte := x"6c";
+ constant SC_KP_8 : hbyte := x"75";
+ constant SC_KP_9 : hbyte := x"7d";
- constant SC_0 : std_logic_vector(7 downto 0) := x"45";
- constant SC_1 : std_logic_vector(7 downto 0) := x"16";
- constant SC_2 : std_logic_vector(7 downto 0) := x"1e";
- constant SC_3 : std_logic_vector(7 downto 0) := x"26";
- constant SC_4 : std_logic_vector(7 downto 0) := x"25";
- constant SC_5 : std_logic_vector(7 downto 0) := x"2e";
- constant SC_6 : std_logic_vector(7 downto 0) := x"36";
- constant SC_7 : std_logic_vector(7 downto 0) := x"3d";
- constant SC_8 : std_logic_vector(7 downto 0) := x"3e";
- constant SC_9 : std_logic_vector(7 downto 0) := x"46";
+ constant SC_0 : hbyte := x"45";
+ constant SC_1 : hbyte := x"16";
+ constant SC_2 : hbyte := x"1e";
+ constant SC_3 : hbyte := x"26";
+ constant SC_4 : hbyte := x"25";
+ constant SC_5 : hbyte := x"2e";
+ constant SC_6 : hbyte := x"36";
+ constant SC_7 : hbyte := x"3d";
+ constant SC_8 : hbyte := x"3e";
+ constant SC_9 : hbyte := x"46";
- constant SC_KP_PLUS : std_logic_vector(7 downto 0) := x"79";
- constant SC_KP_MINUS : std_logic_vector(7 downto 0) := x"7b";
- constant SC_KP_MUL : std_logic_vector(7 downto 0) := x"7c";
- constant SC_KP_DIV : std_logic_vector(7 downto 0) := x"4a"; -- inkl. 0xe0!
+ constant SC_KP_PLUS : hbyte := x"79";
+ constant SC_KP_MINUS : hbyte := x"7b";
+ constant SC_KP_MUL : hbyte := x"7c";
+ constant SC_KP_DIV : hbyte := x"4a"; -- inkl. 0xe0!
-- fuer deutsches layout, alle anderen zeichen sind unguenstig belegt
- constant SC_PLUS : std_logic_vector(7 downto 0) := x"5b";
+ constant SC_PLUS : hbyte := x"5b";
- constant SC_ENTER : std_logic_vector(7 downto 0) := x"5a";
- constant SC_BKSP : std_logic_vector(7 downto 0) := x"66";
- constant SC_SPACE : std_logic_vector(7 downto 0) := x"29";
+ constant SC_ENTER : hbyte := x"5a";
+ constant SC_BKSP : hbyte := x"66";
+ constant SC_SPACE : hbyte := x"29";
end package gen_pkg;
package body gen_pkg is
wait until clk_i= '0' and clk_i'event;
end loop;
end;
+
+ function ascii2sc (x : hbyte) return hbyte is
+ variable y : hbyte;
+ begin
+ case x is
+ when x"30" => y := SC_KP_0;
+ when x"31" => y := SC_KP_1;
+ when x"32" => y := SC_KP_2;
+ when x"33" => y := SC_KP_3;
+ when x"34" => y := SC_KP_4;
+ when x"35" => y := SC_KP_5;
+ when x"36" => y := SC_KP_6;
+ when x"37" => y := SC_KP_7;
+ when x"38" => y := SC_KP_8;
+ when x"39" => y := SC_KP_9;
+ when x"2b" => y := SC_KP_PLUS;
+ when x"2d" => y := SC_KP_MINUS;
+ when x"2a" => y := SC_KP_MUL;
+ when x"2f" => y := SC_KP_DIV;
+ when x"20" => y := SC_SPACE;
+ when x"1c" => y := SC_ENTER;
+ when x"0e" => y := SC_BKSP;
+ when others => y := x"41";
+ end case;
+ return y;
+ end function;
+
+ function valid_char (x : hbyte) return boolean is
+ variable y : boolean;
+ begin
+ case x is
+ when SC_KP_0 | SC_KP_1 | SC_KP_2 | SC_KP_3 |
+ SC_KP_4 | SC_KP_5 | SC_KP_6 | SC_KP_7 |
+ SC_KP_8 | SC_KP_9 | SC_KP_PLUS |
+ SC_KP_MINUS | SC_KP_MUL |
+ SC_KP_DIV | SC_SPACE |
+ SC_BKSP | SC_ENTER =>
+ y := true;
+ when others => y := false;
+ end case;
+ return y;
+ end function;
end package body gen_pkg;
projects / hwmod.git / commitdiff