cleanup pc communication

diff --git a/src/beh_pc_communication_tb.vhd b/src/beh_pc_communication_tb.vhd
index bdce739fa69528443f85fe6d952f73c17035b2da..03d1d62cac108c8c6663047136bc9fb56a53b20a 100644 (file)
--- a/src/beh_pc_communication_tb.vhd
+++ b/src/beh_pc_communication_tb.vhd
@@ -117,7 +117,6 @@ begin
                -- we only simulate pressing of button a by now!
                sys_res_n <= '0';
                btn_a <= '0';
-               tx_data <= ( others => '0');
                rx_data <= ( others => '0');
                rx_new <= '0';
                

diff --git a/src/pc_communication.vhd b/src/pc_communication.vhd
index 610ec681f7af8ed53a3e355fa8b32b22125e5d2c..321d0a36feb4627e4a41f50216909c8a6614341b 100644 (file)
--- a/src/pc_communication.vhd
+++ b/src/pc_communication.vhd
@@ -32,15 +32,12 @@ end entity pc_communication;
 architecture beh of pc_communication is
        signal spalte, spalte_next : integer range 1 to hspalte_max + 1;
        signal zeile , zeile_next : integer range 1 to hzeile_max + 1;
-       signal spalte_up, spalte_up_next : std_logic;
        signal get, get_next : std_logic;
        signal new_i, new_i_next : std_logic;
        signal tx_done_i, tx_done_i_next : std_logic;
        signal tx_data_i, tx_data_i_next : std_logic_vector (7 downto 0);
        signal s_done, s_done_next : std_logic;
 
-       signal char, char_next : hbyte;
-       signal char_en : std_logic;
        type STATE_PC is (IDLE, FETCH, FORWARD, DONE);
        signal state, state_next : STATE_PC ;
 
@@ -50,7 +47,6 @@ begin
        d_zeile <= hzeile(std_logic_vector(to_unsigned(zeile,7)));
        d_spalte <= hspalte(std_logic_vector(to_unsigned(spalte,7)));
        d_get <= get;
-       char_next <= d_char;
        tx_new <= new_i;
        tx_done_i_next <= tx_done;
        tx_data <= tx_data_i;
@@ -64,7 +60,6 @@ begin
                        get <= '0';
                        new_i <= '0';
                        tx_data_i <= "00000000";
-                       spalte_up <= '0';
                        tx_done_i <= '0';
                        s_done <= '0';
                elsif rising_edge(sys_clk) then
@@ -75,25 +70,37 @@ begin
                        new_i <= new_i_next;
                        tx_done_i <= tx_done_i_next;
                        tx_data_i <= tx_data_i_next;
-                       spalte_up <= spalte_up_next;
                        s_done <= s_done_next;
-                       if (char_en = '1') then
-                               char <= char_next;
-                       end if;
                end if;
        end process sync;
 
-       output_pc : process (state, zeile, spalte, char, tx_data_i, tx_done_i, spalte_up)
+       output_pc : process (state, zeile, spalte, tx_data_i, tx_done_i)
+       variable spalte_up : std_logic;
        begin
                get_next <= '0';
                new_i_next <= '0';
 
-               spalte_up_next <= '0';
                s_done_next <= '0';
                spalte_next <= spalte;
                zeile_next <= zeile;
                tx_data_i_next <= tx_data_i;
-               char_en <= '0';
+               spalte_up := '0';
+
+               case state is
+                       when IDLE =>
+                               null;
+                       when FETCH =>
+                               get_next <= '1';
+                               tx_data_i_next <= d_char;
+                       when FORWARD =>
+                               new_i_next <= '1';
+                               if (tx_done_i = '1') then
+                                       spalte_up := '1';
+                               end if;
+
+                       when DONE =>
+                               null;
+               end case;
 
                if spalte_up = '1' then
                        if spalte = hspalte_max  then
@@ -111,22 +118,6 @@ begin
                        end if;
                end if;
 
-               case state is
-                       when IDLE =>
-                               null;
-                       when FETCH =>
-                               get_next <= '1';
-                               char_en <= '1';
-                       when FORWARD =>
-                               tx_data_i_next <= char;
-                               new_i_next <= '1';
-                               if (tx_done_i = '1') then
-                                       spalte_up_next <= '1';
-                               end if;
-
-                       when DONE =>
-                               null;
-               end case;
        end process output_pc;
 
        next_state_pc : process (state, rx_new, rx_data, btn_a, d_done, tx_done_i, s_done)