X-Git-Url: http://wien.tomnetworks.com/gitweb/?p=hwmod.git;a=blobdiff_plain;f=src%2Fpc_communication.vhd;fp=src%2Fpc_communication.vhd;h=290f1fd1914104add23882c7ca13fcd662324270;hp=8a29ba7976e6b6c802c7a372b6e6800c91ecec7d;hb=5377f28f42cf5ddadb447a4ac65c56c787d4092f;hpb=78b81af08fdecb68941b50aa298dc6b8492ce770

diff --git a/src/pc_communication.vhd b/src/pc_communication.vhd
index 8a29ba7..290f1fd 100644
--- a/src/pc_communication.vhd
+++ b/src/pc_communication.vhd
@@ -36,7 +36,7 @@ architecture beh of pc_communication is
 	type STATE_PC is (IDLE, FETCH, FORWARD, UART_DONE, CR, CR_WAIT,
 		NL, NL_WAIT, PRINT_NO1, PRINT_NO1_WAIT, PRINT_NO2, PRINT_NO2_WAIT,
 		PRINT_NO3, PRINT_NO3_WAIT, PRINT_NO4, PRINT_NO4_WAIT, PRINT_NO5,
-		PRINT_NO5_WAIT, PRINT_NO6, PRINT_NO0_WAIT);
+		PRINT_NO5_WAIT, PRINT_NO6);
 	signal state, state_next : STATE_PC ;
 begin
 	pc_zeile <= hzeile(std_logic_vector(to_unsigned(zeile,7)));
@@ -80,14 +80,11 @@ begin
 		state_next <= state;
 		case state is
 			when IDLE =>
-				if (rx_new = '1' and rx_data = x"0a") or btn_a = '0' then
-					state_next <= PRINT_NO0_WAIT;
-				end if;
-
-			when PRINT_NO0_WAIT =>
-				if tx_done_i = '0' then
+				--if (rx_new = '1' and rx_data = x"0a") or btn_a = '0' then
+				if (rx_new = '1' or btn_a = '0') and tx_done_i = '0' then
 					state_next <= PRINT_NO1;
 				end if;
+
 			when PRINT_NO1 =>
 				tx_data_i_next <= x"28"; -- '('
 				new_i_next <= '1';
@@ -179,7 +176,9 @@ begin
 					state_next <= NL_WAIT;
 				end if;
 			when NL_WAIT =>
-				state_next <= CR;
+				if tx_done_i = '0' then
+					state_next <= CR;
+				end if;
 			when CR =>
 				tx_data_i_next <= x"0d";
 				new_i_next <= '1';
@@ -187,13 +186,15 @@ begin
 					state_next <= CR_WAIT;
 				end if;
 			when CR_WAIT =>
-				tmp := std_logic_vector(to_unsigned(zeile,7));
-				if tmp(0) = '0' then
-					-- es handelt sich um eingabe im naechsten schritt
-					-- => print zeilennummer
-					state_next <= PRINT_NO0_WAIT;
-				else
-					state_next <= FETCH;
+				if tx_done_i = '0' then
+					tmp := std_logic_vector(to_unsigned(zeile,7));
+					if tmp(0) = '0' then
+						-- es handelt sich um eingabe im naechsten schritt
+						-- => print zeilennummer
+						state_next <= PRINT_NO1;
+					else
+						state_next <= FETCH;
+					end if;
 				end if;
 				if zeile = HZEILE_MAX then
 					state_next <= IDLE;