X-Git-Url: http://wien.tomnetworks.com/gitweb/?p=hwmod.git;a=blobdiff_plain;f=src%2Fhistory.vhd;h=775620475a6e2ba1f28dbe94016c22fe2c8da3bb;hp=ddd26f62b11fbc4233c8700c442cac2419d78c79;hb=b42b2b9d669e1d12db43c70704b4657901d1ab02;hpb=d070f8eadaa8f62b9c5c0709f9e447eb24d590d9 diff --git a/src/history.vhd b/src/history.vhd index ddd26f6..7756204 100644 --- a/src/history.vhd +++ b/src/history.vhd @@ -99,7 +99,7 @@ begin p_wdone_int <= '0'; p_read_int <= (others => '0'); p_sp_read_int <= (others => '0'); - p_sp_write_int <= std_logic_vector(to_unsigned(71,p_sp_write_int'length)); + p_sp_write_int <= std_logic_vector(to_unsigned(HSPALTE_MAX,p_sp_write_int'length)); pc_char_int <= (others => '0'); pc_done_int <= '0'; @@ -182,11 +182,11 @@ begin when S_S_FIN_POSUP => state_next <= S_S_CLEAR_NEXT0; when S_S_CLEAR_NEXT0 => - if s_cnt_int = hspalte(to_unsigned(71,hspalte'length)) then + if s_cnt_int = hspalte(to_unsigned(HSPALTE_MAX,hspalte'length)) then state_next <= S_S_CLEAR_NEXT1; end if; when S_S_CLEAR_NEXT1 => - if s_cnt_int = hspalte(to_unsigned(71,hspalte'length)) then + if s_cnt_int = hspalte(to_unsigned(HSPALTE_MAX,hspalte'length)) then state_next <= SIDLE; end if; when S_S_DONE => @@ -270,9 +270,9 @@ begin when S_S_INIT => null; when S_S_WRITE => - -- nur bei < 71 weiter machen + -- nur bei < HSPALTE_MAX weiter machen -- Hint: '/=' billiger als '<' - if unsigned(s_cnt_int) /= 71 then + if unsigned(s_cnt_int) /= HSPALTE_MAX then wr_next <= '1'; address_next <= std_logic_vector(unsigned(pos_int) + unsigned(s_cnt_int)); data_in_next <= s_char; @@ -300,7 +300,7 @@ begin d_new_result_next <= '1'; -- resetten der parser counter p_sp_read_next <= (others => '0'); - p_sp_write_next <= std_logic_vector(to_unsigned(71,p_sp_write_next'length)); + p_sp_write_next <= std_logic_vector(to_unsigned(HSPALTE_MAX,p_sp_write_next'length)); when S_S_FIN_POSUP => -- overflowcheck nach 50 berechnungen => wieder von vorne anfangen if pos_int = std_logic_vector(to_unsigned(H_RAM_SIZE-142,H_RAM_WIDTH)) then @@ -313,7 +313,7 @@ begin wr_next <= '1'; address_next <= std_logic_vector(unsigned(pos_int) + unsigned(s_cnt_int)); data_in_next <= (others => '0'); - if s_cnt_int = hspalte(to_unsigned(71,hspalte'length)) then + if s_cnt_int = hspalte(to_unsigned(HSPALTE_MAX,hspalte'length)) then s_cnt_next <= (0 => '1', others => '0'); else s_cnt_next <= std_logic_vector(unsigned(s_cnt_int) + 1); @@ -321,9 +321,9 @@ begin when S_S_CLEAR_NEXT1 => -- die naechsten 142 bytes im speicher resetten wr_next <= '1'; - address_next <= std_logic_vector(unsigned(pos_int) + to_unsigned(71,H_RAM_WIDTH) + unsigned(s_cnt_int)); + address_next <= std_logic_vector(unsigned(pos_int) + to_unsigned(HSPALTE_MAX,H_RAM_WIDTH) + unsigned(s_cnt_int)); data_in_next <= (others => '0'); - if s_cnt_int = hspalte(to_unsigned(71,hspalte'length)) then + if s_cnt_int = hspalte(to_unsigned(HSPALTE_MAX,hspalte'length)) then s_cnt_next <= (0 => '1', others => '0'); else s_cnt_next <= std_logic_vector(unsigned(s_cnt_int) + 1); @@ -340,7 +340,8 @@ begin when S_D_INIT => addr_tmp := (others => '0'); addr_tmp(hzeile'length - 1 downto 0) := d_zeile; - mul_tmp := std_logic_vector(unsigned(addr_tmp) * to_unsigned(71,H_RAM_WIDTH)); + mul_tmp := std_logic_vector(unsigned(addr_tmp) * + to_unsigned(HSPALTE_MAX,H_RAM_WIDTH)); addr_tmp := mul_tmp((addr_tmp'length - 1) downto 0); addr_tmp := std_logic_vector(unsigned(addr_tmp) + unsigned(d_spalte)); address_next <= addr_tmp; @@ -353,7 +354,7 @@ begin when S_PC_INIT => addr_tmp := (others => '0'); addr_tmp(hzeile'length - 1 downto 0) := pc_zeile; - mul_tmp := std_logic_vector(unsigned(addr_tmp) * to_unsigned(71,H_RAM_WIDTH)); + mul_tmp := std_logic_vector(unsigned(addr_tmp) * to_unsigned(HSPALTE_MAX,H_RAM_WIDTH)); addr_tmp := mul_tmp((addr_tmp'length - 1) downto 0); addr_tmp := std_logic_vector(unsigned(addr_tmp) + unsigned(pc_spalte)); address_next <= addr_tmp; @@ -377,7 +378,7 @@ begin data_in_next <= p_write; spalte_tmp := std_logic_vector(unsigned(p_sp_write_int) - 1); p_sp_write_next <= spalte_tmp; - address_next <= std_logic_vector(unsigned(pos_int) + to_unsigned(71,H_RAM_WIDTH) + unsigned(spalte_tmp)); + address_next <= std_logic_vector(unsigned(pos_int) + to_unsigned(HSPALTE_MAX,H_RAM_WIDTH) + unsigned(spalte_tmp)); when S_P_WRITE_DONE => p_wdone_next <= '1'; when S_P_DONE =>