X-Git-Url: http://wien.tomnetworks.com/gitweb/?p=hwmod.git;a=blobdiff_plain;f=src%2FMakefile;h=32002123835b318aeea52d56a134d1a5f2be5f19;hp=b0032333f20cf06c4de64475e81f49361c99ddc2;hb=HEAD;hpb=5942fc137d9e3b323c71598bf67dab9226e82a82

diff --git a/src/Makefile b/src/Makefile
index b003233..3200212 100644
--- a/src/Makefile
+++ b/src/Makefile
@@ -13,6 +13,15 @@ QUOPT := --read_settings_files=on --write_settings_files=off calc -c calc
 HN := $(shell hostname)
 TILABHOSTS := $(shell echo ti{1..9}) apps1
 
+ifeq ($(findstring $(HN), $(TILABHOSTS)),$(HN))
+# die option 's' geht nicht... :(
+COVERVCOM := -cover bcet
+COVERVSIM := -coverage
+else
+COVERVCOM :=
+COVERVSIM :=
+endif
+
 ifeq ($(findstring $(HN), $(TILABHOSTS)),$(HN))
 QUMACRO := unset LS_COLORS; cd $(QUARTUS); export LD_LIBRARY_PATH=/opt/quartus/quartus/linux64; export LM_LICENSE_FILE=26888@quartus; 
 else
@@ -24,11 +33,11 @@ WORK := work
 # o source files der module
 # o reihenfolge ist wichtig
 # o keine testbechnes hier angeben
-SRCFILES := alu parser scanner
+SRCFILES := alu parser scanner display sp_ram history uart_tx uart_rx pc_communication
 
 # o files der packages
 # o keine testbechnes hier angeben
-PKGFILES = gen_pkg math_pkg
+PKGFILES = math_pkg gen_pkg
 PKGFILES += textmode_vga/textmode_vga_platform_dependent_pkg
 PKGFILES += textmode_vga/textmode_vga_pkg
 PKGFILES += textmode_vga/font_pkg
@@ -68,15 +77,15 @@ $(D_BEHSIM)/modelsim.ini:
 
 $(D_BEHSIM)/$(WORK)/%/_primary.dat: %.vhd $(D_BEHSIM)/modelsim.ini
 	@echo " CC    $<"
-	@cd $(D_BEHSIM); \
-	vcom -work $(WORK) $(MPWD)/$<
+	cd $(D_BEHSIM); \
+	vcom $(COVERVCOM) -work $(WORK) $(MPWD)/$<
 
 beh_%: $(D_BEHSIM)/$(WORK)/beh_%_tb/_primary.dat beh_%_tb.do behsim
 	cd $(D_BEHSIM); \
-	vsim "work.$@_tb(sim)" -f /dev/null -do $(MPWD)/$@_tb.do
+	vsim $(COVERVSIM) "work.$@_tb(sim)" -f /dev/null -do $(MPWD)/$@_tb.do
 
 #postsim
-postsim: $(POST_VHO) $(POST_SDO)
+postsim: post_alu
 
 $(D_POSTSIM)/modelsim.ini:
 	@echo " INIT for post-layout simulation"
@@ -90,42 +99,34 @@ $(D_POSTSIM)/$(WORK)/%/_primary.dat: %.vhd
 	@cd $(D_POSTSIM); \
 	vcom -work $(WORK) $(MPWD)/$<
 
-post_%: postsim $(D_POSTSIM)/$(WORK)/post_%_tb/_primary.dat post_%_tb.do
+post_%: quartus_gen_% post_%_tb.do $(D_POSTSIM)/$(WORK)/post_%_tb/_primary.dat
 	cd $(D_POSTSIM); \
 	vsim "work.$@_tb(sim)" -sdftyp /$(POST_SDO_INST)=$(POST_SDO) -f /dev/null -do $(MPWD)/$@_tb.do
 
-$(QUARTUS): $(D_POSTSIM)/modelsim.ini
+quartus_gen_%: ../quartus/project_%.tcl $(D_POSTSIM)/modelsim.ini $(POST_VTARGETS) $(POST_SRC_VTARGETS)
 	@echo -n " Quartus  generate project"
 ifeq ($(findstring $(HN), $(TILABHOSTS)),$(HN))
-	@echo "(@tilab)"
-	@cd ../quartus; ./linux_tilab.sh
+	@echo "(@tilab): $<"
+	@cd ../quartus; rm -Rf calc; ./linux_tilab.sh $<
 else
-	@echo "(not @ tilab)"
-	@cd ../quartus; ./linux_web.sh
+	@echo "(not @ tilab): $<"
+	@cd ../quartus; rm -Rf calc; ./linux_web.sh $<
 endif
-
-#TODO: more targets plz...
-$(POST_VHO) $(POST_SDO): $(QUARTUS) $(POST_VTARGETS) $(POST_SRC_VTARGETS)
 	@echo " Quartus  analysis & synthesis"
-	@$(QUMACRO) quartus_map $(QUOPT) | tee $(MPWD)/quartusmap.tmp
+	@$(QUMACRO) quartus_map $(QUOPT)
 	@echo " Quartus  fitter"
 	@$(QUMACRO) quartus_fit $(QUOPT)
 	@echo " Quartus  assembler"
 	@$(QUMACRO) quartus_asm $(QUOPT)
 	@echo " Quartus  timing analyzer"
-	@$(QUMACRO) quartus_tan $(QUOPT) --timing_analysis_only | tee $(MPWD)/quartustan.tmp
+	@$(QUMACRO) quartus_tan $(QUOPT) --timing_analysis_only
 	@echo " Quartus  EDA netlist writer"
 	@$(QUMACRO) quartus_eda $(QUOPT)
-	#not nice atm :/
 	@echo " CC    $(POST_VHO)"
 	@cd $(D_POSTSIM); \
 	vcom -work $(WORK) $(POST_VHO)
-	@echo -n "  INFO  logic cells: "
-	@grep 'logic cells' quartusmap.tmp | awk ' { print $$3 } '
-	@grep 'Fmax ' quartustan.tmp | sed -e 's/  / /g' -e 's/Info/INFO/g' -e 's/:/ /g'
-	@rm quartus*.tmp
 
 .PHONY: clean
 clean:
-	rm -Rf $(D_BEHSIM) $(D_POSTSIM) $(QUARTUS)
+	rm -Rf $(D_BEHSIM) $(D_POSTSIM)