alu: refactor von drei prozessmodell auf zwei prozessmodell

[hwmod.git] / src / post_alu_tb.vhd

diff --git a/src/post_alu_tb.vhd b/src/post_alu_tb.vhd
index b6f9db1899ae1bd6ab88121d18a3d8bb2ea06299..cf1da2df4aefb9798dafa5d4f82d7cf21adb8107 100644 (file)
--- a/src/post_alu_tb.vhd
+++ b/src/post_alu_tb.vhd
@@ -177,14 +177,12 @@ begin
                                        assert(false) report "testfall war ein error (passt)";
                                end if;
                        else
-                               assert op3 = std_logic_vector(to_signed(testmatrix(i).expected,CBITS))
-                                       report "" & cinteger'image(testmatrix(i).o1) & 
+                               if not((op3 = std_logic_vector(to_signed(testmatrix(i).expected,CBITS))) and (opcode /= ALU_DIV or opM = std_logic_vector(to_signed(testmatrix(i).om,CBITS)))) then
+                                       assert(false) report "" & cinteger'image(testmatrix(i).o1) &
                                        " " & integer'image(to_integer(signed(opcode))) &
                                        " " & cinteger'image(testmatrix(i).o2) &
                                        "/= " & integer'image(to_integer(signed(op3))) &
                                        " -- erwartet: " & cinteger'image(testmatrix(i).expected);
-
-                               if not((op3 = std_logic_vector(to_signed(testmatrix(i).expected,CBITS))) and (opM = std_logic_vector(to_signed(testmatrix(i).om,CBITS)))) then
                                        checkall := false;
                                end if;
                        end if;