pc and uart compile

[hwmod.git] / src / pc_communication.vhd

diff --git a/src/pc_communication.vhd b/src/pc_communication.vhd
index 3681c6907efcbb495e46fb2502c73269bb044482..535178496cf1477daedc69e31b7c7d0330d18ac5 100644 (file)
--- a/src/pc_communication.vhd
+++ b/src/pc_communication.vhd
@@ -3,7 +3,6 @@ use ieee.std_logic_1164.all;
 use ieee.numeric_std.all;
 use work.gen_pkg.all;
 
-
 entity pc_communication is
        port (
                sys_clk : in std_logic;
@@ -18,51 +17,127 @@ entity pc_communication is
                tx_done : in std_logic;
 
                --uart_rx
-               rx_data : in std_logic_vector(7 downt 0); --not really required
-               rx_new : in std_logic_vector;
+               rx_data : in std_logic_vector(7 downto 0); --not really required
+               rx_new : in std_logic;
 
                -- History
                d_zeile : out hzeile;
                d_spalte : out hspalte;
                d_get :  out std_logic;
                d_done : in std_logic;
-               d_char : in hbyte --;
+               d_char : in hbyte
        );
 end entity pc_communication;
 
+architecture beh of pc_communication is
+       signal push_history, push_history_next : std_logic;
 
+       signal spalte, spalte_next : hspalte;
+       signal zeile , zeile_next : hzeile;
+       signal spalte_up, spalte_up_next : std_logic;
+
+       signal char, char_next : hbyte;
+       signal char_en : std_logic;
+       type STATE_PC is (IDLE, FETCH, FORWARD, DONE);
+       signal state, state_next : STATE_PC ;
 
-architecture beh of display is
-       signal push_history, push_history_next : std_logic;
 begin
 
-       sync_push_history : process (sys_clk, sys_res_n)
+       sync: process (sys_clk, sys_res_n)
        begin
                if sys_res_n = '0' then
+                       state <= IDLE;
                        push_history <= '0';
+                       spalte <= "0000000";
+                       zeile <= "0000000";
                elsif rising_edge(sys_clk) then
                        push_history <= push_history_next;
+                       spalte <= spalte_next;
+                       zeile <= zeile_next;
+                       state <= state_next;
+                       if (char_en = '1') then
+                               state <= state_next;
+                       end if;
                end if;
-       end process sync_push_history;
+       end process sync;
 
-       push_history : process(rx_new, rx_data, btn_a)
+       process (spalte_up)
+       variable spalte_tmp, zeile_tmp : integer;
        begin
-               if ( (rx_new = '1' and rx_data = X"41") or btn_a '1') then
-                       push_history_next <= '1';
+               if (spalte_up = '1') then
+                       if (spalte > X"45") then
+                               spalte_next <= "0000000";
+                               zeile_tmp := to_integer(unsigned(zeile));
+                               zeile_tmp := zeile_tmp + 1;
+                               zeile_next <= hbyte(to_unsigned(zeile_tmp,8));
+                       else
+                               spalte_tmp := to_integer(unsigned(spalte));
+                               spalte_tmp := spalte_tmp + 1;
+                               spalte_next <= hbyte(to_unsigned(spalte_tmp,8));
+                               zeile_next <= zeile;
+                       end if;
+                       spalte_up <= '0';
+               end if;
+       end process;
+
+       async_push_history : process (rx_new, rx_data, btn_a)
+       begin
+               if rx_new = '1' then
+                       if rx_data = X"41" then
+                               push_history_next <= '1';
+                       else
+                               push_history_next <= '0';
+                       end if;
+               elsif btn_a = '1' then
+                               push_history_next <= '1';
                else
                        push_history_next <= '0';
                end if;
-       end process push_history;
+       end process async_push_history;
+
+       output_pc : process (zeile, spalte)
+       begin
+               case state is 
+                       when IDLE =>
+                               spalte_next <= "0000000";
+                               zeile_next <= "0000000";
+                       when FETCH =>
+                               d_zeile <= zeile;
+                               d_spalte <= spalte;
+                               d_get <= '1';
+                               char_en <= '1';
+                               -- wait for timer overflow
+                               -- increment counter
+                       when FORWARD =>
+                               char_en <= '0';
+                               tx_data <= char;
+                               tx_new <= '1';
+                       when DONE =>
+                               null;
+                               -- be there for a single cycle and then 
+               end case;
+       end process output_pc;
+
+       next_state_pc : process (rx_new, btn_a)
+       begin
+               case state is
+                       when IDLE =>
+                               if rx_new= '1' or btn_a = '1' then
+                                       state_next <= FETCH;
+                                       char <= d_char; --latch
+                               end if;
+                       when FETCH =>
+                               if (d_done = '1') then
+                                       state_next <= FORWARD;
+                               end if;
+                       when FORWARD =>
+                               if (tx_done = '1') then
+                                       state_next <= FETCH;
+                               end if;
+                       when DONE =>
+                               -- be there for a single cycle and then 
+                               state_next <= IDLE;
+               end case;
+       end process next_state_pc;
 
---     sync_pc : process ()
---     begin
---     end process sync_pc;
---
---     next_state_pc : process ()
---     begin
---     end process next_state_pc;
---
---     output_pc : process ()
---     begin
---     end process output_pc;
 end architecture beh;