display: simple implementierung + testbench

[hwmod.git] / src / display.vhd

diff --git a/src/display.vhd b/src/display.vhd
index f0a3cc08ff77c7157918bc6c92b670d7a4722018..f540dd2bffff777be23696abea9721c21e1dbbce 100644 (file)
--- a/src/display.vhd
+++ b/src/display.vhd
@@ -26,7 +26,8 @@ entity display is
 end entity display;
 
 architecture beh of display is
-       type DISPLAY_STATE is (SIDLE, S_NEW_RESULT, S_NEW_INPUT);
+       type DISPLAY_STATE is (SIDLE, S_NEW_RESULT, S_NEW_INPUT, S_COUNTUP, S_GETCH,
+       S_PUTCH, S_WAIT, S_NOP1, S_NOP2);
        signal state_int, state_next : DISPLAY_STATE;
        signal d_zeile_int, d_zeile_next : hzeile;
        signal d_spalte_int, d_spalte_next : hspalte;
@@ -70,17 +71,39 @@ begin
 
                case state_int is
                        when SIDLE =>
-                               if free = '1' then
-                                       if d_new_eingabe = '1' then
-                                               state_next <= S_NEW_INPUT;
-                                       end if;
-                                       if d_new_result = '1' then
-                                               state_next <= S_NEW_RESULT;
-                                       end if;
+                               if d_new_eingabe = '1' then
+                                       state_next <= S_NEW_INPUT;
+                               end if;
+                               if d_new_result = '1' then
+                                       state_next <= S_NEW_RESULT;
                                end if;
                        when S_NEW_RESULT | S_NEW_INPUT =>
+                               state_next <= S_COUNTUP;
+                       when S_COUNTUP =>
+                               state_next <= S_GETCH;
+                       when S_GETCH =>
+                               if free = '1' and d_done = '1' then
+                                       state_next <= S_PUTCH;
+                               end if;
+                       when S_PUTCH =>
                                if free = '0' then
-                                       state_next <= SIDLE;
+                                       state_next <= S_WAIT;
+                               end if;
+                       when S_WAIT =>
+                               if free = '1' and d_done = '0' then
+                                       state_next <= S_NOP1;
+                               end if;
+                       when S_NOP1 =>
+                               if free = '0' then
+                                       state_next <= S_NOP2;
+                               end if;
+                       when S_NOP2 =>
+                               if free = '1' then
+                                       if unsigned(d_spalte_int) = 71 then
+                                               state_next <= SIDLE;
+                                       else
+                                               state_next <= S_COUNTUP;
+                                       end if;
                                end if;
                end case;
        end process;
@@ -91,13 +114,34 @@ begin
        begin
                d_zeile_next <= d_zeile_int;
                d_spalte_next <= d_spalte_int;
-               d_get_next <= d_get_int;
+               d_get_next <= '0';
                command_next <= command_int;
                command_data_next <= command_data_int;
 
                case state_int is
-                       when SIDLE | S_NEW_INPUT | S_NEW_RESULT =>
+                       when SIDLE =>
+                               null;
+                       when S_NEW_INPUT =>
+                               d_spalte_next <= (others => '0');
+                       when S_NEW_RESULT =>
+                               d_spalte_next <= (others => '0');
+                               case d_zeile_int is
+                                       when "11111" => d_zeile_next <= "00000";
+                                       when others => d_zeile_next <= std_logic_vector(unsigned(d_zeile_int) + 1);
+                               end case;
+                       when S_COUNTUP =>
+                               d_get_next <= '1';
+                               d_spalte_next <= std_logic_vector(unsigned(d_spalte_int) + 1);
+                       when S_GETCH =>
+                               d_get_next <= '1';
+                       when S_PUTCH =>
+                               command_next <= COMMAND_SET_CHAR;
+                               command_data_next <= x"000000" & std_logic_vector(d_char);
+                       when S_WAIT | S_NOP2 =>
                                null;
+                       when S_NOP1 =>
+                               command_next <= COMMAND_NOP;
+                               command_data_next <= x"00000000";
                end case;
        end process;
 end architecture beh;