display: arbeitet endlich wie gewuenscht

[hwmod.git] / src / display.vhd

diff --git a/src/display.vhd b/src/display.vhd
index 17a717e7ef6243c9b21a6a9ccaaf0d16d3c3d786..55d07fca8a743d85b2985f0bcf14852f9e262649 100644 (file)
--- a/src/display.vhd
+++ b/src/display.vhd
@@ -34,6 +34,7 @@ architecture beh of display is
        signal d_get_int, d_get_next : std_logic;
        signal command_int, command_next : std_logic_vector(7 downto 0);
        signal command_data_int, command_data_next : std_logic_vector(31 downto 0);
+       signal istate_next, istate_int : signed(2 downto 0);
 begin
        d_zeile <= d_zeile_int;
        d_spalte <= d_spalte_int;
@@ -46,6 +47,7 @@ begin
                if sys_res_n = '0' then
                        -- internal
                        state_int <= S_INIT;
+                       istate_int <= (others => '0');
                        -- out
                        d_zeile_int <= (others => '0');
                        d_spalte_int <= (others => '0');
@@ -55,6 +57,7 @@ begin
                elsif rising_edge(sys_clk) then
                        -- internal
                        state_int <= state_next;
+                       istate_int <= istate_next;
                        -- out
                        d_zeile_int <= d_zeile_next;
                        d_spalte_int <= d_spalte_next;
@@ -66,9 +69,10 @@ begin
 
        -- next state
        process(state_int, d_new_result, d_new_eingabe, d_done, free, d_spalte_int,
-               d_char)
+               d_char, istate_int)
        begin
                state_next <= state_int;
+               istate_next <= istate_int;
 
                case state_int is
                        when S_INIT =>
@@ -86,11 +90,13 @@ begin
                                state_next <= S_COUNTUP;
                        when S_CR1 =>
                                if free = '0' then
-                                       state_next <= S_NL1;
+                                       state_next <= S_WAIT;
+                                       istate_next <= b"000"; -- => danach S_NL1
                                end if;
                        when S_NL1 =>
                                if free = '0' then
-                                       state_next <= S_COUNTUP;
+                                       state_next <= S_WAIT;
+                                       istate_next <= b"111";
                                end if;
                        when S_COUNTUP =>
                                state_next <= S_GETCH;
@@ -103,6 +109,7 @@ begin
                        when S_PUTCH2 =>
                                if free = '0' or (free = '1' and d_char = x"00") then
                                        state_next <= S_WAIT;
+                                       istate_next <= b"111";
                                end if;
                        when S_WAIT =>
                                if free = '1' and d_done = '0' then
@@ -110,12 +117,10 @@ begin
                                end if;
                        when S_NOP1 =>
                                if free = '1' then
-                                       state_next <= SIDLE;
-                                       --if unsigned(d_spalte_int) = 71 then
-                                       --      state_next <= SIDLE;
-                                       --else
-                                       --      state_next <= S_COUNTUP;
-                                       --end if;
+                                       case istate_int is
+                                               when b"000" => state_next <= S_NL1;
+                                               when others => state_next <= SIDLE;
+                                       end case;
                                end if;
                end case;
        end process;