pc_com: p_busy ist unnoetig und noch ein paar kleinere fehler ausgebessert

[hwmod.git] / src / calc_s3e.vhd

diff --git a/src/calc_s3e.vhd b/src/calc_s3e.vhd
index db81c548a0d27b47ed294b0b2f2225778c9e8ed4..fb699efb9be7a07fe06ca470963de8c312dbae5a 100644 (file)
--- a/src/calc_s3e.vhd
+++ b/src/calc_s3e.vhd
@@ -6,15 +6,17 @@ use work.textmode_vga_component_pkg.all;
 use work.textmode_vga_pkg.all;
 use work.textmode_vga_platform_dependent_pkg.all;
 use work.ps2_keyboard_controller_pkg.all;
+use work.sync_pkg.all;
 
 entity calc is
        port (
                CLK_50MHZ : in std_logic;
                sys_res : in std_logic;
-               -- btnA
-               -- TODO: pins
+               -- btnA (here: "btn west")
+               btn_a : in std_logic;
                -- rs232
-               -- TODO: pins
+               rxd : in std_logic;
+               txd : out std_logic;
                -- vga
                vsync_n : out std_logic;
                hsync_n : out std_logic;
@@ -23,10 +25,7 @@ entity calc is
                b : out std_logic_vector(BLUE_BITS - 1 downto 0);
                -- ps/2
                ps2_clk : inout std_logic;
-               ps2_data : inout std_logic;
-               -- debug
-               led0 : out std_logic;
-               led1 : out std_logic
+               ps2_data : inout std_logic
        );
 end entity calc;
 
@@ -50,12 +49,28 @@ architecture top of calc is
        -- history/scanner
        signal s_char : hbyte;
        signal s_take, s_done, s_backspace : std_logic;
-
-       -- tmp: history<>scanner
+       -- history/parser
+       signal p_rget : std_logic;
+       signal p_rdone : std_logic;
+       signal p_read : hbyte;
+       signal p_wtake : std_logic;
+       signal p_wdone : std_logic;
+       signal p_write : hbyte;
+       signal p_finished : std_logic;
+       --history/pc_com
+       signal pc_get : std_logic;
+       signal pc_spalte : hspalte;
+       signal pc_zeile : hzeile;
+       signal pc_char : hbyte;
+       signal pc_done : std_logic;
+       -- parser/scanner
        signal do_it, finished : std_logic;
+       -- rs232
+       signal rx_new, rxd_sync : std_logic;
+       signal rx_data : std_logic_vector (7 downto 0);
+       signal tx_new, tx_done : std_logic;
+       signal tx_data : std_logic_vector (7 downto 0);
 begin
-       led0 <= '0';
-       led1 <= '1';
        sys_res_n <= not sys_res;
 
        -- vga/ipcore
@@ -126,7 +141,36 @@ begin
                d_get => d_get,
                d_done => d_done,
                d_char => d_char,
-               -- TODO: tmp only!
+               -- parser
+               p_rget => p_rget,
+               p_rdone => p_rdone,
+               p_read => p_read,
+               p_wtake => p_wtake,
+               p_wdone => p_wdone,
+               p_write => p_write,
+               p_finished => p_finished,
+               -- pc communication
+               pc_get =>  pc_get,
+               pc_spalte => pc_spalte,
+               pc_zeile => pc_zeile,
+               pc_char => pc_char,
+               pc_done => pc_done
+       );
+
+       -- parser
+       parser_inst : entity work.parser(beh)
+       port map (
+               sys_clk => CLK_50MHZ,
+               sys_res_n => sys_res_n,
+               -- history
+               p_rget => p_rget,
+               p_rdone => p_rdone,
+               p_read => p_read,
+               p_wtake => p_wtake,
+               p_wdone => p_wdone,
+               p_write => p_write,
+               p_finished => p_finished,
+               -- scanner
                do_it => do_it,
                finished => finished
        );
@@ -144,7 +188,7 @@ begin
                s_take => s_take,
                s_done => s_done,
                s_backspace => s_backspace,
-               -- TODO: parser. temporaer mit history verbunden
+               -- parser
                do_it => do_it,
                finished => finished
        );
@@ -164,4 +208,68 @@ begin
                ps2_clk => ps2_clk,
                ps2_data => ps2_data
        );
+
+       -- synchronizer fuer rxd
+       sync_rxd_inst : entity work.sync(beh)
+       generic map (
+               SYNC_STAGES => 2,
+               RESET_VALUE => '1'
+       )
+       port map (
+               sys_clk => CLK_50MHZ,
+               sys_res_n => sys_res_n,
+               data_in => rxd,
+               data_out => rxd_sync
+       );
+
+       -- rs232-rx
+       rs232rx_inst : entity work.uart_rx(beh)
+       generic map (
+               CLK_FREQ => 50000000,
+               BAUDRATE => 115200
+       )
+       port map (
+               sys_clk => CLK_50MHZ,
+               sys_res_n => sys_res_n,
+               rxd => rxd_sync,
+               rx_data => rx_data,
+               rx_new => rx_new
+       );
+
+       -- rs232-tx
+       rs232tx_inst : entity work.uart_tx(beh)
+       generic map (
+               CLK_FREQ => 50000000,
+               BAUDRATE => 115200
+       )
+       port map (
+               sys_clk => CLK_50MHZ,
+               sys_res_n => sys_res_n,
+               txd => txd,
+               tx_data => tx_data,
+               tx_new => tx_new,
+               tx_done => tx_done
+       );
+
+       -- pc-com
+       pc_com_inst : entity work.pc_communication(beh)
+       port map (
+               sys_clk => CLK_50MHZ,
+               sys_res_n => sys_res_n,
+               --button
+               btn_a => not btn_a,
+               --uart_tx
+               tx_data => tx_data,
+               tx_new => tx_new,
+               tx_done => tx_done,
+               --uart_rx
+               rx_data => rx_data,
+               rx_new => rx_new,
+               -- History
+               pc_zeile => pc_zeile,
+               pc_spalte => pc_spalte,
+               pc_get => pc_get,
+               pc_done => pc_done,
+               pc_char => pc_char
+       );
 end architecture top;