First working version with beh simulation
[hwmod.git] / src / beh_pc_communication_tb.vhd
index 63ba7cc6a076981d194c1112da2d2f1244dbb7c2..9b9a489e4104d05870f44b9184cb9c91a88ee523 100644 (file)
@@ -74,16 +74,17 @@ begin
        begin
                --take control of the situation.
                d_char <= (others => '0');
+               d_done <= '0';
                wait until sys_res_n = '1';
 
                while not endfile (f) loop
                        readline(f, l);
                        i := 1;
                        while i < l'length loop
-                               wait until rising_edge(d_get);
                                d_done <= '0';
+                               wait until rising_edge(d_get);
                                d_char <= (others => '0');
-                               wait for 90 ns;
+                               wait for 300 ns;
 
                                d_char <= hbyte(std_logic_vector(to_unsigned(character'pos(buf(i)),8)));
                                d_done <= '1';
@@ -97,9 +98,10 @@ begin
 
        stub_uart : process
        begin
+               tx_done <= '0';
+               wait until sys_res_n = '1';
                while true loop
                        tx_done <= '0';
-                       wait until sys_res_n = '1';
                        wait until rising_edge(tx_new);
                        wait for 300 ns;
                        tx_done <= '1';
@@ -115,15 +117,13 @@ begin
                btn_a <= '0';
                tx_data <= ( others => '0');
                rx_data <= ( others => '0');
-               d_zeile <= ( others => '0');
-               d_spalte <= ( others => '0');
                rx_new <= '0';
                
                wait for 90 ns;
                sys_res_n <= '1';
                wait for 30 ns;
                btn_a <= '1';
-               wait for 15 ns;
+               wait for 30 ns;
                btn_a <= '0';
                wait;
                --wait for 1000 ns;