implemented busy state

[hwmod.git] / src / beh_history_tb.vhd

diff --git a/src/beh_history_tb.vhd b/src/beh_history_tb.vhd
index 2a24d04d7313a59d00791a0e07a69e1cd7ef6bf4..eaa4fe30ddbcab474b24f13359ea7ad6320bc02c 100644 (file)
--- a/src/beh_history_tb.vhd
+++ b/src/beh_history_tb.vhd
@@ -46,6 +46,7 @@ architecture sim of beh_history_tb is
        signal pc_spalte : hspalte;
        signal pc_get, pc_done : std_logic;
        signal pc_char : hbyte;
+       signal pc_busy : std_logic;
        --dummy button
        signal btn_a_int : std_logic;
 
@@ -84,6 +85,7 @@ begin
                pc_spalte => pc_spalte,
                pc_zeile  => pc_zeile,
                pc_char   => pc_char,
+               pc_busy   => pc_busy,
                pc_done   => pc_done
        );
 
@@ -168,11 +170,12 @@ begin
                rx_data => (others => '0'),
                rx_new => '0',
                -- History
-                pc_zeile  => pc_zeile,
-                pc_spalte => pc_spalte,
-                pc_get    => pc_get,
-                pc_done   => pc_done,
-                pc_char   => pc_char
+               pc_zeile  => pc_zeile,
+               pc_spalte => pc_spalte,
+               pc_get    => pc_get,
+               pc_done   => pc_done,
+               pc_char   => pc_char,
+               pc_busy   => pc_busy
        );
 
        process
@@ -311,13 +314,13 @@ begin
 
        btn_pressed : process is
        begin
-               btn_a_int <= '0';
+               btn_a_int <= '1';
                wait until sys_res_n = '1';
                wait for 50000 * 15 ns;
                wait until rising_edge(sys_clk);
-               btn_a_int <= '1';
-               wait for 30 ns;
                btn_a_int <= '0';
+               wait for 30 ns;
+               btn_a_int <= '1';
                wait;
        end process btn_pressed;
 end architecture sim;