alu: weniger logic elemente dafuer mehr taktzyklen noetig (= egal)

[hwmod.git] / src / beh_alu_tb.vhd

diff --git a/src/beh_alu_tb.vhd b/src/beh_alu_tb.vhd
index 632896f74bd884b7f404512e83e195b271eaf59b..f6c6d5b3918ed1620a30102c0013d286c371f3e1 100644 (file)
--- a/src/beh_alu_tb.vhd
+++ b/src/beh_alu_tb.vhd
@@ -49,7 +49,7 @@ begin
                end record alu_testv;
 
                -- ggf. groesse des arrays erhoehen
-               type alu_testv_array is array (natural range 0 to 60) of alu_testv;
+               type alu_testv_array is array (natural range 0 to 65) of alu_testv;
 
                variable testmatrix : alu_testv_array :=
                        ( 0 => (-5, ALU_DIV, 3, 2, -1, false),
@@ -114,6 +114,13 @@ begin
                          54 => (0, ALU_DIV, 10, 0, 0, false),
                          55 => (10, ALU_DIV, 10, 0, 1, false),
                          56 => (5134123, ALU_DIV, 358015, 121913, 14, false),
+                         -- extra
+                         60 => (5, ALU_SUB, -2147483648, 0, 0, true),
+                         61 => (-2147483647, ALU_SUB, 1, 0, -2147483648, false),
+                         62 => (-2147483647, ALU_ADD, -1, 0, -2147483648, false),
+                         63 => (-2147483648, ALU_DIV, 10, 8, -214748364, false),
+                         64 => (-214748364, ALU_DIV, 10, 4, -21474836, false),
+                         65 => (1, ALU_DIV, -2147483648, 1, 0, false),
                          others => (0, ALU_ADD, 0, 0, 0, false)
                        );
                variable checkall : boolean := true;
@@ -157,8 +164,8 @@ begin
                                        assert(false) report "testfall war ein error (passt)";
                                end if;
                        else
-                               assert ((op3 = to_signed(testmatrix(i).expected,CBITS)) and (opM = to_signed(testmatrix(i).om,CBITS)))
-                                       report "" & cinteger'image(testmatrix(i).o1) & 
+                               if not((op3 = to_signed(testmatrix(i).expected,CBITS)) and (opcode /= ALU_DIV or opM = to_signed(testmatrix(i).om,CBITS))) then
+                                       assert(false) report "" & cinteger'image(testmatrix(i).o1) & 
                                        " " & integer'image(to_integer(signed(opcode))) &
                                        " " & cinteger'image(testmatrix(i).o2) &
                                        " /= " & integer'image(to_integer(op3)) &
@@ -166,7 +173,6 @@ begin
                                        " -- erwartet: " & cinteger'image(testmatrix(i).expected) &
                                        " ( " & cinteger'image(testmatrix(i).om) & " ) ";
 
-                               if not((op3 = to_signed(testmatrix(i).expected,CBITS)) and (opM = to_signed(testmatrix(i).om,CBITS))) then
                                        checkall := false;
                                end if;
                        end if;