package require ::quartus::project set need_to_close_project 0 set make_assignments 1 # Check that the right project is open if {[is_project_open]} { if {[string compare $quartus(project) "calc"]} { puts "Project calc is not open" set make_assignments 0 } } else { # Only open if not already open if {[project_exists calc]} { project_open -revision calc calc } else { project_new -revision calc calc } set need_to_close_project 1 } # Make assignments if {$make_assignments} { set_global_assignment -name FAMILY Stratix set_global_assignment -name DEVICE %DEVICE% set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim (VHDL)" set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_blast_fpga set_global_assignment -name MISC_FILE "calc.dpf" set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL" set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED WITH WEAK PULL-UP" set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS INPUT TRI-STATED" #set_global_assignment -name TOP_LEVEL_ENTITY scanner #set_global_assignment -name VHDL_FILE ../../src/gen_pkg.vhd #set_global_assignment -name VHDL_FILE ../../src/alu.vhd #set_global_assignment -name VHDL_FILE ../../src/parser.vhd #set_global_assignment -name VHDL_FILE ../../src/scanner.vhd #include source files set_global_assignment -name TOP_LEVEL_ENTITY calc set_global_assignment -name VHDL_FILE ../../src/gen_pkg.vhd set_global_assignment -name VHDL_FILE ../../src/alu.vhd set_global_assignment -name VHDL_FILE ../../src/parser.vhd set_global_assignment -name VHDL_FILE ../../src/scanner.vhd set_global_assignment -name VHDL_FILE ../../src/display.vhd set_global_assignment -name VHDL_FILE ../../src/sp_ram.vhd set_global_assignment -name VHDL_FILE ../../src/history.vhd set_global_assignment -name VHDL_FILE ../../src/calc.vhd set_global_assignment -name VHDL_FILE ../../src/vpll.vhd set_global_assignment -name VHDL_FILE ../../src/uart_tx.vhd set_global_assignment -name VHDL_FILE ../../src/uart_rx.vhd set_global_assignment -name VHDL_FILE ../../src/pc_communication.vhd #vga ip-core set_global_assignment -name VHDL_FILE ../../src/textmode_vga/console_sm.vhd set_global_assignment -name VHDL_FILE ../../src/textmode_vga/console_sm_beh.vhd set_global_assignment -name VHDL_FILE ../../src/textmode_vga/console_sm_sync.vhd set_global_assignment -name VHDL_FILE ../../src/textmode_vga/console_sm_sync_beh.vhd set_global_assignment -name VHDL_FILE ../../src/textmode_vga/font_pkg.vhd set_global_assignment -name VHDL_FILE ../../src/textmode_vga/font_rom.vhd set_global_assignment -name VHDL_FILE ../../src/textmode_vga/font_rom_beh.vhd set_global_assignment -name VHDL_FILE ../../src/textmode_vga/interval.vhd set_global_assignment -name VHDL_FILE ../../src/textmode_vga/interval_beh.vhd set_global_assignment -name VHDL_FILE ../../src/textmode_vga/textmode_vga.vhd set_global_assignment -name VHDL_FILE ../../src/textmode_vga/textmode_vga_component_pkg.vhd set_global_assignment -name VHDL_FILE ../../src/textmode_vga/textmode_vga_h_sm.vhd set_global_assignment -name VHDL_FILE ../../src/textmode_vga/textmode_vga_h_sm_beh.vhd set_global_assignment -name VHDL_FILE ../../src/textmode_vga/textmode_vga_pkg.vhd set_global_assignment -name VHDL_FILE ../../src/textmode_vga/textmode_vga_struct.vhd set_global_assignment -name VHDL_FILE ../../src/textmode_vga/textmode_vga_v_sm.vhd set_global_assignment -name VHDL_FILE ../../src/textmode_vga/textmode_vga_v_sm_beh.vhd set_global_assignment -name VHDL_FILE ../../src/textmode_vga/video_memory.vhd set_global_assignment -name VHDL_FILE ../../src/textmode_vga/video_memory_beh.vhd set_global_assignment -name VHDL_FILE ../../src/textmode_vga/mjl_stratix/textmode_vga_platform_dependent_pkg.vhd #ps/2 ip-core set_global_assignment -name VHDL_FILE ../../src/ps2/ps2_keyboard_controller.vhd set_global_assignment -name VHDL_FILE ../../src/ps2/ps2_keyboard_controller_beh.vhd set_global_assignment -name VHDL_FILE ../../src/ps2/ps2_keyboard_controller_pkg.vhd set_global_assignment -name VHDL_FILE ../../src/ps2/ps2_transceiver.vhd set_global_assignment -name VHDL_FILE ../../src/ps2/ps2_transceiver_beh.vhd set_global_assignment -name VHDL_FILE ../../src/ps2/ps2_transceiver_pkg.vhd #gen ip-core set_global_assignment -name VHDL_FILE ../../src/math_pkg.vhd #debouncing set_global_assignment -name VHDL_FILE ../../src/debouncing/counter.vhd set_global_assignment -name VHDL_FILE ../../src/debouncing/counter_beh.vhd set_global_assignment -name VHDL_FILE ../../src/debouncing/debounce.vhd set_global_assignment -name VHDL_FILE ../../src/debouncing/debounce_fsm.vhd set_global_assignment -name VHDL_FILE ../../src/debouncing/debounce_fsm_beh.vhd set_global_assignment -name VHDL_FILE ../../src/debouncing/debounce_pkg.vhd set_global_assignment -name VHDL_FILE ../../src/debouncing/debounce_struct.vhd set_global_assignment -name VHDL_FILE ../../src/debouncing/event_counter.vhd set_global_assignment -name VHDL_FILE ../../src/debouncing/event_counter_beh.vhd set_global_assignment -name VHDL_FILE ../../src/debouncing/event_counter_pkg.vhd set_global_assignment -name VHDL_FILE ../../src/debouncing/sync.vhd set_global_assignment -name VHDL_FILE ../../src/debouncing/sync_beh.vhd set_global_assignment -name VHDL_FILE ../../src/debouncing/sync_pkg.vhd #pin mapping/system set_location_assignment PIN_N3 -to sys_clk set_location_assignment PIN_AF17 -to sys_res_n #vga set_location_assignment PIN_F1 -to hsync_n set_location_assignment PIN_F2 -to vsync_n set_location_assignment PIN_E22 -to r[0] set_location_assignment PIN_T4 -to r[1] set_location_assignment PIN_T7 -to r[2] set_location_assignment PIN_E23 -to g[0] set_location_assignment PIN_T5 -to g[1] set_location_assignment PIN_T24 -to g[2] set_location_assignment PIN_E24 -to b[0] set_location_assignment PIN_T6 -to b[1] #ps/2 set_location_assignment PIN_Y26 -to ps2_clk set_location_assignment PIN_E21 -to ps2_data #rs232 set_location_assignment PIN_D22 -to txd set_location_assignment PIN_D23 -to rxd #btn_a set_location_assignment PIN_A3 -to btn_a set_global_assignment -name FMAX_REQUIREMENT "33.33 MHz" -section_id sys_clk set_instance_assignment -name CLOCK_SETTINGS sys_clk -to sys_clk #warning fix fuer pll set_global_assignment -name ENABLE_CLOCK_LATENCY ON set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region" set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region" set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top # Commit assignments export_assignments # Close project if {$need_to_close_project} { project_close } }