--sign_div_unsign DEN_REPRESENTATION="UNSIGNED" DEN_WIDTH=25 LPM_PIPELINE=0 MAXIMIZE_SPEED=5 NUM_REPRESENTATION="UNSIGNED" NUM_WIDTH=25 SKIP_BITS=0 denominator numerator quotient remainder --VERSION_BEGIN 7.0 cbx_cycloneii 2006:09:30:03:03:26:SJ cbx_lpm_abs 2006:04:25:22:52:42:SJ cbx_lpm_add_sub 2006:10:11:06:03:24:SJ cbx_lpm_divide 2006:01:19:01:01:10:SJ cbx_mgl 2006:10:28:00:08:48:SJ cbx_stratix 2006:09:18:18:47:42:SJ cbx_stratixii 2006:10:13:22:01:30:SJ cbx_util_mgl 2006:11:03:18:32:30:SJ VERSION_END -- Copyright (C) 1991-2007 Altera Corporation -- Your use of Altera Corporation's design tools, logic functions -- and other software and tools, and its AMPP partner logic -- functions, and any output files from any of the foregoing -- (including device programming or simulation files), and any -- associated documentation or information are expressly subject -- to the terms and conditions of the Altera Program License -- Subscription Agreement, Altera MegaCore Function License -- Agreement, or other applicable license agreement, including, -- without limitation, that your use is for the sole purpose of -- programming logic devices manufactured by Altera and sold by -- Altera or its authorized distributors. Please refer to the -- applicable agreement for further details. FUNCTION alt_u_div_s5f (denominator[24..0], numerator[24..0]) RETURNS ( den_out[24..0], quotient[24..0], remainder[24..0]); --synthesis_resources = lut 371 SUBDESIGN sign_div_unsign_dnh ( denominator[24..0] : input; numerator[24..0] : input; quotient[24..0] : output; remainder[24..0] : output; ) VARIABLE divider : alt_u_div_s5f; adder_result_int[25..0] : WIRE; adder_cin : WIRE; adder_dataa[24..0] : WIRE; adder_datab[24..0] : WIRE; adder_result[24..0] : WIRE; gnd_wire : WIRE; norm_num[24..0] : WIRE; protect_quotient[24..0] : WIRE; protect_remainder[24..0] : WIRE; BEGIN divider.denominator[] = denominator[]; divider.numerator[] = norm_num[]; adder_result_int[] = (adder_dataa[], 0) - (adder_datab[], !adder_cin); adder_result[] = adder_result_int[25..1]; adder_cin = gnd_wire; adder_dataa[] = denominator[]; adder_datab[] = protect_remainder[]; gnd_wire = B"0"; norm_num[] = numerator[]; protect_quotient[] = divider.quotient[]; protect_remainder[] = divider.remainder[]; quotient[] = protect_quotient[]; remainder[] = protect_remainder[]; END; --VALID FILE