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uart_rx: ein prozessmodell. spart weitere 3 logic elements :P
[hwmod.git] / HW Mod.url
1 [InternetShortcut]\r
2 URL=http://ti.tuwien.ac.at/ecs/teaching/courses/hwmod\r
3 Modified=D073354C36C4CA0189\r
hardware-modellierung VL (ss10)