X-Git-Url: http://wien.tomnetworks.com/gitweb/?p=dide_16.git;a=blobdiff_plain;f=bsp4%2FDesignflow%2Fsrc%2Fvpll.bsf;fp=bsp4%2FDesignflow%2Fsrc%2Fvpll.bsf;h=63c31187e3bc99ba3fe9d2becbb824efb3449f0b;hp=0000000000000000000000000000000000000000;hb=8c5b21b5de3f142d7210146a850cf7689e05c543;hpb=9388b7667104acb1a8ca81816d94d5ae71cffcc0 diff --git a/bsp4/Designflow/src/vpll.bsf b/bsp4/Designflow/src/vpll.bsf new file mode 100644 index 0000000..63c3118 --- /dev/null +++ b/bsp4/Designflow/src/vpll.bsf @@ -0,0 +1,49 @@ +/* +WARNING: Do NOT edit the input and output ports in this file in a text +editor if you plan to continue editing the block that represents it in +the Block Editor! File corruption is VERY likely to occur. +*/ +/* +Copyright (C) 1991-2004 Altera Corporation +Any megafunction design, and related netlist (encrypted or decrypted), +support information, device programming or simulation file, and any other +associated documentation or information provided by Altera or a partner +under Altera's Megafunction Partnership Program may be used only +to program PLD devices (but not masked PLD devices) from Altera. Any +other use of such megafunction design, netlist, support information, +device programming or simulation file, or any other related documentation +or information is prohibited for any other purpose, including, but not +limited to modification, reverse engineering, de-compiling, or use with +any other silicon devices, unless such use is explicitly licensed under +a separate agreement with Altera or a megafunction partner. Title to the +intellectual property, including patents, copyrights, trademarks, trade +secrets, or maskworks, embodied in any such megafunction design, netlist, +support information, device programming or simulation file, or any other +related documentation or information provided by Altera or a megafunction +partner, remains with Altera, the megafunction partner, or their respective +licensors. No other licenses, including any licenses needed under any third +party's intellectual property, are provided herein. +*/ +(header "symbol" (version "1.1")) +(symbol + (rect 16 16 112 112) + (text "vpll" (rect 5 0 22 12)(font "Arial" )) + (text "inst" (rect 8 80 25 92)(font "Arial" )) + (port + (pt 0 32) + (input) + (text "inclk0" (rect 0 0 28 12)(font "Arial" )) + (text "inclk0" (rect 21 27 49 39)(font "Arial" )) + (line (pt 0 32)(pt 16 32)(line_width 1)) + ) + (port + (pt 96 32) + (output) + (text "c0" (rect 0 0 11 12)(font "Arial" )) + (text "c0" (rect 64 27 75 39)(font "Arial" )) + (line (pt 96 32)(pt 80 32)(line_width 1)) + ) + (drawing + (rectangle (rect 16 16 80 80)(line_width 1)) + ) +)