X-Git-Url: http://wien.tomnetworks.com/gitweb/?p=dide_16.git;a=blobdiff_plain;f=bsp4%2FDesignflow%2Fsrc%2Fvga_pll.bdf;fp=bsp4%2FDesignflow%2Fsrc%2Fvga_pll.bdf;h=906c43565e4a20d1fc880a97661df403d89bdc19;hp=0000000000000000000000000000000000000000;hb=8c5b21b5de3f142d7210146a850cf7689e05c543;hpb=9388b7667104acb1a8ca81816d94d5ae71cffcc0

diff --git a/bsp4/Designflow/src/vga_pll.bdf b/bsp4/Designflow/src/vga_pll.bdf
new file mode 100755
index 0000000..906c435
--- /dev/null
+++ b/bsp4/Designflow/src/vga_pll.bdf
@@ -0,0 +1,847 @@
+/*
+WARNING: Do NOT edit the input and output ports in this file in a text
+editor if you plan to continue editing the block that represents it in
+the Block Editor! File corruption is VERY likely to occur.
+*/
+/*
+Copyright (C) 1991-2006 Altera Corporation
+Your use of Altera Corporation's design tools, logic functions 
+and other software and tools, and its AMPP partner logic 
+functions, and any output files any of the foregoing 
+(including device programming or simulation files), and any 
+associated documentation or information are expressly subject 
+to the terms and conditions of the Altera Program License 
+Subscription Agreement, Altera MegaCore Function License 
+Agreement, or other applicable license agreement, including, 
+without limitation, that your use is for the sole purpose of 
+programming logic devices manufactured by Altera and sold by 
+Altera or its authorized distributors.  Please refer to the 
+applicable agreement for further details.
+*/
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