X-Git-Url: http://wien.tomnetworks.com/gitweb/?p=dide_16.git;a=blobdiff_plain;f=bsp4%2FDesignflow%2Fsrc%2Fboard_driver_arc.vhd;fp=bsp4%2FDesignflow%2Fsrc%2Fboard_driver_arc.vhd;h=7636a37a79d079eaaa74fc9cc683825fb0029cab;hp=0000000000000000000000000000000000000000;hb=8c5b21b5de3f142d7210146a850cf7689e05c543;hpb=9388b7667104acb1a8ca81816d94d5ae71cffcc0

diff --git a/bsp4/Designflow/src/board_driver_arc.vhd b/bsp4/Designflow/src/board_driver_arc.vhd
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+-------------------------------------------------------------------------------
+-- Title      : board_driver architecture
+-- Project    : LU Digital Design
+-------------------------------------------------------------------------------
+-- File       : board_driver.vhd
+-- Author     : Thomas Handl
+-- Company    : TU Wien
+-- Created    : 2004-12-15
+-- Last update: 2006-02-24
+-------------------------------------------------------------------------------
+-- Description: display number on 7-segment display
+-------------------------------------------------------------------------------
+-- Copyright (c) 2004 TU Wien
+-------------------------------------------------------------------------------
+-- Revisions  :
+-- Date        Version  Author  Description
+-- 2004-12-15  1.0      handl   Created
+-- 2006-02-24  2.0      ST      revised
+-------------------------------------------------------------------------------
+
+-------------------------------------------------------------------------------
+-- LIBRARIES
+-------------------------------------------------------------------------------
+
+library IEEE;
+use IEEE.std_logic_1164.all;
+use IEEE.std_logic_unsigned.all;
+use IEEE.std_logic_arith.all;
+
+use work.vga_pak.all;
+
+-------------------------------------------------------------------------------
+-- ARCHITECTURE
+-------------------------------------------------------------------------------
+
+
+architecture behav of board_driver is
+
+  attribute syn_preserve          : boolean;
+  attribute syn_preserve of behav : architecture is true;
+
+
+  signal   display_value  : std_logic_vector(2*BCD_WIDTH-1 downto 0);
+  signal   ten_value      : std_logic_vector(BCD_WIDTH-1 downto 0);
+  signal   one_value      : std_logic_vector(BCD_WIDTH-1 downto 0);
+  signal   digit_left     : std_logic_vector(SEG_WIDTH-1 downto 0);
+  signal   digit_right    : std_logic_vector(SEG_WIDTH-1 downto 0);
+
+begin
+
+  -----------------------------------------------------------------------------
+  -- generate control data
+  -----------------------------------------------------------------------------
+
+
+  display_value <= "00000001";                                 -- vector of two BCD coded numbers to be displayed
+  one_value <= display_value(BCD_WIDTH-1 downto 0);            -- BCD number to be displayed in right digit
+  ten_value <= display_value(2*BCD_WIDTH-1 downto BCD_WIDTH);  -- BCD number to be displayed in left digit
+
+
+  SEG_DATA: process(reset, one_value, ten_value)
+  begin
+    if (reset = RES_ACT) then                     -- upon reset
+      digit_left  <= DIGIT_OFF;                   -- ... switch off display
+      digit_right <= DIGIT_OFF;
+    else                                          -- during operation
+      case one_value is                           -- ...display "one" position according
+        when "0000" => digit_right <= DIGIT_ZERO; -- ...to translation table
+        when "0001" => digit_right <= DIGIT_ONE;
+        when "0010" => digit_right <= DIGIT_TWO;
+        when "0011" => digit_right <= DIGIT_THREE;
+        when "0100" => digit_right <= DIGIT_FOUR;
+        when "0101" => digit_right <= DIGIT_FIVE;
+        when "0110" => digit_right <= DIGIT_SIX;
+        when "0111" => digit_right <= DIGIT_SEVEN;
+        when "1000" => digit_right <= DIGIT_EIGHT;
+        when "1001" => digit_right <= DIGIT_NINE;
+        when others => digit_right <= DIGIT_F;    -- use "F" as overflow
+      end case;
+
+      case ten_value is                           -- same for "ten" position
+        when "0000" => digit_left <= DIGIT_ZERO;
+        when "0001" => digit_left <= DIGIT_ONE;
+        when "0010" => digit_left <= DIGIT_TWO;
+        when "0011" => digit_left <= DIGIT_THREE;
+        when "0100" => digit_left <= DIGIT_FOUR;
+        when "0101" => digit_left <= DIGIT_FIVE;
+        when "0110" => digit_left <= DIGIT_SIX;
+        when "0111" => digit_left <= DIGIT_SEVEN;
+        when "1000" => digit_left <= DIGIT_EIGHT;
+        when "1001" => digit_left <= DIGIT_NINE;
+        when others => digit_left <= DIGIT_F;
+      end case;
+    end if;
+  end process;
+
+
+-- combine the two digits to one bus
+  seven_seg(SEG_WIDTH-1 downto 0)  <= digit_right;
+  seven_seg(2*SEG_WIDTH-1 downto SEG_WIDTH) <= digit_left;
+  
+end behav;