X-Git-Url: http://wien.tomnetworks.com/gitweb/?p=dide_16.git;a=blobdiff_plain;f=bsp4%2FDesignflow%2Fsim%2Fpost%2Fwork%2F_info;fp=bsp4%2FDesignflow%2Fsim%2Fpost%2Fwork%2F_info;h=aa1ec598bf4969afbf8a1a3a3a888993784ad24d;hp=0000000000000000000000000000000000000000;hb=8c5b21b5de3f142d7210146a850cf7689e05c543;hpb=9388b7667104acb1a8ca81816d94d5ae71cffcc0 diff --git a/bsp4/Designflow/sim/post/work/_info b/bsp4/Designflow/sim/post/work/_info new file mode 100644 index 0000000..aa1ec59 --- /dev/null +++ b/bsp4/Designflow/sim/post/work/_info @@ -0,0 +1,134 @@ +m255 +K3 +13 +cModel Technology +Z0 d/homes/burban/didelu/dide_16/bsp4/Designflow/sim/post +T_opt +VEaAWm1d_JS=VNkklOXhG;0 +04 12 0 work vga_conf_pos 1 +Z1 =1-0015609ed0a8-4af05b46-4068a-7b76 +Z2 o-quiet -auto_acc_if_foreign -work work -sdftyp /vga_unit=/homes/burban/didelu/dide_16/bsp4/Designflow/ppr/sim/simulation/modelsim/vga_vhd.sdo -suppress 1948 +Z3 n@_opt +Z4 OE;O;6.5b;42 +Evga +Z5 w1257265900 +Z6 DPx4 ieee 16 vital_primitives 0 22 E9g6AWKAc2T]enMfl94If3 +Z7 DPx7 stratix 17 stratix_atom_pack 0 22 4LU4R]0>3N6GcAdgd1O1R2 +Z8 DPx4 ieee 12 vital_timing 0 22 OBWK>;kUYmkGXaK:5k0 +Evga_pos_tb +R33 +R29 +R30 +R31 +R10 +R34 +R35 +l0 +L37 +Z50 VWYVDk8:IlXF:G=gkK18_k0 +R14 +32 +R15 +R16 +Z51 !s100 ?:YH_R3N79K7J0L`IT49_0 +Astructure +R29 +R30 +R31 +R10 +R32 +l101 +L45 +Z52 V2H0Zl8k[9mYf8bN=NCbeH0 +R14 +32 +Z53 Mx4 4 ieee 14 std_logic_1164 +Z54 Mx3 4 ieee 18 std_logic_unsigned +Z55 Mx2 4 ieee 15 std_logic_arith +Z56 Mx1 4 work 7 vga_pak +R15 +R16 +Z57 !s100 T_8dcPYGCmK@^6g;3L5;b0