X-Git-Url: http://wien.tomnetworks.com/gitweb/?p=dide_16.git;a=blobdiff_plain;f=bsp2%2FProtokolle%2Fchapter2.tex;fp=bsp2%2FProtokolle%2Fchapter2.tex;h=267259983d507eeefd7efd979ab0adc8fb857a8f;hp=a8ddc1adbd69bc9c723d5b39df56ef1bd6c223d8;hb=7764c0415400022f642711afddd17146461b8472;hpb=7780ac8aa776842779e3eea57feec907d096d69d

diff --git a/bsp2/Protokolle/chapter2.tex b/bsp2/Protokolle/chapter2.tex
index a8ddc1a..2672599 100644
--- a/bsp2/Protokolle/chapter2.tex
+++ b/bsp2/Protokolle/chapter2.tex
@@ -1,6 +1,152 @@
 \chapter{Design-Flow}
 
+\section{Frequenzanpassung}
+Die Aufgabenstellung die Frequenz f\"ur das blickende Objekt
+zu modifizieren, in unserem Fall auf eine Frequenz von 
+$\frac{1}{0.12}s = 8.333 Hz$ einzustellen.
+
+Dazu mussten wir uns vorerst mit dem gegebenen Sourcecode 
+vertraut machen. Schlie\ss{}lich stellten wir fest, dass der
+Code in der Datei \emph{vga\_control\_arc.vhd} daf\"ur ist,
+genauer gesagt die Konstante \emph{HALFPERIOD}.
+
+Dabei bestimmt \emph{HALFPERIOD} die halbe Periode. Um also auf
+unsere gew\"unschte Periodendauer von $0.12s$ kommen muss diese
+Konstante $0.06s$ ausdr\"ucken. Aber welche Einheit beschreibt
+\emph{HALFPERIOD}? Auf folgenden Wert ist \emph{HALFPERIOD}
+in der Angabe konfiguriert:
+\begin{lstlisting}
+constant HALFPERIOD   : std_logic_vector(TOG_CNT_WIDTH-1 downto 0) := "1100000000010001111011000";
+\end{lstlisting}
+
+wobei ${1100000000010001111011000}_2 = (25175000)_{10} = (18023D8)_{16}$ entspricht.
+
+Weiter unten im Code entdeckt man folgenden Block:
+\begin{lstlisting}
+  BLINKER_syn: process(clk, reset)
+  begin
+    if (reset = RES_ACT) then                       -- asyn reset
+      toggle_counter_sig  <= (others => '0');
+      toggle_sig  <= COLR_OFF;
+    elsif(clk'event and clk = '1') then             -- synchronous capture
+      toggle_counter_sig <= toggle_counter_next;
+      toggle_sig  <= toggle_next;
+    end if;
+  end process;
+
+
+  BLINKER_next : process(toggle_counter_sig, toggle_sig)
+  begin
+    if toggle_counter_sig >= HALFPERIOD then           -- after half period ...
+      toggle_counter_next <= (others => '0');          -- ... clear counter
+      toggle_next  <= not(toggle_sig);                 -- ... and toggle colour.
+    else                                               -- before half period ...
+      toggle_counter_next <= toggle_counter_sig + '1'; -- ... increment counter
+      toggle_next  <= toggle_sig;                      -- ... and hold colour
+    end if;
+  end process;
+\end{lstlisting}
+Wir sehen: bei jedem CLK-Signal ein Counter erh\"oht
+wird -- jener Counter der mit \emph{HALFPERIOD} verglichen wird.
+Daraus k\"onnen wir schliessen, dass \emph{HALFPERIOD} also von
+der eingestellten Taktung abh\"angt. Diese betr\"agt 25.175MHz.
+
+F\"ur unseren gew\"unschten Wert von $0.12s$ muss also folgender
+Wert verwendet werden:
+
+$\frac{25175000Hz}{\frac{1}{0.12s/2}} = \frac{25175000Hz}{16.66667Hz} = 1510500$ Takte.
+
+Bedauerlicherweise mussten wir beim Verfassen dieses Protokolls
+feststellen, dass wir anscheinend von einer Frequenz von 25MHz
+-- warum auch immer -- ausgegangen sind und daher genau
+$1500000$ Takte als Ergebnis bekamen.
+
+Solche Fehler sollten ja \emph{eigentlich} bei der Simulation auffallen.
+Da es sich aber offensichtlich um einen kleinen Fehler handelt
+(10500 Takte entsprechen $417.08\mu s$)
+ist uns das bei der Simulation nicht aufgefallen (vgl. Screenshots).
+
+
+Wie auch immer, fuhren wir mit dem falschen Wert fort. 
+Dieser entspricht einen Bin\"arwert von: $(101101110001101100000)_2$. Diese Wert \"ubernahmen wir:
+\begin{lstlisting}
+constant HALFPERIOD   : std_logic_vector(TOG_CNT_WIDTH-1 downto 0) := "0000101101110001101100000";
+\end{lstlisting}
+
+
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+\section{Design-Flow}
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+\subsection{Behavioral Simulation}
+Gl\"ucklicherweise ist unsere Periodendauer f\"ur die Simulation kurz genug und m\"uessen daher unseren Wert nicht skalieren.
+%1behsim.png
+\begin{center}
+\includegraphics[width=\textwidth]{pics/1behsim.png}
+\end{center}
+
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+\subsection{Synthese}
+
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+\subsection{Pre-Layout Simulation}
+%3prelayoutsim.png
+\begin{center}
+\includegraphics[width=\textwidth]{pics/3prelayoutsim.png}
+\end{center}
+
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+\subsection{PPR}
+%4ppr_auslastung.png
+\begin{center}
+\includegraphics[width=\textwidth]{pics/4ppr_auslastung.png}
+\end{center}
+
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+\subsection{Post-Layout Simulation}
+%5postlayout_sim.png
+\begin{center}
+\includegraphics[width=\textwidth]{pics/5postlayout_sim.png}
+\end{center}
+%5postlayout_vgaunit.png
+\begin{center}
+\includegraphics[width=\textwidth]{pics/5postlayout_vgaunit.png}
+\end{center}
+
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+\subsection{PPR mit PLL}
+%6pll_auslastung.png
+\begin{center}
+\includegraphics[width=\textwidth]{pics/6pll_auslastung.png}
+\end{center}
+
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+\section{Logikanalysator}
+%7logikwave.jpg
+\begin{center}
+\includegraphics[width=\textwidth]{pics/7logikwave.jpg}
+\end{center}
+
+%7trigger.jpg
+\begin{center}
+\includegraphics[width=\textwidth]{pics/7trigger.jpg}
+\end{center}
+
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+\section{Ergebnisse}
 \begin{itemize}
-\item Blinkfrequenz =  Hz
+\item Blinkfrequenz = $\frac{1}{0.12}s = 8.33333$ Hz
 \end{itemize}
 
+\begin{center}
+\includegraphics[width=\textwidth]{pics/fertig.jpg}
+\end{center}
+