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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 10.814 ns
From           : reset
To             : vga:inst|vga_driver:vga_driver_unit|h_enable_sig
From Clock     : --
To Clock       : board_clk
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 12.054 ns
From           : vga:inst|dly_counter[0]
To             : seven_seg_pin[7]
From Clock     : board_clk
To Clock       : --
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 16.190 ns
From           : reset
To             : seven_seg_pin[7]
From Clock     : --
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : -5.344 ns
From           : reset
To             : vga:inst|vga_driver:vga_driver_unit|h_sync
From Clock     : --
To Clock       : board_clk
Failed Paths   : 0

Type           : Clock Setup: 'vpll:inst1|altpll:altpll_component|_clk0'
Slack          : 29.952 ns
Required Time  : 27.19 MHz ( period = 36.777 ns )
Actual Time    : 146.52 MHz ( period = 6.825 ns )
From           : vga:inst|vga_driver:vga_driver_unit|vsync_counter_9
To             : vga:inst|vga_driver:vga_driver_unit|vsync_state_5
From Clock     : vpll:inst1|altpll:altpll_component|_clk0
To Clock       : vpll:inst1|altpll:altpll_component|_clk0
Failed Paths   : 0

Type           : Clock Hold: 'vpll:inst1|altpll:altpll_component|_clk0'
Slack          : 0.736 ns
Required Time  : 27.19 MHz ( period = 36.777 ns )
Actual Time    : N/A
From           : vga:inst|vga_control:vga_control_unit|toggle_counter_sig_0
To             : vga:inst|vga_control:vga_control_unit|toggle_counter_sig_0
From Clock     : vpll:inst1|altpll:altpll_component|_clk0
To Clock       : vpll:inst1|altpll:altpll_component|_clk0
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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