------------------------------------------------------------------------------- -- Title : vga package -- Project : LU Digital Design ------------------------------------------------------------------------------- -- File : vga_pak.vhd -- Author : Thomas Handl -- Company : TU Wien -- Created : 2004-08-19 -- Last update: 2006-02-24 ------------------------------------------------------------------------------- -- Description: definitions of global constants and enumerated types ------------------------------------------------------------------------------- -- Copyright (c) 2004 TU Wien ------------------------------------------------------------------------------- -- Revisions : -- Date Version Author Description -- 2004-08-19 1.0 handl Created -- 2006-02-24 2.0 ST revised ------------------------------------------------------------------------------- ------------------------------------------------------------------------------- -- LIBRARIES ------------------------------------------------------------------------------- library IEEE; use IEEE.std_logic_1164.all; use IEEE.std_logic_unsigned.all; use IEEE.std_logic_arith.all; ------------------------------------------------------------------------------- -- PACKAGE ------------------------------------------------------------------------------- package vga_pak is constant RES_ACT : std_logic := '0'; -- define reset active LO constant ENABLE : std_logic := '1'; -- define diverse enable HI constant COLR_ON : std_logic := '1'; -- define VGA color on as HI constant COLR_OFF : std_logic := '0'; -- define VGA color off as LO constant SEG_WIDTH : integer := 7; -- display has 7 segments constant BCD_WIDTH : integer := 4; -- BCD number has 4 bit constant TOG_CNT_WIDTH : integer := 25; -- bitwidth of counter that controls blinking constant COL_CNT_WIDTH : integer := 10; -- width of the column counter constant LINE_CNT_WIDTH : integer := 9; -- width of the line counter constant HSYN_CNT_WIDTH : integer := 10; -- width of the h-sync counter constant VSYN_CNT_WIDTH : integer := 10; -- width of the v-sync counter constant RIGHT_BORDER: std_logic_vector(COL_CNT_WIDTH-1 downto 0) := "1001111111"; -- 640 columns (0...639) constant BOTTOM_BORDER: std_logic_vector(LINE_CNT_WIDTH-1 downto 0) := "111011111"; -- 480 lines (0...479) -- define coordinates of rectangle constant X_MIN : std_logic_vector(COL_CNT_WIDTH-1 downto 0) := "0001100100"; -- 100 constant X_MAX : std_logic_vector(COL_CNT_WIDTH-1 downto 0) := "0011001000"; -- 200 constant Y_MIN : std_logic_vector(LINE_CNT_WIDTH-1 downto 0) := "001100100"; constant Y_MAX : std_logic_vector(LINE_CNT_WIDTH-1 downto 0) := "011001000"; -- define emumerated types for state machines type hsync_state_type is (RESET_STATE, B_STATE, C_STATE, D_STATE, E_STATE, pre_D_STATE, pre_B_STATE); type vsync_state_type is (RESET_STATE, P_STATE, Q_STATE, R_STATE, S_STATE, pre_R_STATE, pre_P_STATE); -- Definitions for 7-segment display gfedcba constant DIGIT_ZERO : std_logic_vector(SEG_WIDTH-1 downto 0) := "1000000"; constant DIGIT_ONE : std_logic_vector(SEG_WIDTH-1 downto 0) := "1111001"; constant DIGIT_TWO : std_logic_vector(SEG_WIDTH-1 downto 0) := "0100100"; constant DIGIT_THREE : std_logic_vector(SEG_WIDTH-1 downto 0) := "0110000"; constant DIGIT_FOUR : std_logic_vector(SEG_WIDTH-1 downto 0) := "0011001"; constant DIGIT_FIVE : std_logic_vector(SEG_WIDTH-1 downto 0) := "0010010"; constant DIGIT_SIX : std_logic_vector(SEG_WIDTH-1 downto 0) := "0000010"; constant DIGIT_SEVEN : std_logic_vector(SEG_WIDTH-1 downto 0) := "1111000"; constant DIGIT_EIGHT : std_logic_vector(SEG_WIDTH-1 downto 0) := "0000000"; constant DIGIT_NINE : std_logic_vector(SEG_WIDTH-1 downto 0) := "0011000"; constant DIGIT_MINUS : std_logic_vector(SEG_WIDTH-1 downto 0) := "0111111"; constant DIGIT_A : std_logic_vector(SEG_WIDTH-1 downto 0) := "0001000"; constant DIGIT_B : std_logic_vector(SEG_WIDTH-1 downto 0) := "0000011"; constant DIGIT_C : std_logic_vector(SEG_WIDTH-1 downto 0) := "0110001"; constant DIGIT_D : std_logic_vector(SEG_WIDTH-1 downto 0) := "1000010"; constant DIGIT_E : std_logic_vector(SEG_WIDTH-1 downto 0) := "1001111"; constant DIGIT_F : std_logic_vector(SEG_WIDTH-1 downto 0) := "1000111"; constant DIGIT_OFF : std_logic_vector(SEG_WIDTH-1 downto 0) := "1111111"; end package;