m255
K3
13
cModel Technology
Z0 d/homes/burban/didelu/dide_16/bsp3/Designflow/sim/pre
T_opt
V2U0:J6hC1Tnnbgd;S6@lJ3
04 12 0 work vga_conf_pre 1
Z1 =1-0015609ed0a8-4ae9ba91-bb307-1314
Z2 o-quiet -auto_acc_if_foreign -work work
Z3 n@_opt
Z4 OE;O;6.5b;42
Evga
Z5 w1256831373
Z6 DPx4 ieee 16 vital_primitives 0 22 E9g6AWKAc2T]enMfl94If3
Z7 DPx7 stratix 17 stratix_atom_pack 0 22 4LU4R]0>3N6GcAdgd1O1R2
Z8 DPx4 ieee 12 vital_timing 0 22 OBWK>;kUYmkG<OChK2lhV1
Z9 DPx7 stratix 18 stratix_components 0 22 ETJi=`V@8?ceQEj0KODmn3
Z10 DPx8 synplify 10 components 0 22 @=LFfPB8UiBPm8Y3jZ0Dj3
Z11 DPx4 ieee 11 numeric_std 0 22 =NSdli^?T5OD8;4F<blj<3
Z12 DPx4 ieee 14 std_logic_1164 0 22 GH1=`jDDBJ=`LM;:Ak`kf2
Z13 8/homes/burban/didelu/dide_16/bsp3/Designflow/syn/rev_1/vga.vhm
Z14 F/homes/burban/didelu/dide_16/bsp3/Designflow/syn/rev_1/vga.vhm
l0
L3515
Z15 V1IZ]kOHFNGODfLLmIAK4Z0
Z16 OE;C;6.5b;42
32
Z17 o-work work
Z18 tExplicit 1
Z19 !s100 ?je6GkYAl9C4bRI0=Vnj40
Abeh
R6
R7
R8
R9
R10
R11
R12
Z20 DEx4 work 3 vga 0 22 1IZ]kOHFNGODfLLmIAK4Z0
l3789
L3550
Z21 V2cBoj:8QWgn5dfF<=Eh9c1
R16
32
Z22 Mx7 4 ieee 14 std_logic_1164
Z23 Mx6 4 ieee 11 numeric_std
Z24 Mx5 8 synplify 10 components
Z25 Mx4 7 stratix 18 stratix_components
Z26 Mx3 4 ieee 12 vital_timing
Z27 Mx2 7 stratix 17 stratix_atom_pack
Z28 Mx1 4 ieee 16 vital_primitives
R17
R18
Z29 !s100 znZmGE;QZ8`Wbn]G4hZg^0
Cvga_conf_pre
Z30 astructure
Z31 evga_pre_tb
R6
R7
R8
R9
R10
R11
R20
Z32 DAx4 work 10 vga_pre_tb 9 structure 22 l<iY:0YYNA^;NVLi]z;SV0
Z33 DPx4 work 7 vga_pak 0 22 HGKInm?j6h_E?hCL1=3Rf2
Z34 DPx4 ieee 15 std_logic_arith 0 22 GJbAT?7@hRQU9IQ702DT]2
Z35 DPx4 ieee 18 std_logic_unsigned 0 22 hEMVMlaNCR^<OOoVNV;m90
R12
Z36 DEx4 work 10 vga_pre_tb 0 22 lBieNQVlYd]7:AWzH`k4l2
Z37 w1255952276
Z38 8/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_pre_tb.vhd
Z39 F/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_pre_tb.vhd
l0
L183
Z40 VaNjILBk^@SVk6Z1ONfaFf3
R16
32
Z41 Mx10 4 ieee 14 std_logic_1164
Z42 Mx9 4 ieee 18 std_logic_unsigned
Z43 Mx8 4 ieee 15 std_logic_arith
Z44 Mx7 4 work 7 vga_pak
R23
R24
R25
R26
R27
R28
R17
R18
Z45 !s100 [cbZKiGBUbhKkFd>g4kgG0
Evga_control
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
l0
L21
Z46 ViM8Slb>8F]WOeH5T<?2Z>3
R16
32
R17
R18
Z47 !s100 cARWILLA2jkIezceCfQhO0
Abeh
R6
R7
R8
R9
R10
R11
R12
Z48 DEx4 work 11 vga_control 0 22 iM8Slb>8F]WOeH5T<?2Z>3
l55
L42
Z49 VbU;JfUJ`P<QoiYU8d=Z`A2
R16
32
R22
R23
R24
R25
R26
R27
R28
R17
R18
Z50 !s100 Un@URIhiDPMkb3K7nCBA]1
Evga_driver
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
l0
L288
Z51 V2[f_E^`<?L^bT>FDC^3Eh2
R16
32
R17
R18
Z52 !s100 H`[B7Qa3Tzi2R<9UOVVF`2
Abeh
R6
R7
R8
R9
R10
R11
R12
Z53 DEx4 work 10 vga_driver 0 22 2[f_E^`<?L^bT>FDC^3Eh2
l487
L358
Z54 VQ6GQEDImWUnHG8g>LY9A]1
R16
32
R22
R23
R24
R25
R26
R27
R28
R17
R18
Z55 !s100 I:B2OkcJZiMG=N]jWY;Ri1
Pvga_pak
R34
R35
R12
Z56 w1256830367
Z57 8/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_pak.vhd
Z58 F/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_pak.vhd
l0
L35
Z59 VHGKInm?j6h_E?hCL1=3Rf2
R16
32
Z60 Mx3 4 ieee 14 std_logic_1164
Z61 Mx2 4 ieee 18 std_logic_unsigned
Z62 Mx1 4 ieee 15 std_logic_arith
R17
R18
Z63 !s100 cALhF4me<zNWYz_BWPd?70
Evga_pre_tb
R37
R33
R34
R35
R12
R38
R39
l0
L37
Z64 VlBieNQVlYd]7:AWzH`k4l2
R16
32
R17
R18
Z65 !s100 E`OC=4TKQQZR9AW6:_aWL3
Astructure
R33
R34
R35
R12
R36
l97
L45
Z66 Vl<iY:0YYNA^;NVLi]z;SV0
R16
32
Z67 Mx4 4 ieee 14 std_logic_1164
Z68 Mx3 4 ieee 18 std_logic_unsigned
Z69 Mx2 4 ieee 15 std_logic_arith
Z70 Mx1 4 work 7 vga_pak
R17
R18
Z71 !s100 ==[?_XkYb5@TcOP8^IKLZ3