Version 9.0 Build 132 02/25/2009 SJ Full Version 45 3235 OFF OFF OFF ON ON OFF FV_OFF Level2 0 0 VRSM_ON VHSM_ON synplcty.lmf -- Start Library Paths -- -- End Library Paths -- -- Start VHDL Libraries -- -- End VHDL Libraries -- # entity vga_pll # storage db|vga_pll.(0).cnf db|vga_pll.(0).cnf # case_insensitive # source_file ..|..|src|vga_pll.bdf d3e7ceaac9b26558f3ae0434c87e1 26 # internal_option { BLOCK_DESIGN_NAMING AUTO } # hierarchies { | } # lmf |opt|quartus|quartus|lmf|synplcty.lmf 3057712873b497a38b70a3917f30cc38 # macro_sequence # end # entity vga # storage db|vga_pll.(1).cnf db|vga_pll.(1).cnf # case_sensitive # source_file ..|..|syn|rev_1|vga.vqm 75b23e99ee7fd7794044e77b9ba64bf9 28 # hierarchies { vga:inst } # lmf |opt|quartus|quartus|lmf|synplcty.lmf 3057712873b497a38b70a3917f30cc38 # macro_sequence # end # entity vga_driver # storage db|vga_pll.(2).cnf db|vga_pll.(2).cnf # case_sensitive # source_file ..|..|syn|rev_1|vga.vqm 75b23e99ee7fd7794044e77b9ba64bf9 28 # hierarchies { vga:inst|vga_driver:vga_driver_unit } # lmf |opt|quartus|quartus|lmf|synplcty.lmf 3057712873b497a38b70a3917f30cc38 # macro_sequence # end # entity vga_control # storage db|vga_pll.(3).cnf db|vga_pll.(3).cnf # case_sensitive # source_file ..|..|syn|rev_1|vga.vqm 75b23e99ee7fd7794044e77b9ba64bf9 28 # hierarchies { vga:inst|vga_control:vga_control_unit } # lmf |opt|quartus|quartus|lmf|synplcty.lmf 3057712873b497a38b70a3917f30cc38 # macro_sequence # end # entity vpll # storage db|vga_pll.(4).cnf db|vga_pll.(4).cnf # logic_option { AUTO_RAM_RECOGNITION ON } # case_insensitive # source_file ..|..|src|vpll.vhd ccc2bcb05887d5721243fd22481948be 5 # internal_option { HDL_INITIAL_FANOUT_LIMIT OFF AUTO_RESOURCE_SHARING OFF AUTO_RAM_RECOGNITION ON AUTO_ROM_RECOGNITION ON } # hierarchies { vpll:inst1 } # lmf |opt|quartus|quartus|lmf|maxplus2.lmf 9a59d39b0706640b4b2718e8a1ff1f # macro_sequence # end # entity altpll # storage db|vga_pll.(5).cnf db|vga_pll.(5).cnf # case_insensitive # source_file |opt|quartus|quartus|libraries|megafunctions|altpll.tdf d980162588d7aa8b78874932c782e18 7 # user_parameter { OPERATION_MODE NORMAL PARAMETER_UNKNOWN USR PLL_TYPE AUTO PARAMETER_UNKNOWN USR QUALIFY_CONF_DONE OFF PARAMETER_UNKNOWN DEF COMPENSATE_CLOCK CLK0 PARAMETER_UNKNOWN USR SCAN_CHAIN LONG PARAMETER_UNKNOWN DEF PRIMARY_CLOCK INCLK0 PARAMETER_UNKNOWN DEF INCLK0_INPUT_FREQUENCY 30003 PARAMETER_SIGNED_DEC USR INCLK1_INPUT_FREQUENCY 0 PARAMETER_UNKNOWN DEF GATE_LOCK_SIGNAL NO PARAMETER_UNKNOWN USR GATE_LOCK_COUNTER 0 PARAMETER_UNKNOWN DEF LOCK_HIGH 1 PARAMETER_UNKNOWN DEF LOCK_LOW 1 PARAMETER_UNKNOWN DEF VALID_LOCK_MULTIPLIER 1 PARAMETER_SIGNED_DEC USR INVALID_LOCK_MULTIPLIER 5 PARAMETER_SIGNED_DEC USR SWITCH_OVER_ON_LOSSCLK OFF PARAMETER_UNKNOWN DEF SWITCH_OVER_ON_GATED_LOCK OFF PARAMETER_UNKNOWN DEF ENABLE_SWITCH_OVER_COUNTER OFF PARAMETER_UNKNOWN DEF SKIP_VCO OFF PARAMETER_UNKNOWN DEF SWITCH_OVER_COUNTER 0 PARAMETER_UNKNOWN DEF SWITCH_OVER_TYPE AUTO PARAMETER_UNKNOWN DEF FEEDBACK_SOURCE EXTCLK0 PARAMETER_UNKNOWN DEF BANDWIDTH 0 PARAMETER_UNKNOWN DEF BANDWIDTH_TYPE AUTO PARAMETER_UNKNOWN USR SPREAD_FREQUENCY 0 PARAMETER_SIGNED_DEC USR DOWN_SPREAD 0 PARAMETER_UNKNOWN DEF SELF_RESET_ON_GATED_LOSS_LOCK OFF PARAMETER_UNKNOWN DEF SELF_RESET_ON_LOSS_LOCK OFF PARAMETER_UNKNOWN DEF CLK9_MULTIPLY_BY 0 PARAMETER_UNKNOWN DEF CLK8_MULTIPLY_BY 0 PARAMETER_UNKNOWN DEF CLK7_MULTIPLY_BY 0 PARAMETER_UNKNOWN DEF CLK6_MULTIPLY_BY 0 PARAMETER_UNKNOWN DEF CLK5_MULTIPLY_BY 1 PARAMETER_UNKNOWN DEF CLK4_MULTIPLY_BY 1 PARAMETER_UNKNOWN DEF CLK3_MULTIPLY_BY 1 PARAMETER_UNKNOWN DEF CLK2_MULTIPLY_BY 1 PARAMETER_UNKNOWN DEF CLK1_MULTIPLY_BY 1 PARAMETER_UNKNOWN DEF CLK0_MULTIPLY_BY 5435 PARAMETER_SIGNED_DEC USR CLK9_DIVIDE_BY 0 PARAMETER_UNKNOWN DEF CLK8_DIVIDE_BY 0 PARAMETER_UNKNOWN DEF CLK7_DIVIDE_BY 0 PARAMETER_UNKNOWN DEF CLK6_DIVIDE_BY 0 PARAMETER_UNKNOWN DEF CLK5_DIVIDE_BY 1 PARAMETER_UNKNOWN DEF CLK4_DIVIDE_BY 1 PARAMETER_UNKNOWN DEF CLK3_DIVIDE_BY 1 PARAMETER_UNKNOWN DEF CLK2_DIVIDE_BY 1 PARAMETER_UNKNOWN DEF CLK1_DIVIDE_BY 1 PARAMETER_UNKNOWN DEF CLK0_DIVIDE_BY 6666 PARAMETER_SIGNED_DEC USR CLK9_PHASE_SHIFT 0 PARAMETER_UNKNOWN DEF CLK8_PHASE_SHIFT 0 PARAMETER_UNKNOWN DEF CLK7_PHASE_SHIFT 0 PARAMETER_UNKNOWN DEF CLK6_PHASE_SHIFT 0 PARAMETER_UNKNOWN DEF CLK5_PHASE_SHIFT 0 PARAMETER_UNKNOWN DEF CLK4_PHASE_SHIFT 0 PARAMETER_UNKNOWN DEF CLK3_PHASE_SHIFT 0 PARAMETER_UNKNOWN DEF CLK2_PHASE_SHIFT 0 PARAMETER_UNKNOWN DEF CLK1_PHASE_SHIFT 0 PARAMETER_UNKNOWN DEF CLK0_PHASE_SHIFT 0 PARAMETER_UNKNOWN USR CLK5_TIME_DELAY 0 PARAMETER_UNKNOWN DEF CLK4_TIME_DELAY 0 PARAMETER_UNKNOWN DEF CLK3_TIME_DELAY 0 PARAMETER_UNKNOWN DEF CLK2_TIME_DELAY 0 PARAMETER_UNKNOWN DEF CLK1_TIME_DELAY 0 PARAMETER_UNKNOWN DEF CLK0_TIME_DELAY 0 PARAMETER_UNKNOWN USR CLK9_DUTY_CYCLE 50 PARAMETER_UNKNOWN DEF CLK8_DUTY_CYCLE 50 PARAMETER_UNKNOWN DEF CLK7_DUTY_CYCLE 50 PARAMETER_UNKNOWN DEF CLK6_DUTY_CYCLE 50 PARAMETER_UNKNOWN DEF CLK5_DUTY_CYCLE 50 PARAMETER_UNKNOWN DEF CLK4_DUTY_CYCLE 50 PARAMETER_UNKNOWN DEF CLK3_DUTY_CYCLE 50 PARAMETER_UNKNOWN DEF CLK2_DUTY_CYCLE 50 PARAMETER_UNKNOWN DEF CLK1_DUTY_CYCLE 50 PARAMETER_UNKNOWN DEF CLK0_DUTY_CYCLE 50 PARAMETER_SIGNED_DEC USR CLK9_USE_EVEN_COUNTER_MODE OFF PARAMETER_UNKNOWN DEF CLK8_USE_EVEN_COUNTER_MODE OFF PARAMETER_UNKNOWN DEF CLK7_USE_EVEN_COUNTER_MODE OFF PARAMETER_UNKNOWN DEF CLK6_USE_EVEN_COUNTER_MODE OFF PARAMETER_UNKNOWN DEF CLK5_USE_EVEN_COUNTER_MODE OFF PARAMETER_UNKNOWN DEF CLK4_USE_EVEN_COUNTER_MODE OFF PARAMETER_UNKNOWN DEF CLK3_USE_EVEN_COUNTER_MODE OFF PARAMETER_UNKNOWN DEF CLK2_USE_EVEN_COUNTER_MODE OFF PARAMETER_UNKNOWN DEF CLK1_USE_EVEN_COUNTER_MODE OFF PARAMETER_UNKNOWN DEF CLK0_USE_EVEN_COUNTER_MODE OFF PARAMETER_UNKNOWN DEF CLK9_USE_EVEN_COUNTER_VALUE OFF PARAMETER_UNKNOWN DEF CLK8_USE_EVEN_COUNTER_VALUE OFF PARAMETER_UNKNOWN DEF CLK7_USE_EVEN_COUNTER_VALUE OFF PARAMETER_UNKNOWN DEF CLK6_USE_EVEN_COUNTER_VALUE OFF PARAMETER_UNKNOWN DEF CLK5_USE_EVEN_COUNTER_VALUE OFF PARAMETER_UNKNOWN DEF CLK4_USE_EVEN_COUNTER_VALUE OFF PARAMETER_UNKNOWN DEF CLK3_USE_EVEN_COUNTER_VALUE OFF PARAMETER_UNKNOWN DEF CLK2_USE_EVEN_COUNTER_VALUE OFF PARAMETER_UNKNOWN DEF CLK1_USE_EVEN_COUNTER_VALUE OFF PARAMETER_UNKNOWN DEF CLK0_USE_EVEN_COUNTER_VALUE OFF PARAMETER_UNKNOWN DEF LOCK_WINDOW_UI 0.05 PARAMETER_UNKNOWN DEF LOCK_WINDOW_UI_BITS UNUSED PARAMETER_UNKNOWN DEF VCO_RANGE_DETECTOR_LOW_BITS UNUSED PARAMETER_UNKNOWN DEF VCO_RANGE_DETECTOR_HIGH_BITS UNUSED PARAMETER_UNKNOWN DEF DPA_MULTIPLY_BY 0 PARAMETER_UNKNOWN DEF DPA_DIVIDE_BY 1 PARAMETER_UNKNOWN DEF DPA_DIVIDER 0 PARAMETER_UNKNOWN DEF EXTCLK3_MULTIPLY_BY 1 PARAMETER_UNKNOWN DEF EXTCLK2_MULTIPLY_BY 1 PARAMETER_UNKNOWN DEF EXTCLK1_MULTIPLY_BY 1 PARAMETER_UNKNOWN DEF EXTCLK0_MULTIPLY_BY 1 PARAMETER_UNKNOWN DEF EXTCLK3_DIVIDE_BY 1 PARAMETER_UNKNOWN DEF EXTCLK2_DIVIDE_BY 1 PARAMETER_UNKNOWN DEF EXTCLK1_DIVIDE_BY 1 PARAMETER_UNKNOWN DEF EXTCLK0_DIVIDE_BY 1 PARAMETER_UNKNOWN DEF EXTCLK3_PHASE_SHIFT 0 PARAMETER_UNKNOWN DEF EXTCLK2_PHASE_SHIFT 0 PARAMETER_UNKNOWN DEF EXTCLK1_PHASE_SHIFT 0 PARAMETER_UNKNOWN DEF EXTCLK0_PHASE_SHIFT 0 PARAMETER_UNKNOWN DEF EXTCLK3_TIME_DELAY 0 PARAMETER_UNKNOWN DEF EXTCLK2_TIME_DELAY 0 PARAMETER_UNKNOWN DEF EXTCLK1_TIME_DELAY 0 PARAMETER_UNKNOWN DEF EXTCLK0_TIME_DELAY 0 PARAMETER_UNKNOWN DEF EXTCLK3_DUTY_CYCLE 50 PARAMETER_UNKNOWN DEF EXTCLK2_DUTY_CYCLE 50 PARAMETER_UNKNOWN DEF EXTCLK1_DUTY_CYCLE 50 PARAMETER_UNKNOWN DEF EXTCLK0_DUTY_CYCLE 50 PARAMETER_UNKNOWN DEF VCO_MULTIPLY_BY 0 PARAMETER_UNKNOWN DEF VCO_DIVIDE_BY 0 PARAMETER_UNKNOWN DEF SCLKOUT0_PHASE_SHIFT 0 PARAMETER_UNKNOWN DEF SCLKOUT1_PHASE_SHIFT 0 PARAMETER_UNKNOWN DEF VCO_MIN 0 PARAMETER_UNKNOWN DEF VCO_MAX 0 PARAMETER_UNKNOWN DEF VCO_CENTER 0 PARAMETER_UNKNOWN DEF PFD_MIN 0 PARAMETER_UNKNOWN DEF PFD_MAX 0 PARAMETER_UNKNOWN DEF M_INITIAL 0 PARAMETER_UNKNOWN DEF M 0 PARAMETER_UNKNOWN DEF N 1 PARAMETER_UNKNOWN DEF M2 1 PARAMETER_UNKNOWN DEF N2 1 PARAMETER_UNKNOWN DEF SS 1 PARAMETER_UNKNOWN DEF C0_HIGH 0 PARAMETER_UNKNOWN DEF C1_HIGH 0 PARAMETER_UNKNOWN DEF C2_HIGH 0 PARAMETER_UNKNOWN DEF C3_HIGH 0 PARAMETER_UNKNOWN DEF C4_HIGH 0 PARAMETER_UNKNOWN DEF C5_HIGH 0 PARAMETER_UNKNOWN DEF C6_HIGH 0 PARAMETER_UNKNOWN DEF C7_HIGH 0 PARAMETER_UNKNOWN DEF C8_HIGH 0 PARAMETER_UNKNOWN DEF C9_HIGH 0 PARAMETER_UNKNOWN DEF C0_LOW 0 PARAMETER_UNKNOWN DEF C1_LOW 0 PARAMETER_UNKNOWN DEF C2_LOW 0 PARAMETER_UNKNOWN DEF C3_LOW 0 PARAMETER_UNKNOWN DEF C4_LOW 0 PARAMETER_UNKNOWN DEF C5_LOW 0 PARAMETER_UNKNOWN DEF C6_LOW 0 PARAMETER_UNKNOWN DEF C7_LOW 0 PARAMETER_UNKNOWN DEF C8_LOW 0 PARAMETER_UNKNOWN DEF C9_LOW 0 PARAMETER_UNKNOWN DEF C0_INITIAL 0 PARAMETER_UNKNOWN DEF C1_INITIAL 0 PARAMETER_UNKNOWN DEF C2_INITIAL 0 PARAMETER_UNKNOWN DEF C3_INITIAL 0 PARAMETER_UNKNOWN DEF C4_INITIAL 0 PARAMETER_UNKNOWN DEF C5_INITIAL 0 PARAMETER_UNKNOWN DEF C6_INITIAL 0 PARAMETER_UNKNOWN DEF C7_INITIAL 0 PARAMETER_UNKNOWN DEF C8_INITIAL 0 PARAMETER_UNKNOWN DEF C9_INITIAL 0 PARAMETER_UNKNOWN DEF C0_MODE BYPASS PARAMETER_UNKNOWN DEF C1_MODE BYPASS PARAMETER_UNKNOWN DEF C2_MODE BYPASS PARAMETER_UNKNOWN DEF C3_MODE BYPASS PARAMETER_UNKNOWN DEF C4_MODE BYPASS PARAMETER_UNKNOWN DEF C5_MODE BYPASS PARAMETER_UNKNOWN DEF C6_MODE BYPASS PARAMETER_UNKNOWN DEF C7_MODE BYPASS PARAMETER_UNKNOWN DEF C8_MODE BYPASS PARAMETER_UNKNOWN DEF C9_MODE BYPASS PARAMETER_UNKNOWN DEF C0_PH 0 PARAMETER_UNKNOWN DEF C1_PH 0 PARAMETER_UNKNOWN DEF C2_PH 0 PARAMETER_UNKNOWN DEF C3_PH 0 PARAMETER_UNKNOWN DEF C4_PH 0 PARAMETER_UNKNOWN DEF C5_PH 0 PARAMETER_UNKNOWN DEF C6_PH 0 PARAMETER_UNKNOWN DEF C7_PH 0 PARAMETER_UNKNOWN DEF C8_PH 0 PARAMETER_UNKNOWN DEF C9_PH 0 PARAMETER_UNKNOWN DEF L0_HIGH 1 PARAMETER_UNKNOWN DEF L1_HIGH 1 PARAMETER_UNKNOWN DEF G0_HIGH 1 PARAMETER_UNKNOWN DEF G1_HIGH 1 PARAMETER_UNKNOWN DEF G2_HIGH 1 PARAMETER_UNKNOWN DEF G3_HIGH 1 PARAMETER_UNKNOWN DEF E0_HIGH 1 PARAMETER_UNKNOWN DEF E1_HIGH 1 PARAMETER_UNKNOWN DEF E2_HIGH 1 PARAMETER_UNKNOWN DEF E3_HIGH 1 PARAMETER_UNKNOWN DEF L0_LOW 1 PARAMETER_UNKNOWN DEF L1_LOW 1 PARAMETER_UNKNOWN DEF G0_LOW 1 PARAMETER_UNKNOWN DEF G1_LOW 1 PARAMETER_UNKNOWN DEF G2_LOW 1 PARAMETER_UNKNOWN DEF G3_LOW 1 PARAMETER_UNKNOWN DEF E0_LOW 1 PARAMETER_UNKNOWN DEF E1_LOW 1 PARAMETER_UNKNOWN DEF E2_LOW 1 PARAMETER_UNKNOWN DEF E3_LOW 1 PARAMETER_UNKNOWN DEF L0_INITIAL 1 PARAMETER_UNKNOWN DEF L1_INITIAL 1 PARAMETER_UNKNOWN DEF G0_INITIAL 1 PARAMETER_UNKNOWN DEF G1_INITIAL 1 PARAMETER_UNKNOWN DEF G2_INITIAL 1 PARAMETER_UNKNOWN DEF G3_INITIAL 1 PARAMETER_UNKNOWN DEF E0_INITIAL 1 PARAMETER_UNKNOWN DEF E1_INITIAL 1 PARAMETER_UNKNOWN DEF E2_INITIAL 1 PARAMETER_UNKNOWN DEF E3_INITIAL 1 PARAMETER_UNKNOWN DEF L0_MODE BYPASS PARAMETER_UNKNOWN DEF L1_MODE BYPASS PARAMETER_UNKNOWN DEF G0_MODE BYPASS PARAMETER_UNKNOWN DEF G1_MODE BYPASS PARAMETER_UNKNOWN DEF G2_MODE BYPASS PARAMETER_UNKNOWN DEF G3_MODE BYPASS PARAMETER_UNKNOWN DEF E0_MODE BYPASS PARAMETER_UNKNOWN DEF E1_MODE BYPASS PARAMETER_UNKNOWN DEF E2_MODE BYPASS PARAMETER_UNKNOWN DEF E3_MODE BYPASS PARAMETER_UNKNOWN DEF L0_PH 0 PARAMETER_UNKNOWN DEF L1_PH 0 PARAMETER_UNKNOWN DEF G0_PH 0 PARAMETER_UNKNOWN DEF G1_PH 0 PARAMETER_UNKNOWN DEF G2_PH 0 PARAMETER_UNKNOWN DEF G3_PH 0 PARAMETER_UNKNOWN DEF E0_PH 0 PARAMETER_UNKNOWN DEF E1_PH 0 PARAMETER_UNKNOWN DEF E2_PH 0 PARAMETER_UNKNOWN DEF E3_PH 0 PARAMETER_UNKNOWN DEF M_PH 0 PARAMETER_UNKNOWN DEF C1_USE_CASC_IN OFF PARAMETER_UNKNOWN DEF C2_USE_CASC_IN OFF PARAMETER_UNKNOWN DEF C3_USE_CASC_IN OFF PARAMETER_UNKNOWN DEF C4_USE_CASC_IN OFF PARAMETER_UNKNOWN DEF C5_USE_CASC_IN OFF PARAMETER_UNKNOWN DEF C6_USE_CASC_IN OFF PARAMETER_UNKNOWN DEF C7_USE_CASC_IN OFF PARAMETER_UNKNOWN DEF C8_USE_CASC_IN OFF PARAMETER_UNKNOWN DEF C9_USE_CASC_IN OFF PARAMETER_UNKNOWN DEF CLK0_COUNTER G0 PARAMETER_UNKNOWN DEF CLK1_COUNTER G0 PARAMETER_UNKNOWN DEF CLK2_COUNTER G0 PARAMETER_UNKNOWN DEF CLK3_COUNTER G0 PARAMETER_UNKNOWN DEF CLK4_COUNTER G0 PARAMETER_UNKNOWN DEF CLK5_COUNTER G0 PARAMETER_UNKNOWN DEF CLK6_COUNTER E0 PARAMETER_UNKNOWN DEF CLK7_COUNTER E1 PARAMETER_UNKNOWN DEF CLK8_COUNTER E2 PARAMETER_UNKNOWN DEF CLK9_COUNTER E3 PARAMETER_UNKNOWN DEF L0_TIME_DELAY 0 PARAMETER_UNKNOWN DEF L1_TIME_DELAY 0 PARAMETER_UNKNOWN DEF G0_TIME_DELAY 0 PARAMETER_UNKNOWN DEF G1_TIME_DELAY 0 PARAMETER_UNKNOWN DEF G2_TIME_DELAY 0 PARAMETER_UNKNOWN DEF G3_TIME_DELAY 0 PARAMETER_UNKNOWN DEF E0_TIME_DELAY 0 PARAMETER_UNKNOWN DEF E1_TIME_DELAY 0 PARAMETER_UNKNOWN DEF E2_TIME_DELAY 0 PARAMETER_UNKNOWN DEF E3_TIME_DELAY 0 PARAMETER_UNKNOWN DEF M_TIME_DELAY 0 PARAMETER_UNKNOWN DEF N_TIME_DELAY 0 PARAMETER_UNKNOWN DEF EXTCLK3_COUNTER E3 PARAMETER_UNKNOWN DEF EXTCLK2_COUNTER E2 PARAMETER_UNKNOWN DEF EXTCLK1_COUNTER E1 PARAMETER_UNKNOWN DEF EXTCLK0_COUNTER E0 PARAMETER_UNKNOWN DEF ENABLE0_COUNTER L0 PARAMETER_UNKNOWN DEF ENABLE1_COUNTER L0 PARAMETER_UNKNOWN DEF CHARGE_PUMP_CURRENT 2 PARAMETER_UNKNOWN DEF LOOP_FILTER_R 1.000000 PARAMETER_UNKNOWN DEF LOOP_FILTER_C 5 PARAMETER_UNKNOWN DEF CHARGE_PUMP_CURRENT_BITS 9999 PARAMETER_UNKNOWN DEF LOOP_FILTER_R_BITS 9999 PARAMETER_UNKNOWN DEF LOOP_FILTER_C_BITS 9999 PARAMETER_UNKNOWN DEF VCO_POST_SCALE 0 PARAMETER_UNKNOWN DEF CLK2_OUTPUT_FREQUENCY 0 PARAMETER_UNKNOWN DEF CLK1_OUTPUT_FREQUENCY 0 PARAMETER_UNKNOWN DEF CLK0_OUTPUT_FREQUENCY 0 PARAMETER_UNKNOWN DEF INTENDED_DEVICE_FAMILY Stratix PARAMETER_UNKNOWN USR PORT_CLKENA0 PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_CLKENA1 PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_CLKENA2 PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_CLKENA3 PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_CLKENA4 PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_CLKENA5 PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_EXTCLKENA0 PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_EXTCLKENA1 PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_EXTCLKENA2 PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_EXTCLKENA3 PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_EXTCLK0 PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_EXTCLK1 PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_EXTCLK2 PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_EXTCLK3 PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_CLKBAD0 PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_CLKBAD1 PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_CLK0 PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_CLK1 PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_CLK2 PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_CLK3 PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_CLK4 PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_CLK5 PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_CLK6 PORT_UNUSED PARAMETER_UNKNOWN DEF PORT_CLK7 PORT_UNUSED PARAMETER_UNKNOWN DEF PORT_CLK8 PORT_UNUSED PARAMETER_UNKNOWN DEF PORT_CLK9 PORT_UNUSED PARAMETER_UNKNOWN DEF PORT_SCANDATA PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_SCANDATAOUT PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_SCANDONE PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_SCLKOUT1 PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_SCLKOUT0 PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_ACTIVECLOCK PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_CLKLOSS PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_INCLK1 PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_INCLK0 PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_FBIN PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_PLLENA PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_CLKSWITCH PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_ARESET PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_PFDENA PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_SCANCLK PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_SCANACLR PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_SCANREAD PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_SCANWRITE PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_ENABLE0 PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_ENABLE1 PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_LOCKED PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_CONFIGUPDATE PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_FBOUT PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_PHASEDONE PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_PHASESTEP PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_PHASEUPDOWN PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_SCANCLKENA PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_PHASECOUNTERSELECT PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_VCOOVERRANGE PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF PORT_VCOUNDERRANGE PORT_CONNECTIVITY PARAMETER_UNKNOWN DEF M_TEST_SOURCE 5 PARAMETER_UNKNOWN DEF C0_TEST_SOURCE 5 PARAMETER_UNKNOWN DEF C1_TEST_SOURCE 5 PARAMETER_UNKNOWN DEF C2_TEST_SOURCE 5 PARAMETER_UNKNOWN DEF C3_TEST_SOURCE 5 PARAMETER_UNKNOWN DEF C4_TEST_SOURCE 5 PARAMETER_UNKNOWN DEF C5_TEST_SOURCE 5 PARAMETER_UNKNOWN DEF C6_TEST_SOURCE 5 PARAMETER_UNKNOWN DEF C7_TEST_SOURCE 5 PARAMETER_UNKNOWN DEF C8_TEST_SOURCE 5 PARAMETER_UNKNOWN DEF C9_TEST_SOURCE 5 PARAMETER_UNKNOWN DEF CBXI_PARAMETER NOTHING PARAMETER_UNKNOWN DEF VCO_FREQUENCY_CONTROL AUTO PARAMETER_UNKNOWN DEF VCO_PHASE_SHIFT_STEP 0 PARAMETER_UNKNOWN DEF WIDTH_CLOCK 6 PARAMETER_UNKNOWN DEF WIDTH_PHASECOUNTERSELECT 4 PARAMETER_UNKNOWN DEF USING_FBMIMICBIDIR_PORT OFF PARAMETER_UNKNOWN DEF DEVICE_FAMILY Stratix PARAMETER_UNKNOWN USR SCAN_CHAIN_MIF_FILE UNUSED PARAMETER_UNKNOWN DEF SIM_GATE_LOCK_DEVICE_BEHAVIOR OFF PARAMETER_UNKNOWN DEF AUTO_CARRY_CHAINS ON AUTO_CARRY USR IGNORE_CARRY_BUFFERS OFF IGNORE_CARRY USR AUTO_CASCADE_CHAINS ON AUTO_CASCADE USR IGNORE_CASCADE_BUFFERS OFF IGNORE_CASCADE USR } # used_port { inclk0 -1 3 clk0 -1 3 inclk1 -1 1 extclkena3 -1 1 extclkena2 -1 1 extclkena1 -1 1 extclkena0 -1 1 clkena5 -1 1 clkena4 -1 1 clkena3 -1 1 clkena2 -1 1 clkena1 -1 1 areset -1 1 pllena -1 2 clkena0 -1 2 } # include_file { |opt|quartus|quartus|libraries|megafunctions|aglobal90.inc 99832fdf63412df51d7531202d74e75 |opt|quartus|quartus|libraries|megafunctions|stratixii_pll.inc 6d1985e16ab5f59a1fd6b0ae20978a4e |opt|quartus|quartus|libraries|megafunctions|cycloneii_pll.inc 39a0d9d1237d1db39c848c3f9faffc |opt|quartus|quartus|libraries|megafunctions|stratix_pll.inc 5f8211898149ceae8264a0ea5036254f } # hierarchies { vpll:inst1|altpll:altpll_component } # lmf |opt|quartus|quartus|lmf|synplcty.lmf 3057712873b497a38b70a3917f30cc38 # macro_sequence # end # complete