m255 K3 13 cModel Technology Z0 dD:\Modeltech_ae Pcomponents Z1 DPx17 __model_tech/ieee 14 std_logic_1164 0 22 GH1=`jDDBJ=`LM;:Ak`kf2 Z2 OE;C;6.5b;42 32 Z3 Mx1 17 __model_tech/ieee 14 std_logic_1164 Z4 w1044436548 Z5 FC:/Programme/Synplicity/fpga_81/lib/vhdl_sim/synplify.vhd l0 L267 Z6 V@=LFfPB8UiBPm8Y3jZ0Dj3 Z7 OV;C;6.0c;29 Z8 o-work work -O0 Z9 tExplicit 1 GenerateLoopIterationMax 100000 Eprim_counter R4 Z10 DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2 R5 l0 L15 Z11 VcQCCenBd1lXWm_j9FUd2 R7 32 R8 R9 Abeh R10 Z16 DE work prim_dff S5Io]C1B4zYM>Wm_j9FUd2 l69 L68 Z17 VT[KO?W>VV?5LNHP^g`R[_1 R7 32 R14 R8 R9 Eprim_latch R4 R10 R5 l0 L116 Z18 VmR@CKlRn3 R7 32 R14 R8 R9 Eprim_ramd R4 Z21 DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2 Z22 DP ieee std_logic_unsigned hEMVMlaNCR^^iBn8PBXdNVQ^KnC[EQ`0 R7 32 Z26 M3 ieee std_logic_1164 Z27 M2 ieee std_logic_unsigned Z28 M1 ieee std_logic_arith R8 R9 Eprim_sdff R4 R10 R5 l0 L87 Z29 VHZDBHc7EHMMlKLZ:7l2?P1 R7 32 R8 R9 Abeh R10 Z30 DE work prim_sdff HZDBHc7EHMMlKLZ:7l2?P1 l97 L95 Z31 V@KF;3mY=J>QVDOIl9k?c51 R7 32 R14 R8 R9 Ezeroohm1 R4 R10 R5 l0 L189 Z32 VaajiH=affEnY`VBgj=VoV2 R7 32 R8 R9 Azeroohm1_a R10 Z33 DE work zeroohm1 aajiH=affEnY`VBgj=VoV2 l202 L197 Z34 V1g5GS;_H4iKP[SR00lVV73 R7 32 R14 R8 R9