bsp3/Designflow/syn/rev_1/vga_rm.tcl

   1 set_global_assignment -name TOP_LEVEL_ENTITY "|vga" -remove
   2 set_global_assignment -name FAMILY -remove
   3 set_global_assignment -name TAO_FILE "myresults.tao" -remove
   4 set_global_assignment -name SOURCES_PER_DESTINATION_INCLUDE_COUNT "1000" -remove
   5 set_global_assignment -name ROUTER_REGISTER_DUPLICATION ON -remove
   6 set_global_assignment -name REMOVE_DUPLICATE_LOGIC "OFF" -remove
   7 set_global_assignment -name REMOVE_DUPLICATE_REGISTERS "OFF" -remove
   8 set_global_assignment -name REMOVE_REDUNDANT_LOGIC_CELLS "OFF" -remove
   9 set_global_assignment -name REMOVE_DUPLICATE_REGISTERS "OFF" -remove
  10 set_global_assignment -name REMOVE_DUPLICATE_LOGIC "OFF" -remove
  11 #set_global_assignment -name EDA_RESYNTHESIS_TOOL "AMPLIFY" -remove
  12 create_base_clock clk_pin_setting -fmax 25.175mhz -duty_cycle 50.00 -target clk_pin -disable