bsp3/Designflow/syn/rev_1/scratchproject.prs

   1 #-- Synplicity, Inc.
   2 #-- Version C-2009.06
   3 #-- Project file /homes/burban/didelu/dide_16/bsp3/Designflow/syn/rev_1/scratchproject.prs
   4 #-- Written on Thu Oct 29 16:49:28 2009
   5
   6
   7 #project files
   8 add_file -vhdl -lib work "/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_pak.vhd"
   9 add_file -vhdl -lib work "/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_ent.vhd"
  10 add_file -vhdl -lib work "/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_arc.vhd"
  11 add_file -vhdl -lib work "/homes/burban/didelu/dide_16/bsp3/Designflow/src/board_driver_ent.vhd"
  12 add_file -vhdl -lib work "/homes/burban/didelu/dide_16/bsp3/Designflow/src/board_driver_arc.vhd"
  13 add_file -vhdl -lib work "/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_control_ent.vhd"
  14 add_file -vhdl -lib work "/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_control_arc.vhd"
  15 add_file -vhdl -lib work "/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_driver_ent.vhd"
  16 add_file -vhdl -lib work "/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_driver_arc.vhd"
  17
  18
  19 #implementation: "rev_1"
  20 impl -add /homes/burban/didelu/dide_16/bsp3/Designflow/syn/rev_1 -type fpga
  21
  22 #device options
  23 set_option -technology STRATIX
  24 set_option -part EP1S25
  25 set_option -package FC672
  26 set_option -speed_grade -6
  27 set_option -part_companion ""
  28
  29 #compilation/mapping options
  30 set_option -use_fsm_explorer 0
  31 set_option -top_module "vga"
  32
  33 # sequential_optimization_options
  34 set_option -symbolic_fsm_compiler 1
  35
  36 # Compiler Options
  37 set_option -compiler_compatible 0
  38 set_option -resource_sharing 1
  39
  40 # mapper_options
  41 set_option -frequency 25.175
  42 set_option -write_verilog 0
  43 set_option -write_vhdl 1
  44
  45 # Altera STRATIX
  46 set_option -run_prop_extract 1
  47 set_option -maxfan 500
  48 set_option -disable_io_insertion 0
  49 set_option -pipe 1
  50 set_option -update_models_cp 0
  51 set_option -retiming 0
  52 set_option -no_sequential_opt 0
  53 set_option -fixgatedclocks 3
  54 set_option -fixgeneratedclocks 3
  55 set_option -quartus_version 9.0
  56
  57 #VIF options
  58 set_option -write_vif 1
  59
  60 #automatic place and route (vendor) options
  61 set_option -write_apr_constraint 1
  62
  63 #set result format/file last
  64 project -result_file "/homes/burban/didelu/dide_16/bsp3/Designflow/syn/rev_1/vga.vqm"
  65
  66 #
  67 #implementation attributes
  68
  69 set_option -vlog_std v2001
  70 set_option -project_relative_includes 1
  71 impl -active "rev_1"