1 // Copyright (C) 1991-2009 Altera Corporation
2 // Your use of Altera Corporation's design tools, logic functions
3 // and other software and tools, and its AMPP partner logic
4 // functions, and any output files from any of the foregoing
5 // (including device programming or simulation files), and any
6 // associated documentation or information are expressly subject
7 // to the terms and conditions of the Altera Program License
8 // Subscription Agreement, Altera MegaCore Function License
9 // Agreement, or other applicable license agreement, including,
10 // without limitation, that your use is for the sole purpose of
11 // programming logic devices manufactured by Altera and sold by
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13 // applicable agreement for further details.
17 // Device: Altera EP1S25F672C6 Package FBGA672
21 // This SDF file should be used for ModelSim-Altera (VHDL) only
27 (DATE "10/29/2009 17:00:56")
29 (PROGRAM "Quartus II")
30 (VERSION "Version 9.0 Build 132 02/25/2009 SJ Full Version")
35 (CELLTYPE "stratix_asynch_io")
36 (INSTANCE clk_pin_in.inst1)
39 (IOPATH padio combout (868:868:868) (868:868:868))
44 (CELLTYPE "stratix_asynch_io")
45 (INSTANCE reset_pin_in.inst1)
48 (IOPATH padio combout (1295:1295:1295) (1295:1295:1295))
53 (CELLTYPE "stratix_asynch_lcell")
54 (INSTANCE \\dly_counter_1_\\.lecomb)
57 (PORT dataa (4768:4768:4768) (4768:4768:4768))
58 (PORT datab (469:469:469) (469:469:469))
59 (PORT datac (486:486:486) (486:486:486))
60 (IOPATH dataa regin (583:583:583) (583:583:583))
61 (IOPATH datab regin (489:489:489) (489:489:489))
62 (IOPATH datac regin (364:364:364) (364:364:364))
67 (CELLTYPE "stratix_lcell_register")
68 (INSTANCE \\dly_counter_1_\\.lereg)
71 (PORT aclr (668:668:668) (668:668:668))
72 (PORT clk (2323:2323:2323) (2323:2323:2323))
73 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
74 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
78 (SETUP datain (posedge clk) (10:10:10))
79 (HOLD datain (posedge clk) (100:100:100))
83 (CELLTYPE "stratix_asynch_lcell")
84 (INSTANCE \\dly_counter_0_\\.lecomb)
87 (PORT dataa (4768:4768:4768) (4768:4768:4768))
88 (PORT datab (465:465:465) (465:465:465))
89 (PORT datac (485:485:485) (485:485:485))
90 (IOPATH dataa regin (583:583:583) (583:583:583))
91 (IOPATH datab regin (489:489:489) (489:489:489))
92 (IOPATH datac regin (364:364:364) (364:364:364))
97 (CELLTYPE "stratix_lcell_register")
98 (INSTANCE \\dly_counter_0_\\.lereg)
101 (PORT aclr (668:668:668) (668:668:668))
102 (PORT clk (2323:2323:2323) (2323:2323:2323))
103 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
104 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
108 (SETUP datain (posedge clk) (10:10:10))
109 (HOLD datain (posedge clk) (100:100:100))
113 (CELLTYPE "stratix_asynch_lcell")
114 (INSTANCE \\vga_driver_unit\|vsync_state_6_\\.lecomb)
117 (PORT dataa (4777:4777:4777) (4777:4777:4777))
118 (PORT datab (476:476:476) (476:476:476))
119 (PORT datac (490:490:490) (490:490:490))
120 (IOPATH dataa regin (583:583:583) (583:583:583))
121 (IOPATH datab regin (489:489:489) (489:489:489))
122 (IOPATH datac regin (364:364:364) (364:364:364))
123 (IOPATH dataa combout (459:459:459) (459:459:459))
124 (IOPATH datab combout (332:332:332) (332:332:332))
125 (IOPATH datac combout (213:213:213) (213:213:213))
130 (CELLTYPE "stratix_lcell_register")
131 (INSTANCE \\vga_driver_unit\|vsync_state_6_\\.lereg)
134 (PORT aclr (668:668:668) (668:668:668))
135 (PORT clk (2323:2323:2323) (2323:2323:2323))
136 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
137 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
141 (SETUP datain (posedge clk) (10:10:10))
142 (HOLD datain (posedge clk) (100:100:100))
146 (CELLTYPE "stratix_asynch_lcell")
147 (INSTANCE \\vga_driver_unit\|hsync_state_6_\\.lecomb)
150 (PORT datac (2355:2355:2355) (2355:2355:2355))
151 (PORT datad (1131:1131:1131) (1131:1131:1131))
152 (IOPATH datad combout (87:87:87) (87:87:87))
153 (IOPATH qfbkin combout (291:291:291) (291:291:291))
158 (CELLTYPE "stratix_lcell_register")
159 (INSTANCE \\vga_driver_unit\|hsync_state_6_\\.lereg)
162 (PORT datac (2445:2445:2445) (2445:2445:2445))
163 (PORT aclr (668:668:668) (668:668:668))
164 (PORT clk (2323:2323:2323) (2323:2323:2323))
165 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
166 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
167 (IOPATH (posedge clk) qfbkout (176:176:176) (176:176:176))
168 (IOPATH (posedge aclr) qfbkout (212:212:212) (212:212:212))
172 (SETUP datac (posedge clk) (10:10:10))
173 (SETUP datain (posedge clk) (10:10:10))
174 (HOLD datac (posedge clk) (100:100:100))
175 (HOLD datain (posedge clk) (100:100:100))
179 (CELLTYPE "stratix_asynch_lcell")
180 (INSTANCE \\vga_driver_unit\|hsync_counter_0_\\.lecomb)
183 (PORT datab (423:423:423) (423:423:423))
184 (PORT datac (1704:1704:1704) (1704:1704:1704))
185 (IOPATH datab regin (489:489:489) (489:489:489))
186 (IOPATH datab cout0 (344:344:344) (344:344:344))
187 (IOPATH datab cout1 (341:341:341) (341:341:341))
192 (CELLTYPE "stratix_lcell_register")
193 (INSTANCE \\vga_driver_unit\|hsync_counter_0_\\.lereg)
196 (PORT sload (1759:1759:1759) (1759:1759:1759))
197 (PORT datac (1794:1794:1794) (1794:1794:1794))
198 (PORT sclr (1308:1308:1308) (1308:1308:1308))
199 (PORT aclr (668:668:668) (668:668:668))
200 (PORT clk (2348:2348:2348) (2348:2348:2348))
201 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
202 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
206 (SETUP datac (posedge clk) (10:10:10))
207 (SETUP datain (posedge clk) (10:10:10))
208 (SETUP sclr (posedge clk) (10:10:10))
209 (SETUP sload (posedge clk) (10:10:10))
210 (HOLD datac (posedge clk) (100:100:100))
211 (HOLD datain (posedge clk) (100:100:100))
212 (HOLD sclr (posedge clk) (100:100:100))
213 (HOLD sload (posedge clk) (100:100:100))
217 (CELLTYPE "stratix_asynch_lcell")
218 (INSTANCE \\vga_driver_unit\|hsync_counter_1_\\.lecomb)
221 (PORT datab (419:419:419) (419:419:419))
222 (PORT datac (1707:1707:1707) (1707:1707:1707))
223 (IOPATH datab regin (489:489:489) (489:489:489))
224 (IOPATH cin0 regin (571:571:571) (571:571:571))
225 (IOPATH cin1 regin (587:587:587) (587:587:587))
226 (IOPATH datab cout0 (344:344:344) (344:344:344))
227 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
228 (IOPATH datab cout1 (341:341:341) (341:341:341))
229 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
234 (CELLTYPE "stratix_lcell_register")
235 (INSTANCE \\vga_driver_unit\|hsync_counter_1_\\.lereg)
238 (PORT sload (1759:1759:1759) (1759:1759:1759))
239 (PORT datac (1797:1797:1797) (1797:1797:1797))
240 (PORT sclr (1308:1308:1308) (1308:1308:1308))
241 (PORT aclr (668:668:668) (668:668:668))
242 (PORT clk (2348:2348:2348) (2348:2348:2348))
243 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
244 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
248 (SETUP datac (posedge clk) (10:10:10))
249 (SETUP datain (posedge clk) (10:10:10))
250 (SETUP sclr (posedge clk) (10:10:10))
251 (SETUP sload (posedge clk) (10:10:10))
252 (HOLD datac (posedge clk) (100:100:100))
253 (HOLD datain (posedge clk) (100:100:100))
254 (HOLD sclr (posedge clk) (100:100:100))
255 (HOLD sload (posedge clk) (100:100:100))
259 (CELLTYPE "stratix_asynch_lcell")
260 (INSTANCE \\vga_driver_unit\|hsync_counter_2_\\.lecomb)
263 (PORT dataa (444:444:444) (444:444:444))
264 (PORT datac (1709:1709:1709) (1709:1709:1709))
265 (IOPATH dataa regin (583:583:583) (583:583:583))
266 (IOPATH cin0 regin (571:571:571) (571:571:571))
267 (IOPATH cin1 regin (587:587:587) (587:587:587))
268 (IOPATH dataa cout0 (443:443:443) (443:443:443))
269 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
270 (IOPATH dataa cout1 (451:451:451) (451:451:451))
271 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
276 (CELLTYPE "stratix_lcell_register")
277 (INSTANCE \\vga_driver_unit\|hsync_counter_2_\\.lereg)
280 (PORT sload (1759:1759:1759) (1759:1759:1759))
281 (PORT datac (1799:1799:1799) (1799:1799:1799))
282 (PORT sclr (1308:1308:1308) (1308:1308:1308))
283 (PORT aclr (668:668:668) (668:668:668))
284 (PORT clk (2348:2348:2348) (2348:2348:2348))
285 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
286 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
290 (SETUP datac (posedge clk) (10:10:10))
291 (SETUP datain (posedge clk) (10:10:10))
292 (SETUP sclr (posedge clk) (10:10:10))
293 (SETUP sload (posedge clk) (10:10:10))
294 (HOLD datac (posedge clk) (100:100:100))
295 (HOLD datain (posedge clk) (100:100:100))
296 (HOLD sclr (posedge clk) (100:100:100))
297 (HOLD sload (posedge clk) (100:100:100))
301 (CELLTYPE "stratix_asynch_lcell")
302 (INSTANCE \\vga_driver_unit\|hsync_counter_3_\\.lecomb)
305 (PORT dataa (437:437:437) (437:437:437))
306 (PORT datac (1712:1712:1712) (1712:1712:1712))
307 (IOPATH dataa regin (583:583:583) (583:583:583))
308 (IOPATH cin0 regin (571:571:571) (571:571:571))
309 (IOPATH cin1 regin (587:587:587) (587:587:587))
310 (IOPATH dataa cout0 (443:443:443) (443:443:443))
311 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
312 (IOPATH dataa cout1 (451:451:451) (451:451:451))
313 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
318 (CELLTYPE "stratix_lcell_register")
319 (INSTANCE \\vga_driver_unit\|hsync_counter_3_\\.lereg)
322 (PORT sload (1759:1759:1759) (1759:1759:1759))
323 (PORT datac (1802:1802:1802) (1802:1802:1802))
324 (PORT sclr (1308:1308:1308) (1308:1308:1308))
325 (PORT aclr (668:668:668) (668:668:668))
326 (PORT clk (2348:2348:2348) (2348:2348:2348))
327 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
328 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
332 (SETUP datac (posedge clk) (10:10:10))
333 (SETUP datain (posedge clk) (10:10:10))
334 (SETUP sclr (posedge clk) (10:10:10))
335 (SETUP sload (posedge clk) (10:10:10))
336 (HOLD datac (posedge clk) (100:100:100))
337 (HOLD datain (posedge clk) (100:100:100))
338 (HOLD sclr (posedge clk) (100:100:100))
339 (HOLD sload (posedge clk) (100:100:100))
343 (CELLTYPE "stratix_asynch_lcell")
344 (INSTANCE \\vga_driver_unit\|hsync_counter_4_\\.lecomb)
347 (PORT dataa (445:445:445) (445:445:445))
348 (PORT datac (1715:1715:1715) (1715:1715:1715))
349 (IOPATH dataa regin (583:583:583) (583:583:583))
350 (IOPATH cin0 regin (571:571:571) (571:571:571))
351 (IOPATH cin1 regin (587:587:587) (587:587:587))
352 (IOPATH dataa cout (551:551:551) (551:551:551))
353 (IOPATH cin0 cout (135:135:135) (135:135:135))
354 (IOPATH cin1 cout (123:123:123) (123:123:123))
359 (CELLTYPE "stratix_lcell_register")
360 (INSTANCE \\vga_driver_unit\|hsync_counter_4_\\.lereg)
363 (PORT sload (1759:1759:1759) (1759:1759:1759))
364 (PORT datac (1805:1805:1805) (1805:1805:1805))
365 (PORT sclr (1308:1308:1308) (1308:1308:1308))
366 (PORT aclr (668:668:668) (668:668:668))
367 (PORT clk (2348:2348:2348) (2348:2348:2348))
368 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
369 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
373 (SETUP datac (posedge clk) (10:10:10))
374 (SETUP datain (posedge clk) (10:10:10))
375 (SETUP sclr (posedge clk) (10:10:10))
376 (SETUP sload (posedge clk) (10:10:10))
377 (HOLD datac (posedge clk) (100:100:100))
378 (HOLD datain (posedge clk) (100:100:100))
379 (HOLD sclr (posedge clk) (100:100:100))
380 (HOLD sload (posedge clk) (100:100:100))
384 (CELLTYPE "stratix_asynch_lcell")
385 (INSTANCE \\vga_driver_unit\|hsync_counter_5_\\.lecomb)
388 (PORT datab (420:420:420) (420:420:420))
389 (PORT datac (1722:1722:1722) (1722:1722:1722))
390 (IOPATH datab regin (489:489:489) (489:489:489))
391 (IOPATH cin regin (607:607:607) (607:607:607))
392 (IOPATH datab cout0 (344:344:344) (344:344:344))
393 (IOPATH datab cout1 (341:341:341) (341:341:341))
398 (CELLTYPE "stratix_lcell_register")
399 (INSTANCE \\vga_driver_unit\|hsync_counter_5_\\.lereg)
402 (PORT sload (1759:1759:1759) (1759:1759:1759))
403 (PORT datac (1812:1812:1812) (1812:1812:1812))
404 (PORT sclr (1308:1308:1308) (1308:1308:1308))
405 (PORT aclr (668:668:668) (668:668:668))
406 (PORT clk (2348:2348:2348) (2348:2348:2348))
407 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
408 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
412 (SETUP datac (posedge clk) (10:10:10))
413 (SETUP datain (posedge clk) (10:10:10))
414 (SETUP sclr (posedge clk) (10:10:10))
415 (SETUP sload (posedge clk) (10:10:10))
416 (HOLD datac (posedge clk) (100:100:100))
417 (HOLD datain (posedge clk) (100:100:100))
418 (HOLD sclr (posedge clk) (100:100:100))
419 (HOLD sload (posedge clk) (100:100:100))
423 (CELLTYPE "stratix_asynch_lcell")
424 (INSTANCE \\vga_driver_unit\|HSYNC_FSM_next_un13_hsync_counter_7\\.lecomb)
427 (PORT dataa (665:665:665) (665:665:665))
428 (PORT datab (628:628:628) (628:628:628))
429 (PORT datac (650:650:650) (650:650:650))
430 (PORT datad (644:644:644) (644:644:644))
431 (IOPATH dataa combout (459:459:459) (459:459:459))
432 (IOPATH datab combout (332:332:332) (332:332:332))
433 (IOPATH datac combout (213:213:213) (213:213:213))
434 (IOPATH datad combout (87:87:87) (87:87:87))
439 (CELLTYPE "stratix_asynch_lcell")
440 (INSTANCE \\vga_driver_unit\|hsync_counter_6_\\.lecomb)
443 (PORT datab (422:422:422) (422:422:422))
444 (PORT datac (1721:1721:1721) (1721:1721:1721))
445 (IOPATH datab regin (489:489:489) (489:489:489))
446 (IOPATH cin regin (607:607:607) (607:607:607))
447 (IOPATH cin0 regin (571:571:571) (571:571:571))
448 (IOPATH cin1 regin (587:587:587) (587:587:587))
449 (IOPATH datab cout0 (344:344:344) (344:344:344))
450 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
451 (IOPATH datab cout1 (341:341:341) (341:341:341))
452 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
457 (CELLTYPE "stratix_lcell_register")
458 (INSTANCE \\vga_driver_unit\|hsync_counter_6_\\.lereg)
461 (PORT sload (1759:1759:1759) (1759:1759:1759))
462 (PORT datac (1811:1811:1811) (1811:1811:1811))
463 (PORT sclr (1308:1308:1308) (1308:1308:1308))
464 (PORT aclr (668:668:668) (668:668:668))
465 (PORT clk (2348:2348:2348) (2348:2348:2348))
466 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
467 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
471 (SETUP datac (posedge clk) (10:10:10))
472 (SETUP datain (posedge clk) (10:10:10))
473 (SETUP sclr (posedge clk) (10:10:10))
474 (SETUP sload (posedge clk) (10:10:10))
475 (HOLD datac (posedge clk) (100:100:100))
476 (HOLD datain (posedge clk) (100:100:100))
477 (HOLD sclr (posedge clk) (100:100:100))
478 (HOLD sload (posedge clk) (100:100:100))
482 (CELLTYPE "stratix_asynch_lcell")
483 (INSTANCE \\vga_driver_unit\|hsync_counter_7_\\.lecomb)
486 (PORT dataa (436:436:436) (436:436:436))
487 (PORT datac (1719:1719:1719) (1719:1719:1719))
488 (IOPATH dataa regin (583:583:583) (583:583:583))
489 (IOPATH cin regin (607:607:607) (607:607:607))
490 (IOPATH cin0 regin (571:571:571) (571:571:571))
491 (IOPATH cin1 regin (587:587:587) (587:587:587))
492 (IOPATH dataa cout0 (443:443:443) (443:443:443))
493 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
494 (IOPATH dataa cout1 (451:451:451) (451:451:451))
495 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
500 (CELLTYPE "stratix_lcell_register")
501 (INSTANCE \\vga_driver_unit\|hsync_counter_7_\\.lereg)
504 (PORT sload (1759:1759:1759) (1759:1759:1759))
505 (PORT datac (1809:1809:1809) (1809:1809:1809))
506 (PORT sclr (1308:1308:1308) (1308:1308:1308))
507 (PORT aclr (668:668:668) (668:668:668))
508 (PORT clk (2348:2348:2348) (2348:2348:2348))
509 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
510 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
514 (SETUP datac (posedge clk) (10:10:10))
515 (SETUP datain (posedge clk) (10:10:10))
516 (SETUP sclr (posedge clk) (10:10:10))
517 (SETUP sload (posedge clk) (10:10:10))
518 (HOLD datac (posedge clk) (100:100:100))
519 (HOLD datain (posedge clk) (100:100:100))
520 (HOLD sclr (posedge clk) (100:100:100))
521 (HOLD sload (posedge clk) (100:100:100))
525 (CELLTYPE "stratix_asynch_lcell")
526 (INSTANCE \\vga_driver_unit\|hsync_counter_8_\\.lecomb)
529 (PORT dataa (445:445:445) (445:445:445))
530 (PORT datac (1718:1718:1718) (1718:1718:1718))
531 (IOPATH dataa regin (583:583:583) (583:583:583))
532 (IOPATH cin regin (607:607:607) (607:607:607))
533 (IOPATH cin0 regin (571:571:571) (571:571:571))
534 (IOPATH cin1 regin (587:587:587) (587:587:587))
535 (IOPATH dataa cout0 (443:443:443) (443:443:443))
536 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
537 (IOPATH dataa cout1 (451:451:451) (451:451:451))
538 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
543 (CELLTYPE "stratix_lcell_register")
544 (INSTANCE \\vga_driver_unit\|hsync_counter_8_\\.lereg)
547 (PORT sload (1759:1759:1759) (1759:1759:1759))
548 (PORT datac (1808:1808:1808) (1808:1808:1808))
549 (PORT sclr (1308:1308:1308) (1308:1308:1308))
550 (PORT aclr (668:668:668) (668:668:668))
551 (PORT clk (2348:2348:2348) (2348:2348:2348))
552 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
553 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
557 (SETUP datac (posedge clk) (10:10:10))
558 (SETUP datain (posedge clk) (10:10:10))
559 (SETUP sclr (posedge clk) (10:10:10))
560 (SETUP sload (posedge clk) (10:10:10))
561 (HOLD datac (posedge clk) (100:100:100))
562 (HOLD datain (posedge clk) (100:100:100))
563 (HOLD sclr (posedge clk) (100:100:100))
564 (HOLD sload (posedge clk) (100:100:100))
568 (CELLTYPE "stratix_asynch_lcell")
569 (INSTANCE \\vga_driver_unit\|hsync_counter_9_\\.lecomb)
572 (PORT datac (1717:1717:1717) (1717:1717:1717))
573 (PORT datad (432:432:432) (432:432:432))
574 (IOPATH datad regin (235:235:235) (235:235:235))
575 (IOPATH cin regin (607:607:607) (607:607:607))
576 (IOPATH cin0 regin (571:571:571) (571:571:571))
577 (IOPATH cin1 regin (587:587:587) (587:587:587))
582 (CELLTYPE "stratix_lcell_register")
583 (INSTANCE \\vga_driver_unit\|hsync_counter_9_\\.lereg)
586 (PORT sload (1759:1759:1759) (1759:1759:1759))
587 (PORT datac (1807:1807:1807) (1807:1807:1807))
588 (PORT sclr (1308:1308:1308) (1308:1308:1308))
589 (PORT aclr (668:668:668) (668:668:668))
590 (PORT clk (2348:2348:2348) (2348:2348:2348))
591 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
592 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
596 (SETUP datac (posedge clk) (10:10:10))
597 (SETUP datain (posedge clk) (10:10:10))
598 (SETUP sclr (posedge clk) (10:10:10))
599 (SETUP sload (posedge clk) (10:10:10))
600 (HOLD datac (posedge clk) (100:100:100))
601 (HOLD datain (posedge clk) (100:100:100))
602 (HOLD sclr (posedge clk) (100:100:100))
603 (HOLD sload (posedge clk) (100:100:100))
607 (CELLTYPE "stratix_asynch_lcell")
608 (INSTANCE \\vga_driver_unit\|HSYNC_COUNT_next_un9_hsync_counterlt9_3\\.lecomb)
611 (PORT dataa (663:663:663) (663:663:663))
612 (PORT datab (609:609:609) (609:609:609))
613 (PORT datac (1034:1034:1034) (1034:1034:1034))
614 (PORT datad (636:636:636) (636:636:636))
615 (IOPATH dataa combout (459:459:459) (459:459:459))
616 (IOPATH datab combout (332:332:332) (332:332:332))
617 (IOPATH datac combout (213:213:213) (213:213:213))
618 (IOPATH datad combout (87:87:87) (87:87:87))
623 (CELLTYPE "stratix_asynch_lcell")
624 (INSTANCE \\vga_driver_unit\|HSYNC_COUNT_next_un9_hsync_counterlt9\\.lecomb)
627 (PORT dataa (963:963:963) (963:963:963))
628 (PORT datab (934:934:934) (934:934:934))
629 (PORT datac (374:374:374) (374:374:374))
630 (PORT datad (351:351:351) (351:351:351))
631 (IOPATH dataa combout (459:459:459) (459:459:459))
632 (IOPATH datab combout (332:332:332) (332:332:332))
633 (IOPATH datac combout (213:213:213) (213:213:213))
634 (IOPATH datad combout (87:87:87) (87:87:87))
639 (CELLTYPE "stratix_asynch_lcell")
640 (INSTANCE \\vga_driver_unit\|G_2\\.lecomb)
643 (PORT dataa (1446:1446:1446) (1446:1446:1446))
644 (PORT datab (344:344:344) (344:344:344))
645 (PORT datac (626:626:626) (626:626:626))
646 (PORT datad (1675:1675:1675) (1675:1675:1675))
647 (IOPATH dataa combout (459:459:459) (459:459:459))
648 (IOPATH datab combout (332:332:332) (332:332:332))
649 (IOPATH datac combout (213:213:213) (213:213:213))
650 (IOPATH datad combout (87:87:87) (87:87:87))
655 (CELLTYPE "stratix_asynch_lcell")
656 (INSTANCE \\vga_driver_unit\|HSYNC_FSM_next_un13_hsync_counter_2\\.lecomb)
659 (PORT dataa (640:640:640) (640:640:640))
660 (PORT datab (610:610:610) (610:610:610))
661 (PORT datac (1035:1035:1035) (1035:1035:1035))
662 (PORT datad (652:652:652) (652:652:652))
663 (IOPATH dataa combout (459:459:459) (459:459:459))
664 (IOPATH datab combout (332:332:332) (332:332:332))
665 (IOPATH datac combout (213:213:213) (213:213:213))
666 (IOPATH datad combout (87:87:87) (87:87:87))
671 (CELLTYPE "stratix_asynch_lcell")
672 (INSTANCE \\vga_driver_unit\|HSYNC_FSM_next_un13_hsync_counter\\.lecomb)
675 (PORT dataa (924:924:924) (924:924:924))
676 (PORT datab (627:627:627) (627:627:627))
677 (PORT datac (371:371:371) (371:371:371))
678 (PORT datad (350:350:350) (350:350:350))
679 (IOPATH dataa combout (459:459:459) (459:459:459))
680 (IOPATH datab combout (332:332:332) (332:332:332))
681 (IOPATH datac combout (213:213:213) (213:213:213))
682 (IOPATH datad combout (87:87:87) (87:87:87))
687 (CELLTYPE "stratix_asynch_lcell")
688 (INSTANCE \\vga_driver_unit\|HSYNC_FSM_next_un12_hsync_counter_4\\.lecomb)
691 (PORT dataa (665:665:665) (665:665:665))
692 (PORT datab (649:649:649) (649:649:649))
693 (PORT datac (1030:1030:1030) (1030:1030:1030))
694 (PORT datad (636:636:636) (636:636:636))
695 (IOPATH dataa combout (459:459:459) (459:459:459))
696 (IOPATH datab combout (332:332:332) (332:332:332))
697 (IOPATH datac combout (213:213:213) (213:213:213))
698 (IOPATH datad combout (87:87:87) (87:87:87))
703 (CELLTYPE "stratix_asynch_lcell")
704 (INSTANCE \\vga_driver_unit\|HSYNC_FSM_next_un12_hsync_counter_3\\.lecomb)
707 (PORT dataa (637:637:637) (637:637:637))
708 (PORT datab (604:604:604) (604:604:604))
709 (PORT datac (650:650:650) (650:650:650))
710 (PORT datad (637:637:637) (637:637:637))
711 (IOPATH dataa combout (459:459:459) (459:459:459))
712 (IOPATH datab combout (332:332:332) (332:332:332))
713 (IOPATH datac combout (213:213:213) (213:213:213))
714 (IOPATH datad combout (87:87:87) (87:87:87))
719 (CELLTYPE "stratix_asynch_lcell")
720 (INSTANCE \\vga_driver_unit\|HSYNC_FSM_next_un12_hsync_counter\\.lecomb)
723 (PORT dataa (656:656:656) (656:656:656))
724 (PORT datab (929:929:929) (929:929:929))
725 (PORT datac (364:364:364) (364:364:364))
726 (PORT datad (353:353:353) (353:353:353))
727 (IOPATH dataa combout (459:459:459) (459:459:459))
728 (IOPATH datab combout (332:332:332) (332:332:332))
729 (IOPATH datac combout (213:213:213) (213:213:213))
730 (IOPATH datad combout (87:87:87) (87:87:87))
735 (CELLTYPE "stratix_asynch_lcell")
736 (INSTANCE \\vga_driver_unit\|hsync_state_3_\\.lecomb)
739 (PORT dataa (706:706:706) (706:706:706))
740 (PORT datab (346:346:346) (346:346:346))
741 (PORT datac (926:926:926) (926:926:926))
742 (PORT datad (351:351:351) (351:351:351))
743 (IOPATH dataa combout (459:459:459) (459:459:459))
744 (IOPATH datab combout (332:332:332) (332:332:332))
745 (IOPATH datad combout (87:87:87) (87:87:87))
746 (IOPATH qfbkin combout (291:291:291) (291:291:291))
751 (CELLTYPE "stratix_lcell_register")
752 (INSTANCE \\vga_driver_unit\|hsync_state_3_\\.lereg)
755 (PORT datac (1016:1016:1016) (1016:1016:1016))
756 (PORT sclr (2456:2456:2456) (2456:2456:2456))
757 (PORT aclr (668:668:668) (668:668:668))
758 (PORT clk (2348:2348:2348) (2348:2348:2348))
759 (PORT ena (1257:1257:1257) (1257:1257:1257))
760 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
761 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
762 (IOPATH (posedge clk) qfbkout (176:176:176) (176:176:176))
763 (IOPATH (posedge aclr) qfbkout (212:212:212) (212:212:212))
767 (SETUP datac (posedge clk) (10:10:10))
768 (SETUP datain (posedge clk) (10:10:10))
769 (SETUP sclr (posedge clk) (10:10:10))
770 (SETUP ena (posedge clk) (10:10:10))
771 (HOLD datac (posedge clk) (100:100:100))
772 (HOLD datain (posedge clk) (100:100:100))
773 (HOLD sclr (posedge clk) (100:100:100))
774 (HOLD ena (posedge clk) (100:100:100))
778 (CELLTYPE "stratix_asynch_lcell")
779 (INSTANCE \\vga_driver_unit\|HSYNC_FSM_next_un10_hsync_counter_4\\.lecomb)
782 (PORT dataa (960:960:960) (960:960:960))
783 (PORT datab (903:903:903) (903:903:903))
784 (PORT datac (959:959:959) (959:959:959))
785 (PORT datad (943:943:943) (943:943:943))
786 (IOPATH dataa combout (459:459:459) (459:459:459))
787 (IOPATH datab combout (332:332:332) (332:332:332))
788 (IOPATH datac combout (213:213:213) (213:213:213))
789 (IOPATH datad combout (87:87:87) (87:87:87))
794 (CELLTYPE "stratix_asynch_lcell")
795 (INSTANCE \\vga_driver_unit\|hsync_state_5_\\.lecomb)
798 (PORT datab (439:439:439) (439:439:439))
799 (PORT datac (1416:1416:1416) (1416:1416:1416))
800 (IOPATH datab regin (489:489:489) (489:489:489))
801 (IOPATH datac regin (364:364:364) (364:364:364))
806 (CELLTYPE "stratix_lcell_register")
807 (INSTANCE \\vga_driver_unit\|hsync_state_5_\\.lereg)
810 (PORT sclr (2436:2436:2436) (2436:2436:2436))
811 (PORT aclr (668:668:668) (668:668:668))
812 (PORT clk (2348:2348:2348) (2348:2348:2348))
813 (PORT ena (1086:1086:1086) (1086:1086:1086))
814 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
815 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
819 (SETUP datain (posedge clk) (10:10:10))
820 (SETUP sclr (posedge clk) (10:10:10))
821 (SETUP ena (posedge clk) (10:10:10))
822 (HOLD datain (posedge clk) (100:100:100))
823 (HOLD sclr (posedge clk) (100:100:100))
824 (HOLD ena (posedge clk) (100:100:100))
828 (CELLTYPE "stratix_asynch_lcell")
829 (INSTANCE \\vga_driver_unit\|HSYNC_FSM_next_un10_hsync_counter_1\\.lecomb)
832 (PORT dataa (927:927:927) (927:927:927))
833 (PORT datab (928:928:928) (928:928:928))
834 (PORT datad (996:996:996) (996:996:996))
835 (IOPATH dataa combout (459:459:459) (459:459:459))
836 (IOPATH datab combout (332:332:332) (332:332:332))
837 (IOPATH datad combout (87:87:87) (87:87:87))
842 (CELLTYPE "stratix_asynch_lcell")
843 (INSTANCE \\vga_driver_unit\|hsync_state_next_1_sqmuxa_1_cZ\\.lecomb)
846 (PORT dataa (592:592:592) (592:592:592))
847 (PORT datab (368:368:368) (368:368:368))
848 (PORT datac (462:462:462) (462:462:462))
849 (PORT datad (139:139:139) (139:139:139))
850 (IOPATH dataa combout (459:459:459) (459:459:459))
851 (IOPATH datab combout (332:332:332) (332:332:332))
852 (IOPATH datac combout (213:213:213) (213:213:213))
853 (IOPATH datad combout (87:87:87) (87:87:87))
858 (CELLTYPE "stratix_asynch_lcell")
859 (INSTANCE \\vga_driver_unit\|HSYNC_FSM_next_un11_hsync_counter_3\\.lecomb)
862 (PORT dataa (956:956:956) (956:956:956))
863 (PORT datab (909:909:909) (909:909:909))
864 (PORT datac (910:910:910) (910:910:910))
865 (PORT datad (921:921:921) (921:921:921))
866 (IOPATH dataa combout (459:459:459) (459:459:459))
867 (IOPATH datab combout (332:332:332) (332:332:332))
868 (IOPATH datac combout (213:213:213) (213:213:213))
869 (IOPATH datad combout (87:87:87) (87:87:87))
874 (CELLTYPE "stratix_asynch_lcell")
875 (INSTANCE \\vga_driver_unit\|HSYNC_FSM_next_un11_hsync_counter_2\\.lecomb)
878 (PORT datab (903:903:903) (903:903:903))
879 (PORT datac (951:951:951) (951:951:951))
880 (PORT datad (962:962:962) (962:962:962))
881 (IOPATH datab combout (332:332:332) (332:332:332))
882 (IOPATH datac combout (213:213:213) (213:213:213))
883 (IOPATH datad combout (87:87:87) (87:87:87))
888 (CELLTYPE "stratix_asynch_lcell")
889 (INSTANCE \\vga_driver_unit\|hsync_state_next_1_sqmuxa_2_cZ\\.lecomb)
892 (PORT dataa (448:448:448) (448:448:448))
893 (PORT datab (377:377:377) (377:377:377))
894 (PORT datac (556:556:556) (556:556:556))
895 (PORT datad (568:568:568) (568:568:568))
896 (IOPATH dataa combout (459:459:459) (459:459:459))
897 (IOPATH datab combout (332:332:332) (332:332:332))
898 (IOPATH datac combout (213:213:213) (213:213:213))
899 (IOPATH datad combout (87:87:87) (87:87:87))
904 (CELLTYPE "stratix_asynch_lcell")
905 (INSTANCE \\vga_driver_unit\|hsync_state_3_0_0_0__g0_0_cZ\\.lecomb)
908 (PORT dataa (1669:1669:1669) (1669:1669:1669))
909 (PORT datab (554:554:554) (554:554:554))
910 (PORT datac (374:374:374) (374:374:374))
911 (PORT datad (346:346:346) (346:346:346))
912 (IOPATH dataa combout (459:459:459) (459:459:459))
913 (IOPATH datab combout (332:332:332) (332:332:332))
914 (IOPATH datac combout (213:213:213) (213:213:213))
915 (IOPATH datad combout (87:87:87) (87:87:87))
920 (CELLTYPE "stratix_asynch_lcell")
921 (INSTANCE \\vga_driver_unit\|hsync_state_2_\\.lecomb)
924 (PORT datab (987:987:987) (987:987:987))
925 (PORT datad (558:558:558) (558:558:558))
926 (IOPATH datab regin (489:489:489) (489:489:489))
927 (IOPATH datad regin (235:235:235) (235:235:235))
932 (CELLTYPE "stratix_lcell_register")
933 (INSTANCE \\vga_driver_unit\|hsync_state_2_\\.lereg)
936 (PORT sclr (2436:2436:2436) (2436:2436:2436))
937 (PORT aclr (668:668:668) (668:668:668))
938 (PORT clk (2348:2348:2348) (2348:2348:2348))
939 (PORT ena (1086:1086:1086) (1086:1086:1086))
940 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
941 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
945 (SETUP datain (posedge clk) (10:10:10))
946 (SETUP sclr (posedge clk) (10:10:10))
947 (SETUP ena (posedge clk) (10:10:10))
948 (HOLD datain (posedge clk) (100:100:100))
949 (HOLD sclr (posedge clk) (100:100:100))
950 (HOLD ena (posedge clk) (100:100:100))
954 (CELLTYPE "stratix_asynch_lcell")
955 (INSTANCE \\vga_driver_unit\|hsync_state_0_\\.lecomb)
958 (PORT dataa (445:445:445) (445:445:445))
959 (PORT datac (553:553:553) (553:553:553))
960 (IOPATH dataa regin (583:583:583) (583:583:583))
961 (IOPATH datac regin (364:364:364) (364:364:364))
966 (CELLTYPE "stratix_lcell_register")
967 (INSTANCE \\vga_driver_unit\|hsync_state_0_\\.lereg)
970 (PORT sclr (2436:2436:2436) (2436:2436:2436))
971 (PORT aclr (668:668:668) (668:668:668))
972 (PORT clk (2348:2348:2348) (2348:2348:2348))
973 (PORT ena (1086:1086:1086) (1086:1086:1086))
974 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
975 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
979 (SETUP datain (posedge clk) (10:10:10))
980 (SETUP sclr (posedge clk) (10:10:10))
981 (SETUP ena (posedge clk) (10:10:10))
982 (HOLD datain (posedge clk) (100:100:100))
983 (HOLD sclr (posedge clk) (100:100:100))
984 (HOLD ena (posedge clk) (100:100:100))
988 (CELLTYPE "stratix_asynch_lcell")
989 (INSTANCE \\vga_driver_unit\|hsync_counter_next_1_sqmuxa_cZ\\.lecomb)
992 (PORT dataa (4777:4777:4777) (4777:4777:4777))
993 (PORT datab (477:477:477) (477:477:477))
994 (PORT datac (969:969:969) (969:969:969))
995 (PORT datad (896:896:896) (896:896:896))
996 (IOPATH dataa combout (459:459:459) (459:459:459))
997 (IOPATH datab combout (332:332:332) (332:332:332))
998 (IOPATH datac combout (213:213:213) (213:213:213))
999 (IOPATH datad combout (87:87:87) (87:87:87))
1004 (CELLTYPE "stratix_asynch_lcell")
1005 (INSTANCE \\vga_driver_unit\|HSYNC_FSM_next_un10_hsync_counter_3\\.lecomb)
1008 (PORT datab (946:946:946) (946:946:946))
1009 (PORT datac (955:955:955) (955:955:955))
1010 (PORT datad (921:921:921) (921:921:921))
1011 (IOPATH datab combout (332:332:332) (332:332:332))
1012 (IOPATH datac combout (213:213:213) (213:213:213))
1013 (IOPATH datad combout (87:87:87) (87:87:87))
1018 (CELLTYPE "stratix_asynch_lcell")
1019 (INSTANCE \\vga_driver_unit\|hsync_state_4_\\.lecomb)
1022 (PORT dataa (878:878:878) (878:878:878))
1023 (PORT datab (367:367:367) (367:367:367))
1024 (PORT datac (456:456:456) (456:456:456))
1025 (PORT datad (385:385:385) (385:385:385))
1026 (IOPATH dataa regin (583:583:583) (583:583:583))
1027 (IOPATH datab regin (489:489:489) (489:489:489))
1028 (IOPATH datac regin (364:364:364) (364:364:364))
1029 (IOPATH datad regin (235:235:235) (235:235:235))
1034 (CELLTYPE "stratix_lcell_register")
1035 (INSTANCE \\vga_driver_unit\|hsync_state_4_\\.lereg)
1038 (PORT sclr (2436:2436:2436) (2436:2436:2436))
1039 (PORT aclr (668:668:668) (668:668:668))
1040 (PORT clk (2348:2348:2348) (2348:2348:2348))
1041 (PORT ena (1086:1086:1086) (1086:1086:1086))
1042 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1043 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1047 (SETUP datain (posedge clk) (10:10:10))
1048 (SETUP sclr (posedge clk) (10:10:10))
1049 (SETUP ena (posedge clk) (10:10:10))
1050 (HOLD datain (posedge clk) (100:100:100))
1051 (HOLD sclr (posedge clk) (100:100:100))
1052 (HOLD ena (posedge clk) (100:100:100))
1056 (CELLTYPE "stratix_asynch_lcell")
1057 (INSTANCE \\vga_driver_unit\|hsync_state_1_\\.lecomb)
1060 (PORT dataa (449:449:449) (449:449:449))
1061 (PORT datab (371:371:371) (371:371:371))
1062 (PORT datac (862:862:862) (862:862:862))
1063 (PORT datad (571:571:571) (571:571:571))
1064 (IOPATH dataa regin (583:583:583) (583:583:583))
1065 (IOPATH datab regin (489:489:489) (489:489:489))
1066 (IOPATH datac regin (364:364:364) (364:364:364))
1067 (IOPATH datad regin (235:235:235) (235:235:235))
1072 (CELLTYPE "stratix_lcell_register")
1073 (INSTANCE \\vga_driver_unit\|hsync_state_1_\\.lereg)
1076 (PORT sclr (2436:2436:2436) (2436:2436:2436))
1077 (PORT aclr (668:668:668) (668:668:668))
1078 (PORT clk (2348:2348:2348) (2348:2348:2348))
1079 (PORT ena (1086:1086:1086) (1086:1086:1086))
1080 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1081 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1085 (SETUP datain (posedge clk) (10:10:10))
1086 (SETUP sclr (posedge clk) (10:10:10))
1087 (SETUP ena (posedge clk) (10:10:10))
1088 (HOLD datain (posedge clk) (100:100:100))
1089 (HOLD sclr (posedge clk) (100:100:100))
1090 (HOLD ena (posedge clk) (100:100:100))
1094 (CELLTYPE "stratix_asynch_lcell")
1095 (INSTANCE \\vga_driver_unit\|column_counter_next_0_sqmuxa_1_1_cZ\\.lecomb)
1098 (PORT dataa (4774:4774:4774) (4774:4774:4774))
1099 (PORT datab (475:475:475) (475:475:475))
1100 (PORT datac (489:489:489) (489:489:489))
1101 (PORT datad (1416:1416:1416) (1416:1416:1416))
1102 (IOPATH dataa combout (459:459:459) (459:459:459))
1103 (IOPATH datab combout (332:332:332) (332:332:332))
1104 (IOPATH datac combout (213:213:213) (213:213:213))
1105 (IOPATH datad combout (87:87:87) (87:87:87))
1110 (CELLTYPE "stratix_asynch_lcell")
1111 (INSTANCE \\vga_driver_unit\|column_counter_sig_0_\\.lecomb)
1114 (PORT datab (419:419:419) (419:419:419))
1115 (PORT datac (940:940:940) (940:940:940))
1116 (IOPATH datab regin (489:489:489) (489:489:489))
1117 (IOPATH datac regin (364:364:364) (364:364:364))
1122 (CELLTYPE "stratix_lcell_register")
1123 (INSTANCE \\vga_driver_unit\|column_counter_sig_0_\\.lereg)
1126 (PORT sclr (2229:2229:2229) (2229:2229:2229))
1127 (PORT aclr (668:668:668) (668:668:668))
1128 (PORT clk (2359:2359:2359) (2359:2359:2359))
1129 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1130 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1134 (SETUP datain (posedge clk) (10:10:10))
1135 (SETUP sclr (posedge clk) (10:10:10))
1136 (HOLD datain (posedge clk) (100:100:100))
1137 (HOLD sclr (posedge clk) (100:100:100))
1141 (CELLTYPE "stratix_asynch_lcell")
1142 (INSTANCE \\vga_driver_unit\|un2_column_counter_next_1_\\.lecomb)
1145 (PORT dataa (988:988:988) (988:988:988))
1146 (PORT datab (929:929:929) (929:929:929))
1147 (IOPATH dataa combout (459:459:459) (459:459:459))
1148 (IOPATH datab combout (332:332:332) (332:332:332))
1149 (IOPATH dataa cout0 (443:443:443) (443:443:443))
1150 (IOPATH datab cout0 (344:344:344) (344:344:344))
1151 (IOPATH dataa cout1 (451:451:451) (451:451:451))
1152 (IOPATH datab cout1 (341:341:341) (341:341:341))
1157 (CELLTYPE "stratix_asynch_lcell")
1158 (INSTANCE \\vga_driver_unit\|column_counter_sig_1_\\.lecomb)
1161 (PORT datab (344:344:344) (344:344:344))
1162 (PORT datac (937:937:937) (937:937:937))
1163 (IOPATH datab regin (489:489:489) (489:489:489))
1164 (IOPATH datac regin (364:364:364) (364:364:364))
1169 (CELLTYPE "stratix_lcell_register")
1170 (INSTANCE \\vga_driver_unit\|column_counter_sig_1_\\.lereg)
1173 (PORT sclr (2229:2229:2229) (2229:2229:2229))
1174 (PORT aclr (668:668:668) (668:668:668))
1175 (PORT clk (2359:2359:2359) (2359:2359:2359))
1176 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1177 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1181 (SETUP datain (posedge clk) (10:10:10))
1182 (SETUP sclr (posedge clk) (10:10:10))
1183 (HOLD datain (posedge clk) (100:100:100))
1184 (HOLD sclr (posedge clk) (100:100:100))
1188 (CELLTYPE "stratix_asynch_lcell")
1189 (INSTANCE \\vga_driver_unit\|un2_column_counter_next_3_\\.lecomb)
1192 (PORT dataa (936:936:936) (936:936:936))
1193 (PORT datab (700:700:700) (700:700:700))
1194 (IOPATH dataa combout (459:459:459) (459:459:459))
1195 (IOPATH datab combout (332:332:332) (332:332:332))
1196 (IOPATH cin0 combout (432:432:432) (432:432:432))
1197 (IOPATH cin1 combout (449:449:449) (449:449:449))
1198 (IOPATH dataa cout0 (443:443:443) (443:443:443))
1199 (IOPATH datab cout0 (344:344:344) (344:344:344))
1200 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
1201 (IOPATH dataa cout1 (451:451:451) (451:451:451))
1202 (IOPATH datab cout1 (341:341:341) (341:341:341))
1203 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
1208 (CELLTYPE "stratix_asynch_lcell")
1209 (INSTANCE \\vga_driver_unit\|column_counter_sig_3_\\.lecomb)
1212 (PORT datac (910:910:910) (910:910:910))
1213 (PORT datad (535:535:535) (535:535:535))
1214 (IOPATH datac regin (364:364:364) (364:364:364))
1215 (IOPATH datad regin (235:235:235) (235:235:235))
1220 (CELLTYPE "stratix_lcell_register")
1221 (INSTANCE \\vga_driver_unit\|column_counter_sig_3_\\.lereg)
1224 (PORT sclr (2199:2199:2199) (2199:2199:2199))
1225 (PORT aclr (668:668:668) (668:668:668))
1226 (PORT clk (2359:2359:2359) (2359:2359:2359))
1227 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1228 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1232 (SETUP datain (posedge clk) (10:10:10))
1233 (SETUP sclr (posedge clk) (10:10:10))
1234 (HOLD datain (posedge clk) (100:100:100))
1235 (HOLD sclr (posedge clk) (100:100:100))
1239 (CELLTYPE "stratix_asynch_lcell")
1240 (INSTANCE \\vga_driver_unit\|un2_column_counter_next_0_\\.lecomb)
1243 (PORT dataa (993:993:993) (993:993:993))
1244 (PORT datab (963:963:963) (963:963:963))
1245 (IOPATH dataa cout0 (443:443:443) (443:443:443))
1246 (IOPATH datab cout0 (344:344:344) (344:344:344))
1247 (IOPATH dataa cout1 (451:451:451) (451:451:451))
1248 (IOPATH datab cout1 (341:341:341) (341:341:341))
1253 (CELLTYPE "stratix_asynch_lcell")
1254 (INSTANCE \\vga_driver_unit\|un2_column_counter_next_2_\\.lecomb)
1257 (PORT dataa (451:451:451) (451:451:451))
1258 (PORT datab (1009:1009:1009) (1009:1009:1009))
1259 (IOPATH dataa combout (459:459:459) (459:459:459))
1260 (IOPATH datab combout (332:332:332) (332:332:332))
1261 (IOPATH cin0 combout (432:432:432) (432:432:432))
1262 (IOPATH cin1 combout (449:449:449) (449:449:449))
1263 (IOPATH dataa cout0 (443:443:443) (443:443:443))
1264 (IOPATH datab cout0 (344:344:344) (344:344:344))
1265 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
1266 (IOPATH dataa cout1 (451:451:451) (451:451:451))
1267 (IOPATH datab cout1 (341:341:341) (341:341:341))
1268 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
1273 (CELLTYPE "stratix_asynch_lcell")
1274 (INSTANCE \\vga_driver_unit\|column_counter_sig_2_\\.lecomb)
1277 (PORT dataa (576:576:576) (576:576:576))
1278 (PORT datac (365:365:365) (365:365:365))
1279 (IOPATH dataa regin (583:583:583) (583:583:583))
1280 (IOPATH datac regin (364:364:364) (364:364:364))
1285 (CELLTYPE "stratix_lcell_register")
1286 (INSTANCE \\vga_driver_unit\|column_counter_sig_2_\\.lereg)
1289 (PORT sclr (2244:2244:2244) (2244:2244:2244))
1290 (PORT aclr (668:668:668) (668:668:668))
1291 (PORT clk (2359:2359:2359) (2359:2359:2359))
1292 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1293 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1297 (SETUP datain (posedge clk) (10:10:10))
1298 (SETUP sclr (posedge clk) (10:10:10))
1299 (HOLD datain (posedge clk) (100:100:100))
1300 (HOLD sclr (posedge clk) (100:100:100))
1304 (CELLTYPE "stratix_asynch_lcell")
1305 (INSTANCE \\vga_driver_unit\|un2_column_counter_next_4_\\.lecomb)
1308 (PORT dataa (1010:1010:1010) (1010:1010:1010))
1309 (PORT datab (980:980:980) (980:980:980))
1310 (IOPATH dataa combout (459:459:459) (459:459:459))
1311 (IOPATH datab combout (332:332:332) (332:332:332))
1312 (IOPATH cin0 combout (432:432:432) (432:432:432))
1313 (IOPATH cin1 combout (449:449:449) (449:449:449))
1314 (IOPATH dataa cout0 (443:443:443) (443:443:443))
1315 (IOPATH datab cout0 (344:344:344) (344:344:344))
1316 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
1317 (IOPATH dataa cout1 (451:451:451) (451:451:451))
1318 (IOPATH datab cout1 (341:341:341) (341:341:341))
1319 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
1324 (CELLTYPE "stratix_asynch_lcell")
1325 (INSTANCE \\vga_driver_unit\|column_counter_sig_4_\\.lecomb)
1328 (PORT datab (890:890:890) (890:890:890))
1329 (PORT datac (858:858:858) (858:858:858))
1330 (IOPATH datab regin (489:489:489) (489:489:489))
1331 (IOPATH datac regin (364:364:364) (364:364:364))
1336 (CELLTYPE "stratix_lcell_register")
1337 (INSTANCE \\vga_driver_unit\|column_counter_sig_4_\\.lereg)
1340 (PORT sclr (2199:2199:2199) (2199:2199:2199))
1341 (PORT aclr (668:668:668) (668:668:668))
1342 (PORT clk (2359:2359:2359) (2359:2359:2359))
1343 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1344 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1348 (SETUP datain (posedge clk) (10:10:10))
1349 (SETUP sclr (posedge clk) (10:10:10))
1350 (HOLD datain (posedge clk) (100:100:100))
1351 (HOLD sclr (posedge clk) (100:100:100))
1355 (CELLTYPE "stratix_asynch_lcell")
1356 (INSTANCE \\vga_driver_unit\|un2_column_counter_next_5_\\.lecomb)
1359 (PORT dataa (438:438:438) (438:438:438))
1360 (PORT datab (960:960:960) (960:960:960))
1361 (IOPATH dataa combout (459:459:459) (459:459:459))
1362 (IOPATH datab combout (332:332:332) (332:332:332))
1363 (IOPATH cin0 combout (432:432:432) (432:432:432))
1364 (IOPATH cin1 combout (449:449:449) (449:449:449))
1365 (IOPATH dataa cout0 (443:443:443) (443:443:443))
1366 (IOPATH datab cout0 (344:344:344) (344:344:344))
1367 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
1368 (IOPATH dataa cout1 (451:451:451) (451:451:451))
1369 (IOPATH datab cout1 (341:341:341) (341:341:341))
1370 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
1375 (CELLTYPE "stratix_asynch_lcell")
1376 (INSTANCE \\vga_driver_unit\|column_counter_sig_5_\\.lecomb)
1379 (PORT dataa (360:360:360) (360:360:360))
1380 (PORT datac (938:938:938) (938:938:938))
1381 (IOPATH dataa regin (583:583:583) (583:583:583))
1382 (IOPATH datac regin (364:364:364) (364:364:364))
1387 (CELLTYPE "stratix_lcell_register")
1388 (INSTANCE \\vga_driver_unit\|column_counter_sig_5_\\.lereg)
1391 (PORT sclr (2229:2229:2229) (2229:2229:2229))
1392 (PORT aclr (668:668:668) (668:668:668))
1393 (PORT clk (2359:2359:2359) (2359:2359:2359))
1394 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1395 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1399 (SETUP datain (posedge clk) (10:10:10))
1400 (SETUP sclr (posedge clk) (10:10:10))
1401 (HOLD datain (posedge clk) (100:100:100))
1402 (HOLD sclr (posedge clk) (100:100:100))
1406 (CELLTYPE "stratix_asynch_lcell")
1407 (INSTANCE \\vga_driver_unit\|un2_column_counter_next_7_\\.lecomb)
1410 (PORT dataa (439:439:439) (439:439:439))
1411 (PORT datab (647:647:647) (647:647:647))
1412 (IOPATH dataa combout (459:459:459) (459:459:459))
1413 (IOPATH datab combout (332:332:332) (332:332:332))
1414 (IOPATH cin0 combout (432:432:432) (432:432:432))
1415 (IOPATH cin1 combout (449:449:449) (449:449:449))
1416 (IOPATH dataa cout0 (443:443:443) (443:443:443))
1417 (IOPATH datab cout0 (344:344:344) (344:344:344))
1418 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
1419 (IOPATH dataa cout1 (451:451:451) (451:451:451))
1420 (IOPATH datab cout1 (341:341:341) (341:341:341))
1421 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
1426 (CELLTYPE "stratix_asynch_lcell")
1427 (INSTANCE \\vga_driver_unit\|column_counter_sig_7_\\.lecomb)
1430 (PORT dataa (1462:1462:1462) (1462:1462:1462))
1431 (PORT datac (939:939:939) (939:939:939))
1432 (PORT datad (348:348:348) (348:348:348))
1433 (IOPATH dataa regin (583:583:583) (583:583:583))
1434 (IOPATH datac regin (364:364:364) (364:364:364))
1435 (IOPATH datad regin (235:235:235) (235:235:235))
1440 (CELLTYPE "stratix_lcell_register")
1441 (INSTANCE \\vga_driver_unit\|column_counter_sig_7_\\.lereg)
1444 (PORT aclr (668:668:668) (668:668:668))
1445 (PORT clk (2359:2359:2359) (2359:2359:2359))
1446 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1447 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1451 (SETUP datain (posedge clk) (10:10:10))
1452 (HOLD datain (posedge clk) (100:100:100))
1456 (CELLTYPE "stratix_asynch_lcell")
1457 (INSTANCE \\vga_driver_unit\|un2_column_counter_next_6_\\.lecomb)
1460 (PORT dataa (1054:1054:1054) (1054:1054:1054))
1461 (PORT datab (917:917:917) (917:917:917))
1462 (IOPATH dataa combout (459:459:459) (459:459:459))
1463 (IOPATH datab combout (332:332:332) (332:332:332))
1464 (IOPATH cin0 combout (432:432:432) (432:432:432))
1465 (IOPATH cin1 combout (449:449:449) (449:449:449))
1466 (IOPATH dataa cout0 (443:443:443) (443:443:443))
1467 (IOPATH datab cout0 (344:344:344) (344:344:344))
1468 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
1469 (IOPATH dataa cout1 (451:451:451) (451:451:451))
1470 (IOPATH datab cout1 (341:341:341) (341:341:341))
1471 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
1476 (CELLTYPE "stratix_asynch_lcell")
1477 (INSTANCE \\vga_driver_unit\|un2_column_counter_next_8_\\.lecomb)
1480 (PORT datad (439:439:439) (439:439:439))
1481 (IOPATH datad combout (87:87:87) (87:87:87))
1482 (IOPATH cin0 combout (432:432:432) (432:432:432))
1483 (IOPATH cin1 combout (449:449:449) (449:449:449))
1488 (CELLTYPE "stratix_asynch_lcell")
1489 (INSTANCE \\vga_driver_unit\|column_counter_sig_8_\\.lecomb)
1492 (PORT dataa (366:366:366) (366:366:366))
1493 (PORT datac (572:572:572) (572:572:572))
1494 (PORT datad (1463:1463:1463) (1463:1463:1463))
1495 (IOPATH dataa regin (583:583:583) (583:583:583))
1496 (IOPATH datac regin (364:364:364) (364:364:364))
1497 (IOPATH datad regin (235:235:235) (235:235:235))
1502 (CELLTYPE "stratix_lcell_register")
1503 (INSTANCE \\vga_driver_unit\|column_counter_sig_8_\\.lereg)
1506 (PORT aclr (668:668:668) (668:668:668))
1507 (PORT clk (2359:2359:2359) (2359:2359:2359))
1508 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1509 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1513 (SETUP datain (posedge clk) (10:10:10))
1514 (HOLD datain (posedge clk) (100:100:100))
1518 (CELLTYPE "stratix_asynch_lcell")
1519 (INSTANCE \\vga_driver_unit\|un2_column_counter_next_9_\\.lecomb)
1522 (PORT datab (924:924:924) (924:924:924))
1523 (PORT datad (426:426:426) (426:426:426))
1524 (IOPATH datab combout (332:332:332) (332:332:332))
1525 (IOPATH datad combout (87:87:87) (87:87:87))
1526 (IOPATH cin0 combout (432:432:432) (432:432:432))
1527 (IOPATH cin1 combout (449:449:449) (449:449:449))
1532 (CELLTYPE "stratix_asynch_lcell")
1533 (INSTANCE \\vga_driver_unit\|column_counter_sig_9_\\.lecomb)
1536 (PORT datac (941:941:941) (941:941:941))
1537 (PORT datad (347:347:347) (347:347:347))
1538 (IOPATH datac regin (364:364:364) (364:364:364))
1539 (IOPATH datad regin (235:235:235) (235:235:235))
1544 (CELLTYPE "stratix_lcell_register")
1545 (INSTANCE \\vga_driver_unit\|column_counter_sig_9_\\.lereg)
1548 (PORT sclr (2229:2229:2229) (2229:2229:2229))
1549 (PORT aclr (668:668:668) (668:668:668))
1550 (PORT clk (2359:2359:2359) (2359:2359:2359))
1551 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1552 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1556 (SETUP datain (posedge clk) (10:10:10))
1557 (SETUP sclr (posedge clk) (10:10:10))
1558 (HOLD datain (posedge clk) (100:100:100))
1559 (HOLD sclr (posedge clk) (100:100:100))
1563 (CELLTYPE "stratix_asynch_lcell")
1564 (INSTANCE \\vga_driver_unit\|COLUMN_COUNT_next_un10_column_counter_siglt6_1\\.lecomb)
1567 (PORT datab (966:966:966) (966:966:966))
1568 (PORT datac (620:620:620) (620:620:620))
1569 (PORT datad (619:619:619) (619:619:619))
1570 (IOPATH datab combout (332:332:332) (332:332:332))
1571 (IOPATH datac combout (213:213:213) (213:213:213))
1572 (IOPATH datad combout (87:87:87) (87:87:87))
1577 (CELLTYPE "stratix_asynch_lcell")
1578 (INSTANCE \\vga_driver_unit\|COLUMN_COUNT_next_un10_column_counter_siglt6\\.lecomb)
1581 (PORT dataa (1013:1013:1013) (1013:1013:1013))
1582 (PORT datab (350:350:350) (350:350:350))
1583 (PORT datac (373:373:373) (373:373:373))
1584 (PORT datad (1014:1014:1014) (1014:1014:1014))
1585 (IOPATH dataa combout (459:459:459) (459:459:459))
1586 (IOPATH datab combout (332:332:332) (332:332:332))
1587 (IOPATH datac combout (213:213:213) (213:213:213))
1588 (IOPATH datad combout (87:87:87) (87:87:87))
1593 (CELLTYPE "stratix_asynch_lcell")
1594 (INSTANCE \\vga_driver_unit\|COLUMN_COUNT_next_un10_column_counter_siglto9\\.lecomb)
1597 (PORT dataa (954:954:954) (954:954:954))
1598 (PORT datab (651:651:651) (651:651:651))
1599 (PORT datac (933:933:933) (933:933:933))
1600 (PORT datad (347:347:347) (347:347:347))
1601 (IOPATH dataa combout (459:459:459) (459:459:459))
1602 (IOPATH datab combout (332:332:332) (332:332:332))
1603 (IOPATH datac combout (213:213:213) (213:213:213))
1604 (IOPATH datad combout (87:87:87) (87:87:87))
1609 (CELLTYPE "stratix_asynch_lcell")
1610 (INSTANCE \\vga_driver_unit\|column_counter_sig_6_\\.lecomb)
1613 (PORT datab (890:890:890) (890:890:890))
1614 (PORT datac (881:881:881) (881:881:881))
1615 (IOPATH datab regin (489:489:489) (489:489:489))
1616 (IOPATH datac regin (364:364:364) (364:364:364))
1621 (CELLTYPE "stratix_lcell_register")
1622 (INSTANCE \\vga_driver_unit\|column_counter_sig_6_\\.lereg)
1625 (PORT sclr (2199:2199:2199) (2199:2199:2199))
1626 (PORT aclr (668:668:668) (668:668:668))
1627 (PORT clk (2359:2359:2359) (2359:2359:2359))
1628 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1629 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1633 (SETUP datain (posedge clk) (10:10:10))
1634 (SETUP sclr (posedge clk) (10:10:10))
1635 (HOLD datain (posedge clk) (100:100:100))
1636 (HOLD sclr (posedge clk) (100:100:100))
1640 (CELLTYPE "stratix_asynch_lcell")
1641 (INSTANCE \\vga_driver_unit\|COLUMN_COUNT_next_un10_column_counter_siglt6_3\\.lecomb)
1644 (PORT datac (933:933:933) (933:933:933))
1645 (PORT datad (685:685:685) (685:685:685))
1646 (IOPATH datac combout (213:213:213) (213:213:213))
1647 (IOPATH datad combout (87:87:87) (87:87:87))
1652 (CELLTYPE "stratix_asynch_lcell")
1653 (INSTANCE \\vga_control_unit\|b_next_i_o3_0_cZ\\.lecomb)
1656 (PORT dataa (1016:1016:1016) (1016:1016:1016))
1657 (PORT datab (917:917:917) (917:917:917))
1658 (PORT datac (1056:1056:1056) (1056:1056:1056))
1659 (PORT datad (992:992:992) (992:992:992))
1660 (IOPATH dataa combout (459:459:459) (459:459:459))
1661 (IOPATH datab combout (332:332:332) (332:332:332))
1662 (IOPATH datac combout (213:213:213) (213:213:213))
1663 (IOPATH datad combout (87:87:87) (87:87:87))
1668 (CELLTYPE "stratix_asynch_lcell")
1669 (INSTANCE \\vga_control_unit\|g_next_i_o3_cZ\\.lecomb)
1672 (PORT dataa (439:439:439) (439:439:439))
1673 (PORT datad (429:429:429) (429:429:429))
1674 (IOPATH dataa combout (459:459:459) (459:459:459))
1675 (IOPATH datad combout (87:87:87) (87:87:87))
1680 (CELLTYPE "stratix_asynch_lcell")
1681 (INSTANCE \\vga_driver_unit\|vsync_counter_0_\\.lecomb)
1684 (PORT dataa (1046:1046:1046) (1046:1046:1046))
1685 (PORT datab (423:423:423) (423:423:423))
1686 (PORT datac (1004:1004:1004) (1004:1004:1004))
1687 (IOPATH dataa regin (583:583:583) (583:583:583))
1688 (IOPATH datab regin (489:489:489) (489:489:489))
1689 (IOPATH dataa cout0 (443:443:443) (443:443:443))
1690 (IOPATH datab cout0 (344:344:344) (344:344:344))
1691 (IOPATH dataa cout1 (451:451:451) (451:451:451))
1692 (IOPATH datab cout1 (341:341:341) (341:341:341))
1697 (CELLTYPE "stratix_lcell_register")
1698 (INSTANCE \\vga_driver_unit\|vsync_counter_0_\\.lereg)
1701 (PORT sload (1429:1429:1429) (1429:1429:1429))
1702 (PORT datac (1094:1094:1094) (1094:1094:1094))
1703 (PORT sclr (1316:1316:1316) (1316:1316:1316))
1704 (PORT aclr (668:668:668) (668:668:668))
1705 (PORT clk (2323:2323:2323) (2323:2323:2323))
1706 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1707 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1711 (SETUP datac (posedge clk) (10:10:10))
1712 (SETUP datain (posedge clk) (10:10:10))
1713 (SETUP sclr (posedge clk) (10:10:10))
1714 (SETUP sload (posedge clk) (10:10:10))
1715 (HOLD datac (posedge clk) (100:100:100))
1716 (HOLD datain (posedge clk) (100:100:100))
1717 (HOLD sclr (posedge clk) (100:100:100))
1718 (HOLD sload (posedge clk) (100:100:100))
1722 (CELLTYPE "stratix_asynch_lcell")
1723 (INSTANCE \\vga_driver_unit\|vsync_counter_1_\\.lecomb)
1726 (PORT datab (419:419:419) (419:419:419))
1727 (PORT datac (1004:1004:1004) (1004:1004:1004))
1728 (IOPATH datab regin (489:489:489) (489:489:489))
1729 (IOPATH cin0 regin (571:571:571) (571:571:571))
1730 (IOPATH cin1 regin (587:587:587) (587:587:587))
1731 (IOPATH datab cout0 (344:344:344) (344:344:344))
1732 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
1733 (IOPATH datab cout1 (341:341:341) (341:341:341))
1734 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
1739 (CELLTYPE "stratix_lcell_register")
1740 (INSTANCE \\vga_driver_unit\|vsync_counter_1_\\.lereg)
1743 (PORT sload (1429:1429:1429) (1429:1429:1429))
1744 (PORT datac (1094:1094:1094) (1094:1094:1094))
1745 (PORT sclr (1316:1316:1316) (1316:1316:1316))
1746 (PORT aclr (668:668:668) (668:668:668))
1747 (PORT clk (2323:2323:2323) (2323:2323:2323))
1748 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1749 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1753 (SETUP datac (posedge clk) (10:10:10))
1754 (SETUP datain (posedge clk) (10:10:10))
1755 (SETUP sclr (posedge clk) (10:10:10))
1756 (SETUP sload (posedge clk) (10:10:10))
1757 (HOLD datac (posedge clk) (100:100:100))
1758 (HOLD datain (posedge clk) (100:100:100))
1759 (HOLD sclr (posedge clk) (100:100:100))
1760 (HOLD sload (posedge clk) (100:100:100))
1764 (CELLTYPE "stratix_asynch_lcell")
1765 (INSTANCE \\vga_driver_unit\|vsync_counter_2_\\.lecomb)
1768 (PORT dataa (444:444:444) (444:444:444))
1769 (PORT datac (1003:1003:1003) (1003:1003:1003))
1770 (IOPATH dataa regin (583:583:583) (583:583:583))
1771 (IOPATH cin0 regin (571:571:571) (571:571:571))
1772 (IOPATH cin1 regin (587:587:587) (587:587:587))
1773 (IOPATH dataa cout0 (443:443:443) (443:443:443))
1774 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
1775 (IOPATH dataa cout1 (451:451:451) (451:451:451))
1776 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
1781 (CELLTYPE "stratix_lcell_register")
1782 (INSTANCE \\vga_driver_unit\|vsync_counter_2_\\.lereg)
1785 (PORT sload (1429:1429:1429) (1429:1429:1429))
1786 (PORT datac (1093:1093:1093) (1093:1093:1093))
1787 (PORT sclr (1316:1316:1316) (1316:1316:1316))
1788 (PORT aclr (668:668:668) (668:668:668))
1789 (PORT clk (2323:2323:2323) (2323:2323:2323))
1790 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1791 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1795 (SETUP datac (posedge clk) (10:10:10))
1796 (SETUP datain (posedge clk) (10:10:10))
1797 (SETUP sclr (posedge clk) (10:10:10))
1798 (SETUP sload (posedge clk) (10:10:10))
1799 (HOLD datac (posedge clk) (100:100:100))
1800 (HOLD datain (posedge clk) (100:100:100))
1801 (HOLD sclr (posedge clk) (100:100:100))
1802 (HOLD sload (posedge clk) (100:100:100))
1806 (CELLTYPE "stratix_asynch_lcell")
1807 (INSTANCE \\vga_driver_unit\|vsync_counter_3_\\.lecomb)
1810 (PORT dataa (437:437:437) (437:437:437))
1811 (PORT datac (1002:1002:1002) (1002:1002:1002))
1812 (IOPATH dataa regin (583:583:583) (583:583:583))
1813 (IOPATH cin0 regin (571:571:571) (571:571:571))
1814 (IOPATH cin1 regin (587:587:587) (587:587:587))
1815 (IOPATH dataa cout0 (443:443:443) (443:443:443))
1816 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
1817 (IOPATH dataa cout1 (451:451:451) (451:451:451))
1818 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
1823 (CELLTYPE "stratix_lcell_register")
1824 (INSTANCE \\vga_driver_unit\|vsync_counter_3_\\.lereg)
1827 (PORT sload (1429:1429:1429) (1429:1429:1429))
1828 (PORT datac (1092:1092:1092) (1092:1092:1092))
1829 (PORT sclr (1316:1316:1316) (1316:1316:1316))
1830 (PORT aclr (668:668:668) (668:668:668))
1831 (PORT clk (2323:2323:2323) (2323:2323:2323))
1832 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1833 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1837 (SETUP datac (posedge clk) (10:10:10))
1838 (SETUP datain (posedge clk) (10:10:10))
1839 (SETUP sclr (posedge clk) (10:10:10))
1840 (SETUP sload (posedge clk) (10:10:10))
1841 (HOLD datac (posedge clk) (100:100:100))
1842 (HOLD datain (posedge clk) (100:100:100))
1843 (HOLD sclr (posedge clk) (100:100:100))
1844 (HOLD sload (posedge clk) (100:100:100))
1848 (CELLTYPE "stratix_asynch_lcell")
1849 (INSTANCE \\vga_driver_unit\|vsync_counter_4_\\.lecomb)
1852 (PORT dataa (445:445:445) (445:445:445))
1853 (PORT datac (1001:1001:1001) (1001:1001:1001))
1854 (IOPATH dataa regin (583:583:583) (583:583:583))
1855 (IOPATH cin0 regin (571:571:571) (571:571:571))
1856 (IOPATH cin1 regin (587:587:587) (587:587:587))
1857 (IOPATH dataa cout (551:551:551) (551:551:551))
1858 (IOPATH cin0 cout (135:135:135) (135:135:135))
1859 (IOPATH cin1 cout (123:123:123) (123:123:123))
1864 (CELLTYPE "stratix_lcell_register")
1865 (INSTANCE \\vga_driver_unit\|vsync_counter_4_\\.lereg)
1868 (PORT sload (1429:1429:1429) (1429:1429:1429))
1869 (PORT datac (1091:1091:1091) (1091:1091:1091))
1870 (PORT sclr (1316:1316:1316) (1316:1316:1316))
1871 (PORT aclr (668:668:668) (668:668:668))
1872 (PORT clk (2323:2323:2323) (2323:2323:2323))
1873 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1874 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1878 (SETUP datac (posedge clk) (10:10:10))
1879 (SETUP datain (posedge clk) (10:10:10))
1880 (SETUP sclr (posedge clk) (10:10:10))
1881 (SETUP sload (posedge clk) (10:10:10))
1882 (HOLD datac (posedge clk) (100:100:100))
1883 (HOLD datain (posedge clk) (100:100:100))
1884 (HOLD sclr (posedge clk) (100:100:100))
1885 (HOLD sload (posedge clk) (100:100:100))
1889 (CELLTYPE "stratix_asynch_lcell")
1890 (INSTANCE \\vga_driver_unit\|vsync_counter_5_\\.lecomb)
1893 (PORT datab (420:420:420) (420:420:420))
1894 (PORT datac (1002:1002:1002) (1002:1002:1002))
1895 (IOPATH datab regin (489:489:489) (489:489:489))
1896 (IOPATH cin regin (607:607:607) (607:607:607))
1897 (IOPATH datab cout0 (344:344:344) (344:344:344))
1898 (IOPATH datab cout1 (341:341:341) (341:341:341))
1903 (CELLTYPE "stratix_lcell_register")
1904 (INSTANCE \\vga_driver_unit\|vsync_counter_5_\\.lereg)
1907 (PORT sload (1429:1429:1429) (1429:1429:1429))
1908 (PORT datac (1092:1092:1092) (1092:1092:1092))
1909 (PORT sclr (1316:1316:1316) (1316:1316:1316))
1910 (PORT aclr (668:668:668) (668:668:668))
1911 (PORT clk (2323:2323:2323) (2323:2323:2323))
1912 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1913 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1917 (SETUP datac (posedge clk) (10:10:10))
1918 (SETUP datain (posedge clk) (10:10:10))
1919 (SETUP sclr (posedge clk) (10:10:10))
1920 (SETUP sload (posedge clk) (10:10:10))
1921 (HOLD datac (posedge clk) (100:100:100))
1922 (HOLD datain (posedge clk) (100:100:100))
1923 (HOLD sclr (posedge clk) (100:100:100))
1924 (HOLD sload (posedge clk) (100:100:100))
1928 (CELLTYPE "stratix_asynch_lcell")
1929 (INSTANCE \\vga_driver_unit\|VSYNC_COUNT_next_un9_vsync_counterlt9_6\\.lecomb)
1932 (PORT dataa (634:634:634) (634:634:634))
1933 (PORT datab (647:647:647) (647:647:647))
1934 (PORT datac (940:940:940) (940:940:940))
1935 (PORT datad (976:976:976) (976:976:976))
1936 (IOPATH dataa combout (459:459:459) (459:459:459))
1937 (IOPATH datab combout (332:332:332) (332:332:332))
1938 (IOPATH datac combout (213:213:213) (213:213:213))
1939 (IOPATH datad combout (87:87:87) (87:87:87))
1944 (CELLTYPE "stratix_asynch_lcell")
1945 (INSTANCE \\vga_driver_unit\|vsync_counter_6_\\.lecomb)
1948 (PORT datab (422:422:422) (422:422:422))
1949 (PORT datac (1002:1002:1002) (1002:1002:1002))
1950 (IOPATH datab regin (489:489:489) (489:489:489))
1951 (IOPATH cin regin (607:607:607) (607:607:607))
1952 (IOPATH cin0 regin (571:571:571) (571:571:571))
1953 (IOPATH cin1 regin (587:587:587) (587:587:587))
1954 (IOPATH datab cout0 (344:344:344) (344:344:344))
1955 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
1956 (IOPATH datab cout1 (341:341:341) (341:341:341))
1957 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
1962 (CELLTYPE "stratix_lcell_register")
1963 (INSTANCE \\vga_driver_unit\|vsync_counter_6_\\.lereg)
1966 (PORT sload (1429:1429:1429) (1429:1429:1429))
1967 (PORT datac (1092:1092:1092) (1092:1092:1092))
1968 (PORT sclr (1316:1316:1316) (1316:1316:1316))
1969 (PORT aclr (668:668:668) (668:668:668))
1970 (PORT clk (2323:2323:2323) (2323:2323:2323))
1971 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1972 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1976 (SETUP datac (posedge clk) (10:10:10))
1977 (SETUP datain (posedge clk) (10:10:10))
1978 (SETUP sclr (posedge clk) (10:10:10))
1979 (SETUP sload (posedge clk) (10:10:10))
1980 (HOLD datac (posedge clk) (100:100:100))
1981 (HOLD datain (posedge clk) (100:100:100))
1982 (HOLD sclr (posedge clk) (100:100:100))
1983 (HOLD sload (posedge clk) (100:100:100))
1987 (CELLTYPE "stratix_asynch_lcell")
1988 (INSTANCE \\vga_driver_unit\|vsync_counter_7_\\.lecomb)
1991 (PORT dataa (436:436:436) (436:436:436))
1992 (PORT datac (1001:1001:1001) (1001:1001:1001))
1993 (IOPATH dataa regin (583:583:583) (583:583:583))
1994 (IOPATH cin regin (607:607:607) (607:607:607))
1995 (IOPATH cin0 regin (571:571:571) (571:571:571))
1996 (IOPATH cin1 regin (587:587:587) (587:587:587))
1997 (IOPATH dataa cout0 (443:443:443) (443:443:443))
1998 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
1999 (IOPATH dataa cout1 (451:451:451) (451:451:451))
2000 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
2005 (CELLTYPE "stratix_lcell_register")
2006 (INSTANCE \\vga_driver_unit\|vsync_counter_7_\\.lereg)
2009 (PORT sload (1429:1429:1429) (1429:1429:1429))
2010 (PORT datac (1091:1091:1091) (1091:1091:1091))
2011 (PORT sclr (1316:1316:1316) (1316:1316:1316))
2012 (PORT aclr (668:668:668) (668:668:668))
2013 (PORT clk (2323:2323:2323) (2323:2323:2323))
2014 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2015 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2019 (SETUP datac (posedge clk) (10:10:10))
2020 (SETUP datain (posedge clk) (10:10:10))
2021 (SETUP sclr (posedge clk) (10:10:10))
2022 (SETUP sload (posedge clk) (10:10:10))
2023 (HOLD datac (posedge clk) (100:100:100))
2024 (HOLD datain (posedge clk) (100:100:100))
2025 (HOLD sclr (posedge clk) (100:100:100))
2026 (HOLD sload (posedge clk) (100:100:100))
2030 (CELLTYPE "stratix_asynch_lcell")
2031 (INSTANCE \\vga_driver_unit\|vsync_counter_8_\\.lecomb)
2034 (PORT dataa (445:445:445) (445:445:445))
2035 (PORT datac (1001:1001:1001) (1001:1001:1001))
2036 (IOPATH dataa regin (583:583:583) (583:583:583))
2037 (IOPATH cin regin (607:607:607) (607:607:607))
2038 (IOPATH cin0 regin (571:571:571) (571:571:571))
2039 (IOPATH cin1 regin (587:587:587) (587:587:587))
2040 (IOPATH dataa cout0 (443:443:443) (443:443:443))
2041 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
2042 (IOPATH dataa cout1 (451:451:451) (451:451:451))
2043 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
2048 (CELLTYPE "stratix_lcell_register")
2049 (INSTANCE \\vga_driver_unit\|vsync_counter_8_\\.lereg)
2052 (PORT sload (1429:1429:1429) (1429:1429:1429))
2053 (PORT datac (1091:1091:1091) (1091:1091:1091))
2054 (PORT sclr (1316:1316:1316) (1316:1316:1316))
2055 (PORT aclr (668:668:668) (668:668:668))
2056 (PORT clk (2323:2323:2323) (2323:2323:2323))
2057 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2058 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2062 (SETUP datac (posedge clk) (10:10:10))
2063 (SETUP datain (posedge clk) (10:10:10))
2064 (SETUP sclr (posedge clk) (10:10:10))
2065 (SETUP sload (posedge clk) (10:10:10))
2066 (HOLD datac (posedge clk) (100:100:100))
2067 (HOLD datain (posedge clk) (100:100:100))
2068 (HOLD sclr (posedge clk) (100:100:100))
2069 (HOLD sload (posedge clk) (100:100:100))
2073 (CELLTYPE "stratix_asynch_lcell")
2074 (INSTANCE \\vga_driver_unit\|vsync_counter_9_\\.lecomb)
2077 (PORT datac (999:999:999) (999:999:999))
2078 (PORT datad (432:432:432) (432:432:432))
2079 (IOPATH datad regin (235:235:235) (235:235:235))
2080 (IOPATH cin regin (607:607:607) (607:607:607))
2081 (IOPATH cin0 regin (571:571:571) (571:571:571))
2082 (IOPATH cin1 regin (587:587:587) (587:587:587))
2087 (CELLTYPE "stratix_lcell_register")
2088 (INSTANCE \\vga_driver_unit\|vsync_counter_9_\\.lereg)
2091 (PORT sload (1429:1429:1429) (1429:1429:1429))
2092 (PORT datac (1089:1089:1089) (1089:1089:1089))
2093 (PORT sclr (1316:1316:1316) (1316:1316:1316))
2094 (PORT aclr (668:668:668) (668:668:668))
2095 (PORT clk (2323:2323:2323) (2323:2323:2323))
2096 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2097 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2101 (SETUP datac (posedge clk) (10:10:10))
2102 (SETUP datain (posedge clk) (10:10:10))
2103 (SETUP sclr (posedge clk) (10:10:10))
2104 (SETUP sload (posedge clk) (10:10:10))
2105 (HOLD datac (posedge clk) (100:100:100))
2106 (HOLD datain (posedge clk) (100:100:100))
2107 (HOLD sclr (posedge clk) (100:100:100))
2108 (HOLD sload (posedge clk) (100:100:100))
2112 (CELLTYPE "stratix_asynch_lcell")
2113 (INSTANCE \\vga_driver_unit\|VSYNC_COUNT_next_un9_vsync_counterlt9_5\\.lecomb)
2116 (PORT dataa (996:996:996) (996:996:996))
2117 (PORT datab (971:971:971) (971:971:971))
2118 (PORT datac (652:652:652) (652:652:652))
2119 (PORT datad (996:996:996) (996:996:996))
2120 (IOPATH dataa combout (459:459:459) (459:459:459))
2121 (IOPATH datab combout (332:332:332) (332:332:332))
2122 (IOPATH datac combout (213:213:213) (213:213:213))
2123 (IOPATH datad combout (87:87:87) (87:87:87))
2128 (CELLTYPE "stratix_asynch_lcell")
2129 (INSTANCE \\vga_driver_unit\|VSYNC_COUNT_next_un9_vsync_counterlt9\\.lecomb)
2132 (PORT dataa (1000:1000:1000) (1000:1000:1000))
2133 (PORT datab (345:345:345) (345:345:345))
2134 (PORT datac (1071:1071:1071) (1071:1071:1071))
2135 (PORT datad (139:139:139) (139:139:139))
2136 (IOPATH dataa combout (459:459:459) (459:459:459))
2137 (IOPATH datab combout (332:332:332) (332:332:332))
2138 (IOPATH datac combout (213:213:213) (213:213:213))
2139 (IOPATH datad combout (87:87:87) (87:87:87))
2144 (CELLTYPE "stratix_asynch_lcell")
2145 (INSTANCE \\vga_driver_unit\|G_16\\.lecomb)
2148 (PORT dataa (1066:1066:1066) (1066:1066:1066))
2149 (PORT datab (1052:1052:1052) (1052:1052:1052))
2150 (PORT datac (456:456:456) (456:456:456))
2151 (PORT datad (354:354:354) (354:354:354))
2152 (IOPATH dataa combout (459:459:459) (459:459:459))
2153 (IOPATH datab combout (332:332:332) (332:332:332))
2154 (IOPATH datac combout (213:213:213) (213:213:213))
2155 (IOPATH datad combout (87:87:87) (87:87:87))
2160 (CELLTYPE "stratix_asynch_lcell")
2161 (INSTANCE \\vga_driver_unit\|VSYNC_FSM_next_un12_vsync_counter_6\\.lecomb)
2164 (PORT dataa (624:624:624) (624:624:624))
2165 (PORT datab (584:584:584) (584:584:584))
2166 (PORT datac (960:960:960) (960:960:960))
2167 (PORT datad (622:622:622) (622:622:622))
2168 (IOPATH dataa combout (459:459:459) (459:459:459))
2169 (IOPATH datab combout (332:332:332) (332:332:332))
2170 (IOPATH datac combout (213:213:213) (213:213:213))
2171 (IOPATH datad combout (87:87:87) (87:87:87))
2176 (CELLTYPE "stratix_asynch_lcell")
2177 (INSTANCE \\vga_driver_unit\|VSYNC_FSM_next_un15_vsync_counter_3\\.lecomb)
2180 (PORT dataa (629:629:629) (629:629:629))
2181 (PORT datab (639:639:639) (639:639:639))
2182 (PORT datac (656:656:656) (656:656:656))
2183 (PORT datad (619:619:619) (619:619:619))
2184 (IOPATH dataa combout (459:459:459) (459:459:459))
2185 (IOPATH datab combout (332:332:332) (332:332:332))
2186 (IOPATH datac combout (213:213:213) (213:213:213))
2187 (IOPATH datad combout (87:87:87) (87:87:87))
2192 (CELLTYPE "stratix_asynch_lcell")
2193 (INSTANCE \\vga_driver_unit\|VSYNC_FSM_next_un15_vsync_counter_4\\.lecomb)
2196 (PORT datab (1053:1053:1053) (1053:1053:1053))
2197 (PORT datac (979:979:979) (979:979:979))
2198 (PORT datad (139:139:139) (139:139:139))
2199 (IOPATH datab combout (332:332:332) (332:332:332))
2200 (IOPATH datac combout (213:213:213) (213:213:213))
2201 (IOPATH datad combout (87:87:87) (87:87:87))
2206 (CELLTYPE "stratix_asynch_lcell")
2207 (INSTANCE \\vga_driver_unit\|VSYNC_FSM_next_un14_vsync_counter_8\\.lecomb)
2210 (PORT datac (886:886:886) (886:886:886))
2211 (PORT datad (854:854:854) (854:854:854))
2212 (IOPATH datac combout (213:213:213) (213:213:213))
2213 (IOPATH datad combout (87:87:87) (87:87:87))
2218 (CELLTYPE "stratix_asynch_lcell")
2219 (INSTANCE \\vga_driver_unit\|vsync_state_5_\\.lecomb)
2222 (PORT datac (947:947:947) (947:947:947))
2223 (PORT datad (699:699:699) (699:699:699))
2224 (IOPATH datac regin (364:364:364) (364:364:364))
2225 (IOPATH datad regin (235:235:235) (235:235:235))
2230 (CELLTYPE "stratix_lcell_register")
2231 (INSTANCE \\vga_driver_unit\|vsync_state_5_\\.lereg)
2234 (PORT sclr (1803:1803:1803) (1803:1803:1803))
2235 (PORT aclr (668:668:668) (668:668:668))
2236 (PORT clk (2323:2323:2323) (2323:2323:2323))
2237 (PORT ena (1081:1081:1081) (1081:1081:1081))
2238 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2239 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2243 (SETUP datain (posedge clk) (10:10:10))
2244 (SETUP sclr (posedge clk) (10:10:10))
2245 (SETUP ena (posedge clk) (10:10:10))
2246 (HOLD datain (posedge clk) (100:100:100))
2247 (HOLD sclr (posedge clk) (100:100:100))
2248 (HOLD ena (posedge clk) (100:100:100))
2252 (CELLTYPE "stratix_asynch_lcell")
2253 (INSTANCE \\vga_driver_unit\|vsync_state_4_\\.lecomb)
2256 (PORT dataa (969:969:969) (969:969:969))
2257 (PORT datab (673:673:673) (673:673:673))
2258 (PORT datac (364:364:364) (364:364:364))
2259 (PORT datad (444:444:444) (444:444:444))
2260 (IOPATH dataa regin (583:583:583) (583:583:583))
2261 (IOPATH datab regin (489:489:489) (489:489:489))
2262 (IOPATH datac regin (364:364:364) (364:364:364))
2263 (IOPATH datad regin (235:235:235) (235:235:235))
2268 (CELLTYPE "stratix_lcell_register")
2269 (INSTANCE \\vga_driver_unit\|vsync_state_4_\\.lereg)
2272 (PORT sclr (1803:1803:1803) (1803:1803:1803))
2273 (PORT aclr (668:668:668) (668:668:668))
2274 (PORT clk (2323:2323:2323) (2323:2323:2323))
2275 (PORT ena (1081:1081:1081) (1081:1081:1081))
2276 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2277 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2281 (SETUP datain (posedge clk) (10:10:10))
2282 (SETUP sclr (posedge clk) (10:10:10))
2283 (SETUP ena (posedge clk) (10:10:10))
2284 (HOLD datain (posedge clk) (100:100:100))
2285 (HOLD sclr (posedge clk) (100:100:100))
2286 (HOLD ena (posedge clk) (100:100:100))
2290 (CELLTYPE "stratix_asynch_lcell")
2291 (INSTANCE \\vga_driver_unit\|VSYNC_FSM_next_un13_vsync_counter_3\\.lecomb)
2294 (PORT dataa (674:674:674) (674:674:674))
2295 (PORT datab (610:610:610) (610:610:610))
2296 (PORT datac (657:657:657) (657:657:657))
2297 (PORT datad (683:683:683) (683:683:683))
2298 (IOPATH dataa combout (459:459:459) (459:459:459))
2299 (IOPATH datab combout (332:332:332) (332:332:332))
2300 (IOPATH datac combout (213:213:213) (213:213:213))
2301 (IOPATH datad combout (87:87:87) (87:87:87))
2306 (CELLTYPE "stratix_asynch_lcell")
2307 (INSTANCE \\vga_driver_unit\|VSYNC_FSM_next_un13_vsync_counter_4\\.lecomb)
2310 (PORT datab (924:924:924) (924:924:924))
2311 (PORT datac (701:701:701) (701:701:701))
2312 (PORT datad (139:139:139) (139:139:139))
2313 (IOPATH datab combout (332:332:332) (332:332:332))
2314 (IOPATH datac combout (213:213:213) (213:213:213))
2315 (IOPATH datad combout (87:87:87) (87:87:87))
2320 (CELLTYPE "stratix_asynch_lcell")
2321 (INSTANCE \\vga_driver_unit\|vsync_state_next_1_sqmuxa_2_cZ\\.lecomb)
2324 (PORT datab (431:431:431) (431:431:431))
2325 (PORT datac (877:877:877) (877:877:877))
2326 (PORT datad (253:253:253) (253:253:253))
2327 (IOPATH datab combout (332:332:332) (332:332:332))
2328 (IOPATH datac combout (213:213:213) (213:213:213))
2329 (IOPATH datad combout (87:87:87) (87:87:87))
2334 (CELLTYPE "stratix_asynch_lcell")
2335 (INSTANCE \\vga_driver_unit\|un1_vsync_state_next_1_sqmuxa_0_cZ\\.lecomb)
2338 (PORT dataa (433:433:433) (433:433:433))
2339 (PORT datab (871:871:871) (871:871:871))
2340 (PORT datac (863:863:863) (863:863:863))
2341 (PORT datad (139:139:139) (139:139:139))
2342 (IOPATH dataa combout (459:459:459) (459:459:459))
2343 (IOPATH datab combout (332:332:332) (332:332:332))
2344 (IOPATH datac combout (213:213:213) (213:213:213))
2345 (IOPATH datad combout (87:87:87) (87:87:87))
2350 (CELLTYPE "stratix_asynch_lcell")
2351 (INSTANCE \\vga_driver_unit\|vsync_state_next_1_sqmuxa_1_cZ\\.lecomb)
2354 (PORT dataa (968:968:968) (968:968:968))
2355 (PORT datab (435:435:435) (435:435:435))
2356 (PORT datac (700:700:700) (700:700:700))
2357 (PORT datad (139:139:139) (139:139:139))
2358 (IOPATH dataa combout (459:459:459) (459:459:459))
2359 (IOPATH datab combout (332:332:332) (332:332:332))
2360 (IOPATH datac combout (213:213:213) (213:213:213))
2361 (IOPATH datad combout (87:87:87) (87:87:87))
2366 (CELLTYPE "stratix_asynch_lcell")
2367 (INSTANCE \\vga_driver_unit\|vsync_state_3_\\.lecomb)
2370 (PORT dataa (972:972:972) (972:972:972))
2371 (PORT datab (894:894:894) (894:894:894))
2372 (PORT datac (1516:1516:1516) (1516:1516:1516))
2373 (PORT datad (565:565:565) (565:565:565))
2374 (IOPATH dataa combout (459:459:459) (459:459:459))
2375 (IOPATH datab combout (332:332:332) (332:332:332))
2376 (IOPATH datad combout (87:87:87) (87:87:87))
2377 (IOPATH qfbkin combout (291:291:291) (291:291:291))
2382 (CELLTYPE "stratix_lcell_register")
2383 (INSTANCE \\vga_driver_unit\|vsync_state_3_\\.lereg)
2386 (PORT datac (1606:1606:1606) (1606:1606:1606))
2387 (PORT sclr (1138:1138:1138) (1138:1138:1138))
2388 (PORT aclr (668:668:668) (668:668:668))
2389 (PORT clk (2323:2323:2323) (2323:2323:2323))
2390 (PORT ena (1299:1299:1299) (1299:1299:1299))
2391 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2392 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2393 (IOPATH (posedge clk) qfbkout (176:176:176) (176:176:176))
2394 (IOPATH (posedge aclr) qfbkout (212:212:212) (212:212:212))
2398 (SETUP datac (posedge clk) (10:10:10))
2399 (SETUP datain (posedge clk) (10:10:10))
2400 (SETUP sclr (posedge clk) (10:10:10))
2401 (SETUP ena (posedge clk) (10:10:10))
2402 (HOLD datac (posedge clk) (100:100:100))
2403 (HOLD datain (posedge clk) (100:100:100))
2404 (HOLD sclr (posedge clk) (100:100:100))
2405 (HOLD ena (posedge clk) (100:100:100))
2409 (CELLTYPE "stratix_asynch_lcell")
2410 (INSTANCE \\vga_driver_unit\|vsync_state_next_2_sqmuxa_cZ\\.lecomb)
2413 (PORT dataa (1038:1038:1038) (1038:1038:1038))
2414 (PORT datab (351:351:351) (351:351:351))
2415 (PORT datac (582:582:582) (582:582:582))
2416 (PORT datad (564:564:564) (564:564:564))
2417 (IOPATH dataa combout (459:459:459) (459:459:459))
2418 (IOPATH datab combout (332:332:332) (332:332:332))
2419 (IOPATH datac combout (213:213:213) (213:213:213))
2420 (IOPATH datad combout (87:87:87) (87:87:87))
2425 (CELLTYPE "stratix_asynch_lcell")
2426 (INSTANCE \\vga_driver_unit\|vsync_state_2_\\.lecomb)
2429 (PORT dataa (888:888:888) (888:888:888))
2430 (PORT datab (671:671:671) (671:671:671))
2431 (PORT datac (703:703:703) (703:703:703))
2432 (PORT datad (960:960:960) (960:960:960))
2433 (IOPATH dataa regin (583:583:583) (583:583:583))
2434 (IOPATH datab regin (489:489:489) (489:489:489))
2435 (IOPATH datac regin (364:364:364) (364:364:364))
2436 (IOPATH datad regin (235:235:235) (235:235:235))
2441 (CELLTYPE "stratix_lcell_register")
2442 (INSTANCE \\vga_driver_unit\|vsync_state_2_\\.lereg)
2445 (PORT sclr (1803:1803:1803) (1803:1803:1803))
2446 (PORT aclr (668:668:668) (668:668:668))
2447 (PORT clk (2323:2323:2323) (2323:2323:2323))
2448 (PORT ena (1081:1081:1081) (1081:1081:1081))
2449 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2450 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2454 (SETUP datain (posedge clk) (10:10:10))
2455 (SETUP sclr (posedge clk) (10:10:10))
2456 (SETUP ena (posedge clk) (10:10:10))
2457 (HOLD datain (posedge clk) (100:100:100))
2458 (HOLD sclr (posedge clk) (100:100:100))
2459 (HOLD ena (posedge clk) (100:100:100))
2463 (CELLTYPE "stratix_asynch_lcell")
2464 (INSTANCE \\vga_driver_unit\|vsync_state_3_iv_0_0__g0_0_a3_0_cZ\\.lecomb)
2467 (PORT datab (346:346:346) (346:346:346))
2468 (PORT datac (359:359:359) (359:359:359))
2469 (PORT datad (992:992:992) (992:992:992))
2470 (IOPATH datab combout (332:332:332) (332:332:332))
2471 (IOPATH datac combout (213:213:213) (213:213:213))
2472 (IOPATH datad combout (87:87:87) (87:87:87))
2477 (CELLTYPE "stratix_asynch_lcell")
2478 (INSTANCE \\vga_driver_unit\|vsync_state_0_\\.lecomb)
2481 (PORT dataa (354:354:354) (354:354:354))
2482 (PORT datab (1046:1046:1046) (1046:1046:1046))
2483 (PORT datac (451:451:451) (451:451:451))
2484 (PORT datad (944:944:944) (944:944:944))
2485 (IOPATH dataa regin (583:583:583) (583:583:583))
2486 (IOPATH datab regin (489:489:489) (489:489:489))
2487 (IOPATH datac regin (364:364:364) (364:364:364))
2488 (IOPATH datad regin (235:235:235) (235:235:235))
2493 (CELLTYPE "stratix_lcell_register")
2494 (INSTANCE \\vga_driver_unit\|vsync_state_0_\\.lereg)
2497 (PORT aclr (668:668:668) (668:668:668))
2498 (PORT clk (2323:2323:2323) (2323:2323:2323))
2499 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2500 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2504 (SETUP datain (posedge clk) (10:10:10))
2505 (HOLD datain (posedge clk) (100:100:100))
2509 (CELLTYPE "stratix_asynch_lcell")
2510 (INSTANCE \\vga_driver_unit\|d_set_vsync_counter_cZ\\.lecomb)
2513 (PORT datab (991:991:991) (991:991:991))
2514 (PORT datad (946:946:946) (946:946:946))
2515 (IOPATH datab combout (332:332:332) (332:332:332))
2516 (IOPATH datad combout (87:87:87) (87:87:87))
2521 (CELLTYPE "stratix_asynch_lcell")
2522 (INSTANCE \\vga_driver_unit\|vsync_counter_next_1_sqmuxa_cZ\\.lecomb)
2525 (PORT dataa (636:636:636) (636:636:636))
2526 (PORT datab (4638:4638:4638) (4638:4638:4638))
2527 (PORT datac (363:363:363) (363:363:363))
2528 (PORT datad (613:613:613) (613:613:613))
2529 (IOPATH dataa combout (459:459:459) (459:459:459))
2530 (IOPATH datab combout (332:332:332) (332:332:332))
2531 (IOPATH datac combout (213:213:213) (213:213:213))
2532 (IOPATH datad combout (87:87:87) (87:87:87))
2537 (CELLTYPE "stratix_asynch_lcell")
2538 (INSTANCE \\vga_driver_unit\|VSYNC_FSM_next_un12_vsync_counter_7\\.lecomb)
2541 (PORT dataa (1033:1033:1033) (1033:1033:1033))
2542 (PORT datab (610:610:610) (610:610:610))
2543 (PORT datac (662:662:662) (662:662:662))
2544 (PORT datad (613:613:613) (613:613:613))
2545 (IOPATH dataa combout (459:459:459) (459:459:459))
2546 (IOPATH datab combout (332:332:332) (332:332:332))
2547 (IOPATH datac combout (213:213:213) (213:213:213))
2548 (IOPATH datad combout (87:87:87) (87:87:87))
2553 (CELLTYPE "stratix_asynch_lcell")
2554 (INSTANCE \\vga_driver_unit\|vsync_state_1_\\.lecomb)
2557 (PORT dataa (1612:1612:1612) (1612:1612:1612))
2558 (PORT datab (1692:1692:1692) (1692:1692:1692))
2559 (PORT datac (1412:1412:1412) (1412:1412:1412))
2560 (PORT datad (1529:1529:1529) (1529:1529:1529))
2561 (IOPATH dataa regin (583:583:583) (583:583:583))
2562 (IOPATH datab regin (489:489:489) (489:489:489))
2563 (IOPATH datac regin (364:364:364) (364:364:364))
2564 (IOPATH datad regin (235:235:235) (235:235:235))
2569 (CELLTYPE "stratix_lcell_register")
2570 (INSTANCE \\vga_driver_unit\|vsync_state_1_\\.lereg)
2573 (PORT aclr (668:668:668) (668:668:668))
2574 (PORT clk (2359:2359:2359) (2359:2359:2359))
2575 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2576 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2580 (SETUP datain (posedge clk) (10:10:10))
2581 (HOLD datain (posedge clk) (100:100:100))
2585 (CELLTYPE "stratix_asynch_lcell")
2586 (INSTANCE \\vga_driver_unit\|h_enable_sig_1_0_0_0_g0_i_o4_cZ\\.lecomb)
2589 (PORT dataa (1537:1537:1537) (1537:1537:1537))
2590 (PORT datab (1691:1691:1691) (1691:1691:1691))
2591 (PORT datad (1518:1518:1518) (1518:1518:1518))
2592 (IOPATH dataa combout (459:459:459) (459:459:459))
2593 (IOPATH datab combout (332:332:332) (332:332:332))
2594 (IOPATH datad combout (87:87:87) (87:87:87))
2599 (CELLTYPE "stratix_asynch_lcell")
2600 (INSTANCE \\vga_driver_unit\|h_enable_sig_Z\\.lecomb)
2603 (PORT datab (428:428:428) (428:428:428))
2604 (PORT datad (1520:1520:1520) (1520:1520:1520))
2605 (IOPATH datab regin (489:489:489) (489:489:489))
2606 (IOPATH datad regin (235:235:235) (235:235:235))
2611 (CELLTYPE "stratix_lcell_register")
2612 (INSTANCE \\vga_driver_unit\|h_enable_sig_Z\\.lereg)
2615 (PORT sclr (2477:2477:2477) (2477:2477:2477))
2616 (PORT aclr (668:668:668) (668:668:668))
2617 (PORT clk (2359:2359:2359) (2359:2359:2359))
2618 (PORT ena (1086:1086:1086) (1086:1086:1086))
2619 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2620 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2624 (SETUP datain (posedge clk) (10:10:10))
2625 (SETUP sclr (posedge clk) (10:10:10))
2626 (SETUP ena (posedge clk) (10:10:10))
2627 (HOLD datain (posedge clk) (100:100:100))
2628 (HOLD sclr (posedge clk) (100:100:100))
2629 (HOLD ena (posedge clk) (100:100:100))
2633 (CELLTYPE "stratix_asynch_lcell")
2634 (INSTANCE \\vga_driver_unit\|v_enable_sig_1_0_0_0_g0_i_o4_cZ\\.lecomb)
2637 (PORT dataa (968:968:968) (968:968:968))
2638 (PORT datac (1401:1401:1401) (1401:1401:1401))
2639 (PORT datad (1404:1404:1404) (1404:1404:1404))
2640 (IOPATH dataa combout (459:459:459) (459:459:459))
2641 (IOPATH datac combout (213:213:213) (213:213:213))
2642 (IOPATH datad combout (87:87:87) (87:87:87))
2647 (CELLTYPE "stratix_asynch_lcell")
2648 (INSTANCE \\vga_driver_unit\|v_enable_sig_Z\\.lecomb)
2651 (PORT datab (1628:1628:1628) (1628:1628:1628))
2652 (PORT datac (1512:1512:1512) (1512:1512:1512))
2653 (IOPATH datab regin (489:489:489) (489:489:489))
2654 (IOPATH datac regin (364:364:364) (364:364:364))
2659 (CELLTYPE "stratix_lcell_register")
2660 (INSTANCE \\vga_driver_unit\|v_enable_sig_Z\\.lereg)
2663 (PORT sclr (1737:1737:1737) (1737:1737:1737))
2664 (PORT aclr (668:668:668) (668:668:668))
2665 (PORT clk (2323:2323:2323) (2323:2323:2323))
2666 (PORT ena (1092:1092:1092) (1092:1092:1092))
2667 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2668 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2672 (SETUP datain (posedge clk) (10:10:10))
2673 (SETUP sclr (posedge clk) (10:10:10))
2674 (SETUP ena (posedge clk) (10:10:10))
2675 (HOLD datain (posedge clk) (100:100:100))
2676 (HOLD sclr (posedge clk) (100:100:100))
2677 (HOLD ena (posedge clk) (100:100:100))
2681 (CELLTYPE "stratix_asynch_lcell")
2682 (INSTANCE \\vga_control_unit\|r_next_i_o7_cZ\\.lecomb)
2685 (PORT datab (427:427:427) (427:427:427))
2686 (PORT datac (930:930:930) (930:930:930))
2687 (PORT datad (1453:1453:1453) (1453:1453:1453))
2688 (IOPATH datab combout (332:332:332) (332:332:332))
2689 (IOPATH datac combout (213:213:213) (213:213:213))
2690 (IOPATH datad combout (87:87:87) (87:87:87))
2695 (CELLTYPE "stratix_asynch_lcell")
2696 (INSTANCE \\vga_control_unit\|N_4_i_0_g0_1_cZ\\.lecomb)
2699 (PORT dataa (895:895:895) (895:895:895))
2700 (PORT datab (648:648:648) (648:648:648))
2701 (PORT datac (650:650:650) (650:650:650))
2702 (PORT datad (139:139:139) (139:139:139))
2703 (IOPATH dataa combout (459:459:459) (459:459:459))
2704 (IOPATH datab combout (332:332:332) (332:332:332))
2705 (IOPATH datac combout (213:213:213) (213:213:213))
2706 (IOPATH datad combout (87:87:87) (87:87:87))
2711 (CELLTYPE "stratix_asynch_lcell")
2712 (INSTANCE \\vga_control_unit\|r_Z\\.lecomb)
2715 (PORT dataa (891:891:891) (891:891:891))
2716 (PORT datab (618:618:618) (618:618:618))
2717 (PORT datac (551:551:551) (551:551:551))
2718 (PORT datad (852:852:852) (852:852:852))
2719 (IOPATH dataa regin (583:583:583) (583:583:583))
2720 (IOPATH datab regin (489:489:489) (489:489:489))
2721 (IOPATH datac regin (364:364:364) (364:364:364))
2722 (IOPATH datad regin (235:235:235) (235:235:235))
2727 (CELLTYPE "stratix_lcell_register")
2728 (INSTANCE \\vga_control_unit\|r_Z\\.lereg)
2731 (PORT aclr (5163:5163:5163) (5163:5163:5163))
2732 (PORT clk (2359:2359:2359) (2359:2359:2359))
2733 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2734 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2738 (SETUP datain (posedge clk) (10:10:10))
2739 (HOLD datain (posedge clk) (100:100:100))
2743 (CELLTYPE "stratix_asynch_lcell")
2744 (INSTANCE \\vga_control_unit\|N_23_i_0_g0_a_cZ\\.lecomb)
2747 (PORT dataa (698:698:698) (698:698:698))
2748 (PORT datab (349:349:349) (349:349:349))
2749 (PORT datac (934:934:934) (934:934:934))
2750 (PORT datad (879:879:879) (879:879:879))
2751 (IOPATH dataa combout (459:459:459) (459:459:459))
2752 (IOPATH datab combout (332:332:332) (332:332:332))
2753 (IOPATH datac combout (213:213:213) (213:213:213))
2754 (IOPATH datad combout (87:87:87) (87:87:87))
2759 (CELLTYPE "stratix_asynch_lcell")
2760 (INSTANCE \\vga_control_unit\|g_Z\\.lecomb)
2763 (PORT dataa (990:990:990) (990:990:990))
2764 (PORT datab (621:621:621) (621:621:621))
2765 (PORT datac (860:860:860) (860:860:860))
2766 (PORT datad (899:899:899) (899:899:899))
2767 (IOPATH dataa regin (583:583:583) (583:583:583))
2768 (IOPATH datab regin (489:489:489) (489:489:489))
2769 (IOPATH datac regin (364:364:364) (364:364:364))
2770 (IOPATH datad regin (235:235:235) (235:235:235))
2775 (CELLTYPE "stratix_lcell_register")
2776 (INSTANCE \\vga_control_unit\|g_Z\\.lereg)
2779 (PORT aclr (5163:5163:5163) (5163:5163:5163))
2780 (PORT clk (2359:2359:2359) (2359:2359:2359))
2781 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2782 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2786 (SETUP datain (posedge clk) (10:10:10))
2787 (HOLD datain (posedge clk) (100:100:100))
2791 (CELLTYPE "stratix_asynch_lcell")
2792 (INSTANCE \\vga_control_unit\|b_next_i_a7_1_cZ\\.lecomb)
2795 (PORT dataa (449:449:449) (449:449:449))
2796 (PORT datab (436:436:436) (436:436:436))
2797 (PORT datac (1056:1056:1056) (1056:1056:1056))
2798 (PORT datad (868:868:868) (868:868:868))
2799 (IOPATH dataa combout (459:459:459) (459:459:459))
2800 (IOPATH datab combout (332:332:332) (332:332:332))
2801 (IOPATH datac combout (213:213:213) (213:213:213))
2802 (IOPATH datad combout (87:87:87) (87:87:87))
2807 (CELLTYPE "stratix_asynch_lcell")
2808 (INSTANCE \\vga_control_unit\|N_6_i_0_g0_0_cZ\\.lecomb)
2811 (PORT dataa (1060:1060:1060) (1060:1060:1060))
2812 (PORT datab (435:435:435) (435:435:435))
2813 (PORT datac (557:557:557) (557:557:557))
2814 (PORT datad (587:587:587) (587:587:587))
2815 (IOPATH dataa combout (459:459:459) (459:459:459))
2816 (IOPATH datab combout (332:332:332) (332:332:332))
2817 (IOPATH datac combout (213:213:213) (213:213:213))
2818 (IOPATH datad combout (87:87:87) (87:87:87))
2823 (CELLTYPE "stratix_asynch_lcell")
2824 (INSTANCE \\vga_control_unit\|b_Z\\.lecomb)
2827 (PORT dataa (546:546:546) (546:546:546))
2828 (PORT datab (535:535:535) (535:535:535))
2829 (PORT datac (559:559:559) (559:559:559))
2830 (PORT datad (631:631:631) (631:631:631))
2831 (IOPATH dataa regin (583:583:583) (583:583:583))
2832 (IOPATH datab regin (489:489:489) (489:489:489))
2833 (IOPATH datac regin (364:364:364) (364:364:364))
2834 (IOPATH datad regin (235:235:235) (235:235:235))
2839 (CELLTYPE "stratix_lcell_register")
2840 (INSTANCE \\vga_control_unit\|b_Z\\.lereg)
2843 (PORT aclr (5163:5163:5163) (5163:5163:5163))
2844 (PORT clk (2359:2359:2359) (2359:2359:2359))
2845 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2846 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2850 (SETUP datain (posedge clk) (10:10:10))
2851 (HOLD datain (posedge clk) (100:100:100))
2855 (CELLTYPE "stratix_asynch_lcell")
2856 (INSTANCE \\vga_driver_unit\|un1_hsync_state_3_0_cZ\\.lecomb)
2859 (PORT datab (1628:1628:1628) (1628:1628:1628))
2860 (PORT datac (1512:1512:1512) (1512:1512:1512))
2861 (IOPATH datab combout (332:332:332) (332:332:332))
2862 (IOPATH datac combout (213:213:213) (213:213:213))
2867 (CELLTYPE "stratix_asynch_lcell")
2868 (INSTANCE \\vga_driver_unit\|h_sync_1_0_0_0_g1_cZ\\.lecomb)
2871 (PORT dataa (1415:1415:1415) (1415:1415:1415))
2872 (PORT datab (335:335:335) (335:335:335))
2873 (PORT datac (1460:1460:1460) (1460:1460:1460))
2874 (PORT datad (431:431:431) (431:431:431))
2875 (IOPATH dataa combout (459:459:459) (459:459:459))
2876 (IOPATH datab combout (332:332:332) (332:332:332))
2877 (IOPATH datac combout (213:213:213) (213:213:213))
2878 (IOPATH datad combout (87:87:87) (87:87:87))
2883 (CELLTYPE "stratix_asynch_lcell")
2884 (INSTANCE \\vga_driver_unit\|h_sync_Z\\.lecomb)
2887 (PORT dataa (364:364:364) (364:364:364))
2888 (PORT datab (4641:4641:4641) (4641:4641:4641))
2889 (PORT datac (635:635:635) (635:635:635))
2890 (PORT datad (616:616:616) (616:616:616))
2891 (IOPATH dataa regin (583:583:583) (583:583:583))
2892 (IOPATH datab regin (489:489:489) (489:489:489))
2893 (IOPATH datac regin (364:364:364) (364:364:364))
2894 (IOPATH datad regin (235:235:235) (235:235:235))
2899 (CELLTYPE "stratix_lcell_register")
2900 (INSTANCE \\vga_driver_unit\|h_sync_Z\\.lereg)
2903 (PORT aclr (668:668:668) (668:668:668))
2904 (PORT clk (2323:2323:2323) (2323:2323:2323))
2905 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2906 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2910 (SETUP datain (posedge clk) (10:10:10))
2911 (HOLD datain (posedge clk) (100:100:100))
2915 (CELLTYPE "stratix_asynch_lcell")
2916 (INSTANCE \\vga_driver_unit\|un1_vsync_state_2_0_cZ\\.lecomb)
2919 (PORT datac (1513:1513:1513) (1513:1513:1513))
2920 (PORT datad (421:421:421) (421:421:421))
2921 (IOPATH datac combout (213:213:213) (213:213:213))
2922 (IOPATH datad combout (87:87:87) (87:87:87))
2927 (CELLTYPE "stratix_asynch_lcell")
2928 (INSTANCE \\vga_driver_unit\|v_sync_1_0_0_0_g1_cZ\\.lecomb)
2931 (PORT dataa (610:610:610) (610:610:610))
2932 (PORT datab (634:634:634) (634:634:634))
2933 (PORT datac (403:403:403) (403:403:403))
2934 (PORT datad (649:649:649) (649:649:649))
2935 (IOPATH dataa combout (459:459:459) (459:459:459))
2936 (IOPATH datab combout (332:332:332) (332:332:332))
2937 (IOPATH datac combout (213:213:213) (213:213:213))
2938 (IOPATH datad combout (87:87:87) (87:87:87))
2943 (CELLTYPE "stratix_asynch_lcell")
2944 (INSTANCE \\vga_driver_unit\|v_sync_Z\\.lecomb)
2947 (PORT dataa (4772:4772:4772) (4772:4772:4772))
2948 (PORT datab (473:473:473) (473:473:473))
2949 (PORT datac (488:488:488) (488:488:488))
2950 (PORT datad (139:139:139) (139:139:139))
2951 (IOPATH dataa regin (583:583:583) (583:583:583))
2952 (IOPATH datab regin (489:489:489) (489:489:489))
2953 (IOPATH datac regin (364:364:364) (364:364:364))
2954 (IOPATH datad regin (235:235:235) (235:235:235))
2959 (CELLTYPE "stratix_lcell_register")
2960 (INSTANCE \\vga_driver_unit\|v_sync_Z\\.lereg)
2963 (PORT aclr (668:668:668) (668:668:668))
2964 (PORT clk (2323:2323:2323) (2323:2323:2323))
2965 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2966 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2970 (SETUP datain (posedge clk) (10:10:10))
2971 (HOLD datain (posedge clk) (100:100:100))
2975 (CELLTYPE "stratix_asynch_lcell")
2976 (INSTANCE \\vga_driver_unit\|line_counter_next_0_sqmuxa_1_1_cZ\\.lecomb)
2979 (PORT dataa (4776:4776:4776) (4776:4776:4776))
2980 (PORT datab (1496:1496:1496) (1496:1496:1496))
2981 (PORT datac (490:490:490) (490:490:490))
2982 (PORT datad (660:660:660) (660:660:660))
2983 (IOPATH dataa combout (459:459:459) (459:459:459))
2984 (IOPATH datab combout (332:332:332) (332:332:332))
2985 (IOPATH datac combout (213:213:213) (213:213:213))
2986 (IOPATH datad combout (87:87:87) (87:87:87))
2991 (CELLTYPE "stratix_asynch_lcell")
2992 (INSTANCE \\vga_driver_unit\|un1_line_counter_sig_a_1_\\.lecomb)
2995 (PORT dataa (1009:1009:1009) (1009:1009:1009))
2996 (PORT datab (556:556:556) (556:556:556))
2997 (IOPATH dataa cout0 (443:443:443) (443:443:443))
2998 (IOPATH datab cout0 (344:344:344) (344:344:344))
2999 (IOPATH dataa cout1 (451:451:451) (451:451:451))
3000 (IOPATH datab cout1 (341:341:341) (341:341:341))
3005 (CELLTYPE "stratix_asynch_lcell")
3006 (INSTANCE \\vga_driver_unit\|un1_line_counter_sig_2_\\.lecomb)
3009 (PORT dataa (434:434:434) (434:434:434))
3010 (PORT datab (426:426:426) (426:426:426))
3011 (IOPATH dataa combout (459:459:459) (459:459:459))
3012 (IOPATH datab combout (332:332:332) (332:332:332))
3013 (IOPATH cin0 combout (432:432:432) (432:432:432))
3014 (IOPATH cin1 combout (449:449:449) (449:449:449))
3015 (IOPATH dataa cout0 (443:443:443) (443:443:443))
3016 (IOPATH datab cout0 (344:344:344) (344:344:344))
3017 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
3018 (IOPATH dataa cout1 (451:451:451) (451:451:451))
3019 (IOPATH datab cout1 (341:341:341) (341:341:341))
3020 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
3025 (CELLTYPE "stratix_asynch_lcell")
3026 (INSTANCE \\vga_driver_unit\|line_counter_sig_1_\\.lecomb)
3029 (PORT datac (614:614:614) (614:614:614))
3030 (PORT datad (355:355:355) (355:355:355))
3031 (IOPATH datac regin (364:364:364) (364:364:364))
3032 (IOPATH datad regin (235:235:235) (235:235:235))
3037 (CELLTYPE "stratix_lcell_register")
3038 (INSTANCE \\vga_driver_unit\|line_counter_sig_1_\\.lereg)
3041 (PORT sclr (1696:1696:1696) (1696:1696:1696))
3042 (PORT aclr (668:668:668) (668:668:668))
3043 (PORT clk (2323:2323:2323) (2323:2323:2323))
3044 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
3045 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
3049 (SETUP datain (posedge clk) (10:10:10))
3050 (SETUP sclr (posedge clk) (10:10:10))
3051 (HOLD datain (posedge clk) (100:100:100))
3052 (HOLD sclr (posedge clk) (100:100:100))
3056 (CELLTYPE "stratix_asynch_lcell")
3057 (INSTANCE \\vga_driver_unit\|un1_line_counter_sig_1_\\.lecomb)
3060 (PORT dataa (747:747:747) (747:747:747))
3061 (PORT datab (342:342:342) (342:342:342))
3062 (IOPATH dataa combout (459:459:459) (459:459:459))
3063 (IOPATH datab combout (332:332:332) (332:332:332))
3064 (IOPATH dataa cout0 (443:443:443) (443:443:443))
3065 (IOPATH datab cout0 (344:344:344) (344:344:344))
3066 (IOPATH dataa cout1 (451:451:451) (451:451:451))
3067 (IOPATH datab cout1 (341:341:341) (341:341:341))
3072 (CELLTYPE "stratix_asynch_lcell")
3073 (INSTANCE \\vga_driver_unit\|un1_line_counter_sig_3_\\.lecomb)
3076 (PORT dataa (664:664:664) (664:664:664))
3077 (PORT datab (695:695:695) (695:695:695))
3078 (IOPATH dataa combout (459:459:459) (459:459:459))
3079 (IOPATH datab combout (332:332:332) (332:332:332))
3080 (IOPATH cin0 combout (432:432:432) (432:432:432))
3081 (IOPATH cin1 combout (449:449:449) (449:449:449))
3082 (IOPATH dataa cout0 (443:443:443) (443:443:443))
3083 (IOPATH datab cout0 (344:344:344) (344:344:344))
3084 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
3085 (IOPATH dataa cout1 (451:451:451) (451:451:451))
3086 (IOPATH datab cout1 (341:341:341) (341:341:341))
3087 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
3092 (CELLTYPE "stratix_asynch_lcell")
3093 (INSTANCE \\vga_driver_unit\|line_counter_sig_2_\\.lecomb)
3096 (PORT datac (610:610:610) (610:610:610))
3097 (PORT datad (542:542:542) (542:542:542))
3098 (IOPATH datac regin (364:364:364) (364:364:364))
3099 (IOPATH datad regin (235:235:235) (235:235:235))
3104 (CELLTYPE "stratix_lcell_register")
3105 (INSTANCE \\vga_driver_unit\|line_counter_sig_2_\\.lereg)
3108 (PORT sclr (1696:1696:1696) (1696:1696:1696))
3109 (PORT aclr (668:668:668) (668:668:668))
3110 (PORT clk (2323:2323:2323) (2323:2323:2323))
3111 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
3112 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
3116 (SETUP datain (posedge clk) (10:10:10))
3117 (SETUP sclr (posedge clk) (10:10:10))
3118 (HOLD datain (posedge clk) (100:100:100))
3119 (HOLD sclr (posedge clk) (100:100:100))
3123 (CELLTYPE "stratix_asynch_lcell")
3124 (INSTANCE \\vga_driver_unit\|un1_line_counter_sig_4_\\.lecomb)
3127 (PORT dataa (646:646:646) (646:646:646))
3128 (PORT datab (631:631:631) (631:631:631))
3129 (IOPATH dataa combout (459:459:459) (459:459:459))
3130 (IOPATH datab combout (332:332:332) (332:332:332))
3131 (IOPATH cin0 combout (432:432:432) (432:432:432))
3132 (IOPATH cin1 combout (449:449:449) (449:449:449))
3133 (IOPATH dataa cout0 (443:443:443) (443:443:443))
3134 (IOPATH datab cout0 (344:344:344) (344:344:344))
3135 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
3136 (IOPATH dataa cout1 (451:451:451) (451:451:451))
3137 (IOPATH datab cout1 (341:341:341) (341:341:341))
3138 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
3143 (CELLTYPE "stratix_asynch_lcell")
3144 (INSTANCE \\vga_driver_unit\|line_counter_sig_3_\\.lecomb)
3147 (PORT datab (596:596:596) (596:596:596))
3148 (PORT datac (368:368:368) (368:368:368))
3149 (IOPATH datab regin (489:489:489) (489:489:489))
3150 (IOPATH datac regin (364:364:364) (364:364:364))
3155 (CELLTYPE "stratix_lcell_register")
3156 (INSTANCE \\vga_driver_unit\|line_counter_sig_3_\\.lereg)
3159 (PORT sclr (1696:1696:1696) (1696:1696:1696))
3160 (PORT aclr (668:668:668) (668:668:668))
3161 (PORT clk (2323:2323:2323) (2323:2323:2323))
3162 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
3163 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
3167 (SETUP datain (posedge clk) (10:10:10))
3168 (SETUP sclr (posedge clk) (10:10:10))
3169 (HOLD datain (posedge clk) (100:100:100))
3170 (HOLD sclr (posedge clk) (100:100:100))
3174 (CELLTYPE "stratix_asynch_lcell")
3175 (INSTANCE \\vga_driver_unit\|un1_line_counter_sig_5_\\.lecomb)
3178 (PORT dataa (678:678:678) (678:678:678))
3179 (PORT datab (679:679:679) (679:679:679))
3180 (IOPATH dataa combout (459:459:459) (459:459:459))
3181 (IOPATH datab combout (332:332:332) (332:332:332))
3182 (IOPATH cin0 combout (432:432:432) (432:432:432))
3183 (IOPATH cin1 combout (449:449:449) (449:449:449))
3184 (IOPATH dataa cout0 (443:443:443) (443:443:443))
3185 (IOPATH datab cout0 (344:344:344) (344:344:344))
3186 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
3187 (IOPATH dataa cout1 (451:451:451) (451:451:451))
3188 (IOPATH datab cout1 (341:341:341) (341:341:341))
3189 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
3194 (CELLTYPE "stratix_asynch_lcell")
3195 (INSTANCE \\vga_driver_unit\|line_counter_sig_4_\\.lecomb)
3198 (PORT datac (613:613:613) (613:613:613))
3199 (PORT datad (541:541:541) (541:541:541))
3200 (IOPATH datac regin (364:364:364) (364:364:364))
3201 (IOPATH datad regin (235:235:235) (235:235:235))
3206 (CELLTYPE "stratix_lcell_register")
3207 (INSTANCE \\vga_driver_unit\|line_counter_sig_4_\\.lereg)
3210 (PORT sclr (1696:1696:1696) (1696:1696:1696))
3211 (PORT aclr (668:668:668) (668:668:668))
3212 (PORT clk (2323:2323:2323) (2323:2323:2323))
3213 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
3214 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
3218 (SETUP datain (posedge clk) (10:10:10))
3219 (SETUP sclr (posedge clk) (10:10:10))
3220 (HOLD datain (posedge clk) (100:100:100))
3221 (HOLD sclr (posedge clk) (100:100:100))
3225 (CELLTYPE "stratix_asynch_lcell")
3226 (INSTANCE \\vga_driver_unit\|un1_line_counter_sig_6_\\.lecomb)
3229 (PORT dataa (646:646:646) (646:646:646))
3230 (PORT datab (942:942:942) (942:942:942))
3231 (IOPATH dataa combout (459:459:459) (459:459:459))
3232 (IOPATH datab combout (332:332:332) (332:332:332))
3233 (IOPATH cin0 combout (432:432:432) (432:432:432))
3234 (IOPATH cin1 combout (449:449:449) (449:449:449))
3235 (IOPATH dataa cout0 (443:443:443) (443:443:443))
3236 (IOPATH datab cout0 (344:344:344) (344:344:344))
3237 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
3238 (IOPATH dataa cout1 (451:451:451) (451:451:451))
3239 (IOPATH datab cout1 (341:341:341) (341:341:341))
3240 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
3245 (CELLTYPE "stratix_asynch_lcell")
3246 (INSTANCE \\vga_driver_unit\|line_counter_sig_5_\\.lecomb)
3249 (PORT dataa (353:353:353) (353:353:353))
3250 (PORT datac (928:928:928) (928:928:928))
3251 (PORT datad (837:837:837) (837:837:837))
3252 (IOPATH dataa regin (583:583:583) (583:583:583))
3253 (IOPATH datac regin (364:364:364) (364:364:364))
3254 (IOPATH datad regin (235:235:235) (235:235:235))
3259 (CELLTYPE "stratix_lcell_register")
3260 (INSTANCE \\vga_driver_unit\|line_counter_sig_5_\\.lereg)
3263 (PORT aclr (668:668:668) (668:668:668))
3264 (PORT clk (2323:2323:2323) (2323:2323:2323))
3265 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
3266 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
3270 (SETUP datain (posedge clk) (10:10:10))
3271 (HOLD datain (posedge clk) (100:100:100))
3275 (CELLTYPE "stratix_asynch_lcell")
3276 (INSTANCE \\vga_driver_unit\|un1_line_counter_sig_7_\\.lecomb)
3279 (PORT dataa (671:671:671) (671:671:671))
3280 (PORT datab (588:588:588) (588:588:588))
3281 (IOPATH dataa combout (459:459:459) (459:459:459))
3282 (IOPATH datab combout (332:332:332) (332:332:332))
3283 (IOPATH cin0 combout (432:432:432) (432:432:432))
3284 (IOPATH cin1 combout (449:449:449) (449:449:449))
3285 (IOPATH dataa cout0 (443:443:443) (443:443:443))
3286 (IOPATH datab cout0 (344:344:344) (344:344:344))
3287 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
3288 (IOPATH dataa cout1 (451:451:451) (451:451:451))
3289 (IOPATH datab cout1 (341:341:341) (341:341:341))
3290 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
3295 (CELLTYPE "stratix_asynch_lcell")
3296 (INSTANCE \\vga_driver_unit\|line_counter_sig_6_\\.lecomb)
3299 (PORT datac (540:540:540) (540:540:540))
3300 (PORT datad (572:572:572) (572:572:572))
3301 (IOPATH datac regin (364:364:364) (364:364:364))
3302 (IOPATH datad regin (235:235:235) (235:235:235))
3307 (CELLTYPE "stratix_lcell_register")
3308 (INSTANCE \\vga_driver_unit\|line_counter_sig_6_\\.lereg)
3311 (PORT sclr (1689:1689:1689) (1689:1689:1689))
3312 (PORT aclr (668:668:668) (668:668:668))
3313 (PORT clk (2323:2323:2323) (2323:2323:2323))
3314 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
3315 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
3319 (SETUP datain (posedge clk) (10:10:10))
3320 (SETUP sclr (posedge clk) (10:10:10))
3321 (HOLD datain (posedge clk) (100:100:100))
3322 (HOLD sclr (posedge clk) (100:100:100))
3326 (CELLTYPE "stratix_asynch_lcell")
3327 (INSTANCE \\vga_driver_unit\|LINE_COUNT_next_un10_line_counter_siglt4_2\\.lecomb)
3330 (PORT dataa (682:682:682) (682:682:682))
3331 (PORT datab (681:681:681) (681:681:681))
3332 (PORT datad (999:999:999) (999:999:999))
3333 (IOPATH dataa combout (459:459:459) (459:459:459))
3334 (IOPATH datab combout (332:332:332) (332:332:332))
3335 (IOPATH datad combout (87:87:87) (87:87:87))
3340 (CELLTYPE "stratix_asynch_lcell")
3341 (INSTANCE \\vga_driver_unit\|LINE_COUNT_next_un10_line_counter_siglto5\\.lecomb)
3344 (PORT dataa (668:668:668) (668:668:668))
3345 (PORT datab (702:702:702) (702:702:702))
3346 (PORT datac (437:437:437) (437:437:437))
3347 (PORT datad (139:139:139) (139:139:139))
3348 (IOPATH dataa combout (459:459:459) (459:459:459))
3349 (IOPATH datab combout (332:332:332) (332:332:332))
3350 (IOPATH datac combout (213:213:213) (213:213:213))
3351 (IOPATH datad combout (87:87:87) (87:87:87))
3356 (CELLTYPE "stratix_asynch_lcell")
3357 (INSTANCE \\vga_driver_unit\|un1_line_counter_sig_8_\\.lecomb)
3360 (PORT dataa (436:436:436) (436:436:436))
3361 (IOPATH dataa combout (459:459:459) (459:459:459))
3362 (IOPATH cin0 combout (432:432:432) (432:432:432))
3363 (IOPATH cin1 combout (449:449:449) (449:449:449))
3368 (CELLTYPE "stratix_asynch_lcell")
3369 (INSTANCE \\vga_driver_unit\|line_counter_sig_7_\\.lecomb)
3372 (PORT datac (611:611:611) (611:611:611))
3373 (PORT datad (352:352:352) (352:352:352))
3374 (IOPATH datac regin (364:364:364) (364:364:364))
3375 (IOPATH datad regin (235:235:235) (235:235:235))
3380 (CELLTYPE "stratix_lcell_register")
3381 (INSTANCE \\vga_driver_unit\|line_counter_sig_7_\\.lereg)
3384 (PORT sclr (1696:1696:1696) (1696:1696:1696))
3385 (PORT aclr (668:668:668) (668:668:668))
3386 (PORT clk (2323:2323:2323) (2323:2323:2323))
3387 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
3388 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
3392 (SETUP datain (posedge clk) (10:10:10))
3393 (SETUP sclr (posedge clk) (10:10:10))
3394 (HOLD datain (posedge clk) (100:100:100))
3395 (HOLD sclr (posedge clk) (100:100:100))
3399 (CELLTYPE "stratix_asynch_lcell")
3400 (INSTANCE \\vga_driver_unit\|un1_line_counter_sig_9_\\.lecomb)
3403 (PORT datab (636:636:636) (636:636:636))
3404 (PORT datad (660:660:660) (660:660:660))
3405 (IOPATH datab combout (332:332:332) (332:332:332))
3406 (IOPATH datad combout (87:87:87) (87:87:87))
3407 (IOPATH cin0 combout (432:432:432) (432:432:432))
3408 (IOPATH cin1 combout (449:449:449) (449:449:449))
3413 (CELLTYPE "stratix_asynch_lcell")
3414 (INSTANCE \\vga_driver_unit\|line_counter_sig_8_\\.lecomb)
3417 (PORT datab (565:565:565) (565:565:565))
3418 (PORT datad (538:538:538) (538:538:538))
3419 (IOPATH datab regin (489:489:489) (489:489:489))
3420 (IOPATH datad regin (235:235:235) (235:235:235))
3425 (CELLTYPE "stratix_lcell_register")
3426 (INSTANCE \\vga_driver_unit\|line_counter_sig_8_\\.lereg)
3429 (PORT sclr (1689:1689:1689) (1689:1689:1689))
3430 (PORT aclr (668:668:668) (668:668:668))
3431 (PORT clk (2323:2323:2323) (2323:2323:2323))
3432 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
3433 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
3437 (SETUP datain (posedge clk) (10:10:10))
3438 (SETUP sclr (posedge clk) (10:10:10))
3439 (HOLD datain (posedge clk) (100:100:100))
3440 (HOLD sclr (posedge clk) (100:100:100))
3444 (CELLTYPE "stratix_asynch_lcell")
3445 (INSTANCE \\vga_driver_unit\|LINE_COUNT_next_un10_line_counter_siglto8\\.lecomb)
3448 (PORT dataa (674:674:674) (674:674:674))
3449 (PORT datab (341:341:341) (341:341:341))
3450 (PORT datac (653:653:653) (653:653:653))
3451 (PORT datad (662:662:662) (662:662:662))
3452 (IOPATH dataa combout (459:459:459) (459:459:459))
3453 (IOPATH datab combout (332:332:332) (332:332:332))
3454 (IOPATH datac combout (213:213:213) (213:213:213))
3455 (IOPATH datad combout (87:87:87) (87:87:87))
3460 (CELLTYPE "stratix_asynch_lcell")
3461 (INSTANCE \\vga_driver_unit\|line_counter_sig_0_\\.lecomb)
3464 (PORT datab (557:557:557) (557:557:557))
3465 (PORT datad (533:533:533) (533:533:533))
3466 (IOPATH datab regin (489:489:489) (489:489:489))
3467 (IOPATH datad regin (235:235:235) (235:235:235))
3472 (CELLTYPE "stratix_lcell_register")
3473 (INSTANCE \\vga_driver_unit\|line_counter_sig_0_\\.lereg)
3476 (PORT sclr (1689:1689:1689) (1689:1689:1689))
3477 (PORT aclr (668:668:668) (668:668:668))
3478 (PORT clk (2323:2323:2323) (2323:2323:2323))
3479 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
3480 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
3484 (SETUP datain (posedge clk) (10:10:10))
3485 (SETUP sclr (posedge clk) (10:10:10))
3486 (HOLD datain (posedge clk) (100:100:100))
3487 (HOLD sclr (posedge clk) (100:100:100))
3491 (CELLTYPE "stratix_asynch_io")
3492 (INSTANCE r0_pin_out.inst1)
3495 (PORT datain (4282:4282:4282) (4282:4282:4282))
3496 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3501 (CELLTYPE "stratix_asynch_io")
3502 (INSTANCE r1_pin_out.inst1)
3505 (PORT datain (4282:4282:4282) (4282:4282:4282))
3506 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3511 (CELLTYPE "stratix_asynch_io")
3512 (INSTANCE r2_pin_out.inst1)
3515 (PORT datain (4282:4282:4282) (4282:4282:4282))
3516 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3521 (CELLTYPE "stratix_asynch_io")
3522 (INSTANCE g0_pin_out.inst1)
3525 (PORT datain (2951:2951:2951) (2951:2951:2951))
3526 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3531 (CELLTYPE "stratix_asynch_io")
3532 (INSTANCE g1_pin_out.inst1)
3535 (PORT datain (2951:2951:2951) (2951:2951:2951))
3536 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3541 (CELLTYPE "stratix_asynch_io")
3542 (INSTANCE g2_pin_out.inst1)
3545 (PORT datain (2951:2951:2951) (2951:2951:2951))
3546 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3551 (CELLTYPE "stratix_asynch_io")
3552 (INSTANCE b0_pin_out.inst1)
3555 (PORT datain (2828:2828:2828) (2828:2828:2828))
3556 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3561 (CELLTYPE "stratix_asynch_io")
3562 (INSTANCE b1_pin_out.inst1)
3565 (PORT datain (2828:2828:2828) (2828:2828:2828))
3566 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3571 (CELLTYPE "stratix_asynch_io")
3572 (INSTANCE hsync_pin_out.inst1)
3575 (PORT datain (2955:2955:2955) (2955:2955:2955))
3576 (IOPATH datain padio (2801:2801:2801) (2801:2801:2801))
3581 (CELLTYPE "stratix_asynch_io")
3582 (INSTANCE vsync_pin_out.inst1)
3585 (PORT datain (2606:2606:2606) (2606:2606:2606))
3586 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
3591 (CELLTYPE "stratix_asynch_io")
3592 (INSTANCE \\seven_seg_pin_tri_0_\\.inst1)
3595 (PORT datain (1363:1363:1363) (1363:1363:1363))
3596 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3601 (CELLTYPE "stratix_asynch_io")
3602 (INSTANCE \\seven_seg_pin_out_1_\\.inst1)
3605 (PORT datain (4309:4309:4309) (4309:4309:4309))
3606 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
3611 (CELLTYPE "stratix_asynch_io")
3612 (INSTANCE \\seven_seg_pin_out_2_\\.inst1)
3615 (PORT datain (3697:3697:3697) (3697:3697:3697))
3616 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
3621 (CELLTYPE "stratix_asynch_io")
3622 (INSTANCE \\seven_seg_pin_tri_3_\\.inst1)
3625 (PORT datain (1273:1273:1273) (1273:1273:1273))
3626 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3631 (CELLTYPE "stratix_asynch_io")
3632 (INSTANCE \\seven_seg_pin_tri_4_\\.inst1)
3635 (PORT datain (1273:1273:1273) (1273:1273:1273))
3636 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3641 (CELLTYPE "stratix_asynch_io")
3642 (INSTANCE \\seven_seg_pin_tri_5_\\.inst1)
3645 (PORT datain (1363:1363:1363) (1363:1363:1363))
3646 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3651 (CELLTYPE "stratix_asynch_io")
3652 (INSTANCE \\seven_seg_pin_tri_6_\\.inst1)
3655 (PORT datain (1363:1363:1363) (1363:1363:1363))
3656 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3661 (CELLTYPE "stratix_asynch_io")
3662 (INSTANCE \\seven_seg_pin_out_7_\\.inst1)
3665 (PORT datain (3254:3254:3254) (3254:3254:3254))
3666 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
3671 (CELLTYPE "stratix_asynch_io")
3672 (INSTANCE \\seven_seg_pin_out_8_\\.inst1)
3675 (PORT datain (3254:3254:3254) (3254:3254:3254))
3676 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
3681 (CELLTYPE "stratix_asynch_io")
3682 (INSTANCE \\seven_seg_pin_out_9_\\.inst1)
3685 (PORT datain (3697:3697:3697) (3697:3697:3697))
3686 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
3691 (CELLTYPE "stratix_asynch_io")
3692 (INSTANCE \\seven_seg_pin_out_10_\\.inst1)
3695 (PORT datain (3842:3842:3842) (3842:3842:3842))
3696 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
3701 (CELLTYPE "stratix_asynch_io")
3702 (INSTANCE \\seven_seg_pin_out_11_\\.inst1)
3705 (PORT datain (3830:3830:3830) (3830:3830:3830))
3706 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
3711 (CELLTYPE "stratix_asynch_io")
3712 (INSTANCE \\seven_seg_pin_out_12_\\.inst1)
3715 (PORT datain (3254:3254:3254) (3254:3254:3254))
3716 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
3721 (CELLTYPE "stratix_asynch_io")
3722 (INSTANCE \\seven_seg_pin_tri_13_\\.inst1)
3725 (PORT datain (1363:1363:1363) (1363:1363:1363))
3726 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3731 (CELLTYPE "stratix_asynch_io")
3732 (INSTANCE d_hsync_out.inst1)
3735 (PORT datain (2955:2955:2955) (2955:2955:2955))
3736 (IOPATH datain padio (2801:2801:2801) (2801:2801:2801))
3741 (CELLTYPE "stratix_asynch_io")
3742 (INSTANCE d_vsync_out.inst1)
3745 (PORT datain (2606:2606:2606) (2606:2606:2606))
3746 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
3751 (CELLTYPE "stratix_asynch_io")
3752 (INSTANCE \\d_column_counter_out_0_\\.inst1)
3755 (PORT datain (2176:2176:2176) (2176:2176:2176))
3756 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
3761 (CELLTYPE "stratix_asynch_io")
3762 (INSTANCE \\d_column_counter_out_1_\\.inst1)
3765 (PORT datain (1905:1905:1905) (1905:1905:1905))
3766 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
3771 (CELLTYPE "stratix_asynch_io")
3772 (INSTANCE \\d_column_counter_out_2_\\.inst1)
3775 (PORT datain (2327:2327:2327) (2327:2327:2327))
3776 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
3781 (CELLTYPE "stratix_asynch_io")
3782 (INSTANCE \\d_column_counter_out_3_\\.inst1)
3785 (PORT datain (2207:2207:2207) (2207:2207:2207))
3786 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3791 (CELLTYPE "stratix_asynch_io")
3792 (INSTANCE \\d_column_counter_out_4_\\.inst1)
3795 (PORT datain (2378:2378:2378) (2378:2378:2378))
3796 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3801 (CELLTYPE "stratix_asynch_io")
3802 (INSTANCE \\d_column_counter_out_5_\\.inst1)
3805 (PORT datain (3095:3095:3095) (3095:3095:3095))
3806 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3811 (CELLTYPE "stratix_asynch_io")
3812 (INSTANCE \\d_column_counter_out_6_\\.inst1)
3815 (PORT datain (1888:1888:1888) (1888:1888:1888))
3816 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3821 (CELLTYPE "stratix_asynch_io")
3822 (INSTANCE \\d_column_counter_out_7_\\.inst1)
3825 (PORT datain (3062:3062:3062) (3062:3062:3062))
3826 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3831 (CELLTYPE "stratix_asynch_io")
3832 (INSTANCE \\d_column_counter_out_8_\\.inst1)
3835 (PORT datain (1984:1984:1984) (1984:1984:1984))
3836 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3841 (CELLTYPE "stratix_asynch_io")
3842 (INSTANCE \\d_column_counter_out_9_\\.inst1)
3845 (PORT datain (2982:2982:2982) (2982:2982:2982))
3846 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3851 (CELLTYPE "stratix_asynch_io")
3852 (INSTANCE \\d_line_counter_out_0_\\.inst1)
3855 (PORT datain (2120:2120:2120) (2120:2120:2120))
3856 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3861 (CELLTYPE "stratix_asynch_io")
3862 (INSTANCE \\d_line_counter_out_1_\\.inst1)
3865 (PORT datain (1873:1873:1873) (1873:1873:1873))
3866 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
3871 (CELLTYPE "stratix_asynch_io")
3872 (INSTANCE \\d_line_counter_out_2_\\.inst1)
3875 (PORT datain (2469:2469:2469) (2469:2469:2469))
3876 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3881 (CELLTYPE "stratix_asynch_io")
3882 (INSTANCE \\d_line_counter_out_3_\\.inst1)
3885 (PORT datain (2149:2149:2149) (2149:2149:2149))
3886 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
3891 (CELLTYPE "stratix_asynch_io")
3892 (INSTANCE \\d_line_counter_out_4_\\.inst1)
3895 (PORT datain (1892:1892:1892) (1892:1892:1892))
3896 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
3901 (CELLTYPE "stratix_asynch_io")
3902 (INSTANCE \\d_line_counter_out_5_\\.inst1)
3905 (PORT datain (2139:2139:2139) (2139:2139:2139))
3906 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3911 (CELLTYPE "stratix_asynch_io")
3912 (INSTANCE \\d_line_counter_out_6_\\.inst1)
3915 (PORT datain (2130:2130:2130) (2130:2130:2130))
3916 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3921 (CELLTYPE "stratix_asynch_io")
3922 (INSTANCE \\d_line_counter_out_7_\\.inst1)
3925 (PORT datain (2400:2400:2400) (2400:2400:2400))
3926 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3931 (CELLTYPE "stratix_asynch_io")
3932 (INSTANCE \\d_line_counter_out_8_\\.inst1)
3935 (PORT datain (2376:2376:2376) (2376:2376:2376))
3936 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3941 (CELLTYPE "stratix_asynch_io")
3942 (INSTANCE d_set_column_counter_out.inst1)
3945 (PORT datain (3450:3450:3450) (3450:3450:3450))
3946 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3951 (CELLTYPE "stratix_asynch_io")
3952 (INSTANCE d_set_line_counter_out.inst1)
3955 (PORT datain (2524:2524:2524) (2524:2524:2524))
3956 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3961 (CELLTYPE "stratix_asynch_io")
3962 (INSTANCE \\d_hsync_counter_out_0_\\.inst1)
3965 (PORT datain (2189:2189:2189) (2189:2189:2189))
3966 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
3971 (CELLTYPE "stratix_asynch_io")
3972 (INSTANCE \\d_hsync_counter_out_1_\\.inst1)
3975 (PORT datain (2078:2078:2078) (2078:2078:2078))
3976 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
3981 (CELLTYPE "stratix_asynch_io")
3982 (INSTANCE \\d_hsync_counter_out_2_\\.inst1)
3985 (PORT datain (2133:2133:2133) (2133:2133:2133))
3986 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
3991 (CELLTYPE "stratix_asynch_io")
3992 (INSTANCE \\d_hsync_counter_out_3_\\.inst1)
3995 (PORT datain (2126:2126:2126) (2126:2126:2126))
3996 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4001 (CELLTYPE "stratix_asynch_io")
4002 (INSTANCE \\d_hsync_counter_out_4_\\.inst1)
4005 (PORT datain (2313:2313:2313) (2313:2313:2313))
4006 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4011 (CELLTYPE "stratix_asynch_io")
4012 (INSTANCE \\d_hsync_counter_out_5_\\.inst1)
4015 (PORT datain (2116:2116:2116) (2116:2116:2116))
4016 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4021 (CELLTYPE "stratix_asynch_io")
4022 (INSTANCE \\d_hsync_counter_out_6_\\.inst1)
4025 (PORT datain (2128:2128:2128) (2128:2128:2128))
4026 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4031 (CELLTYPE "stratix_asynch_io")
4032 (INSTANCE \\d_hsync_counter_out_7_\\.inst1)
4035 (PORT datain (2167:2167:2167) (2167:2167:2167))
4036 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4041 (CELLTYPE "stratix_asynch_io")
4042 (INSTANCE \\d_hsync_counter_out_8_\\.inst1)
4045 (PORT datain (2171:2171:2171) (2171:2171:2171))
4046 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4051 (CELLTYPE "stratix_asynch_io")
4052 (INSTANCE \\d_hsync_counter_out_9_\\.inst1)
4055 (PORT datain (2340:2340:2340) (2340:2340:2340))
4056 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4061 (CELLTYPE "stratix_asynch_io")
4062 (INSTANCE \\d_vsync_counter_out_0_\\.inst1)
4065 (PORT datain (2402:2402:2402) (2402:2402:2402))
4066 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4071 (CELLTYPE "stratix_asynch_io")
4072 (INSTANCE \\d_vsync_counter_out_1_\\.inst1)
4075 (PORT datain (2446:2446:2446) (2446:2446:2446))
4076 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4081 (CELLTYPE "stratix_asynch_io")
4082 (INSTANCE \\d_vsync_counter_out_2_\\.inst1)
4085 (PORT datain (2471:2471:2471) (2471:2471:2471))
4086 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4091 (CELLTYPE "stratix_asynch_io")
4092 (INSTANCE \\d_vsync_counter_out_3_\\.inst1)
4095 (PORT datain (2446:2446:2446) (2446:2446:2446))
4096 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4101 (CELLTYPE "stratix_asynch_io")
4102 (INSTANCE \\d_vsync_counter_out_4_\\.inst1)
4105 (PORT datain (2469:2469:2469) (2469:2469:2469))
4106 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4111 (CELLTYPE "stratix_asynch_io")
4112 (INSTANCE \\d_vsync_counter_out_5_\\.inst1)
4115 (PORT datain (1665:1665:1665) (1665:1665:1665))
4116 (IOPATH datain padio (2801:2801:2801) (2801:2801:2801))
4121 (CELLTYPE "stratix_asynch_io")
4122 (INSTANCE \\d_vsync_counter_out_6_\\.inst1)
4125 (PORT datain (2212:2212:2212) (2212:2212:2212))
4126 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4131 (CELLTYPE "stratix_asynch_io")
4132 (INSTANCE \\d_vsync_counter_out_7_\\.inst1)
4135 (PORT datain (2397:2397:2397) (2397:2397:2397))
4136 (IOPATH datain padio (2801:2801:2801) (2801:2801:2801))
4141 (CELLTYPE "stratix_asynch_io")
4142 (INSTANCE \\d_vsync_counter_out_8_\\.inst1)
4145 (PORT datain (2401:2401:2401) (2401:2401:2401))
4146 (IOPATH datain padio (2801:2801:2801) (2801:2801:2801))
4151 (CELLTYPE "stratix_asynch_io")
4152 (INSTANCE \\d_vsync_counter_out_9_\\.inst1)
4155 (PORT datain (2394:2394:2394) (2394:2394:2394))
4156 (IOPATH datain padio (2801:2801:2801) (2801:2801:2801))
4161 (CELLTYPE "stratix_asynch_io")
4162 (INSTANCE d_set_hsync_counter_out.inst1)
4165 (PORT datain (2047:2047:2047) (2047:2047:2047))
4166 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4171 (CELLTYPE "stratix_asynch_io")
4172 (INSTANCE d_set_vsync_counter_out.inst1)
4175 (PORT datain (2911:2911:2911) (2911:2911:2911))
4176 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4181 (CELLTYPE "stratix_asynch_io")
4182 (INSTANCE d_h_enable_out.inst1)
4185 (PORT datain (2355:2355:2355) (2355:2355:2355))
4186 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4191 (CELLTYPE "stratix_asynch_io")
4192 (INSTANCE d_v_enable_out.inst1)
4195 (PORT datain (2730:2730:2730) (2730:2730:2730))
4196 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4201 (CELLTYPE "stratix_asynch_io")
4202 (INSTANCE d_r_out.inst1)
4205 (PORT datain (4250:4250:4250) (4250:4250:4250))
4206 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4211 (CELLTYPE "stratix_asynch_io")
4212 (INSTANCE d_g_out.inst1)
4215 (PORT datain (2951:2951:2951) (2951:2951:2951))
4216 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4221 (CELLTYPE "stratix_asynch_io")
4222 (INSTANCE d_b_out.inst1)
4225 (PORT datain (2828:2828:2828) (2828:2828:2828))
4226 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4231 (CELLTYPE "stratix_asynch_io")
4232 (INSTANCE \\d_hsync_state_out_6_\\.inst1)
4235 (PORT datain (3434:3434:3434) (3434:3434:3434))
4236 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4241 (CELLTYPE "stratix_asynch_io")
4242 (INSTANCE \\d_hsync_state_out_5_\\.inst1)
4245 (PORT datain (2465:2465:2465) (2465:2465:2465))
4246 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4251 (CELLTYPE "stratix_asynch_io")
4252 (INSTANCE \\d_hsync_state_out_4_\\.inst1)
4255 (PORT datain (2351:2351:2351) (2351:2351:2351))
4256 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4261 (CELLTYPE "stratix_asynch_io")
4262 (INSTANCE \\d_hsync_state_out_3_\\.inst1)
4265 (PORT datain (2196:2196:2196) (2196:2196:2196))
4266 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4271 (CELLTYPE "stratix_asynch_io")
4272 (INSTANCE \\d_hsync_state_out_2_\\.inst1)
4275 (PORT datain (2188:2188:2188) (2188:2188:2188))
4276 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4281 (CELLTYPE "stratix_asynch_io")
4282 (INSTANCE \\d_hsync_state_out_1_\\.inst1)
4285 (PORT datain (3450:3450:3450) (3450:3450:3450))
4286 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4291 (CELLTYPE "stratix_asynch_io")
4292 (INSTANCE \\d_hsync_state_out_0_\\.inst1)
4295 (PORT datain (2303:2303:2303) (2303:2303:2303))
4296 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4301 (CELLTYPE "stratix_asynch_io")
4302 (INSTANCE \\d_vsync_state_out_6_\\.inst1)
4305 (PORT datain (2148:2148:2148) (2148:2148:2148))
4306 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4311 (CELLTYPE "stratix_asynch_io")
4312 (INSTANCE \\d_vsync_state_out_5_\\.inst1)
4315 (PORT datain (2482:2482:2482) (2482:2482:2482))
4316 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4321 (CELLTYPE "stratix_asynch_io")
4322 (INSTANCE \\d_vsync_state_out_4_\\.inst1)
4325 (PORT datain (2399:2399:2399) (2399:2399:2399))
4326 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4331 (CELLTYPE "stratix_asynch_io")
4332 (INSTANCE \\d_vsync_state_out_3_\\.inst1)
4335 (PORT datain (3927:3927:3927) (3927:3927:3927))
4336 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4341 (CELLTYPE "stratix_asynch_io")
4342 (INSTANCE \\d_vsync_state_out_2_\\.inst1)
4345 (PORT datain (2404:2404:2404) (2404:2404:2404))
4346 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4351 (CELLTYPE "stratix_asynch_io")
4352 (INSTANCE \\d_vsync_state_out_1_\\.inst1)
4355 (PORT datain (2524:2524:2524) (2524:2524:2524))
4356 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4361 (CELLTYPE "stratix_asynch_io")
4362 (INSTANCE \\d_vsync_state_out_0_\\.inst1)
4365 (PORT datain (3107:3107:3107) (3107:3107:3107))
4366 (IOPATH datain padio (2801:2801:2801) (2801:2801:2801))
4371 (CELLTYPE "stratix_asynch_io")
4372 (INSTANCE d_state_clk_out.inst1)
4375 (PORT datain (2588:2588:2588) (2588:2588:2588))
4376 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))