bsp3/Designflow/ppr/download/simulation/modelsim/vga_pll.vo

   1 // Copyright (C) 1991-2009 Altera Corporation
   2 // Your use of Altera Corporation's design tools, logic functions
   3 // and other software and tools, and its AMPP partner logic
   4 // functions, and any output files from any of the foregoing
   5 // (including device programming or simulation files), and any
   6 // associated documentation or information are expressly subject
   7 // to the terms and conditions of the Altera Program License
   8 // Subscription Agreement, Altera MegaCore Function License
   9 // Agreement, or other applicable license agreement, including,
  10 // without limitation, that your use is for the sole purpose of
  11 // programming logic devices manufactured by Altera and sold by
  12 // Altera or its authorized distributors.  Please refer to the
  13 // applicable agreement for further details.
  14
  15 // VENDOR "Altera"
  16 // PROGRAM "Quartus II"
  17 // VERSION "Version 9.0 Build 132 02/25/2009 SJ Full Version"
  18
  19 // DATE "10/29/2009 17:13:31"
  20
  21 //
  22 // Device: Altera EP1S25F672C6 Package FBGA672
  23 //
  24
  25 //
  26 // This Verilog file should be used for ModelSim-Altera (Verilog) only
  27 //
  28
  29 `timescale 1 ps/ 1 ps
  30
  31 module vga_pll (
  32         d_hsync,
  33         board_clk,
  34         reset,
  35         d_vsync,
  36         d_set_column_counter,
  37         d_set_line_counter,
  38         d_set_hsync_counter,
  39         d_set_vsync_counter,
  40         d_r,
  41         d_g,
  42         d_b,
  43         d_h_enable,
  44         d_v_enable,
  45         d_state_clk,
  46         r0_pin,
  47         r1_pin,
  48         r2_pin,
  49         g0_pin,
  50         g1_pin,
  51         g2_pin,
  52         b0_pin,
  53         b1_pin,
  54         hsync_pin,
  55         vsync_pin,
  56         d_column_counter,
  57         d_hsync_counter,
  58         d_hsync_state,
  59         d_line_counter,
  60         d_vsync_counter,
  61         d_vsync_state,
  62         seven_seg_pin);
  63 output  d_hsync;
  64 input   board_clk;
  65 input   reset;
  66 output  d_vsync;
  67 output  d_set_column_counter;
  68 output  d_set_line_counter;
  69 output  d_set_hsync_counter;
  70 output  d_set_vsync_counter;
  71 output  d_r;
  72 output  d_g;
  73 output  d_b;
  74 output  d_h_enable;
  75 output  d_v_enable;
  76 output  d_state_clk;
  77 output  r0_pin;
  78 output  r1_pin;
  79 output  r2_pin;
  80 output  g0_pin;
  81 output  g1_pin;
  82 output  g2_pin;
  83 output  b0_pin;
  84 output  b1_pin;
  85 output  hsync_pin;
  86 output  vsync_pin;
  87 output  [9:0] d_column_counter;
  88 output  [9:0] d_hsync_counter;
  89 output  [0:6] d_hsync_state;
  90 output  [8:0] d_line_counter;
  91 output  [9:0] d_vsync_counter;
  92 output  [0:6] d_vsync_state;
  93 output  [13:0] seven_seg_pin;
  94
  95 wire gnd = 1'b0;
  96 wire vcc = 1'b1;
  97
  98 tri1 devclrn;
  99 tri1 devpor;
 100 tri1 devoe;
 101 // synopsys translate_off
 102 initial $sdf_annotate("vga_pll_v.sdo");
 103 // synopsys translate_on
 104
 105 wire \inst1|altpll_component|pll~CLK1 ;
 106 wire \inst1|altpll_component|pll~CLK2 ;
 107 wire \inst1|altpll_component|pll~CLK3 ;
 108 wire \inst1|altpll_component|pll~CLK4 ;
 109 wire \inst1|altpll_component|pll~CLK5 ;
 110 wire \inst|vga_driver_unit|un2_column_counter_next_0_~COMBOUT ;
 111 wire \inst|vga_driver_unit|un1_line_counter_sig_a_1_~COMBOUT ;
 112 wire \board_clk~combout ;
 113 wire \inst1|altpll_component|_clk0 ;
 114 wire \reset~combout ;
 115 wire \inst|vga_driver_unit|un6_dly_counter_0_x ;
 116 wire \inst|vga_driver_unit|hsync_state_6 ;
 117 wire \inst|vga_driver_unit|hsync_counter_cout[0]~COUT1_10 ;
 118 wire \inst|vga_driver_unit|hsync_counter_1 ;
 119 wire \inst|vga_driver_unit|hsync_counter_cout[1]~COUT1_12 ;
 120 wire \inst|vga_driver_unit|hsync_counter_2 ;
 121 wire \inst|vga_driver_unit|hsync_counter_cout[2]~COUT1_14 ;
 122 wire \inst|vga_driver_unit|hsync_counter_3 ;
 123 wire \inst|vga_driver_unit|hsync_counter_cout[3]~COUT1_16 ;
 124 wire \inst|vga_driver_unit|hsync_counter_5 ;
 125 wire \inst|vga_driver_unit|un13_hsync_counter_7 ;
 126 wire \inst|vga_driver_unit|hsync_counter_cout[5]~COUT1_18 ;
 127 wire \inst|vga_driver_unit|hsync_counter_6 ;
 128 wire \inst|vga_driver_unit|hsync_counter_cout[6]~COUT1_20 ;
 129 wire \inst|vga_driver_unit|hsync_counter_7 ;
 130 wire \inst|vga_driver_unit|hsync_counter_cout[7]~COUT1_22 ;
 131 wire \inst|vga_driver_unit|hsync_counter_8 ;
 132 wire \inst|vga_driver_unit|hsync_counter_cout[8]~COUT1_24 ;
 133 wire \inst|vga_driver_unit|hsync_counter_9 ;
 134 wire \inst|vga_driver_unit|un9_hsync_counterlt9_3 ;
 135 wire \inst|vga_driver_unit|un9_hsync_counterlt9 ;
 136 wire \inst|vga_driver_unit|G_2_i ;
 137 wire \inst|vga_driver_unit|hsync_counter_0 ;
 138 wire \inst|vga_driver_unit|un12_hsync_counter_3 ;
 139 wire \inst|vga_driver_unit|un12_hsync_counter_4 ;
 140 wire \inst|vga_driver_unit|un12_hsync_counter ;
 141 wire \inst|vga_driver_unit|un10_hsync_counter_1 ;
 142 wire \inst|vga_driver_unit|un11_hsync_counter_3 ;
 143 wire \inst|vga_driver_unit|un11_hsync_counter_2 ;
 144 wire \inst|vga_driver_unit|un10_hsync_counter_4 ;
 145 wire \inst|vga_driver_unit|un10_hsync_counter_3 ;
 146 wire \inst|vga_driver_unit|hsync_state_5 ;
 147 wire \inst|vga_driver_unit|hsync_state_4 ;
 148 wire \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2 ;
 149 wire \inst|vga_driver_unit|hsync_state_1 ;
 150 wire \inst|vga_driver_unit|un1_hsync_state_next_1_sqmuxa_0 ;
 151 wire \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1 ;
 152 wire \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 ;
 153 wire \inst|vga_driver_unit|hsync_state_2 ;
 154 wire \inst|vga_driver_unit|hsync_state_0 ;
 155 wire \inst|vga_driver_unit|d_set_hsync_counter ;
 156 wire \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ;
 157 wire \inst|vga_driver_unit|hsync_counter_4 ;
 158 wire \inst|vga_driver_unit|un13_hsync_counter_2 ;
 159 wire \inst|vga_driver_unit|un13_hsync_counter ;
 160 wire \inst|vga_driver_unit|hsync_state_3 ;
 161 wire \inst|vga_driver_unit|un1_hsync_state_3_0 ;
 162 wire \inst|vga_driver_unit|h_sync_1_0_0_0_g1 ;
 163 wire \inst|vga_driver_unit|h_sync ;
 164 wire \inst|vga_driver_unit|vsync_state_6 ;
 165 wire \inst|vga_driver_unit|vsync_counter_0 ;
 166 wire \inst|vga_driver_unit|vsync_counter_cout[0]~COUT1_10 ;
 167 wire \inst|vga_driver_unit|vsync_counter_1 ;
 168 wire \inst|vga_driver_unit|vsync_counter_cout[1]~COUT1_12 ;
 169 wire \inst|vga_driver_unit|vsync_counter_2 ;
 170 wire \inst|vga_driver_unit|vsync_counter_cout[2]~COUT1_14 ;
 171 wire \inst|vga_driver_unit|vsync_counter_3 ;
 172 wire \inst|vga_driver_unit|vsync_counter_cout[3]~COUT1_16 ;
 173 wire \inst|vga_driver_unit|vsync_counter_4 ;
 174 wire \inst|vga_driver_unit|vsync_counter_5 ;
 175 wire \inst|vga_driver_unit|vsync_counter_cout[5]~COUT1_18 ;
 176 wire \inst|vga_driver_unit|vsync_counter_6 ;
 177 wire \inst|vga_driver_unit|vsync_counter_cout[6]~COUT1_20 ;
 178 wire \inst|vga_driver_unit|vsync_counter_cout[7]~COUT1_22 ;
 179 wire \inst|vga_driver_unit|vsync_counter_8 ;
 180 wire \inst|vga_driver_unit|un9_vsync_counterlt9_5 ;
 181 wire \inst|vga_driver_unit|un9_vsync_counterlt9_6 ;
 182 wire \inst|vga_driver_unit|un9_vsync_counterlt9 ;
 183 wire \inst|vga_driver_unit|G_16_i ;
 184 wire \inst|vga_driver_unit|vsync_counter_7 ;
 185 wire \inst|vga_driver_unit|un12_vsync_counter_6 ;
 186 wire \inst|vga_driver_unit|un12_vsync_counter_7 ;
 187 wire \inst|vga_driver_unit|un14_vsync_counter_8 ;
 188 wire \inst|vga_driver_unit|un13_vsync_counter_3 ;
 189 wire \inst|vga_driver_unit|un13_vsync_counter_4 ;
 190 wire \inst|vga_driver_unit|vsync_state_1 ;
 191 wire \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_3 ;
 192 wire \inst|vga_driver_unit|un15_vsync_counter_3 ;
 193 wire \inst|vga_driver_unit|un15_vsync_counter_4 ;
 194 wire \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2 ;
 195 wire \inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0 ;
 196 wire \inst|vga_driver_unit|vsync_state_5 ;
 197 wire \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1 ;
 198 wire \inst|vga_driver_unit|vsync_state_next_2_sqmuxa ;
 199 wire \inst|vga_driver_unit|vsync_state_3 ;
 200 wire \inst|vga_driver_unit|vsync_state_2 ;
 201 wire \inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0 ;
 202 wire \inst|vga_driver_unit|vsync_state_0 ;
 203 wire \inst|vga_driver_unit|d_set_vsync_counter ;
 204 wire \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ;
 205 wire \inst|vga_driver_unit|vsync_counter_cout[8]~COUT1_24 ;
 206 wire \inst|vga_driver_unit|vsync_counter_9 ;
 207 wire \inst|vga_driver_unit|vsync_state_4 ;
 208 wire \inst|vga_driver_unit|un1_vsync_state_2_0 ;
 209 wire \inst|vga_driver_unit|v_sync_1_0_0_0_g1 ;
 210 wire \inst|vga_driver_unit|v_sync ;
 211 wire \inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ;
 212 wire \inst|vga_driver_unit|column_counter_sig_0 ;
 213 wire \inst|vga_driver_unit|column_counter_sig_1 ;
 214 wire \inst|vga_driver_unit|un2_column_counter_next_cout[1]~COUT1_10 ;
 215 wire \inst|vga_driver_unit|column_counter_sig_3 ;
 216 wire \inst|vga_driver_unit|un2_column_counter_next_cout[0]~COUT1_18 ;
 217 wire \inst|vga_driver_unit|column_counter_sig_2 ;
 218 wire \inst|vga_driver_unit|un2_column_counter_next_cout[2]~COUT1_20 ;
 219 wire \inst|vga_driver_unit|column_counter_sig_4 ;
 220 wire \inst|vga_driver_unit|un2_column_counter_next_cout[3]~COUT1_12 ;
 221 wire \inst|vga_driver_unit|column_counter_sig_5 ;
 222 wire \inst|vga_driver_unit|un2_column_counter_next_cout[4]~COUT1_22 ;
 223 wire \inst|vga_driver_unit|un2_column_counter_next_cout[6]~COUT1_24 ;
 224 wire \inst|vga_driver_unit|column_counter_sig_8 ;
 225 wire \inst|vga_driver_unit|un10_column_counter_siglt6_1 ;
 226 wire \inst|vga_driver_unit|un10_column_counter_siglt6 ;
 227 wire \inst|vga_driver_unit|un2_column_counter_next_cout[5]~COUT1_14 ;
 228 wire \inst|vga_driver_unit|un2_column_counter_next_cout[7]~COUT1_16 ;
 229 wire \inst|vga_driver_unit|column_counter_sig_9 ;
 230 wire \inst|vga_driver_unit|un10_column_counter_siglto9 ;
 231 wire \inst|vga_driver_unit|column_counter_sig_7 ;
 232 wire \inst|vga_driver_unit|column_counter_sig_6 ;
 233 wire \inst|vga_driver_unit|un10_column_counter_siglt6_3 ;
 234 wire \inst|vga_control_unit|b_next_i_o3_0 ;
 235 wire \inst|vga_control_unit|g_next_i_o3 ;
 236 wire \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4 ;
 237 wire \inst|vga_driver_unit|v_enable_sig ;
 238 wire \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4 ;
 239 wire \inst|vga_driver_unit|h_enable_sig ;
 240 wire \inst|vga_control_unit|r_next_i_o7 ;
 241 wire \inst|vga_control_unit|N_4_i_0_g0_1 ;
 242 wire \inst|vga_control_unit|r ;
 243 wire \inst|vga_control_unit|N_23_i_0_g0_a ;
 244 wire \inst|vga_control_unit|g ;
 245 wire \inst|vga_control_unit|N_6_i_0_g0_0 ;
 246 wire \inst|vga_control_unit|b_next_i_a7_1 ;
 247 wire \inst|vga_control_unit|b ;
 248 wire \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ;
 249 wire \inst|vga_driver_unit|line_counter_sig_0 ;
 250 wire \inst|vga_driver_unit|un1_line_counter_sig_cout[1]~COUT1_9 ;
 251 wire \inst|vga_driver_unit|line_counter_sig_2 ;
 252 wire \inst|vga_driver_unit|un1_line_counter_sig_a_cout[1]~COUT1_3 ;
 253 wire \inst|vga_driver_unit|line_counter_sig_1 ;
 254 wire \inst|vga_driver_unit|un1_line_counter_sig_cout[2]~COUT1_17 ;
 255 wire \inst|vga_driver_unit|line_counter_sig_3 ;
 256 wire \inst|vga_driver_unit|un1_line_counter_sig_cout[3]~COUT1_11 ;
 257 wire \inst|vga_driver_unit|line_counter_sig_4 ;
 258 wire \inst|vga_driver_unit|un1_line_counter_sig_cout[4]~COUT1_19 ;
 259 wire \inst|vga_driver_unit|line_counter_sig_5 ;
 260 wire \inst|vga_driver_unit|un1_line_counter_sig_cout[5]~COUT1_13 ;
 261 wire \inst|vga_driver_unit|line_counter_sig_6 ;
 262 wire \inst|vga_driver_unit|un10_line_counter_siglt4_2 ;
 263 wire \inst|vga_driver_unit|un10_line_counter_siglto5 ;
 264 wire \inst|vga_driver_unit|un10_line_counter_siglto8 ;
 265 wire \inst|vga_driver_unit|un1_line_counter_sig_cout[6]~COUT1_21 ;
 266 wire \inst|vga_driver_unit|line_counter_sig_7 ;
 267 wire \inst|vga_driver_unit|un1_line_counter_sig_cout[7]~COUT1_15 ;
 268 wire \inst|vga_driver_unit|line_counter_sig_8 ;
 269 wire \~STRATIX_FITTER_CREATED_GND~I_combout ;
 270 wire [8:0] \inst|vga_driver_unit|hsync_counter_cout ;
 271 wire [1:1] \inst|vga_driver_unit|un1_line_counter_sig_a_cout ;
 272 wire [9:1] \inst|vga_driver_unit|un1_line_counter_sig_combout ;
 273 wire [7:1] \inst|vga_driver_unit|un1_line_counter_sig_cout ;
 274 wire [9:1] \inst|vga_driver_unit|un2_column_counter_next_combout ;
 275 wire [7:0] \inst|vga_driver_unit|un2_column_counter_next_cout ;
 276 wire [8:0] \inst|vga_driver_unit|vsync_counter_cout ;
 277 wire [1:0] \inst|dly_counter ;
 278
 279 wire [5:0] \inst1|altpll_component|pll_CLK_bus ;
 280
 281 assign \inst1|altpll_component|_clk0  = \inst1|altpll_component|pll_CLK_bus [0];
 282 assign \inst1|altpll_component|pll~CLK1  = \inst1|altpll_component|pll_CLK_bus [1];
 283 assign \inst1|altpll_component|pll~CLK2  = \inst1|altpll_component|pll_CLK_bus [2];
 284 assign \inst1|altpll_component|pll~CLK3  = \inst1|altpll_component|pll_CLK_bus [3];
 285 assign \inst1|altpll_component|pll~CLK4  = \inst1|altpll_component|pll_CLK_bus [4];
 286 assign \inst1|altpll_component|pll~CLK5  = \inst1|altpll_component|pll_CLK_bus [5];
 287
 288 // atom is at PIN_N3
 289 stratix_io \board_clk~I (
 290         .datain(gnd),
 291         .ddiodatain(gnd),
 292         .oe(gnd),
 293         .outclk(gnd),
 294         .outclkena(vcc),
 295         .inclk(gnd),
 296         .inclkena(vcc),
 297         .areset(gnd),
 298         .sreset(gnd),
 299         .delayctrlin(gnd),
 300         .devclrn(devclrn),
 301         .devpor(devpor),
 302         .devoe(devoe),
 303         .combout(\board_clk~combout ),
 304         .regout(),
 305         .ddioregout(),
 306         .padio(board_clk),
 307         .dqsundelayedout());
 308 // synopsys translate_off
 309 defparam \board_clk~I .ddio_mode = "none";
 310 defparam \board_clk~I .input_async_reset = "none";
 311 defparam \board_clk~I .input_power_up = "low";
 312 defparam \board_clk~I .input_register_mode = "none";
 313 defparam \board_clk~I .input_sync_reset = "none";
 314 defparam \board_clk~I .oe_async_reset = "none";
 315 defparam \board_clk~I .oe_power_up = "low";
 316 defparam \board_clk~I .oe_register_mode = "none";
 317 defparam \board_clk~I .oe_sync_reset = "none";
 318 defparam \board_clk~I .operation_mode = "input";
 319 defparam \board_clk~I .output_async_reset = "none";
 320 defparam \board_clk~I .output_power_up = "low";
 321 defparam \board_clk~I .output_register_mode = "none";
 322 defparam \board_clk~I .output_sync_reset = "none";
 323 // synopsys translate_on
 324
 325 // atom is at PLL_1
 326 stratix_pll \inst1|altpll_component|pll (
 327         .fbin(vcc),
 328         .ena(vcc),
 329         .clkswitch(gnd),
 330         .areset(gnd),
 331         .pfdena(vcc),
 332         .scanclk(gnd),
 333         .scanaclr(gnd),
 334         .scandata(gnd),
 335         .comparator(gnd),
 336         .inclk({gnd,\board_clk~combout }),
 337         .clkena(6'b111111),
 338         .extclkena(4'b1111),
 339         .activeclock(),
 340         .clkloss(),
 341         .locked(),
 342         .scandataout(),
 343         .enable0(),
 344         .enable1(),
 345         .clk(\inst1|altpll_component|pll_CLK_bus ),
 346         .extclk(),
 347         .clkbad());
 348 // synopsys translate_off
 349 defparam \inst1|altpll_component|pll .clk0_counter = "g0";
 350 defparam \inst1|altpll_component|pll .clk0_divide_by = 38;
 351 defparam \inst1|altpll_component|pll .clk0_duty_cycle = 50;
 352 defparam \inst1|altpll_component|pll .clk0_multiply_by = 31;
 353 defparam \inst1|altpll_component|pll .clk0_phase_shift = "-725";
 354 defparam \inst1|altpll_component|pll .clk1_divide_by = 1;
 355 defparam \inst1|altpll_component|pll .clk1_duty_cycle = 50;
 356 defparam \inst1|altpll_component|pll .clk1_multiply_by = 1;
 357 defparam \inst1|altpll_component|pll .clk1_phase_shift = "0";
 358 defparam \inst1|altpll_component|pll .clk2_divide_by = 1;
 359 defparam \inst1|altpll_component|pll .clk2_duty_cycle = 50;
 360 defparam \inst1|altpll_component|pll .clk2_multiply_by = 1;
 361 defparam \inst1|altpll_component|pll .clk2_phase_shift = "0";
 362 defparam \inst1|altpll_component|pll .compensate_clock = "clk0";
 363 defparam \inst1|altpll_component|pll .enable_switch_over_counter = "off";
 364 defparam \inst1|altpll_component|pll .g0_high = 10;
 365 defparam \inst1|altpll_component|pll .g0_initial = 1;
 366 defparam \inst1|altpll_component|pll .g0_low = 9;
 367 defparam \inst1|altpll_component|pll .g0_mode = "odd";
 368 defparam \inst1|altpll_component|pll .g0_ph = 0;
 369 defparam \inst1|altpll_component|pll .gate_lock_counter = 0;
 370 defparam \inst1|altpll_component|pll .gate_lock_signal = "no";
 371 defparam \inst1|altpll_component|pll .inclk0_input_frequency = 30003;
 372 defparam \inst1|altpll_component|pll .inclk1_input_frequency = 30003;
 373 defparam \inst1|altpll_component|pll .invalid_lock_multiplier = 5;
 374 defparam \inst1|altpll_component|pll .l0_high = 13;
 375 defparam \inst1|altpll_component|pll .l0_initial = 1;
 376 defparam \inst1|altpll_component|pll .l0_low = 13;
 377 defparam \inst1|altpll_component|pll .l0_mode = "even";
 378 defparam \inst1|altpll_component|pll .l0_ph = 0;
 379 defparam \inst1|altpll_component|pll .l1_mode = "bypass";
 380 defparam \inst1|altpll_component|pll .l1_ph = 0;
 381 defparam \inst1|altpll_component|pll .m = 31;
 382 defparam \inst1|altpll_component|pll .m_initial = 1;
 383 defparam \inst1|altpll_component|pll .m_ph = 3;
 384 defparam \inst1|altpll_component|pll .n = 2;
 385 defparam \inst1|altpll_component|pll .operation_mode = "normal";
 386 defparam \inst1|altpll_component|pll .pfd_max = 100000;
 387 defparam \inst1|altpll_component|pll .pfd_min = 2000;
 388 defparam \inst1|altpll_component|pll .pll_compensation_delay = 1713;
 389 defparam \inst1|altpll_component|pll .pll_type = "fast";
 390 defparam \inst1|altpll_component|pll .primary_clock = "inclk0";
 391 defparam \inst1|altpll_component|pll .qualify_conf_done = "off";
 392 defparam \inst1|altpll_component|pll .simulation_type = "timing";
 393 defparam \inst1|altpll_component|pll .skip_vco = "off";
 394 defparam \inst1|altpll_component|pll .switch_over_counter = 1;
 395 defparam \inst1|altpll_component|pll .switch_over_on_gated_lock = "off";
 396 defparam \inst1|altpll_component|pll .switch_over_on_lossclk = "off";
 397 defparam \inst1|altpll_component|pll .valid_lock_multiplier = 1;
 398 defparam \inst1|altpll_component|pll .vco_center = 1250;
 399 defparam \inst1|altpll_component|pll .vco_max = 3334;
 400 defparam \inst1|altpll_component|pll .vco_min = 1000;
 401 // synopsys translate_on
 402
 403 // atom is at PIN_A5
 404 stratix_io \inst|reset_pin_in~I (
 405         .datain(gnd),
 406         .ddiodatain(gnd),
 407         .oe(gnd),
 408         .outclk(gnd),
 409         .outclkena(vcc),
 410         .inclk(gnd),
 411         .inclkena(vcc),
 412         .areset(gnd),
 413         .sreset(gnd),
 414         .delayctrlin(gnd),
 415         .devclrn(devclrn),
 416         .devpor(devpor),
 417         .devoe(devoe),
 418         .combout(\reset~combout ),
 419         .regout(),
 420         .ddioregout(),
 421         .padio(reset),
 422         .dqsundelayedout());
 423 // synopsys translate_off
 424 defparam \inst|reset_pin_in~I .ddio_mode = "none";
 425 defparam \inst|reset_pin_in~I .input_async_reset = "none";
 426 defparam \inst|reset_pin_in~I .input_power_up = "low";
 427 defparam \inst|reset_pin_in~I .input_register_mode = "none";
 428 defparam \inst|reset_pin_in~I .input_sync_reset = "none";
 429 defparam \inst|reset_pin_in~I .oe_async_reset = "none";
 430 defparam \inst|reset_pin_in~I .oe_power_up = "low";
 431 defparam \inst|reset_pin_in~I .oe_register_mode = "none";
 432 defparam \inst|reset_pin_in~I .oe_sync_reset = "none";
 433 defparam \inst|reset_pin_in~I .operation_mode = "input";
 434 defparam \inst|reset_pin_in~I .output_async_reset = "none";
 435 defparam \inst|reset_pin_in~I .output_power_up = "low";
 436 defparam \inst|reset_pin_in~I .output_register_mode = "none";
 437 defparam \inst|reset_pin_in~I .output_sync_reset = "none";
 438 // synopsys translate_on
 439
 440 // atom is at LC_X36_Y33_N3
 441 stratix_lcell \inst|dly_counter_0_ (
 442 // Equation(s):
 443 // \inst|dly_counter [0] = DFFEAS(\reset~combout  & (\inst|dly_counter [1] # !\inst|dly_counter [0]), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , , , )
 444
 445         .clk(\inst1|altpll_component|_clk0 ),
 446         .dataa(\reset~combout ),
 447         .datab(vcc),
 448         .datac(\inst|dly_counter [0]),
 449         .datad(\inst|dly_counter [1]),
 450         .aclr(gnd),
 451         .aload(gnd),
 452         .sclr(gnd),
 453         .sload(gnd),
 454         .ena(vcc),
 455         .cin(gnd),
 456         .cin0(gnd),
 457         .cin1(vcc),
 458         .inverta(gnd),
 459         .regcascin(gnd),
 460         .devclrn(devclrn),
 461         .devpor(devpor),
 462         .combout(),
 463         .regout(\inst|dly_counter [0]),
 464         .cout(),
 465         .cout0(),
 466         .cout1());
 467 // synopsys translate_off
 468 defparam \inst|dly_counter_0_ .lut_mask = "aa0a";
 469 defparam \inst|dly_counter_0_ .operation_mode = "normal";
 470 defparam \inst|dly_counter_0_ .output_mode = "reg_only";
 471 defparam \inst|dly_counter_0_ .register_cascade_mode = "off";
 472 defparam \inst|dly_counter_0_ .sum_lutc_input = "datac";
 473 defparam \inst|dly_counter_0_ .synch_mode = "off";
 474 // synopsys translate_on
 475
 476 // atom is at LC_X36_Y33_N9
 477 stratix_lcell \inst|dly_counter_1_ (
 478 // Equation(s):
 479 // \inst|dly_counter [1] = DFFEAS(\reset~combout  & (\inst|dly_counter [0] # \inst|dly_counter [1]), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , , , )
 480
 481         .clk(\inst1|altpll_component|_clk0 ),
 482         .dataa(\reset~combout ),
 483         .datab(vcc),
 484         .datac(\inst|dly_counter [0]),
 485         .datad(\inst|dly_counter [1]),
 486         .aclr(gnd),
 487         .aload(gnd),
 488         .sclr(gnd),
 489         .sload(gnd),
 490         .ena(vcc),
 491         .cin(gnd),
 492         .cin0(gnd),
 493         .cin1(vcc),
 494         .inverta(gnd),
 495         .regcascin(gnd),
 496         .devclrn(devclrn),
 497         .devpor(devpor),
 498         .combout(),
 499         .regout(\inst|dly_counter [1]),
 500         .cout(),
 501         .cout0(),
 502         .cout1());
 503 // synopsys translate_off
 504 defparam \inst|dly_counter_1_ .lut_mask = "aaa0";
 505 defparam \inst|dly_counter_1_ .operation_mode = "normal";
 506 defparam \inst|dly_counter_1_ .output_mode = "reg_only";
 507 defparam \inst|dly_counter_1_ .register_cascade_mode = "off";
 508 defparam \inst|dly_counter_1_ .sum_lutc_input = "datac";
 509 defparam \inst|dly_counter_1_ .synch_mode = "off";
 510 // synopsys translate_on
 511
 512 // atom is at LC_X36_Y33_N7
 513 stratix_lcell \inst|vga_driver_unit|vsync_state_6_ (
 514 // Equation(s):
 515 // \inst|vga_driver_unit|un6_dly_counter_0_x  = !\inst|dly_counter [1] # !\inst|dly_counter [0] # !\reset~combout
 516 // \inst|vga_driver_unit|vsync_state_6  = DFFEAS(\inst|vga_driver_unit|un6_dly_counter_0_x , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , , , )
 517
 518         .clk(\inst1|altpll_component|_clk0 ),
 519         .dataa(\reset~combout ),
 520         .datab(vcc),
 521         .datac(\inst|dly_counter [0]),
 522         .datad(\inst|dly_counter [1]),
 523         .aclr(gnd),
 524         .aload(gnd),
 525         .sclr(gnd),
 526         .sload(gnd),
 527         .ena(vcc),
 528         .cin(gnd),
 529         .cin0(gnd),
 530         .cin1(vcc),
 531         .inverta(gnd),
 532         .regcascin(gnd),
 533         .devclrn(devclrn),
 534         .devpor(devpor),
 535         .combout(\inst|vga_driver_unit|un6_dly_counter_0_x ),
 536         .regout(\inst|vga_driver_unit|vsync_state_6 ),
 537         .cout(),
 538         .cout0(),
 539         .cout1());
 540 // synopsys translate_off
 541 defparam \inst|vga_driver_unit|vsync_state_6_ .lut_mask = "5fff";
 542 defparam \inst|vga_driver_unit|vsync_state_6_ .operation_mode = "normal";
 543 defparam \inst|vga_driver_unit|vsync_state_6_ .output_mode = "reg_and_comb";
 544 defparam \inst|vga_driver_unit|vsync_state_6_ .register_cascade_mode = "off";
 545 defparam \inst|vga_driver_unit|vsync_state_6_ .sum_lutc_input = "datac";
 546 defparam \inst|vga_driver_unit|vsync_state_6_ .synch_mode = "off";
 547 // synopsys translate_on
 548
 549 // atom is at LC_X36_Y33_N2
 550 stratix_lcell \inst|vga_driver_unit|hsync_state_6_ (
 551 // Equation(s):
 552 // \inst|vga_driver_unit|d_set_hsync_counter  = E1_hsync_state_6 # \inst|vga_driver_unit|hsync_state_0
 553 // \inst|vga_driver_unit|hsync_state_6  = DFFEAS(\inst|vga_driver_unit|d_set_hsync_counter , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|un6_dly_counter_0_x , , , VCC)
 554
 555         .clk(\inst1|altpll_component|_clk0 ),
 556         .dataa(vcc),
 557         .datab(vcc),
 558         .datac(\inst|vga_driver_unit|un6_dly_counter_0_x ),
 559         .datad(\inst|vga_driver_unit|hsync_state_0 ),
 560         .aclr(gnd),
 561         .aload(gnd),
 562         .sclr(gnd),
 563         .sload(vcc),
 564         .ena(vcc),
 565         .cin(gnd),
 566         .cin0(gnd),
 567         .cin1(vcc),
 568         .inverta(gnd),
 569         .regcascin(gnd),
 570         .devclrn(devclrn),
 571         .devpor(devpor),
 572         .combout(\inst|vga_driver_unit|d_set_hsync_counter ),
 573         .regout(\inst|vga_driver_unit|hsync_state_6 ),
 574         .cout(),
 575         .cout0(),
 576         .cout1());
 577 // synopsys translate_off
 578 defparam \inst|vga_driver_unit|hsync_state_6_ .lut_mask = "fff0";
 579 defparam \inst|vga_driver_unit|hsync_state_6_ .operation_mode = "normal";
 580 defparam \inst|vga_driver_unit|hsync_state_6_ .output_mode = "reg_and_comb";
 581 defparam \inst|vga_driver_unit|hsync_state_6_ .register_cascade_mode = "off";
 582 defparam \inst|vga_driver_unit|hsync_state_6_ .sum_lutc_input = "qfbk";
 583 defparam \inst|vga_driver_unit|hsync_state_6_ .synch_mode = "on";
 584 // synopsys translate_on
 585
 586 // atom is at LC_X56_Y43_N0
 587 stratix_lcell \inst|vga_driver_unit|hsync_counter_0_ (
 588 // Equation(s):
 589 // \inst|vga_driver_unit|hsync_counter_0  = DFFEAS(!\inst|vga_driver_unit|hsync_counter_0 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , , !\inst|vga_driver_unit|G_2_i ,
 590 // !\inst|vga_driver_unit|un9_hsync_counterlt9 )
 591 // \inst|vga_driver_unit|hsync_counter_cout [0] = CARRY(\inst|vga_driver_unit|hsync_counter_0 )
 592 // \inst|vga_driver_unit|hsync_counter_cout[0]~COUT1_10  = CARRY(\inst|vga_driver_unit|hsync_counter_0 )
 593
 594         .clk(\inst1|altpll_component|_clk0 ),
 595         .dataa(vcc),
 596         .datab(\inst|vga_driver_unit|hsync_counter_0 ),
 597         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
 598         .datad(vcc),
 599         .aclr(gnd),
 600         .aload(gnd),
 601         .sclr(!\inst|vga_driver_unit|G_2_i ),
 602         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
 603         .ena(vcc),
 604         .cin(gnd),
 605         .cin0(gnd),
 606         .cin1(vcc),
 607         .inverta(gnd),
 608         .regcascin(gnd),
 609         .devclrn(devclrn),
 610         .devpor(devpor),
 611         .combout(),
 612         .regout(\inst|vga_driver_unit|hsync_counter_0 ),
 613         .cout(),
 614         .cout0(\inst|vga_driver_unit|hsync_counter_cout [0]),
 615         .cout1(\inst|vga_driver_unit|hsync_counter_cout[0]~COUT1_10 ));
 616 // synopsys translate_off
 617 defparam \inst|vga_driver_unit|hsync_counter_0_ .lut_mask = "33cc";
 618 defparam \inst|vga_driver_unit|hsync_counter_0_ .operation_mode = "arithmetic";
 619 defparam \inst|vga_driver_unit|hsync_counter_0_ .output_mode = "reg_only";
 620 defparam \inst|vga_driver_unit|hsync_counter_0_ .register_cascade_mode = "off";
 621 defparam \inst|vga_driver_unit|hsync_counter_0_ .sum_lutc_input = "datac";
 622 defparam \inst|vga_driver_unit|hsync_counter_0_ .synch_mode = "on";
 623 // synopsys translate_on
 624
 625 // atom is at LC_X56_Y43_N1
 626 stratix_lcell \inst|vga_driver_unit|hsync_counter_1_ (
 627 // Equation(s):
 628 // \inst|vga_driver_unit|hsync_counter_1  = DFFEAS(\inst|vga_driver_unit|hsync_counter_1  $ \inst|vga_driver_unit|hsync_counter_cout [0], GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , ,
 629 // !\inst|vga_driver_unit|G_2_i , !\inst|vga_driver_unit|un9_hsync_counterlt9 )
 630 // \inst|vga_driver_unit|hsync_counter_cout [1] = CARRY(!\inst|vga_driver_unit|hsync_counter_cout [0] # !\inst|vga_driver_unit|hsync_counter_1 )
 631 // \inst|vga_driver_unit|hsync_counter_cout[1]~COUT1_12  = CARRY(!\inst|vga_driver_unit|hsync_counter_cout[0]~COUT1_10  # !\inst|vga_driver_unit|hsync_counter_1 )
 632
 633         .clk(\inst1|altpll_component|_clk0 ),
 634         .dataa(vcc),
 635         .datab(\inst|vga_driver_unit|hsync_counter_1 ),
 636         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
 637         .datad(vcc),
 638         .aclr(gnd),
 639         .aload(gnd),
 640         .sclr(!\inst|vga_driver_unit|G_2_i ),
 641         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
 642         .ena(vcc),
 643         .cin(gnd),
 644         .cin0(\inst|vga_driver_unit|hsync_counter_cout [0]),
 645         .cin1(\inst|vga_driver_unit|hsync_counter_cout[0]~COUT1_10 ),
 646         .inverta(gnd),
 647         .regcascin(gnd),
 648         .devclrn(devclrn),
 649         .devpor(devpor),
 650         .combout(),
 651         .regout(\inst|vga_driver_unit|hsync_counter_1 ),
 652         .cout(),
 653         .cout0(\inst|vga_driver_unit|hsync_counter_cout [1]),
 654         .cout1(\inst|vga_driver_unit|hsync_counter_cout[1]~COUT1_12 ));
 655 // synopsys translate_off
 656 defparam \inst|vga_driver_unit|hsync_counter_1_ .cin0_used = "true";
 657 defparam \inst|vga_driver_unit|hsync_counter_1_ .cin1_used = "true";
 658 defparam \inst|vga_driver_unit|hsync_counter_1_ .lut_mask = "3c3f";
 659 defparam \inst|vga_driver_unit|hsync_counter_1_ .operation_mode = "arithmetic";
 660 defparam \inst|vga_driver_unit|hsync_counter_1_ .output_mode = "reg_only";
 661 defparam \inst|vga_driver_unit|hsync_counter_1_ .register_cascade_mode = "off";
 662 defparam \inst|vga_driver_unit|hsync_counter_1_ .sum_lutc_input = "cin";
 663 defparam \inst|vga_driver_unit|hsync_counter_1_ .synch_mode = "on";
 664 // synopsys translate_on
 665
 666 // atom is at LC_X56_Y43_N2
 667 stratix_lcell \inst|vga_driver_unit|hsync_counter_2_ (
 668 // Equation(s):
 669 // \inst|vga_driver_unit|hsync_counter_2  = DFFEAS(\inst|vga_driver_unit|hsync_counter_2  $ (!\inst|vga_driver_unit|hsync_counter_cout [1]), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , ,
 670 // !\inst|vga_driver_unit|G_2_i , !\inst|vga_driver_unit|un9_hsync_counterlt9 )
 671 // \inst|vga_driver_unit|hsync_counter_cout [2] = CARRY(\inst|vga_driver_unit|hsync_counter_2  & (!\inst|vga_driver_unit|hsync_counter_cout [1]))
 672 // \inst|vga_driver_unit|hsync_counter_cout[2]~COUT1_14  = CARRY(\inst|vga_driver_unit|hsync_counter_2  & (!\inst|vga_driver_unit|hsync_counter_cout[1]~COUT1_12 ))
 673
 674         .clk(\inst1|altpll_component|_clk0 ),
 675         .dataa(\inst|vga_driver_unit|hsync_counter_2 ),
 676         .datab(vcc),
 677         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
 678         .datad(vcc),
 679         .aclr(gnd),
 680         .aload(gnd),
 681         .sclr(!\inst|vga_driver_unit|G_2_i ),
 682         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
 683         .ena(vcc),
 684         .cin(gnd),
 685         .cin0(\inst|vga_driver_unit|hsync_counter_cout [1]),
 686         .cin1(\inst|vga_driver_unit|hsync_counter_cout[1]~COUT1_12 ),
 687         .inverta(gnd),
 688         .regcascin(gnd),
 689         .devclrn(devclrn),
 690         .devpor(devpor),
 691         .combout(),
 692         .regout(\inst|vga_driver_unit|hsync_counter_2 ),
 693         .cout(),
 694         .cout0(\inst|vga_driver_unit|hsync_counter_cout [2]),
 695         .cout1(\inst|vga_driver_unit|hsync_counter_cout[2]~COUT1_14 ));
 696 // synopsys translate_off
 697 defparam \inst|vga_driver_unit|hsync_counter_2_ .cin0_used = "true";
 698 defparam \inst|vga_driver_unit|hsync_counter_2_ .cin1_used = "true";
 699 defparam \inst|vga_driver_unit|hsync_counter_2_ .lut_mask = "a50a";
 700 defparam \inst|vga_driver_unit|hsync_counter_2_ .operation_mode = "arithmetic";
 701 defparam \inst|vga_driver_unit|hsync_counter_2_ .output_mode = "reg_only";
 702 defparam \inst|vga_driver_unit|hsync_counter_2_ .register_cascade_mode = "off";
 703 defparam \inst|vga_driver_unit|hsync_counter_2_ .sum_lutc_input = "cin";
 704 defparam \inst|vga_driver_unit|hsync_counter_2_ .synch_mode = "on";
 705 // synopsys translate_on
 706
 707 // atom is at LC_X56_Y43_N3
 708 stratix_lcell \inst|vga_driver_unit|hsync_counter_3_ (
 709 // Equation(s):
 710 // \inst|vga_driver_unit|hsync_counter_3  = DFFEAS(\inst|vga_driver_unit|hsync_counter_3  $ (\inst|vga_driver_unit|hsync_counter_cout [2]), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , ,
 711 // !\inst|vga_driver_unit|G_2_i , !\inst|vga_driver_unit|un9_hsync_counterlt9 )
 712 // \inst|vga_driver_unit|hsync_counter_cout [3] = CARRY(!\inst|vga_driver_unit|hsync_counter_cout [2] # !\inst|vga_driver_unit|hsync_counter_3 )
 713 // \inst|vga_driver_unit|hsync_counter_cout[3]~COUT1_16  = CARRY(!\inst|vga_driver_unit|hsync_counter_cout[2]~COUT1_14  # !\inst|vga_driver_unit|hsync_counter_3 )
 714
 715         .clk(\inst1|altpll_component|_clk0 ),
 716         .dataa(\inst|vga_driver_unit|hsync_counter_3 ),
 717         .datab(vcc),
 718         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
 719         .datad(vcc),
 720         .aclr(gnd),
 721         .aload(gnd),
 722         .sclr(!\inst|vga_driver_unit|G_2_i ),
 723         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
 724         .ena(vcc),
 725         .cin(gnd),
 726         .cin0(\inst|vga_driver_unit|hsync_counter_cout [2]),
 727         .cin1(\inst|vga_driver_unit|hsync_counter_cout[2]~COUT1_14 ),
 728         .inverta(gnd),
 729         .regcascin(gnd),
 730         .devclrn(devclrn),
 731         .devpor(devpor),
 732         .combout(),
 733         .regout(\inst|vga_driver_unit|hsync_counter_3 ),
 734         .cout(),
 735         .cout0(\inst|vga_driver_unit|hsync_counter_cout [3]),
 736         .cout1(\inst|vga_driver_unit|hsync_counter_cout[3]~COUT1_16 ));
 737 // synopsys translate_off
 738 defparam \inst|vga_driver_unit|hsync_counter_3_ .cin0_used = "true";
 739 defparam \inst|vga_driver_unit|hsync_counter_3_ .cin1_used = "true";
 740 defparam \inst|vga_driver_unit|hsync_counter_3_ .lut_mask = "5a5f";
 741 defparam \inst|vga_driver_unit|hsync_counter_3_ .operation_mode = "arithmetic";
 742 defparam \inst|vga_driver_unit|hsync_counter_3_ .output_mode = "reg_only";
 743 defparam \inst|vga_driver_unit|hsync_counter_3_ .register_cascade_mode = "off";
 744 defparam \inst|vga_driver_unit|hsync_counter_3_ .sum_lutc_input = "cin";
 745 defparam \inst|vga_driver_unit|hsync_counter_3_ .synch_mode = "on";
 746 // synopsys translate_on
 747
 748 // atom is at LC_X56_Y43_N4
 749 stratix_lcell \inst|vga_driver_unit|hsync_counter_4_ (
 750 // Equation(s):
 751 // \inst|vga_driver_unit|hsync_counter_4  = DFFEAS(\inst|vga_driver_unit|hsync_counter_4  $ (!\inst|vga_driver_unit|hsync_counter_cout [3]), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , ,
 752 // !\inst|vga_driver_unit|G_2_i , !\inst|vga_driver_unit|un9_hsync_counterlt9 )
 753 // \inst|vga_driver_unit|hsync_counter_cout [4] = CARRY(\inst|vga_driver_unit|hsync_counter_4  & (!\inst|vga_driver_unit|hsync_counter_cout[3]~COUT1_16 ))
 754
 755         .clk(\inst1|altpll_component|_clk0 ),
 756         .dataa(\inst|vga_driver_unit|hsync_counter_4 ),
 757         .datab(vcc),
 758         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
 759         .datad(vcc),
 760         .aclr(gnd),
 761         .aload(gnd),
 762         .sclr(!\inst|vga_driver_unit|G_2_i ),
 763         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
 764         .ena(vcc),
 765         .cin(gnd),
 766         .cin0(\inst|vga_driver_unit|hsync_counter_cout [3]),
 767         .cin1(\inst|vga_driver_unit|hsync_counter_cout[3]~COUT1_16 ),
 768         .inverta(gnd),
 769         .regcascin(gnd),
 770         .devclrn(devclrn),
 771         .devpor(devpor),
 772         .combout(),
 773         .regout(\inst|vga_driver_unit|hsync_counter_4 ),
 774         .cout(\inst|vga_driver_unit|hsync_counter_cout [4]),
 775         .cout0(),
 776         .cout1());
 777 // synopsys translate_off
 778 defparam \inst|vga_driver_unit|hsync_counter_4_ .cin0_used = "true";
 779 defparam \inst|vga_driver_unit|hsync_counter_4_ .cin1_used = "true";
 780 defparam \inst|vga_driver_unit|hsync_counter_4_ .lut_mask = "a50a";
 781 defparam \inst|vga_driver_unit|hsync_counter_4_ .operation_mode = "arithmetic";
 782 defparam \inst|vga_driver_unit|hsync_counter_4_ .output_mode = "reg_only";
 783 defparam \inst|vga_driver_unit|hsync_counter_4_ .register_cascade_mode = "off";
 784 defparam \inst|vga_driver_unit|hsync_counter_4_ .sum_lutc_input = "cin";
 785 defparam \inst|vga_driver_unit|hsync_counter_4_ .synch_mode = "on";
 786 // synopsys translate_on
 787
 788 // atom is at LC_X56_Y43_N5
 789 stratix_lcell \inst|vga_driver_unit|hsync_counter_5_ (
 790 // Equation(s):
 791 // \inst|vga_driver_unit|hsync_counter_5  = DFFEAS(\inst|vga_driver_unit|hsync_counter_5  $ \inst|vga_driver_unit|hsync_counter_cout [4], GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , ,
 792 // !\inst|vga_driver_unit|G_2_i , !\inst|vga_driver_unit|un9_hsync_counterlt9 )
 793 // \inst|vga_driver_unit|hsync_counter_cout [5] = CARRY(!\inst|vga_driver_unit|hsync_counter_cout [4] # !\inst|vga_driver_unit|hsync_counter_5 )
 794 // \inst|vga_driver_unit|hsync_counter_cout[5]~COUT1_18  = CARRY(!\inst|vga_driver_unit|hsync_counter_cout [4] # !\inst|vga_driver_unit|hsync_counter_5 )
 795
 796         .clk(\inst1|altpll_component|_clk0 ),
 797         .dataa(vcc),
 798         .datab(\inst|vga_driver_unit|hsync_counter_5 ),
 799         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
 800         .datad(vcc),
 801         .aclr(gnd),
 802         .aload(gnd),
 803         .sclr(!\inst|vga_driver_unit|G_2_i ),
 804         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
 805         .ena(vcc),
 806         .cin(\inst|vga_driver_unit|hsync_counter_cout [4]),
 807         .cin0(gnd),
 808         .cin1(vcc),
 809         .inverta(gnd),
 810         .regcascin(gnd),
 811         .devclrn(devclrn),
 812         .devpor(devpor),
 813         .combout(),
 814         .regout(\inst|vga_driver_unit|hsync_counter_5 ),
 815         .cout(),
 816         .cout0(\inst|vga_driver_unit|hsync_counter_cout [5]),
 817         .cout1(\inst|vga_driver_unit|hsync_counter_cout[5]~COUT1_18 ));
 818 // synopsys translate_off
 819 defparam \inst|vga_driver_unit|hsync_counter_5_ .cin_used = "true";
 820 defparam \inst|vga_driver_unit|hsync_counter_5_ .lut_mask = "3c3f";
 821 defparam \inst|vga_driver_unit|hsync_counter_5_ .operation_mode = "arithmetic";
 822 defparam \inst|vga_driver_unit|hsync_counter_5_ .output_mode = "reg_only";
 823 defparam \inst|vga_driver_unit|hsync_counter_5_ .register_cascade_mode = "off";
 824 defparam \inst|vga_driver_unit|hsync_counter_5_ .sum_lutc_input = "cin";
 825 defparam \inst|vga_driver_unit|hsync_counter_5_ .synch_mode = "on";
 826 // synopsys translate_on
 827
 828 // atom is at LC_X56_Y44_N1
 829 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_7 (
 830 // Equation(s):
 831 // \inst|vga_driver_unit|un13_hsync_counter_7  = \inst|vga_driver_unit|hsync_counter_2  & \inst|vga_driver_unit|hsync_counter_1  & \inst|vga_driver_unit|hsync_counter_3  & \inst|vga_driver_unit|hsync_counter_0
 832
 833         .clk(gnd),
 834         .dataa(\inst|vga_driver_unit|hsync_counter_2 ),
 835         .datab(\inst|vga_driver_unit|hsync_counter_1 ),
 836         .datac(\inst|vga_driver_unit|hsync_counter_3 ),
 837         .datad(\inst|vga_driver_unit|hsync_counter_0 ),
 838         .aclr(gnd),
 839         .aload(gnd),
 840         .sclr(gnd),
 841         .sload(gnd),
 842         .ena(vcc),
 843         .cin(gnd),
 844         .cin0(gnd),
 845         .cin1(vcc),
 846         .inverta(gnd),
 847         .regcascin(gnd),
 848         .devclrn(devclrn),
 849         .devpor(devpor),
 850         .combout(\inst|vga_driver_unit|un13_hsync_counter_7 ),
 851         .regout(),
 852         .cout(),
 853         .cout0(),
 854         .cout1());
 855 // synopsys translate_off
 856 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_7 .lut_mask = "8000";
 857 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_7 .operation_mode = "normal";
 858 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_7 .output_mode = "comb_only";
 859 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_7 .register_cascade_mode = "off";
 860 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_7 .sum_lutc_input = "datac";
 861 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_7 .synch_mode = "off";
 862 // synopsys translate_on
 863
 864 // atom is at LC_X56_Y43_N6
 865 stratix_lcell \inst|vga_driver_unit|hsync_counter_6_ (
 866 // Equation(s):
 867 // \inst|vga_driver_unit|hsync_counter_6  = DFFEAS(\inst|vga_driver_unit|hsync_counter_6  $ !(!\inst|vga_driver_unit|hsync_counter_cout [4] & \inst|vga_driver_unit|hsync_counter_cout [5]) # (\inst|vga_driver_unit|hsync_counter_cout [4] &
 868 // \inst|vga_driver_unit|hsync_counter_cout[5]~COUT1_18 ), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , , !\inst|vga_driver_unit|G_2_i , !\inst|vga_driver_unit|un9_hsync_counterlt9 )
 869 // \inst|vga_driver_unit|hsync_counter_cout [6] = CARRY(\inst|vga_driver_unit|hsync_counter_6  & !\inst|vga_driver_unit|hsync_counter_cout [5])
 870 // \inst|vga_driver_unit|hsync_counter_cout[6]~COUT1_20  = CARRY(\inst|vga_driver_unit|hsync_counter_6  & !\inst|vga_driver_unit|hsync_counter_cout[5]~COUT1_18 )
 871
 872         .clk(\inst1|altpll_component|_clk0 ),
 873         .dataa(vcc),
 874         .datab(\inst|vga_driver_unit|hsync_counter_6 ),
 875         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
 876         .datad(vcc),
 877         .aclr(gnd),
 878         .aload(gnd),
 879         .sclr(!\inst|vga_driver_unit|G_2_i ),
 880         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
 881         .ena(vcc),
 882         .cin(\inst|vga_driver_unit|hsync_counter_cout [4]),
 883         .cin0(\inst|vga_driver_unit|hsync_counter_cout [5]),
 884         .cin1(\inst|vga_driver_unit|hsync_counter_cout[5]~COUT1_18 ),
 885         .inverta(gnd),
 886         .regcascin(gnd),
 887         .devclrn(devclrn),
 888         .devpor(devpor),
 889         .combout(),
 890         .regout(\inst|vga_driver_unit|hsync_counter_6 ),
 891         .cout(),
 892         .cout0(\inst|vga_driver_unit|hsync_counter_cout [6]),
 893         .cout1(\inst|vga_driver_unit|hsync_counter_cout[6]~COUT1_20 ));
 894 // synopsys translate_off
 895 defparam \inst|vga_driver_unit|hsync_counter_6_ .cin0_used = "true";
 896 defparam \inst|vga_driver_unit|hsync_counter_6_ .cin1_used = "true";
 897 defparam \inst|vga_driver_unit|hsync_counter_6_ .cin_used = "true";
 898 defparam \inst|vga_driver_unit|hsync_counter_6_ .lut_mask = "c30c";
 899 defparam \inst|vga_driver_unit|hsync_counter_6_ .operation_mode = "arithmetic";
 900 defparam \inst|vga_driver_unit|hsync_counter_6_ .output_mode = "reg_only";
 901 defparam \inst|vga_driver_unit|hsync_counter_6_ .register_cascade_mode = "off";
 902 defparam \inst|vga_driver_unit|hsync_counter_6_ .sum_lutc_input = "cin";
 903 defparam \inst|vga_driver_unit|hsync_counter_6_ .synch_mode = "on";
 904 // synopsys translate_on
 905
 906 // atom is at LC_X56_Y43_N7
 907 stratix_lcell \inst|vga_driver_unit|hsync_counter_7_ (
 908 // Equation(s):
 909 // \inst|vga_driver_unit|hsync_counter_7  = DFFEAS(\inst|vga_driver_unit|hsync_counter_7  $ ((!\inst|vga_driver_unit|hsync_counter_cout [4] & \inst|vga_driver_unit|hsync_counter_cout [6]) # (\inst|vga_driver_unit|hsync_counter_cout [4] &
 910 // \inst|vga_driver_unit|hsync_counter_cout[6]~COUT1_20 )), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , , !\inst|vga_driver_unit|G_2_i , !\inst|vga_driver_unit|un9_hsync_counterlt9 )
 911 // \inst|vga_driver_unit|hsync_counter_cout [7] = CARRY(!\inst|vga_driver_unit|hsync_counter_cout [6] # !\inst|vga_driver_unit|hsync_counter_7 )
 912 // \inst|vga_driver_unit|hsync_counter_cout[7]~COUT1_22  = CARRY(!\inst|vga_driver_unit|hsync_counter_cout[6]~COUT1_20  # !\inst|vga_driver_unit|hsync_counter_7 )
 913
 914         .clk(\inst1|altpll_component|_clk0 ),
 915         .dataa(\inst|vga_driver_unit|hsync_counter_7 ),
 916         .datab(vcc),
 917         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
 918         .datad(vcc),
 919         .aclr(gnd),
 920         .aload(gnd),
 921         .sclr(!\inst|vga_driver_unit|G_2_i ),
 922         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
 923         .ena(vcc),
 924         .cin(\inst|vga_driver_unit|hsync_counter_cout [4]),
 925         .cin0(\inst|vga_driver_unit|hsync_counter_cout [6]),
 926         .cin1(\inst|vga_driver_unit|hsync_counter_cout[6]~COUT1_20 ),
 927         .inverta(gnd),
 928         .regcascin(gnd),
 929         .devclrn(devclrn),
 930         .devpor(devpor),
 931         .combout(),
 932         .regout(\inst|vga_driver_unit|hsync_counter_7 ),
 933         .cout(),
 934         .cout0(\inst|vga_driver_unit|hsync_counter_cout [7]),
 935         .cout1(\inst|vga_driver_unit|hsync_counter_cout[7]~COUT1_22 ));
 936 // synopsys translate_off
 937 defparam \inst|vga_driver_unit|hsync_counter_7_ .cin0_used = "true";
 938 defparam \inst|vga_driver_unit|hsync_counter_7_ .cin1_used = "true";
 939 defparam \inst|vga_driver_unit|hsync_counter_7_ .cin_used = "true";
 940 defparam \inst|vga_driver_unit|hsync_counter_7_ .lut_mask = "5a5f";
 941 defparam \inst|vga_driver_unit|hsync_counter_7_ .operation_mode = "arithmetic";
 942 defparam \inst|vga_driver_unit|hsync_counter_7_ .output_mode = "reg_only";
 943 defparam \inst|vga_driver_unit|hsync_counter_7_ .register_cascade_mode = "off";
 944 defparam \inst|vga_driver_unit|hsync_counter_7_ .sum_lutc_input = "cin";
 945 defparam \inst|vga_driver_unit|hsync_counter_7_ .synch_mode = "on";
 946 // synopsys translate_on
 947
 948 // atom is at LC_X56_Y43_N8
 949 stratix_lcell \inst|vga_driver_unit|hsync_counter_8_ (
 950 // Equation(s):
 951 // \inst|vga_driver_unit|hsync_counter_8  = DFFEAS(\inst|vga_driver_unit|hsync_counter_8  $ (!(!\inst|vga_driver_unit|hsync_counter_cout [4] & \inst|vga_driver_unit|hsync_counter_cout [7]) # (\inst|vga_driver_unit|hsync_counter_cout [4] &
 952 // \inst|vga_driver_unit|hsync_counter_cout[7]~COUT1_22 )), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , , !\inst|vga_driver_unit|G_2_i , !\inst|vga_driver_unit|un9_hsync_counterlt9 )
 953 // \inst|vga_driver_unit|hsync_counter_cout [8] = CARRY(\inst|vga_driver_unit|hsync_counter_8  & (!\inst|vga_driver_unit|hsync_counter_cout [7]))
 954 // \inst|vga_driver_unit|hsync_counter_cout[8]~COUT1_24  = CARRY(\inst|vga_driver_unit|hsync_counter_8  & (!\inst|vga_driver_unit|hsync_counter_cout[7]~COUT1_22 ))
 955
 956         .clk(\inst1|altpll_component|_clk0 ),
 957         .dataa(\inst|vga_driver_unit|hsync_counter_8 ),
 958         .datab(vcc),
 959         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
 960         .datad(vcc),
 961         .aclr(gnd),
 962         .aload(gnd),
 963         .sclr(!\inst|vga_driver_unit|G_2_i ),
 964         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
 965         .ena(vcc),
 966         .cin(\inst|vga_driver_unit|hsync_counter_cout [4]),
 967         .cin0(\inst|vga_driver_unit|hsync_counter_cout [7]),
 968         .cin1(\inst|vga_driver_unit|hsync_counter_cout[7]~COUT1_22 ),
 969         .inverta(gnd),
 970         .regcascin(gnd),
 971         .devclrn(devclrn),
 972         .devpor(devpor),
 973         .combout(),
 974         .regout(\inst|vga_driver_unit|hsync_counter_8 ),
 975         .cout(),
 976         .cout0(\inst|vga_driver_unit|hsync_counter_cout [8]),
 977         .cout1(\inst|vga_driver_unit|hsync_counter_cout[8]~COUT1_24 ));
 978 // synopsys translate_off
 979 defparam \inst|vga_driver_unit|hsync_counter_8_ .cin0_used = "true";
 980 defparam \inst|vga_driver_unit|hsync_counter_8_ .cin1_used = "true";
 981 defparam \inst|vga_driver_unit|hsync_counter_8_ .cin_used = "true";
 982 defparam \inst|vga_driver_unit|hsync_counter_8_ .lut_mask = "a50a";
 983 defparam \inst|vga_driver_unit|hsync_counter_8_ .operation_mode = "arithmetic";
 984 defparam \inst|vga_driver_unit|hsync_counter_8_ .output_mode = "reg_only";
 985 defparam \inst|vga_driver_unit|hsync_counter_8_ .register_cascade_mode = "off";
 986 defparam \inst|vga_driver_unit|hsync_counter_8_ .sum_lutc_input = "cin";
 987 defparam \inst|vga_driver_unit|hsync_counter_8_ .synch_mode = "on";
 988 // synopsys translate_on
 989
 990 // atom is at LC_X56_Y43_N9
 991 stratix_lcell \inst|vga_driver_unit|hsync_counter_9_ (
 992 // Equation(s):
 993 // \inst|vga_driver_unit|hsync_counter_9  = DFFEAS((!\inst|vga_driver_unit|hsync_counter_cout [4] & \inst|vga_driver_unit|hsync_counter_cout [8]) # (\inst|vga_driver_unit|hsync_counter_cout [4] & \inst|vga_driver_unit|hsync_counter_cout[8]~COUT1_24 ) $
 994 // \inst|vga_driver_unit|hsync_counter_9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , , !\inst|vga_driver_unit|G_2_i , !\inst|vga_driver_unit|un9_hsync_counterlt9 )
 995
 996         .clk(\inst1|altpll_component|_clk0 ),
 997         .dataa(vcc),
 998         .datab(vcc),
 999         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
1000         .datad(\inst|vga_driver_unit|hsync_counter_9 ),
1001         .aclr(gnd),
1002         .aload(gnd),
1003         .sclr(!\inst|vga_driver_unit|G_2_i ),
1004         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
1005         .ena(vcc),
1006         .cin(\inst|vga_driver_unit|hsync_counter_cout [4]),
1007         .cin0(\inst|vga_driver_unit|hsync_counter_cout [8]),
1008         .cin1(\inst|vga_driver_unit|hsync_counter_cout[8]~COUT1_24 ),
1009         .inverta(gnd),
1010         .regcascin(gnd),
1011         .devclrn(devclrn),
1012         .devpor(devpor),
1013         .combout(),
1014         .regout(\inst|vga_driver_unit|hsync_counter_9 ),
1015         .cout(),
1016         .cout0(),
1017         .cout1());
1018 // synopsys translate_off
1019 defparam \inst|vga_driver_unit|hsync_counter_9_ .cin0_used = "true";
1020 defparam \inst|vga_driver_unit|hsync_counter_9_ .cin1_used = "true";
1021 defparam \inst|vga_driver_unit|hsync_counter_9_ .cin_used = "true";
1022 defparam \inst|vga_driver_unit|hsync_counter_9_ .lut_mask = "0ff0";
1023 defparam \inst|vga_driver_unit|hsync_counter_9_ .operation_mode = "normal";
1024 defparam \inst|vga_driver_unit|hsync_counter_9_ .output_mode = "reg_only";
1025 defparam \inst|vga_driver_unit|hsync_counter_9_ .register_cascade_mode = "off";
1026 defparam \inst|vga_driver_unit|hsync_counter_9_ .sum_lutc_input = "cin";
1027 defparam \inst|vga_driver_unit|hsync_counter_9_ .synch_mode = "on";
1028 // synopsys translate_on
1029
1030 // atom is at LC_X55_Y44_N2
1031 stratix_lcell \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9_3 (
1032 // Equation(s):
1033 // \inst|vga_driver_unit|un9_hsync_counterlt9_3  = !\inst|vga_driver_unit|hsync_counter_6  # !\inst|vga_driver_unit|hsync_counter_8  # !\inst|vga_driver_unit|hsync_counter_9  # !\inst|vga_driver_unit|hsync_counter_7
1034
1035         .clk(gnd),
1036         .dataa(\inst|vga_driver_unit|hsync_counter_7 ),
1037         .datab(\inst|vga_driver_unit|hsync_counter_9 ),
1038         .datac(\inst|vga_driver_unit|hsync_counter_8 ),
1039         .datad(\inst|vga_driver_unit|hsync_counter_6 ),
1040         .aclr(gnd),
1041         .aload(gnd),
1042         .sclr(gnd),
1043         .sload(gnd),
1044         .ena(vcc),
1045         .cin(gnd),
1046         .cin0(gnd),
1047         .cin1(vcc),
1048         .inverta(gnd),
1049         .regcascin(gnd),
1050         .devclrn(devclrn),
1051         .devpor(devpor),
1052         .combout(\inst|vga_driver_unit|un9_hsync_counterlt9_3 ),
1053         .regout(),
1054         .cout(),
1055         .cout0(),
1056         .cout1());
1057 // synopsys translate_off
1058 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9_3 .lut_mask = "7fff";
1059 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9_3 .operation_mode = "normal";
1060 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9_3 .output_mode = "comb_only";
1061 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9_3 .register_cascade_mode = "off";
1062 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9_3 .sum_lutc_input = "datac";
1063 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9_3 .synch_mode = "off";
1064 // synopsys translate_on
1065
1066 // atom is at LC_X55_Y44_N4
1067 stratix_lcell \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9 (
1068 // Equation(s):
1069 // \inst|vga_driver_unit|un9_hsync_counterlt9  = \inst|vga_driver_unit|un9_hsync_counterlt9_3  # !\inst|vga_driver_unit|un13_hsync_counter_7  # !\inst|vga_driver_unit|hsync_counter_4  # !\inst|vga_driver_unit|hsync_counter_5
1070
1071         .clk(gnd),
1072         .dataa(\inst|vga_driver_unit|hsync_counter_5 ),
1073         .datab(\inst|vga_driver_unit|hsync_counter_4 ),
1074         .datac(\inst|vga_driver_unit|un13_hsync_counter_7 ),
1075         .datad(\inst|vga_driver_unit|un9_hsync_counterlt9_3 ),
1076         .aclr(gnd),
1077         .aload(gnd),
1078         .sclr(gnd),
1079         .sload(gnd),
1080         .ena(vcc),
1081         .cin(gnd),
1082         .cin0(gnd),
1083         .cin1(vcc),
1084         .inverta(gnd),
1085         .regcascin(gnd),
1086         .devclrn(devclrn),
1087         .devpor(devpor),
1088         .combout(\inst|vga_driver_unit|un9_hsync_counterlt9 ),
1089         .regout(),
1090         .cout(),
1091         .cout0(),
1092         .cout1());
1093 // synopsys translate_off
1094 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9 .lut_mask = "ff7f";
1095 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9 .operation_mode = "normal";
1096 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9 .output_mode = "comb_only";
1097 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9 .register_cascade_mode = "off";
1098 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9 .sum_lutc_input = "datac";
1099 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9 .synch_mode = "off";
1100 // synopsys translate_on
1101
1102 // atom is at LC_X55_Y44_N5
1103 stratix_lcell \inst|vga_driver_unit|G_2 (
1104 // Equation(s):
1105 // \inst|vga_driver_unit|G_2_i  = !\inst|vga_driver_unit|hsync_state_6  & !\inst|vga_driver_unit|hsync_state_0  & !\inst|vga_driver_unit|un6_dly_counter_0_x  # !\inst|vga_driver_unit|un9_hsync_counterlt9
1106
1107         .clk(gnd),
1108         .dataa(\inst|vga_driver_unit|hsync_state_6 ),
1109         .datab(\inst|vga_driver_unit|hsync_state_0 ),
1110         .datac(\inst|vga_driver_unit|un6_dly_counter_0_x ),
1111         .datad(\inst|vga_driver_unit|un9_hsync_counterlt9 ),
1112         .aclr(gnd),
1113         .aload(gnd),
1114         .sclr(gnd),
1115         .sload(gnd),
1116         .ena(vcc),
1117         .cin(gnd),
1118         .cin0(gnd),
1119         .cin1(vcc),
1120         .inverta(gnd),
1121         .regcascin(gnd),
1122         .devclrn(devclrn),
1123         .devpor(devpor),
1124         .combout(\inst|vga_driver_unit|G_2_i ),
1125         .regout(),
1126         .cout(),
1127         .cout0(),
1128         .cout1());
1129 // synopsys translate_off
1130 defparam \inst|vga_driver_unit|G_2 .lut_mask = "01ff";
1131 defparam \inst|vga_driver_unit|G_2 .operation_mode = "normal";
1132 defparam \inst|vga_driver_unit|G_2 .output_mode = "comb_only";
1133 defparam \inst|vga_driver_unit|G_2 .register_cascade_mode = "off";
1134 defparam \inst|vga_driver_unit|G_2 .sum_lutc_input = "datac";
1135 defparam \inst|vga_driver_unit|G_2 .synch_mode = "off";
1136 // synopsys translate_on
1137
1138 // atom is at LC_X56_Y44_N5
1139 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_3 (
1140 // Equation(s):
1141 // \inst|vga_driver_unit|un12_hsync_counter_3  = !\inst|vga_driver_unit|hsync_counter_3  & \inst|vga_driver_unit|hsync_counter_9  & \inst|vga_driver_unit|hsync_counter_2  & !\inst|vga_driver_unit|hsync_counter_5
1142
1143         .clk(gnd),
1144         .dataa(\inst|vga_driver_unit|hsync_counter_3 ),
1145         .datab(\inst|vga_driver_unit|hsync_counter_9 ),
1146         .datac(\inst|vga_driver_unit|hsync_counter_2 ),
1147         .datad(\inst|vga_driver_unit|hsync_counter_5 ),
1148         .aclr(gnd),
1149         .aload(gnd),
1150         .sclr(gnd),
1151         .sload(gnd),
1152         .ena(vcc),
1153         .cin(gnd),
1154         .cin0(gnd),
1155         .cin1(vcc),
1156         .inverta(gnd),
1157         .regcascin(gnd),
1158         .devclrn(devclrn),
1159         .devpor(devpor),
1160         .combout(\inst|vga_driver_unit|un12_hsync_counter_3 ),
1161         .regout(),
1162         .cout(),
1163         .cout0(),
1164         .cout1());
1165 // synopsys translate_off
1166 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_3 .lut_mask = "0040";
1167 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_3 .operation_mode = "normal";
1168 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_3 .output_mode = "comb_only";
1169 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_3 .register_cascade_mode = "off";
1170 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_3 .sum_lutc_input = "datac";
1171 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_3 .synch_mode = "off";
1172 // synopsys translate_on
1173
1174 // atom is at LC_X56_Y44_N6
1175 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_4 (
1176 // Equation(s):
1177 // \inst|vga_driver_unit|un12_hsync_counter_4  = !\inst|vga_driver_unit|hsync_counter_4  & !\inst|vga_driver_unit|hsync_counter_7  & !\inst|vga_driver_unit|hsync_counter_6  & \inst|vga_driver_unit|hsync_counter_8
1178
1179         .clk(gnd),
1180         .dataa(\inst|vga_driver_unit|hsync_counter_4 ),
1181         .datab(\inst|vga_driver_unit|hsync_counter_7 ),
1182         .datac(\inst|vga_driver_unit|hsync_counter_6 ),
1183         .datad(\inst|vga_driver_unit|hsync_counter_8 ),
1184         .aclr(gnd),
1185         .aload(gnd),
1186         .sclr(gnd),
1187         .sload(gnd),
1188         .ena(vcc),
1189         .cin(gnd),
1190         .cin0(gnd),
1191         .cin1(vcc),
1192         .inverta(gnd),
1193         .regcascin(gnd),
1194         .devclrn(devclrn),
1195         .devpor(devpor),
1196         .combout(\inst|vga_driver_unit|un12_hsync_counter_4 ),
1197         .regout(),
1198         .cout(),
1199         .cout0(),
1200         .cout1());
1201 // synopsys translate_off
1202 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_4 .lut_mask = "0100";
1203 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_4 .operation_mode = "normal";
1204 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_4 .output_mode = "comb_only";
1205 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_4 .register_cascade_mode = "off";
1206 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_4 .sum_lutc_input = "datac";
1207 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_4 .synch_mode = "off";
1208 // synopsys translate_on
1209
1210 // atom is at LC_X56_Y44_N8
1211 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter (
1212 // Equation(s):
1213 // \inst|vga_driver_unit|un12_hsync_counter  = \inst|vga_driver_unit|hsync_counter_0  & \inst|vga_driver_unit|hsync_counter_1  & \inst|vga_driver_unit|un12_hsync_counter_3  & \inst|vga_driver_unit|un12_hsync_counter_4
1214
1215         .clk(gnd),
1216         .dataa(\inst|vga_driver_unit|hsync_counter_0 ),
1217         .datab(\inst|vga_driver_unit|hsync_counter_1 ),
1218         .datac(\inst|vga_driver_unit|un12_hsync_counter_3 ),
1219         .datad(\inst|vga_driver_unit|un12_hsync_counter_4 ),
1220         .aclr(gnd),
1221         .aload(gnd),
1222         .sclr(gnd),
1223         .sload(gnd),
1224         .ena(vcc),
1225         .cin(gnd),
1226         .cin0(gnd),
1227         .cin1(vcc),
1228         .inverta(gnd),
1229         .regcascin(gnd),
1230         .devclrn(devclrn),
1231         .devpor(devpor),
1232         .combout(\inst|vga_driver_unit|un12_hsync_counter ),
1233         .regout(),
1234         .cout(),
1235         .cout0(),
1236         .cout1());
1237 // synopsys translate_off
1238 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter .lut_mask = "8000";
1239 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter .operation_mode = "normal";
1240 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter .output_mode = "comb_only";
1241 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter .register_cascade_mode = "off";
1242 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter .sum_lutc_input = "datac";
1243 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter .synch_mode = "off";
1244 // synopsys translate_on
1245
1246 // atom is at LC_X56_Y45_N8
1247 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_1 (
1248 // Equation(s):
1249 // \inst|vga_driver_unit|un10_hsync_counter_1  = !\inst|vga_driver_unit|hsync_counter_5  & !\inst|vga_driver_unit|hsync_counter_9  & !\inst|vga_driver_unit|hsync_counter_8
1250
1251         .clk(gnd),
1252         .dataa(vcc),
1253         .datab(\inst|vga_driver_unit|hsync_counter_5 ),
1254         .datac(\inst|vga_driver_unit|hsync_counter_9 ),
1255         .datad(\inst|vga_driver_unit|hsync_counter_8 ),
1256         .aclr(gnd),
1257         .aload(gnd),
1258         .sclr(gnd),
1259         .sload(gnd),
1260         .ena(vcc),
1261         .cin(gnd),
1262         .cin0(gnd),
1263         .cin1(vcc),
1264         .inverta(gnd),
1265         .regcascin(gnd),
1266         .devclrn(devclrn),
1267         .devpor(devpor),
1268         .combout(\inst|vga_driver_unit|un10_hsync_counter_1 ),
1269         .regout(),
1270         .cout(),
1271         .cout0(),
1272         .cout1());
1273 // synopsys translate_off
1274 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_1 .lut_mask = "0003";
1275 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_1 .operation_mode = "normal";
1276 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_1 .output_mode = "comb_only";
1277 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_1 .register_cascade_mode = "off";
1278 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_1 .sum_lutc_input = "datac";
1279 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_1 .synch_mode = "off";
1280 // synopsys translate_on
1281
1282 // atom is at LC_X56_Y45_N3
1283 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_3 (
1284 // Equation(s):
1285 // \inst|vga_driver_unit|un11_hsync_counter_3  = !\inst|vga_driver_unit|hsync_counter_3  & !\inst|vga_driver_unit|hsync_counter_4  & \inst|vga_driver_unit|hsync_counter_1  & \inst|vga_driver_unit|hsync_counter_0
1286
1287         .clk(gnd),
1288         .dataa(\inst|vga_driver_unit|hsync_counter_3 ),
1289         .datab(\inst|vga_driver_unit|hsync_counter_4 ),
1290         .datac(\inst|vga_driver_unit|hsync_counter_1 ),
1291         .datad(\inst|vga_driver_unit|hsync_counter_0 ),
1292         .aclr(gnd),
1293         .aload(gnd),
1294         .sclr(gnd),
1295         .sload(gnd),
1296         .ena(vcc),
1297         .cin(gnd),
1298         .cin0(gnd),
1299         .cin1(vcc),
1300         .inverta(gnd),
1301         .regcascin(gnd),
1302         .devclrn(devclrn),
1303         .devpor(devpor),
1304         .combout(\inst|vga_driver_unit|un11_hsync_counter_3 ),
1305         .regout(),
1306         .cout(),
1307         .cout0(),
1308         .cout1());
1309 // synopsys translate_off
1310 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_3 .lut_mask = "1000";
1311 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_3 .operation_mode = "normal";
1312 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_3 .output_mode = "comb_only";
1313 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_3 .register_cascade_mode = "off";
1314 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_3 .sum_lutc_input = "datac";
1315 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_3 .synch_mode = "off";
1316 // synopsys translate_on
1317
1318 // atom is at LC_X56_Y45_N1
1319 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_2 (
1320 // Equation(s):
1321 // \inst|vga_driver_unit|un11_hsync_counter_2  = \inst|vga_driver_unit|hsync_counter_2  & (!\inst|vga_driver_unit|hsync_counter_6  & \inst|vga_driver_unit|hsync_counter_7 )
1322
1323         .clk(gnd),
1324         .dataa(\inst|vga_driver_unit|hsync_counter_2 ),
1325         .datab(vcc),
1326         .datac(\inst|vga_driver_unit|hsync_counter_6 ),
1327         .datad(\inst|vga_driver_unit|hsync_counter_7 ),
1328         .aclr(gnd),
1329         .aload(gnd),
1330         .sclr(gnd),
1331         .sload(gnd),
1332         .ena(vcc),
1333         .cin(gnd),
1334         .cin0(gnd),
1335         .cin1(vcc),
1336         .inverta(gnd),
1337         .regcascin(gnd),
1338         .devclrn(devclrn),
1339         .devpor(devpor),
1340         .combout(\inst|vga_driver_unit|un11_hsync_counter_2 ),
1341         .regout(),
1342         .cout(),
1343         .cout0(),
1344         .cout1());
1345 // synopsys translate_off
1346 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_2 .lut_mask = "0a00";
1347 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_2 .operation_mode = "normal";
1348 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_2 .output_mode = "comb_only";
1349 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_2 .register_cascade_mode = "off";
1350 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_2 .sum_lutc_input = "datac";
1351 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_2 .synch_mode = "off";
1352 // synopsys translate_on
1353
1354 // atom is at LC_X56_Y45_N7
1355 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_4 (
1356 // Equation(s):
1357 // \inst|vga_driver_unit|un10_hsync_counter_4  = \inst|vga_driver_unit|hsync_counter_3  & \inst|vga_driver_unit|hsync_counter_1  & \inst|vga_driver_unit|hsync_counter_6  & \inst|vga_driver_unit|hsync_counter_4
1358
1359         .clk(gnd),
1360         .dataa(\inst|vga_driver_unit|hsync_counter_3 ),
1361         .datab(\inst|vga_driver_unit|hsync_counter_1 ),
1362         .datac(\inst|vga_driver_unit|hsync_counter_6 ),
1363         .datad(\inst|vga_driver_unit|hsync_counter_4 ),
1364         .aclr(gnd),
1365         .aload(gnd),
1366         .sclr(gnd),
1367         .sload(gnd),
1368         .ena(vcc),
1369         .cin(gnd),
1370         .cin0(gnd),
1371         .cin1(vcc),
1372         .inverta(gnd),
1373         .regcascin(gnd),
1374         .devclrn(devclrn),
1375         .devpor(devpor),
1376         .combout(\inst|vga_driver_unit|un10_hsync_counter_4 ),
1377         .regout(),
1378         .cout(),
1379         .cout0(),
1380         .cout1());
1381 // synopsys translate_off
1382 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_4 .lut_mask = "8000";
1383 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_4 .operation_mode = "normal";
1384 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_4 .output_mode = "comb_only";
1385 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_4 .register_cascade_mode = "off";
1386 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_4 .sum_lutc_input = "datac";
1387 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_4 .synch_mode = "off";
1388 // synopsys translate_on
1389
1390 // atom is at LC_X56_Y45_N9
1391 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_3 (
1392 // Equation(s):
1393 // \inst|vga_driver_unit|un10_hsync_counter_3  = !\inst|vga_driver_unit|hsync_counter_7  & !\inst|vga_driver_unit|hsync_counter_2  & !\inst|vga_driver_unit|hsync_counter_0
1394
1395         .clk(gnd),
1396         .dataa(vcc),
1397         .datab(\inst|vga_driver_unit|hsync_counter_7 ),
1398         .datac(\inst|vga_driver_unit|hsync_counter_2 ),
1399         .datad(\inst|vga_driver_unit|hsync_counter_0 ),
1400         .aclr(gnd),
1401         .aload(gnd),
1402         .sclr(gnd),
1403         .sload(gnd),
1404         .ena(vcc),
1405         .cin(gnd),
1406         .cin0(gnd),
1407         .cin1(vcc),
1408         .inverta(gnd),
1409         .regcascin(gnd),
1410         .devclrn(devclrn),
1411         .devpor(devpor),
1412         .combout(\inst|vga_driver_unit|un10_hsync_counter_3 ),
1413         .regout(),
1414         .cout(),
1415         .cout0(),
1416         .cout1());
1417 // synopsys translate_off
1418 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_3 .lut_mask = "0003";
1419 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_3 .operation_mode = "normal";
1420 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_3 .output_mode = "comb_only";
1421 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_3 .register_cascade_mode = "off";
1422 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_3 .sum_lutc_input = "datac";
1423 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_3 .synch_mode = "off";
1424 // synopsys translate_on
1425
1426 // atom is at LC_X55_Y44_N8
1427 stratix_lcell \inst|vga_driver_unit|hsync_state_5_ (
1428 // Equation(s):
1429 // \inst|vga_driver_unit|hsync_state_5  = DFFEAS(\inst|vga_driver_unit|hsync_state_6  # \inst|vga_driver_unit|hsync_state_0 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 , , ,
1430 // \inst|vga_driver_unit|un6_dly_counter_0_x , )
1431
1432         .clk(\inst1|altpll_component|_clk0 ),
1433         .dataa(\inst|vga_driver_unit|hsync_state_6 ),
1434         .datab(vcc),
1435         .datac(vcc),
1436         .datad(\inst|vga_driver_unit|hsync_state_0 ),
1437         .aclr(gnd),
1438         .aload(gnd),
1439         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
1440         .sload(gnd),
1441         .ena(\inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 ),
1442         .cin(gnd),
1443         .cin0(gnd),
1444         .cin1(vcc),
1445         .inverta(gnd),
1446         .regcascin(gnd),
1447         .devclrn(devclrn),
1448         .devpor(devpor),
1449         .combout(),
1450         .regout(\inst|vga_driver_unit|hsync_state_5 ),
1451         .cout(),
1452         .cout0(),
1453         .cout1());
1454 // synopsys translate_off
1455 defparam \inst|vga_driver_unit|hsync_state_5_ .lut_mask = "ffaa";
1456 defparam \inst|vga_driver_unit|hsync_state_5_ .operation_mode = "normal";
1457 defparam \inst|vga_driver_unit|hsync_state_5_ .output_mode = "reg_only";
1458 defparam \inst|vga_driver_unit|hsync_state_5_ .register_cascade_mode = "off";
1459 defparam \inst|vga_driver_unit|hsync_state_5_ .sum_lutc_input = "datac";
1460 defparam \inst|vga_driver_unit|hsync_state_5_ .synch_mode = "on";
1461 // synopsys translate_on
1462
1463 // atom is at LC_X56_Y45_N6
1464 stratix_lcell \inst|vga_driver_unit|hsync_state_4_ (
1465 // Equation(s):
1466 // \inst|vga_driver_unit|hsync_state_4  = DFFEAS(\inst|vga_driver_unit|un10_hsync_counter_4  & \inst|vga_driver_unit|un10_hsync_counter_3  & \inst|vga_driver_unit|hsync_state_5  & \inst|vga_driver_unit|un10_hsync_counter_1 ,
1467 // GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 , , , \inst|vga_driver_unit|un6_dly_counter_0_x , )
1468
1469         .clk(\inst1|altpll_component|_clk0 ),
1470         .dataa(\inst|vga_driver_unit|un10_hsync_counter_4 ),
1471         .datab(\inst|vga_driver_unit|un10_hsync_counter_3 ),
1472         .datac(\inst|vga_driver_unit|hsync_state_5 ),
1473         .datad(\inst|vga_driver_unit|un10_hsync_counter_1 ),
1474         .aclr(gnd),
1475         .aload(gnd),
1476         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
1477         .sload(gnd),
1478         .ena(\inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 ),
1479         .cin(gnd),
1480         .cin0(gnd),
1481         .cin1(vcc),
1482         .inverta(gnd),
1483         .regcascin(gnd),
1484         .devclrn(devclrn),
1485         .devpor(devpor),
1486         .combout(),
1487         .regout(\inst|vga_driver_unit|hsync_state_4 ),
1488         .cout(),
1489         .cout0(),
1490         .cout1());
1491 // synopsys translate_off
1492 defparam \inst|vga_driver_unit|hsync_state_4_ .lut_mask = "8000";
1493 defparam \inst|vga_driver_unit|hsync_state_4_ .operation_mode = "normal";
1494 defparam \inst|vga_driver_unit|hsync_state_4_ .output_mode = "reg_only";
1495 defparam \inst|vga_driver_unit|hsync_state_4_ .register_cascade_mode = "off";
1496 defparam \inst|vga_driver_unit|hsync_state_4_ .sum_lutc_input = "datac";
1497 defparam \inst|vga_driver_unit|hsync_state_4_ .synch_mode = "on";
1498 // synopsys translate_on
1499
1500 // atom is at LC_X56_Y44_N4
1501 stratix_lcell \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2_cZ (
1502 // Equation(s):
1503 // \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2  = \inst|vga_driver_unit|hsync_state_4  & (!\inst|vga_driver_unit|un11_hsync_counter_2  # !\inst|vga_driver_unit|un11_hsync_counter_3  # !\inst|vga_driver_unit|un10_hsync_counter_1 )
1504
1505         .clk(gnd),
1506         .dataa(\inst|vga_driver_unit|un10_hsync_counter_1 ),
1507         .datab(\inst|vga_driver_unit|un11_hsync_counter_3 ),
1508         .datac(\inst|vga_driver_unit|un11_hsync_counter_2 ),
1509         .datad(\inst|vga_driver_unit|hsync_state_4 ),
1510         .aclr(gnd),
1511         .aload(gnd),
1512         .sclr(gnd),
1513         .sload(gnd),
1514         .ena(vcc),
1515         .cin(gnd),
1516         .cin0(gnd),
1517         .cin1(vcc),
1518         .inverta(gnd),
1519         .regcascin(gnd),
1520         .devclrn(devclrn),
1521         .devpor(devpor),
1522         .combout(\inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2 ),
1523         .regout(),
1524         .cout(),
1525         .cout0(),
1526         .cout1());
1527 // synopsys translate_off
1528 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2_cZ .lut_mask = "7f00";
1529 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2_cZ .operation_mode = "normal";
1530 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2_cZ .output_mode = "comb_only";
1531 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2_cZ .register_cascade_mode = "off";
1532 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2_cZ .sum_lutc_input = "datac";
1533 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2_cZ .synch_mode = "off";
1534 // synopsys translate_on
1535
1536 // atom is at LC_X56_Y45_N4
1537 stratix_lcell \inst|vga_driver_unit|hsync_state_1_ (
1538 // Equation(s):
1539 // \inst|vga_driver_unit|hsync_state_1  = DFFEAS(\inst|vga_driver_unit|un10_hsync_counter_1  & \inst|vga_driver_unit|un11_hsync_counter_2  & \inst|vga_driver_unit|un11_hsync_counter_3  & \inst|vga_driver_unit|hsync_state_4 ,
1540 // GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 , , , \inst|vga_driver_unit|un6_dly_counter_0_x , )
1541
1542         .clk(\inst1|altpll_component|_clk0 ),
1543         .dataa(\inst|vga_driver_unit|un10_hsync_counter_1 ),
1544         .datab(\inst|vga_driver_unit|un11_hsync_counter_2 ),
1545         .datac(\inst|vga_driver_unit|un11_hsync_counter_3 ),
1546         .datad(\inst|vga_driver_unit|hsync_state_4 ),
1547         .aclr(gnd),
1548         .aload(gnd),
1549         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
1550         .sload(gnd),
1551         .ena(\inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 ),
1552         .cin(gnd),
1553         .cin0(gnd),
1554         .cin1(vcc),
1555         .inverta(gnd),
1556         .regcascin(gnd),
1557         .devclrn(devclrn),
1558         .devpor(devpor),
1559         .combout(),
1560         .regout(\inst|vga_driver_unit|hsync_state_1 ),
1561         .cout(),
1562         .cout0(),
1563         .cout1());
1564 // synopsys translate_off
1565 defparam \inst|vga_driver_unit|hsync_state_1_ .lut_mask = "8000";
1566 defparam \inst|vga_driver_unit|hsync_state_1_ .operation_mode = "normal";
1567 defparam \inst|vga_driver_unit|hsync_state_1_ .output_mode = "reg_only";
1568 defparam \inst|vga_driver_unit|hsync_state_1_ .register_cascade_mode = "off";
1569 defparam \inst|vga_driver_unit|hsync_state_1_ .sum_lutc_input = "datac";
1570 defparam \inst|vga_driver_unit|hsync_state_1_ .synch_mode = "on";
1571 // synopsys translate_on
1572
1573 // atom is at LC_X56_Y44_N9
1574 stratix_lcell \inst|vga_driver_unit|hsync_state_3_ (
1575 // Equation(s):
1576 // \inst|vga_driver_unit|un1_hsync_state_next_1_sqmuxa_0  = \inst|vga_driver_unit|un13_hsync_counter  & (E1_hsync_state_3 & !\inst|vga_driver_unit|un12_hsync_counter ) # !\inst|vga_driver_unit|un13_hsync_counter  & (\inst|vga_driver_unit|hsync_state_2  #
1577 // E1_hsync_state_3 & !\inst|vga_driver_unit|un12_hsync_counter )
1578 // \inst|vga_driver_unit|hsync_state_3  = DFFEAS(\inst|vga_driver_unit|un1_hsync_state_next_1_sqmuxa_0 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 , \inst|vga_driver_unit|hsync_state_1 , ,
1579 // \inst|vga_driver_unit|un6_dly_counter_0_x , VCC)
1580
1581         .clk(\inst1|altpll_component|_clk0 ),
1582         .dataa(\inst|vga_driver_unit|un13_hsync_counter ),
1583         .datab(\inst|vga_driver_unit|hsync_state_2 ),
1584         .datac(\inst|vga_driver_unit|hsync_state_1 ),
1585         .datad(\inst|vga_driver_unit|un12_hsync_counter ),
1586         .aclr(gnd),
1587         .aload(gnd),
1588         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
1589         .sload(vcc),
1590         .ena(\inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 ),
1591         .cin(gnd),
1592         .cin0(gnd),
1593         .cin1(vcc),
1594         .inverta(gnd),
1595         .regcascin(gnd),
1596         .devclrn(devclrn),
1597         .devpor(devpor),
1598         .combout(\inst|vga_driver_unit|un1_hsync_state_next_1_sqmuxa_0 ),
1599         .regout(\inst|vga_driver_unit|hsync_state_3 ),
1600         .cout(),
1601         .cout0(),
1602         .cout1());
1603 // synopsys translate_off
1604 defparam \inst|vga_driver_unit|hsync_state_3_ .lut_mask = "44f4";
1605 defparam \inst|vga_driver_unit|hsync_state_3_ .operation_mode = "normal";
1606 defparam \inst|vga_driver_unit|hsync_state_3_ .output_mode = "reg_and_comb";
1607 defparam \inst|vga_driver_unit|hsync_state_3_ .register_cascade_mode = "off";
1608 defparam \inst|vga_driver_unit|hsync_state_3_ .sum_lutc_input = "qfbk";
1609 defparam \inst|vga_driver_unit|hsync_state_3_ .synch_mode = "on";
1610 // synopsys translate_on
1611
1612 // atom is at LC_X56_Y44_N0
1613 stratix_lcell \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1_cZ (
1614 // Equation(s):
1615 // \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1  = \inst|vga_driver_unit|hsync_state_5  & (!\inst|vga_driver_unit|un10_hsync_counter_1  # !\inst|vga_driver_unit|un10_hsync_counter_4  # !\inst|vga_driver_unit|un10_hsync_counter_3 )
1616
1617         .clk(gnd),
1618         .dataa(\inst|vga_driver_unit|un10_hsync_counter_3 ),
1619         .datab(\inst|vga_driver_unit|hsync_state_5 ),
1620         .datac(\inst|vga_driver_unit|un10_hsync_counter_4 ),
1621         .datad(\inst|vga_driver_unit|un10_hsync_counter_1 ),
1622         .aclr(gnd),
1623         .aload(gnd),
1624         .sclr(gnd),
1625         .sload(gnd),
1626         .ena(vcc),
1627         .cin(gnd),
1628         .cin0(gnd),
1629         .cin1(vcc),
1630         .inverta(gnd),
1631         .regcascin(gnd),
1632         .devclrn(devclrn),
1633         .devpor(devpor),
1634         .combout(\inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1 ),
1635         .regout(),
1636         .cout(),
1637         .cout0(),
1638         .cout1());
1639 // synopsys translate_off
1640 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1_cZ .lut_mask = "4ccc";
1641 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1_cZ .operation_mode = "normal";
1642 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1_cZ .output_mode = "comb_only";
1643 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1_cZ .register_cascade_mode = "off";
1644 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1_cZ .sum_lutc_input = "datac";
1645 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1_cZ .synch_mode = "off";
1646 // synopsys translate_on
1647
1648 // atom is at LC_X56_Y44_N7
1649 stratix_lcell \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0_cZ (
1650 // Equation(s):
1651 // \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0  = \inst|vga_driver_unit|un6_dly_counter_0_x  # !\inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2  & !\inst|vga_driver_unit|un1_hsync_state_next_1_sqmuxa_0  &
1652 // !\inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1
1653
1654         .clk(gnd),
1655         .dataa(\inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2 ),
1656         .datab(\inst|vga_driver_unit|un1_hsync_state_next_1_sqmuxa_0 ),
1657         .datac(\inst|vga_driver_unit|un6_dly_counter_0_x ),
1658         .datad(\inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1 ),
1659         .aclr(gnd),
1660         .aload(gnd),
1661         .sclr(gnd),
1662         .sload(gnd),
1663         .ena(vcc),
1664         .cin(gnd),
1665         .cin0(gnd),
1666         .cin1(vcc),
1667         .inverta(gnd),
1668         .regcascin(gnd),
1669         .devclrn(devclrn),
1670         .devpor(devpor),
1671         .combout(\inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 ),
1672         .regout(),
1673         .cout(),
1674         .cout0(),
1675         .cout1());
1676 // synopsys translate_off
1677 defparam \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0_cZ .lut_mask = "f0f1";
1678 defparam \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0_cZ .operation_mode = "normal";
1679 defparam \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0_cZ .output_mode = "comb_only";
1680 defparam \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0_cZ .register_cascade_mode = "off";
1681 defparam \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0_cZ .sum_lutc_input = "datac";
1682 defparam \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0_cZ .synch_mode = "off";
1683 // synopsys translate_on
1684
1685 // atom is at LC_X55_Y44_N6
1686 stratix_lcell \inst|vga_driver_unit|hsync_state_2_ (
1687 // Equation(s):
1688 // \inst|vga_driver_unit|hsync_state_2  = DFFEAS(\inst|vga_driver_unit|un12_hsync_counter  & \inst|vga_driver_unit|hsync_state_3 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 , , ,
1689 // \inst|vga_driver_unit|un6_dly_counter_0_x , )
1690
1691         .clk(\inst1|altpll_component|_clk0 ),
1692         .dataa(vcc),
1693         .datab(vcc),
1694         .datac(\inst|vga_driver_unit|un12_hsync_counter ),
1695         .datad(\inst|vga_driver_unit|hsync_state_3 ),
1696         .aclr(gnd),
1697         .aload(gnd),
1698         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
1699         .sload(gnd),
1700         .ena(\inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 ),
1701         .cin(gnd),
1702         .cin0(gnd),
1703         .cin1(vcc),
1704         .inverta(gnd),
1705         .regcascin(gnd),
1706         .devclrn(devclrn),
1707         .devpor(devpor),
1708         .combout(),
1709         .regout(\inst|vga_driver_unit|hsync_state_2 ),
1710         .cout(),
1711         .cout0(),
1712         .cout1());
1713 // synopsys translate_off
1714 defparam \inst|vga_driver_unit|hsync_state_2_ .lut_mask = "f000";
1715 defparam \inst|vga_driver_unit|hsync_state_2_ .operation_mode = "normal";
1716 defparam \inst|vga_driver_unit|hsync_state_2_ .output_mode = "reg_only";
1717 defparam \inst|vga_driver_unit|hsync_state_2_ .register_cascade_mode = "off";
1718 defparam \inst|vga_driver_unit|hsync_state_2_ .sum_lutc_input = "datac";
1719 defparam \inst|vga_driver_unit|hsync_state_2_ .synch_mode = "on";
1720 // synopsys translate_on
1721
1722 // atom is at LC_X55_Y44_N9
1723 stratix_lcell \inst|vga_driver_unit|hsync_state_0_ (
1724 // Equation(s):
1725 // \inst|vga_driver_unit|hsync_state_0  = DFFEAS(\inst|vga_driver_unit|hsync_state_2  & (\inst|vga_driver_unit|un13_hsync_counter ), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 , , ,
1726 // \inst|vga_driver_unit|un6_dly_counter_0_x , )
1727
1728         .clk(\inst1|altpll_component|_clk0 ),
1729         .dataa(vcc),
1730         .datab(\inst|vga_driver_unit|hsync_state_2 ),
1731         .datac(vcc),
1732         .datad(\inst|vga_driver_unit|un13_hsync_counter ),
1733         .aclr(gnd),
1734         .aload(gnd),
1735         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
1736         .sload(gnd),
1737         .ena(\inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 ),
1738         .cin(gnd),
1739         .cin0(gnd),
1740         .cin1(vcc),
1741         .inverta(gnd),
1742         .regcascin(gnd),
1743         .devclrn(devclrn),
1744         .devpor(devpor),
1745         .combout(),
1746         .regout(\inst|vga_driver_unit|hsync_state_0 ),
1747         .cout(),
1748         .cout0(),
1749         .cout1());
1750 // synopsys translate_off
1751 defparam \inst|vga_driver_unit|hsync_state_0_ .lut_mask = "cc00";
1752 defparam \inst|vga_driver_unit|hsync_state_0_ .operation_mode = "normal";
1753 defparam \inst|vga_driver_unit|hsync_state_0_ .output_mode = "reg_only";
1754 defparam \inst|vga_driver_unit|hsync_state_0_ .register_cascade_mode = "off";
1755 defparam \inst|vga_driver_unit|hsync_state_0_ .sum_lutc_input = "datac";
1756 defparam \inst|vga_driver_unit|hsync_state_0_ .synch_mode = "on";
1757 // synopsys translate_on
1758
1759 // atom is at LC_X36_Y33_N1
1760 stratix_lcell \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa_cZ (
1761 // Equation(s):
1762 // \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa  = \reset~combout  & \inst|dly_counter [1] & \inst|dly_counter [0] & !\inst|vga_driver_unit|d_set_hsync_counter
1763
1764         .clk(gnd),
1765         .dataa(\reset~combout ),
1766         .datab(\inst|dly_counter [1]),
1767         .datac(\inst|dly_counter [0]),
1768         .datad(\inst|vga_driver_unit|d_set_hsync_counter ),
1769         .aclr(gnd),
1770         .aload(gnd),
1771         .sclr(gnd),
1772         .sload(gnd),
1773         .ena(vcc),
1774         .cin(gnd),
1775         .cin0(gnd),
1776         .cin1(vcc),
1777         .inverta(gnd),
1778         .regcascin(gnd),
1779         .devclrn(devclrn),
1780         .devpor(devpor),
1781         .combout(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
1782         .regout(),
1783         .cout(),
1784         .cout0(),
1785         .cout1());
1786 // synopsys translate_off
1787 defparam \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa_cZ .lut_mask = "0080";
1788 defparam \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa_cZ .operation_mode = "normal";
1789 defparam \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa_cZ .output_mode = "comb_only";
1790 defparam \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa_cZ .register_cascade_mode = "off";
1791 defparam \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa_cZ .sum_lutc_input = "datac";
1792 defparam \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa_cZ .synch_mode = "off";
1793 // synopsys translate_on
1794
1795 // atom is at LC_X56_Y44_N2
1796 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_2 (
1797 // Equation(s):
1798 // \inst|vga_driver_unit|un13_hsync_counter_2  = \inst|vga_driver_unit|hsync_counter_4  & !\inst|vga_driver_unit|hsync_counter_5  & \inst|vga_driver_unit|hsync_counter_9  & \inst|vga_driver_unit|hsync_counter_8
1799
1800         .clk(gnd),
1801         .dataa(\inst|vga_driver_unit|hsync_counter_4 ),
1802         .datab(\inst|vga_driver_unit|hsync_counter_5 ),
1803         .datac(\inst|vga_driver_unit|hsync_counter_9 ),
1804         .datad(\inst|vga_driver_unit|hsync_counter_8 ),
1805         .aclr(gnd),
1806         .aload(gnd),
1807         .sclr(gnd),
1808         .sload(gnd),
1809         .ena(vcc),
1810         .cin(gnd),
1811         .cin0(gnd),
1812         .cin1(vcc),
1813         .inverta(gnd),
1814         .regcascin(gnd),
1815         .devclrn(devclrn),
1816         .devpor(devpor),
1817         .combout(\inst|vga_driver_unit|un13_hsync_counter_2 ),
1818         .regout(),
1819         .cout(),
1820         .cout0(),
1821         .cout1());
1822 // synopsys translate_off
1823 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_2 .lut_mask = "2000";
1824 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_2 .operation_mode = "normal";
1825 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_2 .output_mode = "comb_only";
1826 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_2 .register_cascade_mode = "off";
1827 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_2 .sum_lutc_input = "datac";
1828 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_2 .synch_mode = "off";
1829 // synopsys translate_on
1830
1831 // atom is at LC_X56_Y44_N3
1832 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter (
1833 // Equation(s):
1834 // \inst|vga_driver_unit|un13_hsync_counter  = \inst|vga_driver_unit|un13_hsync_counter_2  & !\inst|vga_driver_unit|hsync_counter_7  & !\inst|vga_driver_unit|hsync_counter_6  & \inst|vga_driver_unit|un13_hsync_counter_7
1835
1836         .clk(gnd),
1837         .dataa(\inst|vga_driver_unit|un13_hsync_counter_2 ),
1838         .datab(\inst|vga_driver_unit|hsync_counter_7 ),
1839         .datac(\inst|vga_driver_unit|hsync_counter_6 ),
1840         .datad(\inst|vga_driver_unit|un13_hsync_counter_7 ),
1841         .aclr(gnd),
1842         .aload(gnd),
1843         .sclr(gnd),
1844         .sload(gnd),
1845         .ena(vcc),
1846         .cin(gnd),
1847         .cin0(gnd),
1848         .cin1(vcc),
1849         .inverta(gnd),
1850         .regcascin(gnd),
1851         .devclrn(devclrn),
1852         .devpor(devpor),
1853         .combout(\inst|vga_driver_unit|un13_hsync_counter ),
1854         .regout(),
1855         .cout(),
1856         .cout0(),
1857         .cout1());
1858 // synopsys translate_off
1859 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter .lut_mask = "0200";
1860 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter .operation_mode = "normal";
1861 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter .output_mode = "comb_only";
1862 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter .register_cascade_mode = "off";
1863 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter .sum_lutc_input = "datac";
1864 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter .synch_mode = "off";
1865 // synopsys translate_on
1866
1867 // atom is at LC_X34_Y34_N3
1868 stratix_lcell \inst|vga_driver_unit|un1_hsync_state_3_0_cZ (
1869 // Equation(s):
1870 // \inst|vga_driver_unit|un1_hsync_state_3_0  = \inst|vga_driver_unit|hsync_state_3  # \inst|vga_driver_unit|hsync_state_1
1871
1872         .clk(gnd),
1873         .dataa(vcc),
1874         .datab(\inst|vga_driver_unit|hsync_state_3 ),
1875         .datac(vcc),
1876         .datad(\inst|vga_driver_unit|hsync_state_1 ),
1877         .aclr(gnd),
1878         .aload(gnd),
1879         .sclr(gnd),
1880         .sload(gnd),
1881         .ena(vcc),
1882         .cin(gnd),
1883         .cin0(gnd),
1884         .cin1(vcc),
1885         .inverta(gnd),
1886         .regcascin(gnd),
1887         .devclrn(devclrn),
1888         .devpor(devpor),
1889         .combout(\inst|vga_driver_unit|un1_hsync_state_3_0 ),
1890         .regout(),
1891         .cout(),
1892         .cout0(),
1893         .cout1());
1894 // synopsys translate_off
1895 defparam \inst|vga_driver_unit|un1_hsync_state_3_0_cZ .lut_mask = "ffcc";
1896 defparam \inst|vga_driver_unit|un1_hsync_state_3_0_cZ .operation_mode = "normal";
1897 defparam \inst|vga_driver_unit|un1_hsync_state_3_0_cZ .output_mode = "comb_only";
1898 defparam \inst|vga_driver_unit|un1_hsync_state_3_0_cZ .register_cascade_mode = "off";
1899 defparam \inst|vga_driver_unit|un1_hsync_state_3_0_cZ .sum_lutc_input = "datac";
1900 defparam \inst|vga_driver_unit|un1_hsync_state_3_0_cZ .synch_mode = "off";
1901 // synopsys translate_on
1902
1903 // atom is at LC_X34_Y34_N2
1904 stratix_lcell \inst|vga_driver_unit|h_sync_1_0_0_0_g1_cZ (
1905 // Equation(s):
1906 // \inst|vga_driver_unit|h_sync_1_0_0_0_g1  = \inst|vga_driver_unit|un1_hsync_state_3_0  & \inst|vga_driver_unit|h_sync  # !\inst|vga_driver_unit|un1_hsync_state_3_0  & (\inst|vga_driver_unit|hsync_state_2  & \inst|vga_driver_unit|h_sync  #
1907 // !\inst|vga_driver_unit|hsync_state_2  & (\inst|vga_driver_unit|hsync_state_4 ))
1908
1909         .clk(gnd),
1910         .dataa(\inst|vga_driver_unit|un1_hsync_state_3_0 ),
1911         .datab(\inst|vga_driver_unit|h_sync ),
1912         .datac(\inst|vga_driver_unit|hsync_state_2 ),
1913         .datad(\inst|vga_driver_unit|hsync_state_4 ),
1914         .aclr(gnd),
1915         .aload(gnd),
1916         .sclr(gnd),
1917         .sload(gnd),
1918         .ena(vcc),
1919         .cin(gnd),
1920         .cin0(gnd),
1921         .cin1(vcc),
1922         .inverta(gnd),
1923         .regcascin(gnd),
1924         .devclrn(devclrn),
1925         .devpor(devpor),
1926         .combout(\inst|vga_driver_unit|h_sync_1_0_0_0_g1 ),
1927         .regout(),
1928         .cout(),
1929         .cout0(),
1930         .cout1());
1931 // synopsys translate_off
1932 defparam \inst|vga_driver_unit|h_sync_1_0_0_0_g1_cZ .lut_mask = "cdc8";
1933 defparam \inst|vga_driver_unit|h_sync_1_0_0_0_g1_cZ .operation_mode = "normal";
1934 defparam \inst|vga_driver_unit|h_sync_1_0_0_0_g1_cZ .output_mode = "comb_only";
1935 defparam \inst|vga_driver_unit|h_sync_1_0_0_0_g1_cZ .register_cascade_mode = "off";
1936 defparam \inst|vga_driver_unit|h_sync_1_0_0_0_g1_cZ .sum_lutc_input = "datac";
1937 defparam \inst|vga_driver_unit|h_sync_1_0_0_0_g1_cZ .synch_mode = "off";
1938 // synopsys translate_on
1939
1940 // atom is at LC_X34_Y34_N9
1941 stratix_lcell \inst|vga_driver_unit|h_sync_Z (
1942 // Equation(s):
1943 // \inst|vga_driver_unit|h_sync  = DFFEAS(\inst|vga_driver_unit|h_sync_1_0_0_0_g1  # !\inst|dly_counter [0] # !\reset~combout  # !\inst|dly_counter [1], GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , , , )
1944
1945         .clk(\inst1|altpll_component|_clk0 ),
1946         .dataa(\inst|dly_counter [1]),
1947         .datab(\reset~combout ),
1948         .datac(\inst|dly_counter [0]),
1949         .datad(\inst|vga_driver_unit|h_sync_1_0_0_0_g1 ),
1950         .aclr(gnd),
1951         .aload(gnd),
1952         .sclr(gnd),
1953         .sload(gnd),
1954         .ena(vcc),
1955         .cin(gnd),
1956         .cin0(gnd),
1957         .cin1(vcc),
1958         .inverta(gnd),
1959         .regcascin(gnd),
1960         .devclrn(devclrn),
1961         .devpor(devpor),
1962         .combout(),
1963         .regout(\inst|vga_driver_unit|h_sync ),
1964         .cout(),
1965         .cout0(),
1966         .cout1());
1967 // synopsys translate_off
1968 defparam \inst|vga_driver_unit|h_sync_Z .lut_mask = "ff7f";
1969 defparam \inst|vga_driver_unit|h_sync_Z .operation_mode = "normal";
1970 defparam \inst|vga_driver_unit|h_sync_Z .output_mode = "reg_only";
1971 defparam \inst|vga_driver_unit|h_sync_Z .register_cascade_mode = "off";
1972 defparam \inst|vga_driver_unit|h_sync_Z .sum_lutc_input = "datac";
1973 defparam \inst|vga_driver_unit|h_sync_Z .synch_mode = "off";
1974 // synopsys translate_on
1975
1976 // atom is at LC_X35_Y33_N0
1977 stratix_lcell \inst|vga_driver_unit|vsync_counter_0_ (
1978 // Equation(s):
1979 // \inst|vga_driver_unit|vsync_counter_0  = DFFEAS(\inst|vga_driver_unit|vsync_counter_0  $ \inst|vga_driver_unit|d_set_hsync_counter , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , ,
1980 // !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
1981 // \inst|vga_driver_unit|vsync_counter_cout [0] = CARRY(\inst|vga_driver_unit|vsync_counter_0  & \inst|vga_driver_unit|d_set_hsync_counter )
1982 // \inst|vga_driver_unit|vsync_counter_cout[0]~COUT1_10  = CARRY(\inst|vga_driver_unit|vsync_counter_0  & \inst|vga_driver_unit|d_set_hsync_counter )
1983
1984         .clk(\inst1|altpll_component|_clk0 ),
1985         .dataa(\inst|vga_driver_unit|vsync_counter_0 ),
1986         .datab(\inst|vga_driver_unit|d_set_hsync_counter ),
1987         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
1988         .datad(vcc),
1989         .aclr(gnd),
1990         .aload(gnd),
1991         .sclr(!\inst|vga_driver_unit|G_16_i ),
1992         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
1993         .ena(vcc),
1994         .cin(gnd),
1995         .cin0(gnd),
1996         .cin1(vcc),
1997         .inverta(gnd),
1998         .regcascin(gnd),
1999         .devclrn(devclrn),
2000         .devpor(devpor),
2001         .combout(),
2002         .regout(\inst|vga_driver_unit|vsync_counter_0 ),
2003         .cout(),
2004         .cout0(\inst|vga_driver_unit|vsync_counter_cout [0]),
2005         .cout1(\inst|vga_driver_unit|vsync_counter_cout[0]~COUT1_10 ));
2006 // synopsys translate_off
2007 defparam \inst|vga_driver_unit|vsync_counter_0_ .lut_mask = "6688";
2008 defparam \inst|vga_driver_unit|vsync_counter_0_ .operation_mode = "arithmetic";
2009 defparam \inst|vga_driver_unit|vsync_counter_0_ .output_mode = "reg_only";
2010 defparam \inst|vga_driver_unit|vsync_counter_0_ .register_cascade_mode = "off";
2011 defparam \inst|vga_driver_unit|vsync_counter_0_ .sum_lutc_input = "datac";
2012 defparam \inst|vga_driver_unit|vsync_counter_0_ .synch_mode = "on";
2013 // synopsys translate_on
2014
2015 // atom is at LC_X35_Y33_N1
2016 stratix_lcell \inst|vga_driver_unit|vsync_counter_1_ (
2017 // Equation(s):
2018 // \inst|vga_driver_unit|vsync_counter_1  = DFFEAS(\inst|vga_driver_unit|vsync_counter_1  $ \inst|vga_driver_unit|vsync_counter_cout [0], GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , ,
2019 // !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
2020 // \inst|vga_driver_unit|vsync_counter_cout [1] = CARRY(!\inst|vga_driver_unit|vsync_counter_cout [0] # !\inst|vga_driver_unit|vsync_counter_1 )
2021 // \inst|vga_driver_unit|vsync_counter_cout[1]~COUT1_12  = CARRY(!\inst|vga_driver_unit|vsync_counter_cout[0]~COUT1_10  # !\inst|vga_driver_unit|vsync_counter_1 )
2022
2023         .clk(\inst1|altpll_component|_clk0 ),
2024         .dataa(vcc),
2025         .datab(\inst|vga_driver_unit|vsync_counter_1 ),
2026         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
2027         .datad(vcc),
2028         .aclr(gnd),
2029         .aload(gnd),
2030         .sclr(!\inst|vga_driver_unit|G_16_i ),
2031         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2032         .ena(vcc),
2033         .cin(gnd),
2034         .cin0(\inst|vga_driver_unit|vsync_counter_cout [0]),
2035         .cin1(\inst|vga_driver_unit|vsync_counter_cout[0]~COUT1_10 ),
2036         .inverta(gnd),
2037         .regcascin(gnd),
2038         .devclrn(devclrn),
2039         .devpor(devpor),
2040         .combout(),
2041         .regout(\inst|vga_driver_unit|vsync_counter_1 ),
2042         .cout(),
2043         .cout0(\inst|vga_driver_unit|vsync_counter_cout [1]),
2044         .cout1(\inst|vga_driver_unit|vsync_counter_cout[1]~COUT1_12 ));
2045 // synopsys translate_off
2046 defparam \inst|vga_driver_unit|vsync_counter_1_ .cin0_used = "true";
2047 defparam \inst|vga_driver_unit|vsync_counter_1_ .cin1_used = "true";
2048 defparam \inst|vga_driver_unit|vsync_counter_1_ .lut_mask = "3c3f";
2049 defparam \inst|vga_driver_unit|vsync_counter_1_ .operation_mode = "arithmetic";
2050 defparam \inst|vga_driver_unit|vsync_counter_1_ .output_mode = "reg_only";
2051 defparam \inst|vga_driver_unit|vsync_counter_1_ .register_cascade_mode = "off";
2052 defparam \inst|vga_driver_unit|vsync_counter_1_ .sum_lutc_input = "cin";
2053 defparam \inst|vga_driver_unit|vsync_counter_1_ .synch_mode = "on";
2054 // synopsys translate_on
2055
2056 // atom is at LC_X35_Y33_N2
2057 stratix_lcell \inst|vga_driver_unit|vsync_counter_2_ (
2058 // Equation(s):
2059 // \inst|vga_driver_unit|vsync_counter_2  = DFFEAS(\inst|vga_driver_unit|vsync_counter_2  $ (!\inst|vga_driver_unit|vsync_counter_cout [1]), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , ,
2060 // !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
2061 // \inst|vga_driver_unit|vsync_counter_cout [2] = CARRY(\inst|vga_driver_unit|vsync_counter_2  & (!\inst|vga_driver_unit|vsync_counter_cout [1]))
2062 // \inst|vga_driver_unit|vsync_counter_cout[2]~COUT1_14  = CARRY(\inst|vga_driver_unit|vsync_counter_2  & (!\inst|vga_driver_unit|vsync_counter_cout[1]~COUT1_12 ))
2063
2064         .clk(\inst1|altpll_component|_clk0 ),
2065         .dataa(\inst|vga_driver_unit|vsync_counter_2 ),
2066         .datab(vcc),
2067         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
2068         .datad(vcc),
2069         .aclr(gnd),
2070         .aload(gnd),
2071         .sclr(!\inst|vga_driver_unit|G_16_i ),
2072         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2073         .ena(vcc),
2074         .cin(gnd),
2075         .cin0(\inst|vga_driver_unit|vsync_counter_cout [1]),
2076         .cin1(\inst|vga_driver_unit|vsync_counter_cout[1]~COUT1_12 ),
2077         .inverta(gnd),
2078         .regcascin(gnd),
2079         .devclrn(devclrn),
2080         .devpor(devpor),
2081         .combout(),
2082         .regout(\inst|vga_driver_unit|vsync_counter_2 ),
2083         .cout(),
2084         .cout0(\inst|vga_driver_unit|vsync_counter_cout [2]),
2085         .cout1(\inst|vga_driver_unit|vsync_counter_cout[2]~COUT1_14 ));
2086 // synopsys translate_off
2087 defparam \inst|vga_driver_unit|vsync_counter_2_ .cin0_used = "true";
2088 defparam \inst|vga_driver_unit|vsync_counter_2_ .cin1_used = "true";
2089 defparam \inst|vga_driver_unit|vsync_counter_2_ .lut_mask = "a50a";
2090 defparam \inst|vga_driver_unit|vsync_counter_2_ .operation_mode = "arithmetic";
2091 defparam \inst|vga_driver_unit|vsync_counter_2_ .output_mode = "reg_only";
2092 defparam \inst|vga_driver_unit|vsync_counter_2_ .register_cascade_mode = "off";
2093 defparam \inst|vga_driver_unit|vsync_counter_2_ .sum_lutc_input = "cin";
2094 defparam \inst|vga_driver_unit|vsync_counter_2_ .synch_mode = "on";
2095 // synopsys translate_on
2096
2097 // atom is at LC_X35_Y33_N3
2098 stratix_lcell \inst|vga_driver_unit|vsync_counter_3_ (
2099 // Equation(s):
2100 // \inst|vga_driver_unit|vsync_counter_3  = DFFEAS(\inst|vga_driver_unit|vsync_counter_3  $ (\inst|vga_driver_unit|vsync_counter_cout [2]), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , ,
2101 // !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
2102 // \inst|vga_driver_unit|vsync_counter_cout [3] = CARRY(!\inst|vga_driver_unit|vsync_counter_cout [2] # !\inst|vga_driver_unit|vsync_counter_3 )
2103 // \inst|vga_driver_unit|vsync_counter_cout[3]~COUT1_16  = CARRY(!\inst|vga_driver_unit|vsync_counter_cout[2]~COUT1_14  # !\inst|vga_driver_unit|vsync_counter_3 )
2104
2105         .clk(\inst1|altpll_component|_clk0 ),
2106         .dataa(\inst|vga_driver_unit|vsync_counter_3 ),
2107         .datab(vcc),
2108         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
2109         .datad(vcc),
2110         .aclr(gnd),
2111         .aload(gnd),
2112         .sclr(!\inst|vga_driver_unit|G_16_i ),
2113         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2114         .ena(vcc),
2115         .cin(gnd),
2116         .cin0(\inst|vga_driver_unit|vsync_counter_cout [2]),
2117         .cin1(\inst|vga_driver_unit|vsync_counter_cout[2]~COUT1_14 ),
2118         .inverta(gnd),
2119         .regcascin(gnd),
2120         .devclrn(devclrn),
2121         .devpor(devpor),
2122         .combout(),
2123         .regout(\inst|vga_driver_unit|vsync_counter_3 ),
2124         .cout(),
2125         .cout0(\inst|vga_driver_unit|vsync_counter_cout [3]),
2126         .cout1(\inst|vga_driver_unit|vsync_counter_cout[3]~COUT1_16 ));
2127 // synopsys translate_off
2128 defparam \inst|vga_driver_unit|vsync_counter_3_ .cin0_used = "true";
2129 defparam \inst|vga_driver_unit|vsync_counter_3_ .cin1_used = "true";
2130 defparam \inst|vga_driver_unit|vsync_counter_3_ .lut_mask = "5a5f";
2131 defparam \inst|vga_driver_unit|vsync_counter_3_ .operation_mode = "arithmetic";
2132 defparam \inst|vga_driver_unit|vsync_counter_3_ .output_mode = "reg_only";
2133 defparam \inst|vga_driver_unit|vsync_counter_3_ .register_cascade_mode = "off";
2134 defparam \inst|vga_driver_unit|vsync_counter_3_ .sum_lutc_input = "cin";
2135 defparam \inst|vga_driver_unit|vsync_counter_3_ .synch_mode = "on";
2136 // synopsys translate_on
2137
2138 // atom is at LC_X35_Y33_N4
2139 stratix_lcell \inst|vga_driver_unit|vsync_counter_4_ (
2140 // Equation(s):
2141 // \inst|vga_driver_unit|vsync_counter_4  = DFFEAS(\inst|vga_driver_unit|vsync_counter_4  $ (!\inst|vga_driver_unit|vsync_counter_cout [3]), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , ,
2142 // !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
2143 // \inst|vga_driver_unit|vsync_counter_cout [4] = CARRY(\inst|vga_driver_unit|vsync_counter_4  & (!\inst|vga_driver_unit|vsync_counter_cout[3]~COUT1_16 ))
2144
2145         .clk(\inst1|altpll_component|_clk0 ),
2146         .dataa(\inst|vga_driver_unit|vsync_counter_4 ),
2147         .datab(vcc),
2148         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
2149         .datad(vcc),
2150         .aclr(gnd),
2151         .aload(gnd),
2152         .sclr(!\inst|vga_driver_unit|G_16_i ),
2153         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2154         .ena(vcc),
2155         .cin(gnd),
2156         .cin0(\inst|vga_driver_unit|vsync_counter_cout [3]),
2157         .cin1(\inst|vga_driver_unit|vsync_counter_cout[3]~COUT1_16 ),
2158         .inverta(gnd),
2159         .regcascin(gnd),
2160         .devclrn(devclrn),
2161         .devpor(devpor),
2162         .combout(),
2163         .regout(\inst|vga_driver_unit|vsync_counter_4 ),
2164         .cout(\inst|vga_driver_unit|vsync_counter_cout [4]),
2165         .cout0(),
2166         .cout1());
2167 // synopsys translate_off
2168 defparam \inst|vga_driver_unit|vsync_counter_4_ .cin0_used = "true";
2169 defparam \inst|vga_driver_unit|vsync_counter_4_ .cin1_used = "true";
2170 defparam \inst|vga_driver_unit|vsync_counter_4_ .lut_mask = "a50a";
2171 defparam \inst|vga_driver_unit|vsync_counter_4_ .operation_mode = "arithmetic";
2172 defparam \inst|vga_driver_unit|vsync_counter_4_ .output_mode = "reg_only";
2173 defparam \inst|vga_driver_unit|vsync_counter_4_ .register_cascade_mode = "off";
2174 defparam \inst|vga_driver_unit|vsync_counter_4_ .sum_lutc_input = "cin";
2175 defparam \inst|vga_driver_unit|vsync_counter_4_ .synch_mode = "on";
2176 // synopsys translate_on
2177
2178 // atom is at LC_X35_Y33_N5
2179 stratix_lcell \inst|vga_driver_unit|vsync_counter_5_ (
2180 // Equation(s):
2181 // \inst|vga_driver_unit|vsync_counter_5  = DFFEAS(\inst|vga_driver_unit|vsync_counter_5  $ \inst|vga_driver_unit|vsync_counter_cout [4], GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , ,
2182 // !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
2183 // \inst|vga_driver_unit|vsync_counter_cout [5] = CARRY(!\inst|vga_driver_unit|vsync_counter_cout [4] # !\inst|vga_driver_unit|vsync_counter_5 )
2184 // \inst|vga_driver_unit|vsync_counter_cout[5]~COUT1_18  = CARRY(!\inst|vga_driver_unit|vsync_counter_cout [4] # !\inst|vga_driver_unit|vsync_counter_5 )
2185
2186         .clk(\inst1|altpll_component|_clk0 ),
2187         .dataa(vcc),
2188         .datab(\inst|vga_driver_unit|vsync_counter_5 ),
2189         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
2190         .datad(vcc),
2191         .aclr(gnd),
2192         .aload(gnd),
2193         .sclr(!\inst|vga_driver_unit|G_16_i ),
2194         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2195         .ena(vcc),
2196         .cin(\inst|vga_driver_unit|vsync_counter_cout [4]),
2197         .cin0(gnd),
2198         .cin1(vcc),
2199         .inverta(gnd),
2200         .regcascin(gnd),
2201         .devclrn(devclrn),
2202         .devpor(devpor),
2203         .combout(),
2204         .regout(\inst|vga_driver_unit|vsync_counter_5 ),
2205         .cout(),
2206         .cout0(\inst|vga_driver_unit|vsync_counter_cout [5]),
2207         .cout1(\inst|vga_driver_unit|vsync_counter_cout[5]~COUT1_18 ));
2208 // synopsys translate_off
2209 defparam \inst|vga_driver_unit|vsync_counter_5_ .cin_used = "true";
2210 defparam \inst|vga_driver_unit|vsync_counter_5_ .lut_mask = "3c3f";
2211 defparam \inst|vga_driver_unit|vsync_counter_5_ .operation_mode = "arithmetic";
2212 defparam \inst|vga_driver_unit|vsync_counter_5_ .output_mode = "reg_only";
2213 defparam \inst|vga_driver_unit|vsync_counter_5_ .register_cascade_mode = "off";
2214 defparam \inst|vga_driver_unit|vsync_counter_5_ .sum_lutc_input = "cin";
2215 defparam \inst|vga_driver_unit|vsync_counter_5_ .synch_mode = "on";
2216 // synopsys translate_on
2217
2218 // atom is at LC_X35_Y33_N6
2219 stratix_lcell \inst|vga_driver_unit|vsync_counter_6_ (
2220 // Equation(s):
2221 // \inst|vga_driver_unit|vsync_counter_6  = DFFEAS(\inst|vga_driver_unit|vsync_counter_6  $ !(!\inst|vga_driver_unit|vsync_counter_cout [4] & \inst|vga_driver_unit|vsync_counter_cout [5]) # (\inst|vga_driver_unit|vsync_counter_cout [4] &
2222 // \inst|vga_driver_unit|vsync_counter_cout[5]~COUT1_18 ), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , , !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
2223 // \inst|vga_driver_unit|vsync_counter_cout [6] = CARRY(\inst|vga_driver_unit|vsync_counter_6  & !\inst|vga_driver_unit|vsync_counter_cout [5])
2224 // \inst|vga_driver_unit|vsync_counter_cout[6]~COUT1_20  = CARRY(\inst|vga_driver_unit|vsync_counter_6  & !\inst|vga_driver_unit|vsync_counter_cout[5]~COUT1_18 )
2225
2226         .clk(\inst1|altpll_component|_clk0 ),
2227         .dataa(vcc),
2228         .datab(\inst|vga_driver_unit|vsync_counter_6 ),
2229         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
2230         .datad(vcc),
2231         .aclr(gnd),
2232         .aload(gnd),
2233         .sclr(!\inst|vga_driver_unit|G_16_i ),
2234         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2235         .ena(vcc),
2236         .cin(\inst|vga_driver_unit|vsync_counter_cout [4]),
2237         .cin0(\inst|vga_driver_unit|vsync_counter_cout [5]),
2238         .cin1(\inst|vga_driver_unit|vsync_counter_cout[5]~COUT1_18 ),
2239         .inverta(gnd),
2240         .regcascin(gnd),
2241         .devclrn(devclrn),
2242         .devpor(devpor),
2243         .combout(),
2244         .regout(\inst|vga_driver_unit|vsync_counter_6 ),
2245         .cout(),
2246         .cout0(\inst|vga_driver_unit|vsync_counter_cout [6]),
2247         .cout1(\inst|vga_driver_unit|vsync_counter_cout[6]~COUT1_20 ));
2248 // synopsys translate_off
2249 defparam \inst|vga_driver_unit|vsync_counter_6_ .cin0_used = "true";
2250 defparam \inst|vga_driver_unit|vsync_counter_6_ .cin1_used = "true";
2251 defparam \inst|vga_driver_unit|vsync_counter_6_ .cin_used = "true";
2252 defparam \inst|vga_driver_unit|vsync_counter_6_ .lut_mask = "c30c";
2253 defparam \inst|vga_driver_unit|vsync_counter_6_ .operation_mode = "arithmetic";
2254 defparam \inst|vga_driver_unit|vsync_counter_6_ .output_mode = "reg_only";
2255 defparam \inst|vga_driver_unit|vsync_counter_6_ .register_cascade_mode = "off";
2256 defparam \inst|vga_driver_unit|vsync_counter_6_ .sum_lutc_input = "cin";
2257 defparam \inst|vga_driver_unit|vsync_counter_6_ .synch_mode = "on";
2258 // synopsys translate_on
2259
2260 // atom is at LC_X35_Y33_N7
2261 stratix_lcell \inst|vga_driver_unit|vsync_counter_7_ (
2262 // Equation(s):
2263 // \inst|vga_driver_unit|vsync_counter_7  = DFFEAS(\inst|vga_driver_unit|vsync_counter_7  $ ((!\inst|vga_driver_unit|vsync_counter_cout [4] & \inst|vga_driver_unit|vsync_counter_cout [6]) # (\inst|vga_driver_unit|vsync_counter_cout [4] &
2264 // \inst|vga_driver_unit|vsync_counter_cout[6]~COUT1_20 )), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , , !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
2265 // \inst|vga_driver_unit|vsync_counter_cout [7] = CARRY(!\inst|vga_driver_unit|vsync_counter_cout [6] # !\inst|vga_driver_unit|vsync_counter_7 )
2266 // \inst|vga_driver_unit|vsync_counter_cout[7]~COUT1_22  = CARRY(!\inst|vga_driver_unit|vsync_counter_cout[6]~COUT1_20  # !\inst|vga_driver_unit|vsync_counter_7 )
2267
2268         .clk(\inst1|altpll_component|_clk0 ),
2269         .dataa(\inst|vga_driver_unit|vsync_counter_7 ),
2270         .datab(vcc),
2271         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
2272         .datad(vcc),
2273         .aclr(gnd),
2274         .aload(gnd),
2275         .sclr(!\inst|vga_driver_unit|G_16_i ),
2276         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2277         .ena(vcc),
2278         .cin(\inst|vga_driver_unit|vsync_counter_cout [4]),
2279         .cin0(\inst|vga_driver_unit|vsync_counter_cout [6]),
2280         .cin1(\inst|vga_driver_unit|vsync_counter_cout[6]~COUT1_20 ),
2281         .inverta(gnd),
2282         .regcascin(gnd),
2283         .devclrn(devclrn),
2284         .devpor(devpor),
2285         .combout(),
2286         .regout(\inst|vga_driver_unit|vsync_counter_7 ),
2287         .cout(),
2288         .cout0(\inst|vga_driver_unit|vsync_counter_cout [7]),
2289         .cout1(\inst|vga_driver_unit|vsync_counter_cout[7]~COUT1_22 ));
2290 // synopsys translate_off
2291 defparam \inst|vga_driver_unit|vsync_counter_7_ .cin0_used = "true";
2292 defparam \inst|vga_driver_unit|vsync_counter_7_ .cin1_used = "true";
2293 defparam \inst|vga_driver_unit|vsync_counter_7_ .cin_used = "true";
2294 defparam \inst|vga_driver_unit|vsync_counter_7_ .lut_mask = "5a5f";
2295 defparam \inst|vga_driver_unit|vsync_counter_7_ .operation_mode = "arithmetic";
2296 defparam \inst|vga_driver_unit|vsync_counter_7_ .output_mode = "reg_only";
2297 defparam \inst|vga_driver_unit|vsync_counter_7_ .register_cascade_mode = "off";
2298 defparam \inst|vga_driver_unit|vsync_counter_7_ .sum_lutc_input = "cin";
2299 defparam \inst|vga_driver_unit|vsync_counter_7_ .synch_mode = "on";
2300 // synopsys translate_on
2301
2302 // atom is at LC_X35_Y33_N8
2303 stratix_lcell \inst|vga_driver_unit|vsync_counter_8_ (
2304 // Equation(s):
2305 // \inst|vga_driver_unit|vsync_counter_8  = DFFEAS(\inst|vga_driver_unit|vsync_counter_8  $ (!(!\inst|vga_driver_unit|vsync_counter_cout [4] & \inst|vga_driver_unit|vsync_counter_cout [7]) # (\inst|vga_driver_unit|vsync_counter_cout [4] &
2306 // \inst|vga_driver_unit|vsync_counter_cout[7]~COUT1_22 )), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , , !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
2307 // \inst|vga_driver_unit|vsync_counter_cout [8] = CARRY(\inst|vga_driver_unit|vsync_counter_8  & (!\inst|vga_driver_unit|vsync_counter_cout [7]))
2308 // \inst|vga_driver_unit|vsync_counter_cout[8]~COUT1_24  = CARRY(\inst|vga_driver_unit|vsync_counter_8  & (!\inst|vga_driver_unit|vsync_counter_cout[7]~COUT1_22 ))
2309
2310         .clk(\inst1|altpll_component|_clk0 ),
2311         .dataa(\inst|vga_driver_unit|vsync_counter_8 ),
2312         .datab(vcc),
2313         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
2314         .datad(vcc),
2315         .aclr(gnd),
2316         .aload(gnd),
2317         .sclr(!\inst|vga_driver_unit|G_16_i ),
2318         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2319         .ena(vcc),
2320         .cin(\inst|vga_driver_unit|vsync_counter_cout [4]),
2321         .cin0(\inst|vga_driver_unit|vsync_counter_cout [7]),
2322         .cin1(\inst|vga_driver_unit|vsync_counter_cout[7]~COUT1_22 ),
2323         .inverta(gnd),
2324         .regcascin(gnd),
2325         .devclrn(devclrn),
2326         .devpor(devpor),
2327         .combout(),
2328         .regout(\inst|vga_driver_unit|vsync_counter_8 ),
2329         .cout(),
2330         .cout0(\inst|vga_driver_unit|vsync_counter_cout [8]),
2331         .cout1(\inst|vga_driver_unit|vsync_counter_cout[8]~COUT1_24 ));
2332 // synopsys translate_off
2333 defparam \inst|vga_driver_unit|vsync_counter_8_ .cin0_used = "true";
2334 defparam \inst|vga_driver_unit|vsync_counter_8_ .cin1_used = "true";
2335 defparam \inst|vga_driver_unit|vsync_counter_8_ .cin_used = "true";
2336 defparam \inst|vga_driver_unit|vsync_counter_8_ .lut_mask = "a50a";
2337 defparam \inst|vga_driver_unit|vsync_counter_8_ .operation_mode = "arithmetic";
2338 defparam \inst|vga_driver_unit|vsync_counter_8_ .output_mode = "reg_only";
2339 defparam \inst|vga_driver_unit|vsync_counter_8_ .register_cascade_mode = "off";
2340 defparam \inst|vga_driver_unit|vsync_counter_8_ .sum_lutc_input = "cin";
2341 defparam \inst|vga_driver_unit|vsync_counter_8_ .synch_mode = "on";
2342 // synopsys translate_on
2343
2344 // atom is at LC_X35_Y34_N9
2345 stratix_lcell \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_5 (
2346 // Equation(s):
2347 // \inst|vga_driver_unit|un9_vsync_counterlt9_5  = !\inst|vga_driver_unit|vsync_counter_9  # !\inst|vga_driver_unit|vsync_counter_8  # !\inst|vga_driver_unit|vsync_counter_7  # !\inst|vga_driver_unit|vsync_counter_6
2348
2349         .clk(gnd),
2350         .dataa(\inst|vga_driver_unit|vsync_counter_6 ),
2351         .datab(\inst|vga_driver_unit|vsync_counter_7 ),
2352         .datac(\inst|vga_driver_unit|vsync_counter_8 ),
2353         .datad(\inst|vga_driver_unit|vsync_counter_9 ),
2354         .aclr(gnd),
2355         .aload(gnd),
2356         .sclr(gnd),
2357         .sload(gnd),
2358         .ena(vcc),
2359         .cin(gnd),
2360         .cin0(gnd),
2361         .cin1(vcc),
2362         .inverta(gnd),
2363         .regcascin(gnd),
2364         .devclrn(devclrn),
2365         .devpor(devpor),
2366         .combout(\inst|vga_driver_unit|un9_vsync_counterlt9_5 ),
2367         .regout(),
2368         .cout(),
2369         .cout0(),
2370         .cout1());
2371 // synopsys translate_off
2372 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_5 .lut_mask = "7fff";
2373 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_5 .operation_mode = "normal";
2374 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_5 .output_mode = "comb_only";
2375 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_5 .register_cascade_mode = "off";
2376 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_5 .sum_lutc_input = "datac";
2377 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_5 .synch_mode = "off";
2378 // synopsys translate_on
2379
2380 // atom is at LC_X35_Y34_N2
2381 stratix_lcell \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_6 (
2382 // Equation(s):
2383 // \inst|vga_driver_unit|un9_vsync_counterlt9_6  = !\inst|vga_driver_unit|vsync_counter_2  # !\inst|vga_driver_unit|vsync_counter_0  # !\inst|vga_driver_unit|vsync_counter_3  # !\inst|vga_driver_unit|vsync_counter_1
2384
2385         .clk(gnd),
2386         .dataa(\inst|vga_driver_unit|vsync_counter_1 ),
2387         .datab(\inst|vga_driver_unit|vsync_counter_3 ),
2388         .datac(\inst|vga_driver_unit|vsync_counter_0 ),
2389         .datad(\inst|vga_driver_unit|vsync_counter_2 ),
2390         .aclr(gnd),
2391         .aload(gnd),
2392         .sclr(gnd),
2393         .sload(gnd),
2394         .ena(vcc),
2395         .cin(gnd),
2396         .cin0(gnd),
2397         .cin1(vcc),
2398         .inverta(gnd),
2399         .regcascin(gnd),
2400         .devclrn(devclrn),
2401         .devpor(devpor),
2402         .combout(\inst|vga_driver_unit|un9_vsync_counterlt9_6 ),
2403         .regout(),
2404         .cout(),
2405         .cout0(),
2406         .cout1());
2407 // synopsys translate_off
2408 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_6 .lut_mask = "7fff";
2409 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_6 .operation_mode = "normal";
2410 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_6 .output_mode = "comb_only";
2411 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_6 .register_cascade_mode = "off";
2412 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_6 .sum_lutc_input = "datac";
2413 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_6 .synch_mode = "off";
2414 // synopsys translate_on
2415
2416 // atom is at LC_X35_Y34_N5
2417 stratix_lcell \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9 (
2418 // Equation(s):
2419 // \inst|vga_driver_unit|un9_vsync_counterlt9  = \inst|vga_driver_unit|un9_vsync_counterlt9_5  # \inst|vga_driver_unit|un9_vsync_counterlt9_6  # !\inst|vga_driver_unit|vsync_counter_5  # !\inst|vga_driver_unit|vsync_counter_4
2420
2421         .clk(gnd),
2422         .dataa(\inst|vga_driver_unit|vsync_counter_4 ),
2423         .datab(\inst|vga_driver_unit|un9_vsync_counterlt9_5 ),
2424         .datac(\inst|vga_driver_unit|vsync_counter_5 ),
2425         .datad(\inst|vga_driver_unit|un9_vsync_counterlt9_6 ),
2426         .aclr(gnd),
2427         .aload(gnd),
2428         .sclr(gnd),
2429         .sload(gnd),
2430         .ena(vcc),
2431         .cin(gnd),
2432         .cin0(gnd),
2433         .cin1(vcc),
2434         .inverta(gnd),
2435         .regcascin(gnd),
2436         .devclrn(devclrn),
2437         .devpor(devpor),
2438         .combout(\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2439         .regout(),
2440         .cout(),
2441         .cout0(),
2442         .cout1());
2443 // synopsys translate_off
2444 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9 .lut_mask = "ffdf";
2445 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9 .operation_mode = "normal";
2446 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9 .output_mode = "comb_only";
2447 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9 .register_cascade_mode = "off";
2448 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9 .sum_lutc_input = "datac";
2449 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9 .synch_mode = "off";
2450 // synopsys translate_on
2451
2452 // atom is at LC_X35_Y34_N4
2453 stratix_lcell \inst|vga_driver_unit|G_16 (
2454 // Equation(s):
2455 // \inst|vga_driver_unit|G_16_i  = !\inst|vga_driver_unit|vsync_state_6  & !\inst|vga_driver_unit|vsync_state_0  & !\inst|vga_driver_unit|un6_dly_counter_0_x  # !\inst|vga_driver_unit|un9_vsync_counterlt9
2456
2457         .clk(gnd),
2458         .dataa(\inst|vga_driver_unit|vsync_state_6 ),
2459         .datab(\inst|vga_driver_unit|vsync_state_0 ),
2460         .datac(\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2461         .datad(\inst|vga_driver_unit|un6_dly_counter_0_x ),
2462         .aclr(gnd),
2463         .aload(gnd),
2464         .sclr(gnd),
2465         .sload(gnd),
2466         .ena(vcc),
2467         .cin(gnd),
2468         .cin0(gnd),
2469         .cin1(vcc),
2470         .inverta(gnd),
2471         .regcascin(gnd),
2472         .devclrn(devclrn),
2473         .devpor(devpor),
2474         .combout(\inst|vga_driver_unit|G_16_i ),
2475         .regout(),
2476         .cout(),
2477         .cout0(),
2478         .cout1());
2479 // synopsys translate_off
2480 defparam \inst|vga_driver_unit|G_16 .lut_mask = "0f1f";
2481 defparam \inst|vga_driver_unit|G_16 .operation_mode = "normal";
2482 defparam \inst|vga_driver_unit|G_16 .output_mode = "comb_only";
2483 defparam \inst|vga_driver_unit|G_16 .register_cascade_mode = "off";
2484 defparam \inst|vga_driver_unit|G_16 .sum_lutc_input = "datac";
2485 defparam \inst|vga_driver_unit|G_16 .synch_mode = "off";
2486 // synopsys translate_on
2487
2488 // atom is at LC_X36_Y34_N6
2489 stratix_lcell \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_6 (
2490 // Equation(s):
2491 // \inst|vga_driver_unit|un12_vsync_counter_6  = !\inst|vga_driver_unit|vsync_counter_7  & !\inst|vga_driver_unit|vsync_counter_6  & !\inst|vga_driver_unit|vsync_counter_5  & !\inst|vga_driver_unit|vsync_counter_8
2492
2493         .clk(gnd),
2494         .dataa(\inst|vga_driver_unit|vsync_counter_7 ),
2495         .datab(\inst|vga_driver_unit|vsync_counter_6 ),
2496         .datac(\inst|vga_driver_unit|vsync_counter_5 ),
2497         .datad(\inst|vga_driver_unit|vsync_counter_8 ),
2498         .aclr(gnd),
2499         .aload(gnd),
2500         .sclr(gnd),
2501         .sload(gnd),
2502         .ena(vcc),
2503         .cin(gnd),
2504         .cin0(gnd),
2505         .cin1(vcc),
2506         .inverta(gnd),
2507         .regcascin(gnd),
2508         .devclrn(devclrn),
2509         .devpor(devpor),
2510         .combout(\inst|vga_driver_unit|un12_vsync_counter_6 ),
2511         .regout(),
2512         .cout(),
2513         .cout0(),
2514         .cout1());
2515 // synopsys translate_off
2516 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_6 .lut_mask = "0001";
2517 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_6 .operation_mode = "normal";
2518 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_6 .output_mode = "comb_only";
2519 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_6 .register_cascade_mode = "off";
2520 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_6 .sum_lutc_input = "datac";
2521 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_6 .synch_mode = "off";
2522 // synopsys translate_on
2523
2524 // atom is at LC_X36_Y34_N9
2525 stratix_lcell \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_7 (
2526 // Equation(s):
2527 // \inst|vga_driver_unit|un12_vsync_counter_7  = !\inst|vga_driver_unit|vsync_counter_1  & !\inst|vga_driver_unit|vsync_counter_4  & !\inst|vga_driver_unit|vsync_counter_3  & !\inst|vga_driver_unit|vsync_counter_2
2528
2529         .clk(gnd),
2530         .dataa(\inst|vga_driver_unit|vsync_counter_1 ),
2531         .datab(\inst|vga_driver_unit|vsync_counter_4 ),
2532         .datac(\inst|vga_driver_unit|vsync_counter_3 ),
2533         .datad(\inst|vga_driver_unit|vsync_counter_2 ),
2534         .aclr(gnd),
2535         .aload(gnd),
2536         .sclr(gnd),
2537         .sload(gnd),
2538         .ena(vcc),
2539         .cin(gnd),
2540         .cin0(gnd),
2541         .cin1(vcc),
2542         .inverta(gnd),
2543         .regcascin(gnd),
2544         .devclrn(devclrn),
2545         .devpor(devpor),
2546         .combout(\inst|vga_driver_unit|un12_vsync_counter_7 ),
2547         .regout(),
2548         .cout(),
2549         .cout0(),
2550         .cout1());
2551 // synopsys translate_off
2552 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_7 .lut_mask = "0001";
2553 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_7 .operation_mode = "normal";
2554 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_7 .output_mode = "comb_only";
2555 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_7 .register_cascade_mode = "off";
2556 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_7 .sum_lutc_input = "datac";
2557 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_7 .synch_mode = "off";
2558 // synopsys translate_on
2559
2560 // atom is at LC_X36_Y34_N4
2561 stratix_lcell \inst|vga_driver_unit|VSYNC_FSM_next_un14_vsync_counter_8 (
2562 // Equation(s):
2563 // \inst|vga_driver_unit|un14_vsync_counter_8  = \inst|vga_driver_unit|un12_vsync_counter_7  & (\inst|vga_driver_unit|un12_vsync_counter_6 )
2564
2565         .clk(gnd),
2566         .dataa(vcc),
2567         .datab(\inst|vga_driver_unit|un12_vsync_counter_7 ),
2568         .datac(vcc),
2569         .datad(\inst|vga_driver_unit|un12_vsync_counter_6 ),
2570         .aclr(gnd),
2571         .aload(gnd),
2572         .sclr(gnd),
2573         .sload(gnd),
2574         .ena(vcc),
2575         .cin(gnd),
2576         .cin0(gnd),
2577         .cin1(vcc),
2578         .inverta(gnd),
2579         .regcascin(gnd),
2580         .devclrn(devclrn),
2581         .devpor(devpor),
2582         .combout(\inst|vga_driver_unit|un14_vsync_counter_8 ),
2583         .regout(),
2584         .cout(),
2585         .cout0(),
2586         .cout1());
2587 // synopsys translate_off
2588 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un14_vsync_counter_8 .lut_mask = "cc00";
2589 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un14_vsync_counter_8 .operation_mode = "normal";
2590 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un14_vsync_counter_8 .output_mode = "comb_only";
2591 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un14_vsync_counter_8 .register_cascade_mode = "off";
2592 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un14_vsync_counter_8 .sum_lutc_input = "datac";
2593 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un14_vsync_counter_8 .synch_mode = "off";
2594 // synopsys translate_on
2595
2596 // atom is at LC_X36_Y33_N5
2597 stratix_lcell \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_3 (
2598 // Equation(s):
2599 // \inst|vga_driver_unit|un13_vsync_counter_3  = !\inst|vga_driver_unit|vsync_counter_7  & !\inst|vga_driver_unit|vsync_counter_6  & !\inst|vga_driver_unit|vsync_counter_9  & !\inst|vga_driver_unit|vsync_counter_8
2600
2601         .clk(gnd),
2602         .dataa(\inst|vga_driver_unit|vsync_counter_7 ),
2603         .datab(\inst|vga_driver_unit|vsync_counter_6 ),
2604         .datac(\inst|vga_driver_unit|vsync_counter_9 ),
2605         .datad(\inst|vga_driver_unit|vsync_counter_8 ),
2606         .aclr(gnd),
2607         .aload(gnd),
2608         .sclr(gnd),
2609         .sload(gnd),
2610         .ena(vcc),
2611         .cin(gnd),
2612         .cin0(gnd),
2613         .cin1(vcc),
2614         .inverta(gnd),
2615         .regcascin(gnd),
2616         .devclrn(devclrn),
2617         .devpor(devpor),
2618         .combout(\inst|vga_driver_unit|un13_vsync_counter_3 ),
2619         .regout(),
2620         .cout(),
2621         .cout0(),
2622         .cout1());
2623 // synopsys translate_off
2624 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_3 .lut_mask = "0001";
2625 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_3 .operation_mode = "normal";
2626 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_3 .output_mode = "comb_only";
2627 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_3 .register_cascade_mode = "off";
2628 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_3 .sum_lutc_input = "datac";
2629 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_3 .synch_mode = "off";
2630 // synopsys translate_on
2631
2632 // atom is at LC_X36_Y33_N0
2633 stratix_lcell \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_4 (
2634 // Equation(s):
2635 // \inst|vga_driver_unit|un13_vsync_counter_4  = \inst|vga_driver_unit|vsync_counter_5  & (\inst|vga_driver_unit|un13_vsync_counter_3  & \inst|vga_driver_unit|vsync_counter_0 )
2636
2637         .clk(gnd),
2638         .dataa(\inst|vga_driver_unit|vsync_counter_5 ),
2639         .datab(vcc),
2640         .datac(\inst|vga_driver_unit|un13_vsync_counter_3 ),
2641         .datad(\inst|vga_driver_unit|vsync_counter_0 ),
2642         .aclr(gnd),
2643         .aload(gnd),
2644         .sclr(gnd),
2645         .sload(gnd),
2646         .ena(vcc),
2647         .cin(gnd),
2648         .cin0(gnd),
2649         .cin1(vcc),
2650         .inverta(gnd),
2651         .regcascin(gnd),
2652         .devclrn(devclrn),
2653         .devpor(devpor),
2654         .combout(\inst|vga_driver_unit|un13_vsync_counter_4 ),
2655         .regout(),
2656         .cout(),
2657         .cout0(),
2658         .cout1());
2659 // synopsys translate_off
2660 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_4 .lut_mask = "a000";
2661 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_4 .operation_mode = "normal";
2662 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_4 .output_mode = "comb_only";
2663 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_4 .register_cascade_mode = "off";
2664 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_4 .sum_lutc_input = "datac";
2665 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_4 .synch_mode = "off";
2666 // synopsys translate_on
2667
2668 // atom is at LC_X36_Y33_N4
2669 stratix_lcell \inst|vga_driver_unit|vsync_state_1_ (
2670 // Equation(s):
2671 // \inst|vga_driver_unit|vsync_state_1  = DFFEAS(\inst|vga_driver_unit|un12_vsync_counter_7  & \inst|vga_driver_unit|un13_vsync_counter_4  & !\inst|vga_driver_unit|un6_dly_counter_0_x  & \inst|vga_driver_unit|vsync_state_4 ,
2672 // GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , , , )
2673
2674         .clk(\inst1|altpll_component|_clk0 ),
2675         .dataa(\inst|vga_driver_unit|un12_vsync_counter_7 ),
2676         .datab(\inst|vga_driver_unit|un13_vsync_counter_4 ),
2677         .datac(\inst|vga_driver_unit|un6_dly_counter_0_x ),
2678         .datad(\inst|vga_driver_unit|vsync_state_4 ),
2679         .aclr(gnd),
2680         .aload(gnd),
2681         .sclr(gnd),
2682         .sload(gnd),
2683         .ena(vcc),
2684         .cin(gnd),
2685         .cin0(gnd),
2686         .cin1(vcc),
2687         .inverta(gnd),
2688         .regcascin(gnd),
2689         .devclrn(devclrn),
2690         .devpor(devpor),
2691         .combout(),
2692         .regout(\inst|vga_driver_unit|vsync_state_1 ),
2693         .cout(),
2694         .cout0(),
2695         .cout1());
2696 // synopsys translate_off
2697 defparam \inst|vga_driver_unit|vsync_state_1_ .lut_mask = "0800";
2698 defparam \inst|vga_driver_unit|vsync_state_1_ .operation_mode = "normal";
2699 defparam \inst|vga_driver_unit|vsync_state_1_ .output_mode = "reg_only";
2700 defparam \inst|vga_driver_unit|vsync_state_1_ .register_cascade_mode = "off";
2701 defparam \inst|vga_driver_unit|vsync_state_1_ .sum_lutc_input = "datac";
2702 defparam \inst|vga_driver_unit|vsync_state_1_ .synch_mode = "off";
2703 // synopsys translate_on
2704
2705 // atom is at LC_X34_Y34_N0
2706 stratix_lcell \inst|vga_driver_unit|vsync_state_3_ (
2707 // Equation(s):
2708 // \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_3  = E1_vsync_state_3 & (!\inst|vga_driver_unit|vsync_counter_0  # !\inst|vga_driver_unit|vsync_counter_9  # !\inst|vga_driver_unit|un14_vsync_counter_8 )
2709 // \inst|vga_driver_unit|vsync_state_3  = DFFEAS(\inst|vga_driver_unit|vsync_state_next_1_sqmuxa_3 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|vsync_state_next_2_sqmuxa , \inst|vga_driver_unit|vsync_state_1 , ,
2710 // \inst|vga_driver_unit|un6_dly_counter_0_x , VCC)
2711
2712         .clk(\inst1|altpll_component|_clk0 ),
2713         .dataa(\inst|vga_driver_unit|un14_vsync_counter_8 ),
2714         .datab(\inst|vga_driver_unit|vsync_counter_9 ),
2715         .datac(\inst|vga_driver_unit|vsync_state_1 ),
2716         .datad(\inst|vga_driver_unit|vsync_counter_0 ),
2717         .aclr(gnd),
2718         .aload(gnd),
2719         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
2720         .sload(vcc),
2721         .ena(\inst|vga_driver_unit|vsync_state_next_2_sqmuxa ),
2722         .cin(gnd),
2723         .cin0(gnd),
2724         .cin1(vcc),
2725         .inverta(gnd),
2726         .regcascin(gnd),
2727         .devclrn(devclrn),
2728         .devpor(devpor),
2729         .combout(\inst|vga_driver_unit|vsync_state_next_1_sqmuxa_3 ),
2730         .regout(\inst|vga_driver_unit|vsync_state_3 ),
2731         .cout(),
2732         .cout0(),
2733         .cout1());
2734 // synopsys translate_off
2735 defparam \inst|vga_driver_unit|vsync_state_3_ .lut_mask = "70f0";
2736 defparam \inst|vga_driver_unit|vsync_state_3_ .operation_mode = "normal";
2737 defparam \inst|vga_driver_unit|vsync_state_3_ .output_mode = "reg_and_comb";
2738 defparam \inst|vga_driver_unit|vsync_state_3_ .register_cascade_mode = "off";
2739 defparam \inst|vga_driver_unit|vsync_state_3_ .sum_lutc_input = "qfbk";
2740 defparam \inst|vga_driver_unit|vsync_state_3_ .synch_mode = "on";
2741 // synopsys translate_on
2742
2743 // atom is at LC_X35_Y34_N3
2744 stratix_lcell \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_3 (
2745 // Equation(s):
2746 // \inst|vga_driver_unit|un15_vsync_counter_3  = \inst|vga_driver_unit|vsync_counter_9  & \inst|vga_driver_unit|vsync_counter_3  & !\inst|vga_driver_unit|vsync_counter_0  & !\inst|vga_driver_unit|vsync_counter_2
2747
2748         .clk(gnd),
2749         .dataa(\inst|vga_driver_unit|vsync_counter_9 ),
2750         .datab(\inst|vga_driver_unit|vsync_counter_3 ),
2751         .datac(\inst|vga_driver_unit|vsync_counter_0 ),
2752         .datad(\inst|vga_driver_unit|vsync_counter_2 ),
2753         .aclr(gnd),
2754         .aload(gnd),
2755         .sclr(gnd),
2756         .sload(gnd),
2757         .ena(vcc),
2758         .cin(gnd),
2759         .cin0(gnd),
2760         .cin1(vcc),
2761         .inverta(gnd),
2762         .regcascin(gnd),
2763         .devclrn(devclrn),
2764         .devpor(devpor),
2765         .combout(\inst|vga_driver_unit|un15_vsync_counter_3 ),
2766         .regout(),
2767         .cout(),
2768         .cout0(),
2769         .cout1());
2770 // synopsys translate_off
2771 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_3 .lut_mask = "0008";
2772 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_3 .operation_mode = "normal";
2773 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_3 .output_mode = "comb_only";
2774 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_3 .register_cascade_mode = "off";
2775 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_3 .sum_lutc_input = "datac";
2776 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_3 .synch_mode = "off";
2777 // synopsys translate_on
2778
2779 // atom is at LC_X35_Y34_N8
2780 stratix_lcell \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_4 (
2781 // Equation(s):
2782 // \inst|vga_driver_unit|un15_vsync_counter_4  = !\inst|vga_driver_unit|vsync_counter_4  & (\inst|vga_driver_unit|un15_vsync_counter_3  & !\inst|vga_driver_unit|vsync_counter_1 )
2783
2784         .clk(gnd),
2785         .dataa(\inst|vga_driver_unit|vsync_counter_4 ),
2786         .datab(vcc),
2787         .datac(\inst|vga_driver_unit|un15_vsync_counter_3 ),
2788         .datad(\inst|vga_driver_unit|vsync_counter_1 ),
2789         .aclr(gnd),
2790         .aload(gnd),
2791         .sclr(gnd),
2792         .sload(gnd),
2793         .ena(vcc),
2794         .cin(gnd),
2795         .cin0(gnd),
2796         .cin1(vcc),
2797         .inverta(gnd),
2798         .regcascin(gnd),
2799         .devclrn(devclrn),
2800         .devpor(devpor),
2801         .combout(\inst|vga_driver_unit|un15_vsync_counter_4 ),
2802         .regout(),
2803         .cout(),
2804         .cout0(),
2805         .cout1());
2806 // synopsys translate_off
2807 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_4 .lut_mask = "0050";
2808 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_4 .operation_mode = "normal";
2809 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_4 .output_mode = "comb_only";
2810 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_4 .register_cascade_mode = "off";
2811 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_4 .sum_lutc_input = "datac";
2812 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_4 .synch_mode = "off";
2813 // synopsys translate_on
2814
2815 // atom is at LC_X36_Y34_N1
2816 stratix_lcell \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2_cZ (
2817 // Equation(s):
2818 // \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2  = \inst|vga_driver_unit|vsync_state_4  & (!\inst|vga_driver_unit|un13_vsync_counter_4  # !\inst|vga_driver_unit|un12_vsync_counter_7 )
2819
2820         .clk(gnd),
2821         .dataa(vcc),
2822         .datab(\inst|vga_driver_unit|un12_vsync_counter_7 ),
2823         .datac(\inst|vga_driver_unit|vsync_state_4 ),
2824         .datad(\inst|vga_driver_unit|un13_vsync_counter_4 ),
2825         .aclr(gnd),
2826         .aload(gnd),
2827         .sclr(gnd),
2828         .sload(gnd),
2829         .ena(vcc),
2830         .cin(gnd),
2831         .cin0(gnd),
2832         .cin1(vcc),
2833         .inverta(gnd),
2834         .regcascin(gnd),
2835         .devclrn(devclrn),
2836         .devpor(devpor),
2837         .combout(\inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2 ),
2838         .regout(),
2839         .cout(),
2840         .cout0(),
2841         .cout1());
2842 // synopsys translate_off
2843 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2_cZ .lut_mask = "30f0";
2844 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2_cZ .operation_mode = "normal";
2845 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2_cZ .output_mode = "comb_only";
2846 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2_cZ .register_cascade_mode = "off";
2847 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2_cZ .sum_lutc_input = "datac";
2848 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2_cZ .synch_mode = "off";
2849 // synopsys translate_on
2850
2851 // atom is at LC_X36_Y34_N5
2852 stratix_lcell \inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0_cZ (
2853 // Equation(s):
2854 // \inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0  = \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2  # \inst|vga_driver_unit|vsync_state_2  & (!\inst|vga_driver_unit|un12_vsync_counter_6  # !\inst|vga_driver_unit|un15_vsync_counter_4 )
2855
2856         .clk(gnd),
2857         .dataa(\inst|vga_driver_unit|un15_vsync_counter_4 ),
2858         .datab(\inst|vga_driver_unit|un12_vsync_counter_6 ),
2859         .datac(\inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2 ),
2860         .datad(\inst|vga_driver_unit|vsync_state_2 ),
2861         .aclr(gnd),
2862         .aload(gnd),
2863         .sclr(gnd),
2864         .sload(gnd),
2865         .ena(vcc),
2866         .cin(gnd),
2867         .cin0(gnd),
2868         .cin1(vcc),
2869         .inverta(gnd),
2870         .regcascin(gnd),
2871         .devclrn(devclrn),
2872         .devpor(devpor),
2873         .combout(\inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0 ),
2874         .regout(),
2875         .cout(),
2876         .cout0(),
2877         .cout1());
2878 // synopsys translate_off
2879 defparam \inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0_cZ .lut_mask = "f7f0";
2880 defparam \inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0_cZ .operation_mode = "normal";
2881 defparam \inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0_cZ .output_mode = "comb_only";
2882 defparam \inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0_cZ .register_cascade_mode = "off";
2883 defparam \inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0_cZ .sum_lutc_input = "datac";
2884 defparam \inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0_cZ .synch_mode = "off";
2885 // synopsys translate_on
2886
2887 // atom is at LC_X36_Y34_N3
2888 stratix_lcell \inst|vga_driver_unit|vsync_state_5_ (
2889 // Equation(s):
2890 // \inst|vga_driver_unit|vsync_state_5  = DFFEAS(\inst|vga_driver_unit|vsync_state_0  # \inst|vga_driver_unit|vsync_state_6 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|vsync_state_next_2_sqmuxa , , ,
2891 // \inst|vga_driver_unit|un6_dly_counter_0_x , )
2892
2893         .clk(\inst1|altpll_component|_clk0 ),
2894         .dataa(vcc),
2895         .datab(\inst|vga_driver_unit|vsync_state_0 ),
2896         .datac(\inst|vga_driver_unit|vsync_state_6 ),
2897         .datad(vcc),
2898         .aclr(gnd),
2899         .aload(gnd),
2900         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
2901         .sload(gnd),
2902         .ena(\inst|vga_driver_unit|vsync_state_next_2_sqmuxa ),
2903         .cin(gnd),
2904         .cin0(gnd),
2905         .cin1(vcc),
2906         .inverta(gnd),
2907         .regcascin(gnd),
2908         .devclrn(devclrn),
2909         .devpor(devpor),
2910         .combout(),
2911         .regout(\inst|vga_driver_unit|vsync_state_5 ),
2912         .cout(),
2913         .cout0(),
2914         .cout1());
2915 // synopsys translate_off
2916 defparam \inst|vga_driver_unit|vsync_state_5_ .lut_mask = "fcfc";
2917 defparam \inst|vga_driver_unit|vsync_state_5_ .operation_mode = "normal";
2918 defparam \inst|vga_driver_unit|vsync_state_5_ .output_mode = "reg_only";
2919 defparam \inst|vga_driver_unit|vsync_state_5_ .register_cascade_mode = "off";
2920 defparam \inst|vga_driver_unit|vsync_state_5_ .sum_lutc_input = "datac";
2921 defparam \inst|vga_driver_unit|vsync_state_5_ .synch_mode = "on";
2922 // synopsys translate_on
2923
2924 // atom is at LC_X36_Y34_N0
2925 stratix_lcell \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1_cZ (
2926 // Equation(s):
2927 // \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1  = \inst|vga_driver_unit|vsync_state_5  & (\inst|vga_driver_unit|vsync_counter_9  # !\inst|vga_driver_unit|vsync_counter_0  # !\inst|vga_driver_unit|un14_vsync_counter_8 )
2928
2929         .clk(gnd),
2930         .dataa(\inst|vga_driver_unit|vsync_counter_9 ),
2931         .datab(\inst|vga_driver_unit|un14_vsync_counter_8 ),
2932         .datac(\inst|vga_driver_unit|vsync_state_5 ),
2933         .datad(\inst|vga_driver_unit|vsync_counter_0 ),
2934         .aclr(gnd),
2935         .aload(gnd),
2936         .sclr(gnd),
2937         .sload(gnd),
2938         .ena(vcc),
2939         .cin(gnd),
2940         .cin0(gnd),
2941         .cin1(vcc),
2942         .inverta(gnd),
2943         .regcascin(gnd),
2944         .devclrn(devclrn),
2945         .devpor(devpor),
2946         .combout(\inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1 ),
2947         .regout(),
2948         .cout(),
2949         .cout0(),
2950         .cout1());
2951 // synopsys translate_off
2952 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1_cZ .lut_mask = "b0f0";
2953 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1_cZ .operation_mode = "normal";
2954 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1_cZ .output_mode = "comb_only";
2955 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1_cZ .register_cascade_mode = "off";
2956 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1_cZ .sum_lutc_input = "datac";
2957 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1_cZ .synch_mode = "off";
2958 // synopsys translate_on
2959
2960 // atom is at LC_X36_Y34_N2
2961 stratix_lcell \inst|vga_driver_unit|vsync_state_next_2_sqmuxa_cZ (
2962 // Equation(s):
2963 // \inst|vga_driver_unit|vsync_state_next_2_sqmuxa  = \inst|vga_driver_unit|un6_dly_counter_0_x  # !\inst|vga_driver_unit|vsync_state_next_1_sqmuxa_3  & !\inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0  &
2964 // !\inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1
2965
2966         .clk(gnd),
2967         .dataa(\inst|vga_driver_unit|vsync_state_next_1_sqmuxa_3 ),
2968         .datab(\inst|vga_driver_unit|un6_dly_counter_0_x ),
2969         .datac(\inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0 ),
2970         .datad(\inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1 ),
2971         .aclr(gnd),
2972         .aload(gnd),
2973         .sclr(gnd),
2974         .sload(gnd),
2975         .ena(vcc),
2976         .cin(gnd),
2977         .cin0(gnd),
2978         .cin1(vcc),
2979         .inverta(gnd),
2980         .regcascin(gnd),
2981         .devclrn(devclrn),
2982         .devpor(devpor),
2983         .combout(\inst|vga_driver_unit|vsync_state_next_2_sqmuxa ),
2984         .regout(),
2985         .cout(),
2986         .cout0(),
2987         .cout1());
2988 // synopsys translate_off
2989 defparam \inst|vga_driver_unit|vsync_state_next_2_sqmuxa_cZ .lut_mask = "cccd";
2990 defparam \inst|vga_driver_unit|vsync_state_next_2_sqmuxa_cZ .operation_mode = "normal";
2991 defparam \inst|vga_driver_unit|vsync_state_next_2_sqmuxa_cZ .output_mode = "comb_only";
2992 defparam \inst|vga_driver_unit|vsync_state_next_2_sqmuxa_cZ .register_cascade_mode = "off";
2993 defparam \inst|vga_driver_unit|vsync_state_next_2_sqmuxa_cZ .sum_lutc_input = "datac";
2994 defparam \inst|vga_driver_unit|vsync_state_next_2_sqmuxa_cZ .synch_mode = "off";
2995 // synopsys translate_on
2996
2997 // atom is at LC_X36_Y34_N8
2998 stratix_lcell \inst|vga_driver_unit|vsync_state_2_ (
2999 // Equation(s):
3000 // \inst|vga_driver_unit|vsync_state_2  = DFFEAS(\inst|vga_driver_unit|vsync_counter_0  & \inst|vga_driver_unit|un14_vsync_counter_8  & \inst|vga_driver_unit|vsync_state_3  & \inst|vga_driver_unit|vsync_counter_9 , GLOBAL(\inst1|altpll_component|_clk0 ),
3001 // VCC, , \inst|vga_driver_unit|vsync_state_next_2_sqmuxa , , , \inst|vga_driver_unit|un6_dly_counter_0_x , )
3002
3003         .clk(\inst1|altpll_component|_clk0 ),
3004         .dataa(\inst|vga_driver_unit|vsync_counter_0 ),
3005         .datab(\inst|vga_driver_unit|un14_vsync_counter_8 ),
3006         .datac(\inst|vga_driver_unit|vsync_state_3 ),
3007         .datad(\inst|vga_driver_unit|vsync_counter_9 ),
3008         .aclr(gnd),
3009         .aload(gnd),
3010         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
3011         .sload(gnd),
3012         .ena(\inst|vga_driver_unit|vsync_state_next_2_sqmuxa ),
3013         .cin(gnd),
3014         .cin0(gnd),
3015         .cin1(vcc),
3016         .inverta(gnd),
3017         .regcascin(gnd),
3018         .devclrn(devclrn),
3019         .devpor(devpor),
3020         .combout(),
3021         .regout(\inst|vga_driver_unit|vsync_state_2 ),
3022         .cout(),
3023         .cout0(),
3024         .cout1());
3025 // synopsys translate_off
3026 defparam \inst|vga_driver_unit|vsync_state_2_ .lut_mask = "8000";
3027 defparam \inst|vga_driver_unit|vsync_state_2_ .operation_mode = "normal";
3028 defparam \inst|vga_driver_unit|vsync_state_2_ .output_mode = "reg_only";
3029 defparam \inst|vga_driver_unit|vsync_state_2_ .register_cascade_mode = "off";
3030 defparam \inst|vga_driver_unit|vsync_state_2_ .sum_lutc_input = "datac";
3031 defparam \inst|vga_driver_unit|vsync_state_2_ .synch_mode = "on";
3032 // synopsys translate_on
3033
3034 // atom is at LC_X35_Y34_N7
3035 stratix_lcell \inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0_cZ (
3036 // Equation(s):
3037 // \inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0  = \inst|vga_driver_unit|un12_vsync_counter_6  & \inst|vga_driver_unit|vsync_state_2  & \inst|vga_driver_unit|un15_vsync_counter_4
3038
3039         .clk(gnd),
3040         .dataa(vcc),
3041         .datab(\inst|vga_driver_unit|un12_vsync_counter_6 ),
3042         .datac(\inst|vga_driver_unit|vsync_state_2 ),
3043         .datad(\inst|vga_driver_unit|un15_vsync_counter_4 ),
3044         .aclr(gnd),
3045         .aload(gnd),
3046         .sclr(gnd),
3047         .sload(gnd),
3048         .ena(vcc),
3049         .cin(gnd),
3050         .cin0(gnd),
3051         .cin1(vcc),
3052         .inverta(gnd),
3053         .regcascin(gnd),
3054         .devclrn(devclrn),
3055         .devpor(devpor),
3056         .combout(\inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0 ),
3057         .regout(),
3058         .cout(),
3059         .cout0(),
3060         .cout1());
3061 // synopsys translate_off
3062 defparam \inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0_cZ .lut_mask = "c000";
3063 defparam \inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0_cZ .operation_mode = "normal";
3064 defparam \inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0_cZ .output_mode = "comb_only";
3065 defparam \inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0_cZ .register_cascade_mode = "off";
3066 defparam \inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0_cZ .sum_lutc_input = "datac";
3067 defparam \inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0_cZ .synch_mode = "off";
3068 // synopsys translate_on
3069
3070 // atom is at LC_X35_Y34_N6
3071 stratix_lcell \inst|vga_driver_unit|vsync_state_0_ (
3072 // Equation(s):
3073 // \inst|vga_driver_unit|vsync_state_0  = DFFEAS(\inst|vga_driver_unit|un6_dly_counter_0_x  & \inst|vga_driver_unit|vsync_state_0  & (!\inst|vga_driver_unit|vsync_state_next_2_sqmuxa ) # !\inst|vga_driver_unit|un6_dly_counter_0_x  &
3074 // (\inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0  # \inst|vga_driver_unit|vsync_state_0  & !\inst|vga_driver_unit|vsync_state_next_2_sqmuxa ), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , , , )
3075
3076         .clk(\inst1|altpll_component|_clk0 ),
3077         .dataa(\inst|vga_driver_unit|un6_dly_counter_0_x ),
3078         .datab(\inst|vga_driver_unit|vsync_state_0 ),
3079         .datac(\inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0 ),
3080         .datad(\inst|vga_driver_unit|vsync_state_next_2_sqmuxa ),
3081         .aclr(gnd),
3082         .aload(gnd),
3083         .sclr(gnd),
3084         .sload(gnd),
3085         .ena(vcc),
3086         .cin(gnd),
3087         .cin0(gnd),
3088         .cin1(vcc),
3089         .inverta(gnd),
3090         .regcascin(gnd),
3091         .devclrn(devclrn),
3092         .devpor(devpor),
3093         .combout(),
3094         .regout(\inst|vga_driver_unit|vsync_state_0 ),
3095         .cout(),
3096         .cout0(),
3097         .cout1());
3098 // synopsys translate_off
3099 defparam \inst|vga_driver_unit|vsync_state_0_ .lut_mask = "50dc";
3100 defparam \inst|vga_driver_unit|vsync_state_0_ .operation_mode = "normal";
3101 defparam \inst|vga_driver_unit|vsync_state_0_ .output_mode = "reg_only";
3102 defparam \inst|vga_driver_unit|vsync_state_0_ .register_cascade_mode = "off";
3103 defparam \inst|vga_driver_unit|vsync_state_0_ .sum_lutc_input = "datac";
3104 defparam \inst|vga_driver_unit|vsync_state_0_ .synch_mode = "off";
3105 // synopsys translate_on
3106
3107 // atom is at LC_X34_Y34_N1
3108 stratix_lcell \inst|vga_driver_unit|d_set_vsync_counter_cZ (
3109 // Equation(s):
3110 // \inst|vga_driver_unit|d_set_vsync_counter  = \inst|vga_driver_unit|vsync_state_0  # \inst|vga_driver_unit|vsync_state_6
3111
3112         .clk(gnd),
3113         .dataa(\inst|vga_driver_unit|vsync_state_0 ),
3114         .datab(vcc),
3115         .datac(\inst|vga_driver_unit|vsync_state_6 ),
3116         .datad(vcc),
3117         .aclr(gnd),
3118         .aload(gnd),
3119         .sclr(gnd),
3120         .sload(gnd),
3121         .ena(vcc),
3122         .cin(gnd),
3123         .cin0(gnd),
3124         .cin1(vcc),
3125         .inverta(gnd),
3126         .regcascin(gnd),
3127         .devclrn(devclrn),
3128         .devpor(devpor),
3129         .combout(\inst|vga_driver_unit|d_set_vsync_counter ),
3130         .regout(),
3131         .cout(),
3132         .cout0(),
3133         .cout1());
3134 // synopsys translate_off
3135 defparam \inst|vga_driver_unit|d_set_vsync_counter_cZ .lut_mask = "fafa";
3136 defparam \inst|vga_driver_unit|d_set_vsync_counter_cZ .operation_mode = "normal";
3137 defparam \inst|vga_driver_unit|d_set_vsync_counter_cZ .output_mode = "comb_only";
3138 defparam \inst|vga_driver_unit|d_set_vsync_counter_cZ .register_cascade_mode = "off";
3139 defparam \inst|vga_driver_unit|d_set_vsync_counter_cZ .sum_lutc_input = "datac";
3140 defparam \inst|vga_driver_unit|d_set_vsync_counter_cZ .synch_mode = "off";
3141 // synopsys translate_on
3142
3143 // atom is at LC_X34_Y34_N4
3144 stratix_lcell \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa_cZ (
3145 // Equation(s):
3146 // \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa  = \inst|dly_counter [0] & \reset~combout  & \inst|dly_counter [1] & !\inst|vga_driver_unit|d_set_vsync_counter
3147
3148         .clk(gnd),
3149         .dataa(\inst|dly_counter [0]),
3150         .datab(\reset~combout ),
3151         .datac(\inst|dly_counter [1]),
3152         .datad(\inst|vga_driver_unit|d_set_vsync_counter ),
3153         .aclr(gnd),
3154         .aload(gnd),
3155         .sclr(gnd),
3156         .sload(gnd),
3157         .ena(vcc),
3158         .cin(gnd),
3159         .cin0(gnd),
3160         .cin1(vcc),
3161         .inverta(gnd),
3162         .regcascin(gnd),
3163         .devclrn(devclrn),
3164         .devpor(devpor),
3165         .combout(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
3166         .regout(),
3167         .cout(),
3168         .cout0(),
3169         .cout1());
3170 // synopsys translate_off
3171 defparam \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa_cZ .lut_mask = "0080";
3172 defparam \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa_cZ .operation_mode = "normal";
3173 defparam \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa_cZ .output_mode = "comb_only";
3174 defparam \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa_cZ .register_cascade_mode = "off";
3175 defparam \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa_cZ .sum_lutc_input = "datac";
3176 defparam \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa_cZ .synch_mode = "off";
3177 // synopsys translate_on
3178
3179 // atom is at LC_X35_Y33_N9
3180 stratix_lcell \inst|vga_driver_unit|vsync_counter_9_ (
3181 // Equation(s):
3182 // \inst|vga_driver_unit|vsync_counter_9  = DFFEAS((!\inst|vga_driver_unit|vsync_counter_cout [4] & \inst|vga_driver_unit|vsync_counter_cout [8]) # (\inst|vga_driver_unit|vsync_counter_cout [4] & \inst|vga_driver_unit|vsync_counter_cout[8]~COUT1_24 ) $
3183 // \inst|vga_driver_unit|vsync_counter_9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , , !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
3184
3185         .clk(\inst1|altpll_component|_clk0 ),
3186         .dataa(vcc),
3187         .datab(vcc),
3188         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
3189         .datad(\inst|vga_driver_unit|vsync_counter_9 ),
3190         .aclr(gnd),
3191         .aload(gnd),
3192         .sclr(!\inst|vga_driver_unit|G_16_i ),
3193         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
3194         .ena(vcc),
3195         .cin(\inst|vga_driver_unit|vsync_counter_cout [4]),
3196         .cin0(\inst|vga_driver_unit|vsync_counter_cout [8]),
3197         .cin1(\inst|vga_driver_unit|vsync_counter_cout[8]~COUT1_24 ),
3198         .inverta(gnd),
3199         .regcascin(gnd),
3200         .devclrn(devclrn),
3201         .devpor(devpor),
3202         .combout(),
3203         .regout(\inst|vga_driver_unit|vsync_counter_9 ),
3204         .cout(),
3205         .cout0(),
3206         .cout1());
3207 // synopsys translate_off
3208 defparam \inst|vga_driver_unit|vsync_counter_9_ .cin0_used = "true";
3209 defparam \inst|vga_driver_unit|vsync_counter_9_ .cin1_used = "true";
3210 defparam \inst|vga_driver_unit|vsync_counter_9_ .cin_used = "true";
3211 defparam \inst|vga_driver_unit|vsync_counter_9_ .lut_mask = "0ff0";
3212 defparam \inst|vga_driver_unit|vsync_counter_9_ .operation_mode = "normal";
3213 defparam \inst|vga_driver_unit|vsync_counter_9_ .output_mode = "reg_only";
3214 defparam \inst|vga_driver_unit|vsync_counter_9_ .register_cascade_mode = "off";
3215 defparam \inst|vga_driver_unit|vsync_counter_9_ .sum_lutc_input = "cin";
3216 defparam \inst|vga_driver_unit|vsync_counter_9_ .synch_mode = "on";
3217 // synopsys translate_on
3218
3219 // atom is at LC_X36_Y34_N7
3220 stratix_lcell \inst|vga_driver_unit|vsync_state_4_ (
3221 // Equation(s):
3222 // \inst|vga_driver_unit|vsync_state_4  = DFFEAS(!\inst|vga_driver_unit|vsync_counter_9  & \inst|vga_driver_unit|un14_vsync_counter_8  & \inst|vga_driver_unit|vsync_state_5  & \inst|vga_driver_unit|vsync_counter_0 , GLOBAL(\inst1|altpll_component|_clk0 ),
3223 // VCC, , \inst|vga_driver_unit|vsync_state_next_2_sqmuxa , , , \inst|vga_driver_unit|un6_dly_counter_0_x , )
3224
3225         .clk(\inst1|altpll_component|_clk0 ),
3226         .dataa(\inst|vga_driver_unit|vsync_counter_9 ),
3227         .datab(\inst|vga_driver_unit|un14_vsync_counter_8 ),
3228         .datac(\inst|vga_driver_unit|vsync_state_5 ),
3229         .datad(\inst|vga_driver_unit|vsync_counter_0 ),
3230         .aclr(gnd),
3231         .aload(gnd),
3232         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
3233         .sload(gnd),
3234         .ena(\inst|vga_driver_unit|vsync_state_next_2_sqmuxa ),
3235         .cin(gnd),
3236         .cin0(gnd),
3237         .cin1(vcc),
3238         .inverta(gnd),
3239         .regcascin(gnd),
3240         .devclrn(devclrn),
3241         .devpor(devpor),
3242         .combout(),
3243         .regout(\inst|vga_driver_unit|vsync_state_4 ),
3244         .cout(),
3245         .cout0(),
3246         .cout1());
3247 // synopsys translate_off
3248 defparam \inst|vga_driver_unit|vsync_state_4_ .lut_mask = "4000";
3249 defparam \inst|vga_driver_unit|vsync_state_4_ .operation_mode = "normal";
3250 defparam \inst|vga_driver_unit|vsync_state_4_ .output_mode = "reg_only";
3251 defparam \inst|vga_driver_unit|vsync_state_4_ .register_cascade_mode = "off";
3252 defparam \inst|vga_driver_unit|vsync_state_4_ .sum_lutc_input = "datac";
3253 defparam \inst|vga_driver_unit|vsync_state_4_ .synch_mode = "on";
3254 // synopsys translate_on
3255
3256 // atom is at LC_X34_Y34_N8
3257 stratix_lcell \inst|vga_driver_unit|un1_vsync_state_2_0_cZ (
3258 // Equation(s):
3259 // \inst|vga_driver_unit|un1_vsync_state_2_0  = \inst|vga_driver_unit|vsync_state_1  # \inst|vga_driver_unit|vsync_state_3
3260
3261         .clk(gnd),
3262         .dataa(vcc),
3263         .datab(vcc),
3264         .datac(\inst|vga_driver_unit|vsync_state_1 ),
3265         .datad(\inst|vga_driver_unit|vsync_state_3 ),
3266         .aclr(gnd),
3267         .aload(gnd),
3268         .sclr(gnd),
3269         .sload(gnd),
3270         .ena(vcc),
3271         .cin(gnd),
3272         .cin0(gnd),
3273         .cin1(vcc),
3274         .inverta(gnd),
3275         .regcascin(gnd),
3276         .devclrn(devclrn),
3277         .devpor(devpor),
3278         .combout(\inst|vga_driver_unit|un1_vsync_state_2_0 ),
3279         .regout(),
3280         .cout(),
3281         .cout0(),
3282         .cout1());
3283 // synopsys translate_off
3284 defparam \inst|vga_driver_unit|un1_vsync_state_2_0_cZ .lut_mask = "fff0";
3285 defparam \inst|vga_driver_unit|un1_vsync_state_2_0_cZ .operation_mode = "normal";
3286 defparam \inst|vga_driver_unit|un1_vsync_state_2_0_cZ .output_mode = "comb_only";
3287 defparam \inst|vga_driver_unit|un1_vsync_state_2_0_cZ .register_cascade_mode = "off";
3288 defparam \inst|vga_driver_unit|un1_vsync_state_2_0_cZ .sum_lutc_input = "datac";
3289 defparam \inst|vga_driver_unit|un1_vsync_state_2_0_cZ .synch_mode = "off";
3290 // synopsys translate_on
3291
3292 // atom is at LC_X34_Y34_N5
3293 stratix_lcell \inst|vga_driver_unit|v_sync_1_0_0_0_g1_cZ (
3294 // Equation(s):
3295 // \inst|vga_driver_unit|v_sync_1_0_0_0_g1  = \inst|vga_driver_unit|vsync_state_2  & \inst|vga_driver_unit|v_sync  # !\inst|vga_driver_unit|vsync_state_2  & (\inst|vga_driver_unit|un1_vsync_state_2_0  & \inst|vga_driver_unit|v_sync  #
3296 // !\inst|vga_driver_unit|un1_vsync_state_2_0  & (\inst|vga_driver_unit|vsync_state_4 ))
3297
3298         .clk(gnd),
3299         .dataa(\inst|vga_driver_unit|v_sync ),
3300         .datab(\inst|vga_driver_unit|vsync_state_4 ),
3301         .datac(\inst|vga_driver_unit|vsync_state_2 ),
3302         .datad(\inst|vga_driver_unit|un1_vsync_state_2_0 ),
3303         .aclr(gnd),
3304         .aload(gnd),
3305         .sclr(gnd),
3306         .sload(gnd),
3307         .ena(vcc),
3308         .cin(gnd),
3309         .cin0(gnd),
3310         .cin1(vcc),
3311         .inverta(gnd),
3312         .regcascin(gnd),
3313         .devclrn(devclrn),
3314         .devpor(devpor),
3315         .combout(\inst|vga_driver_unit|v_sync_1_0_0_0_g1 ),
3316         .regout(),
3317         .cout(),
3318         .cout0(),
3319         .cout1());
3320 // synopsys translate_off
3321 defparam \inst|vga_driver_unit|v_sync_1_0_0_0_g1_cZ .lut_mask = "aaac";
3322 defparam \inst|vga_driver_unit|v_sync_1_0_0_0_g1_cZ .operation_mode = "normal";
3323 defparam \inst|vga_driver_unit|v_sync_1_0_0_0_g1_cZ .output_mode = "comb_only";
3324 defparam \inst|vga_driver_unit|v_sync_1_0_0_0_g1_cZ .register_cascade_mode = "off";
3325 defparam \inst|vga_driver_unit|v_sync_1_0_0_0_g1_cZ .sum_lutc_input = "datac";
3326 defparam \inst|vga_driver_unit|v_sync_1_0_0_0_g1_cZ .synch_mode = "off";
3327 // synopsys translate_on
3328
3329 // atom is at LC_X34_Y34_N7
3330 stratix_lcell \inst|vga_driver_unit|v_sync_Z (
3331 // Equation(s):
3332 // \inst|vga_driver_unit|v_sync  = DFFEAS(\inst|vga_driver_unit|v_sync_1_0_0_0_g1  # !\inst|dly_counter [1] # !\reset~combout  # !\inst|dly_counter [0], GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , , , )
3333
3334         .clk(\inst1|altpll_component|_clk0 ),
3335         .dataa(\inst|dly_counter [0]),
3336         .datab(\reset~combout ),
3337         .datac(\inst|dly_counter [1]),
3338         .datad(\inst|vga_driver_unit|v_sync_1_0_0_0_g1 ),
3339         .aclr(gnd),
3340         .aload(gnd),
3341         .sclr(gnd),
3342         .sload(gnd),
3343         .ena(vcc),
3344         .cin(gnd),
3345         .cin0(gnd),
3346         .cin1(vcc),
3347         .inverta(gnd),
3348         .regcascin(gnd),
3349         .devclrn(devclrn),
3350         .devpor(devpor),
3351         .combout(),
3352         .regout(\inst|vga_driver_unit|v_sync ),
3353         .cout(),
3354         .cout0(),
3355         .cout1());
3356 // synopsys translate_off
3357 defparam \inst|vga_driver_unit|v_sync_Z .lut_mask = "ff7f";
3358 defparam \inst|vga_driver_unit|v_sync_Z .operation_mode = "normal";
3359 defparam \inst|vga_driver_unit|v_sync_Z .output_mode = "reg_only";
3360 defparam \inst|vga_driver_unit|v_sync_Z .register_cascade_mode = "off";
3361 defparam \inst|vga_driver_unit|v_sync_Z .sum_lutc_input = "datac";
3362 defparam \inst|vga_driver_unit|v_sync_Z .synch_mode = "off";
3363 // synopsys translate_on
3364
3365 // atom is at LC_X36_Y33_N8
3366 stratix_lcell \inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1_cZ (
3367 // Equation(s):
3368 // \inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1  = \reset~combout  & \inst|dly_counter [1] & \inst|dly_counter [0] & !\inst|vga_driver_unit|hsync_state_1
3369
3370         .clk(gnd),
3371         .dataa(\reset~combout ),
3372         .datab(\inst|dly_counter [1]),
3373         .datac(\inst|dly_counter [0]),
3374         .datad(\inst|vga_driver_unit|hsync_state_1 ),
3375         .aclr(gnd),
3376         .aload(gnd),
3377         .sclr(gnd),
3378         .sload(gnd),
3379         .ena(vcc),
3380         .cin(gnd),
3381         .cin0(gnd),
3382         .cin1(vcc),
3383         .inverta(gnd),
3384         .regcascin(gnd),
3385         .devclrn(devclrn),
3386         .devpor(devpor),
3387         .combout(\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
3388         .regout(),
3389         .cout(),
3390         .cout0(),
3391         .cout1());
3392 // synopsys translate_off
3393 defparam \inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1_cZ .lut_mask = "0080";
3394 defparam \inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1_cZ .operation_mode = "normal";
3395 defparam \inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1_cZ .output_mode = "comb_only";
3396 defparam \inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1_cZ .register_cascade_mode = "off";
3397 defparam \inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1_cZ .sum_lutc_input = "datac";
3398 defparam \inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1_cZ .synch_mode = "off";
3399 // synopsys translate_on
3400
3401 // atom is at LC_X77_Y33_N5
3402 stratix_lcell \inst|vga_driver_unit|column_counter_sig_0_ (
3403 // Equation(s):
3404 // \inst|vga_driver_unit|column_counter_sig_0  = DFFEAS(!\inst|vga_driver_unit|column_counter_sig_0  # !\inst|vga_driver_unit|un10_column_counter_siglto9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
3405 // !\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 , )
3406
3407         .clk(\inst1|altpll_component|_clk0 ),
3408         .dataa(vcc),
3409         .datab(vcc),
3410         .datac(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
3411         .datad(\inst|vga_driver_unit|column_counter_sig_0 ),
3412         .aclr(gnd),
3413         .aload(gnd),
3414         .sclr(!\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
3415         .sload(gnd),
3416         .ena(vcc),
3417         .cin(gnd),
3418         .cin0(gnd),
3419         .cin1(vcc),
3420         .inverta(gnd),
3421         .regcascin(gnd),
3422         .devclrn(devclrn),
3423         .devpor(devpor),
3424         .combout(),
3425         .regout(\inst|vga_driver_unit|column_counter_sig_0 ),
3426         .cout(),
3427         .cout0(),
3428         .cout1());
3429 // synopsys translate_off
3430 defparam \inst|vga_driver_unit|column_counter_sig_0_ .lut_mask = "0fff";
3431 defparam \inst|vga_driver_unit|column_counter_sig_0_ .operation_mode = "normal";
3432 defparam \inst|vga_driver_unit|column_counter_sig_0_ .output_mode = "reg_only";
3433 defparam \inst|vga_driver_unit|column_counter_sig_0_ .register_cascade_mode = "off";
3434 defparam \inst|vga_driver_unit|column_counter_sig_0_ .sum_lutc_input = "datac";
3435 defparam \inst|vga_driver_unit|column_counter_sig_0_ .synch_mode = "on";
3436 // synopsys translate_on
3437
3438 // atom is at LC_X78_Y33_N5
3439 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_1_ (
3440 // Equation(s):
3441 // \inst|vga_driver_unit|un2_column_counter_next_combout [1] = \inst|vga_driver_unit|column_counter_sig_0  $ \inst|vga_driver_unit|column_counter_sig_1
3442 // \inst|vga_driver_unit|un2_column_counter_next_cout [1] = CARRY(\inst|vga_driver_unit|column_counter_sig_0  & \inst|vga_driver_unit|column_counter_sig_1 )
3443 // \inst|vga_driver_unit|un2_column_counter_next_cout[1]~COUT1_10  = CARRY(\inst|vga_driver_unit|column_counter_sig_0  & \inst|vga_driver_unit|column_counter_sig_1 )
3444
3445         .clk(gnd),
3446         .dataa(\inst|vga_driver_unit|column_counter_sig_0 ),
3447         .datab(\inst|vga_driver_unit|column_counter_sig_1 ),
3448         .datac(vcc),
3449         .datad(vcc),
3450         .aclr(gnd),
3451         .aload(gnd),
3452         .sclr(gnd),
3453         .sload(gnd),
3454         .ena(vcc),
3455         .cin(gnd),
3456         .cin0(gnd),
3457         .cin1(vcc),
3458         .inverta(gnd),
3459         .regcascin(gnd),
3460         .devclrn(devclrn),
3461         .devpor(devpor),
3462         .combout(\inst|vga_driver_unit|un2_column_counter_next_combout [1]),
3463         .regout(),
3464         .cout(),
3465         .cout0(\inst|vga_driver_unit|un2_column_counter_next_cout [1]),
3466         .cout1(\inst|vga_driver_unit|un2_column_counter_next_cout[1]~COUT1_10 ));
3467 // synopsys translate_off
3468 defparam \inst|vga_driver_unit|un2_column_counter_next_1_ .lut_mask = "6688";
3469 defparam \inst|vga_driver_unit|un2_column_counter_next_1_ .operation_mode = "arithmetic";
3470 defparam \inst|vga_driver_unit|un2_column_counter_next_1_ .output_mode = "comb_only";
3471 defparam \inst|vga_driver_unit|un2_column_counter_next_1_ .register_cascade_mode = "off";
3472 defparam \inst|vga_driver_unit|un2_column_counter_next_1_ .sum_lutc_input = "datac";
3473 defparam \inst|vga_driver_unit|un2_column_counter_next_1_ .synch_mode = "off";
3474 // synopsys translate_on
3475
3476 // atom is at LC_X77_Y33_N2
3477 stratix_lcell \inst|vga_driver_unit|column_counter_sig_1_ (
3478 // Equation(s):
3479 // \inst|vga_driver_unit|column_counter_sig_1  = DFFEAS(\inst|vga_driver_unit|un2_column_counter_next_combout [1] # !\inst|vga_driver_unit|un10_column_counter_siglto9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
3480 // !\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 , )
3481
3482         .clk(\inst1|altpll_component|_clk0 ),
3483         .dataa(\inst|vga_driver_unit|un2_column_counter_next_combout [1]),
3484         .datab(vcc),
3485         .datac(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
3486         .datad(vcc),
3487         .aclr(gnd),
3488         .aload(gnd),
3489         .sclr(!\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
3490         .sload(gnd),
3491         .ena(vcc),
3492         .cin(gnd),
3493         .cin0(gnd),
3494         .cin1(vcc),
3495         .inverta(gnd),
3496         .regcascin(gnd),
3497         .devclrn(devclrn),
3498         .devpor(devpor),
3499         .combout(),
3500         .regout(\inst|vga_driver_unit|column_counter_sig_1 ),
3501         .cout(),
3502         .cout0(),
3503         .cout1());
3504 // synopsys translate_off
3505 defparam \inst|vga_driver_unit|column_counter_sig_1_ .lut_mask = "afaf";
3506 defparam \inst|vga_driver_unit|column_counter_sig_1_ .operation_mode = "normal";
3507 defparam \inst|vga_driver_unit|column_counter_sig_1_ .output_mode = "reg_only";
3508 defparam \inst|vga_driver_unit|column_counter_sig_1_ .register_cascade_mode = "off";
3509 defparam \inst|vga_driver_unit|column_counter_sig_1_ .sum_lutc_input = "datac";
3510 defparam \inst|vga_driver_unit|column_counter_sig_1_ .synch_mode = "on";
3511 // synopsys translate_on
3512
3513 // atom is at LC_X78_Y33_N6
3514 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_3_ (
3515 // Equation(s):
3516 // \inst|vga_driver_unit|un2_column_counter_next_combout [3] = \inst|vga_driver_unit|column_counter_sig_3  $ (\inst|vga_driver_unit|column_counter_sig_2  & \inst|vga_driver_unit|un2_column_counter_next_cout [1])
3517 // \inst|vga_driver_unit|un2_column_counter_next_cout [3] = CARRY(!\inst|vga_driver_unit|un2_column_counter_next_cout [1] # !\inst|vga_driver_unit|column_counter_sig_2  # !\inst|vga_driver_unit|column_counter_sig_3 )
3518 // \inst|vga_driver_unit|un2_column_counter_next_cout[3]~COUT1_12  = CARRY(!\inst|vga_driver_unit|un2_column_counter_next_cout[1]~COUT1_10  # !\inst|vga_driver_unit|column_counter_sig_2  # !\inst|vga_driver_unit|column_counter_sig_3 )
3519
3520         .clk(gnd),
3521         .dataa(\inst|vga_driver_unit|column_counter_sig_3 ),
3522         .datab(\inst|vga_driver_unit|column_counter_sig_2 ),
3523         .datac(vcc),
3524         .datad(vcc),
3525         .aclr(gnd),
3526         .aload(gnd),
3527         .sclr(gnd),
3528         .sload(gnd),
3529         .ena(vcc),
3530         .cin(gnd),
3531         .cin0(\inst|vga_driver_unit|un2_column_counter_next_cout [1]),
3532         .cin1(\inst|vga_driver_unit|un2_column_counter_next_cout[1]~COUT1_10 ),
3533         .inverta(gnd),
3534         .regcascin(gnd),
3535         .devclrn(devclrn),
3536         .devpor(devpor),
3537         .combout(\inst|vga_driver_unit|un2_column_counter_next_combout [3]),
3538         .regout(),
3539         .cout(),
3540         .cout0(\inst|vga_driver_unit|un2_column_counter_next_cout [3]),
3541         .cout1(\inst|vga_driver_unit|un2_column_counter_next_cout[3]~COUT1_12 ));
3542 // synopsys translate_off
3543 defparam \inst|vga_driver_unit|un2_column_counter_next_3_ .cin0_used = "true";
3544 defparam \inst|vga_driver_unit|un2_column_counter_next_3_ .cin1_used = "true";
3545 defparam \inst|vga_driver_unit|un2_column_counter_next_3_ .lut_mask = "6a7f";
3546 defparam \inst|vga_driver_unit|un2_column_counter_next_3_ .operation_mode = "arithmetic";
3547 defparam \inst|vga_driver_unit|un2_column_counter_next_3_ .output_mode = "comb_only";
3548 defparam \inst|vga_driver_unit|un2_column_counter_next_3_ .register_cascade_mode = "off";
3549 defparam \inst|vga_driver_unit|un2_column_counter_next_3_ .sum_lutc_input = "cin";
3550 defparam \inst|vga_driver_unit|un2_column_counter_next_3_ .synch_mode = "off";
3551 // synopsys translate_on
3552
3553 // atom is at LC_X78_Y33_N2
3554 stratix_lcell \inst|vga_driver_unit|column_counter_sig_3_ (
3555 // Equation(s):
3556 // \inst|vga_driver_unit|column_counter_sig_3  = DFFEAS(\inst|vga_driver_unit|un2_column_counter_next_combout [3] # !\inst|vga_driver_unit|un10_column_counter_siglto9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
3557 // !\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 , )
3558
3559         .clk(\inst1|altpll_component|_clk0 ),
3560         .dataa(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
3561         .datab(vcc),
3562         .datac(vcc),
3563         .datad(\inst|vga_driver_unit|un2_column_counter_next_combout [3]),
3564         .aclr(gnd),
3565         .aload(gnd),
3566         .sclr(!\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
3567         .sload(gnd),
3568         .ena(vcc),
3569         .cin(gnd),
3570         .cin0(gnd),
3571         .cin1(vcc),
3572         .inverta(gnd),
3573         .regcascin(gnd),
3574         .devclrn(devclrn),
3575         .devpor(devpor),
3576         .combout(),
3577         .regout(\inst|vga_driver_unit|column_counter_sig_3 ),
3578         .cout(),
3579         .cout0(),
3580         .cout1());
3581 // synopsys translate_off
3582 defparam \inst|vga_driver_unit|column_counter_sig_3_ .lut_mask = "ff55";
3583 defparam \inst|vga_driver_unit|column_counter_sig_3_ .operation_mode = "normal";
3584 defparam \inst|vga_driver_unit|column_counter_sig_3_ .output_mode = "reg_only";
3585 defparam \inst|vga_driver_unit|column_counter_sig_3_ .register_cascade_mode = "off";
3586 defparam \inst|vga_driver_unit|column_counter_sig_3_ .sum_lutc_input = "datac";
3587 defparam \inst|vga_driver_unit|column_counter_sig_3_ .synch_mode = "on";
3588 // synopsys translate_on
3589
3590 // atom is at LC_X78_Y32_N5
3591 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_0_ (
3592 // Equation(s):
3593 // \inst|vga_driver_unit|un2_column_counter_next_cout [0] = CARRY(\inst|vga_driver_unit|column_counter_sig_0  & \inst|vga_driver_unit|column_counter_sig_1 )
3594 // \inst|vga_driver_unit|un2_column_counter_next_cout[0]~COUT1_18  = CARRY(\inst|vga_driver_unit|column_counter_sig_0  & \inst|vga_driver_unit|column_counter_sig_1 )
3595
3596         .clk(gnd),
3597         .dataa(\inst|vga_driver_unit|column_counter_sig_0 ),
3598         .datab(\inst|vga_driver_unit|column_counter_sig_1 ),
3599         .datac(vcc),
3600         .datad(vcc),
3601         .aclr(gnd),
3602         .aload(gnd),
3603         .sclr(gnd),
3604         .sload(gnd),
3605         .ena(vcc),
3606         .cin(gnd),
3607         .cin0(gnd),
3608         .cin1(vcc),
3609         .inverta(gnd),
3610         .regcascin(gnd),
3611         .devclrn(devclrn),
3612         .devpor(devpor),
3613         .combout(\inst|vga_driver_unit|un2_column_counter_next_0_~COMBOUT ),
3614         .regout(),
3615         .cout(),
3616         .cout0(\inst|vga_driver_unit|un2_column_counter_next_cout [0]),
3617         .cout1(\inst|vga_driver_unit|un2_column_counter_next_cout[0]~COUT1_18 ));
3618 // synopsys translate_off
3619 defparam \inst|vga_driver_unit|un2_column_counter_next_0_ .lut_mask = "ff88";
3620 defparam \inst|vga_driver_unit|un2_column_counter_next_0_ .operation_mode = "arithmetic";
3621 defparam \inst|vga_driver_unit|un2_column_counter_next_0_ .output_mode = "none";
3622 defparam \inst|vga_driver_unit|un2_column_counter_next_0_ .register_cascade_mode = "off";
3623 defparam \inst|vga_driver_unit|un2_column_counter_next_0_ .sum_lutc_input = "datac";
3624 defparam \inst|vga_driver_unit|un2_column_counter_next_0_ .synch_mode = "off";
3625 // synopsys translate_on
3626
3627 // atom is at LC_X78_Y32_N6
3628 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_2_ (
3629 // Equation(s):
3630 // \inst|vga_driver_unit|un2_column_counter_next_combout [2] = \inst|vga_driver_unit|column_counter_sig_2  $ (\inst|vga_driver_unit|un2_column_counter_next_cout [0])
3631 // \inst|vga_driver_unit|un2_column_counter_next_cout [2] = CARRY(!\inst|vga_driver_unit|un2_column_counter_next_cout [0] # !\inst|vga_driver_unit|column_counter_sig_3  # !\inst|vga_driver_unit|column_counter_sig_2 )
3632 // \inst|vga_driver_unit|un2_column_counter_next_cout[2]~COUT1_20  = CARRY(!\inst|vga_driver_unit|un2_column_counter_next_cout[0]~COUT1_18  # !\inst|vga_driver_unit|column_counter_sig_3  # !\inst|vga_driver_unit|column_counter_sig_2 )
3633
3634         .clk(gnd),
3635         .dataa(\inst|vga_driver_unit|column_counter_sig_2 ),
3636         .datab(\inst|vga_driver_unit|column_counter_sig_3 ),
3637         .datac(vcc),
3638         .datad(vcc),
3639         .aclr(gnd),
3640         .aload(gnd),
3641         .sclr(gnd),
3642         .sload(gnd),
3643         .ena(vcc),
3644         .cin(gnd),
3645         .cin0(\inst|vga_driver_unit|un2_column_counter_next_cout [0]),
3646         .cin1(\inst|vga_driver_unit|un2_column_counter_next_cout[0]~COUT1_18 ),
3647         .inverta(gnd),
3648         .regcascin(gnd),
3649         .devclrn(devclrn),
3650         .devpor(devpor),
3651         .combout(\inst|vga_driver_unit|un2_column_counter_next_combout [2]),
3652         .regout(),
3653         .cout(),
3654         .cout0(\inst|vga_driver_unit|un2_column_counter_next_cout [2]),
3655         .cout1(\inst|vga_driver_unit|un2_column_counter_next_cout[2]~COUT1_20 ));
3656 // synopsys translate_off
3657 defparam \inst|vga_driver_unit|un2_column_counter_next_2_ .cin0_used = "true";
3658 defparam \inst|vga_driver_unit|un2_column_counter_next_2_ .cin1_used = "true";
3659 defparam \inst|vga_driver_unit|un2_column_counter_next_2_ .lut_mask = "5a7f";
3660 defparam \inst|vga_driver_unit|un2_column_counter_next_2_ .operation_mode = "arithmetic";
3661 defparam \inst|vga_driver_unit|un2_column_counter_next_2_ .output_mode = "comb_only";
3662 defparam \inst|vga_driver_unit|un2_column_counter_next_2_ .register_cascade_mode = "off";
3663 defparam \inst|vga_driver_unit|un2_column_counter_next_2_ .sum_lutc_input = "cin";
3664 defparam \inst|vga_driver_unit|un2_column_counter_next_2_ .synch_mode = "off";
3665 // synopsys translate_on
3666
3667 // atom is at LC_X77_Y33_N4
3668 stratix_lcell \inst|vga_driver_unit|column_counter_sig_2_ (
3669 // Equation(s):
3670 // \inst|vga_driver_unit|column_counter_sig_2  = DFFEAS(\inst|vga_driver_unit|un2_column_counter_next_combout [2] # !\inst|vga_driver_unit|un10_column_counter_siglto9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
3671 // !\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 , )
3672
3673         .clk(\inst1|altpll_component|_clk0 ),
3674         .dataa(vcc),
3675         .datab(vcc),
3676         .datac(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
3677         .datad(\inst|vga_driver_unit|un2_column_counter_next_combout [2]),
3678         .aclr(gnd),
3679         .aload(gnd),
3680         .sclr(!\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
3681         .sload(gnd),
3682         .ena(vcc),
3683         .cin(gnd),
3684         .cin0(gnd),
3685         .cin1(vcc),
3686         .inverta(gnd),
3687         .regcascin(gnd),
3688         .devclrn(devclrn),
3689         .devpor(devpor),
3690         .combout(),
3691         .regout(\inst|vga_driver_unit|column_counter_sig_2 ),
3692         .cout(),
3693         .cout0(),
3694         .cout1());
3695 // synopsys translate_off
3696 defparam \inst|vga_driver_unit|column_counter_sig_2_ .lut_mask = "ff0f";
3697 defparam \inst|vga_driver_unit|column_counter_sig_2_ .operation_mode = "normal";
3698 defparam \inst|vga_driver_unit|column_counter_sig_2_ .output_mode = "reg_only";
3699 defparam \inst|vga_driver_unit|column_counter_sig_2_ .register_cascade_mode = "off";
3700 defparam \inst|vga_driver_unit|column_counter_sig_2_ .sum_lutc_input = "datac";
3701 defparam \inst|vga_driver_unit|column_counter_sig_2_ .synch_mode = "on";
3702 // synopsys translate_on
3703
3704 // atom is at LC_X78_Y32_N7
3705 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_4_ (
3706 // Equation(s):
3707 // \inst|vga_driver_unit|un2_column_counter_next_combout [4] = \inst|vga_driver_unit|column_counter_sig_4  $ !\inst|vga_driver_unit|un2_column_counter_next_cout [2]
3708 // \inst|vga_driver_unit|un2_column_counter_next_cout [4] = CARRY(\inst|vga_driver_unit|column_counter_sig_5  & \inst|vga_driver_unit|column_counter_sig_4  & !\inst|vga_driver_unit|un2_column_counter_next_cout [2])
3709 // \inst|vga_driver_unit|un2_column_counter_next_cout[4]~COUT1_22  = CARRY(\inst|vga_driver_unit|column_counter_sig_5  & \inst|vga_driver_unit|column_counter_sig_4  & !\inst|vga_driver_unit|un2_column_counter_next_cout[2]~COUT1_20 )
3710
3711         .clk(gnd),
3712         .dataa(\inst|vga_driver_unit|column_counter_sig_5 ),
3713         .datab(\inst|vga_driver_unit|column_counter_sig_4 ),
3714         .datac(vcc),
3715         .datad(vcc),
3716         .aclr(gnd),
3717         .aload(gnd),
3718         .sclr(gnd),
3719         .sload(gnd),
3720         .ena(vcc),
3721         .cin(gnd),
3722         .cin0(\inst|vga_driver_unit|un2_column_counter_next_cout [2]),
3723         .cin1(\inst|vga_driver_unit|un2_column_counter_next_cout[2]~COUT1_20 ),
3724         .inverta(gnd),
3725         .regcascin(gnd),
3726         .devclrn(devclrn),
3727         .devpor(devpor),
3728         .combout(\inst|vga_driver_unit|un2_column_counter_next_combout [4]),
3729         .regout(),
3730         .cout(),
3731         .cout0(\inst|vga_driver_unit|un2_column_counter_next_cout [4]),
3732         .cout1(\inst|vga_driver_unit|un2_column_counter_next_cout[4]~COUT1_22 ));
3733 // synopsys translate_off
3734 defparam \inst|vga_driver_unit|un2_column_counter_next_4_ .cin0_used = "true";
3735 defparam \inst|vga_driver_unit|un2_column_counter_next_4_ .cin1_used = "true";
3736 defparam \inst|vga_driver_unit|un2_column_counter_next_4_ .lut_mask = "c308";
3737 defparam \inst|vga_driver_unit|un2_column_counter_next_4_ .operation_mode = "arithmetic";
3738 defparam \inst|vga_driver_unit|un2_column_counter_next_4_ .output_mode = "comb_only";
3739 defparam \inst|vga_driver_unit|un2_column_counter_next_4_ .register_cascade_mode = "off";
3740 defparam \inst|vga_driver_unit|un2_column_counter_next_4_ .sum_lutc_input = "cin";
3741 defparam \inst|vga_driver_unit|un2_column_counter_next_4_ .synch_mode = "off";
3742 // synopsys translate_on
3743
3744 // atom is at LC_X77_Y33_N8
3745 stratix_lcell \inst|vga_driver_unit|column_counter_sig_4_ (
3746 // Equation(s):
3747 // \inst|vga_driver_unit|column_counter_sig_4  = DFFEAS(\inst|vga_driver_unit|un2_column_counter_next_combout [4] # !\inst|vga_driver_unit|un10_column_counter_siglto9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
3748 // !\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 , )
3749
3750         .clk(\inst1|altpll_component|_clk0 ),
3751         .dataa(vcc),
3752         .datab(vcc),
3753         .datac(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
3754         .datad(\inst|vga_driver_unit|un2_column_counter_next_combout [4]),
3755         .aclr(gnd),
3756         .aload(gnd),
3757         .sclr(!\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
3758         .sload(gnd),
3759         .ena(vcc),
3760         .cin(gnd),
3761         .cin0(gnd),
3762         .cin1(vcc),
3763         .inverta(gnd),
3764         .regcascin(gnd),
3765         .devclrn(devclrn),
3766         .devpor(devpor),
3767         .combout(),
3768         .regout(\inst|vga_driver_unit|column_counter_sig_4 ),
3769         .cout(),
3770         .cout0(),
3771         .cout1());
3772 // synopsys translate_off
3773 defparam \inst|vga_driver_unit|column_counter_sig_4_ .lut_mask = "ff0f";
3774 defparam \inst|vga_driver_unit|column_counter_sig_4_ .operation_mode = "normal";
3775 defparam \inst|vga_driver_unit|column_counter_sig_4_ .output_mode = "reg_only";
3776 defparam \inst|vga_driver_unit|column_counter_sig_4_ .register_cascade_mode = "off";
3777 defparam \inst|vga_driver_unit|column_counter_sig_4_ .sum_lutc_input = "datac";
3778 defparam \inst|vga_driver_unit|column_counter_sig_4_ .synch_mode = "on";
3779 // synopsys translate_on
3780
3781 // atom is at LC_X78_Y33_N7
3782 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_5_ (
3783 // Equation(s):
3784 // \inst|vga_driver_unit|un2_column_counter_next_combout [5] = \inst|vga_driver_unit|column_counter_sig_5  $ (\inst|vga_driver_unit|column_counter_sig_4  & !\inst|vga_driver_unit|un2_column_counter_next_cout [3])
3785 // \inst|vga_driver_unit|un2_column_counter_next_cout [5] = CARRY(\inst|vga_driver_unit|column_counter_sig_5  & \inst|vga_driver_unit|column_counter_sig_4  & !\inst|vga_driver_unit|un2_column_counter_next_cout [3])
3786 // \inst|vga_driver_unit|un2_column_counter_next_cout[5]~COUT1_14  = CARRY(\inst|vga_driver_unit|column_counter_sig_5  & \inst|vga_driver_unit|column_counter_sig_4  & !\inst|vga_driver_unit|un2_column_counter_next_cout[3]~COUT1_12 )
3787
3788         .clk(gnd),
3789         .dataa(\inst|vga_driver_unit|column_counter_sig_5 ),
3790         .datab(\inst|vga_driver_unit|column_counter_sig_4 ),
3791         .datac(vcc),
3792         .datad(vcc),
3793         .aclr(gnd),
3794         .aload(gnd),
3795         .sclr(gnd),
3796         .sload(gnd),
3797         .ena(vcc),
3798         .cin(gnd),
3799         .cin0(\inst|vga_driver_unit|un2_column_counter_next_cout [3]),
3800         .cin1(\inst|vga_driver_unit|un2_column_counter_next_cout[3]~COUT1_12 ),
3801         .inverta(gnd),
3802         .regcascin(gnd),
3803         .devclrn(devclrn),
3804         .devpor(devpor),
3805         .combout(\inst|vga_driver_unit|un2_column_counter_next_combout [5]),
3806         .regout(),
3807         .cout(),
3808         .cout0(\inst|vga_driver_unit|un2_column_counter_next_cout [5]),
3809         .cout1(\inst|vga_driver_unit|un2_column_counter_next_cout[5]~COUT1_14 ));
3810 // synopsys translate_off
3811 defparam \inst|vga_driver_unit|un2_column_counter_next_5_ .cin0_used = "true";
3812 defparam \inst|vga_driver_unit|un2_column_counter_next_5_ .cin1_used = "true";
3813 defparam \inst|vga_driver_unit|un2_column_counter_next_5_ .lut_mask = "a608";
3814 defparam \inst|vga_driver_unit|un2_column_counter_next_5_ .operation_mode = "arithmetic";
3815 defparam \inst|vga_driver_unit|un2_column_counter_next_5_ .output_mode = "comb_only";
3816 defparam \inst|vga_driver_unit|un2_column_counter_next_5_ .register_cascade_mode = "off";
3817 defparam \inst|vga_driver_unit|un2_column_counter_next_5_ .sum_lutc_input = "cin";
3818 defparam \inst|vga_driver_unit|un2_column_counter_next_5_ .synch_mode = "off";
3819 // synopsys translate_on
3820
3821 // atom is at LC_X77_Y33_N9
3822 stratix_lcell \inst|vga_driver_unit|column_counter_sig_5_ (
3823 // Equation(s):
3824 // \inst|vga_driver_unit|column_counter_sig_5  = DFFEAS(\inst|vga_driver_unit|un2_column_counter_next_combout [5] # !\inst|vga_driver_unit|un10_column_counter_siglto9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
3825 // !\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 , )
3826
3827         .clk(\inst1|altpll_component|_clk0 ),
3828         .dataa(vcc),
3829         .datab(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
3830         .datac(\inst|vga_driver_unit|un2_column_counter_next_combout [5]),
3831         .datad(vcc),
3832         .aclr(gnd),
3833         .aload(gnd),
3834         .sclr(!\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
3835         .sload(gnd),
3836         .ena(vcc),
3837         .cin(gnd),
3838         .cin0(gnd),
3839         .cin1(vcc),
3840         .inverta(gnd),
3841         .regcascin(gnd),
3842         .devclrn(devclrn),
3843         .devpor(devpor),
3844         .combout(),
3845         .regout(\inst|vga_driver_unit|column_counter_sig_5 ),
3846         .cout(),
3847         .cout0(),
3848         .cout1());
3849 // synopsys translate_off
3850 defparam \inst|vga_driver_unit|column_counter_sig_5_ .lut_mask = "f3f3";
3851 defparam \inst|vga_driver_unit|column_counter_sig_5_ .operation_mode = "normal";
3852 defparam \inst|vga_driver_unit|column_counter_sig_5_ .output_mode = "reg_only";
3853 defparam \inst|vga_driver_unit|column_counter_sig_5_ .register_cascade_mode = "off";
3854 defparam \inst|vga_driver_unit|column_counter_sig_5_ .sum_lutc_input = "datac";
3855 defparam \inst|vga_driver_unit|column_counter_sig_5_ .synch_mode = "on";
3856 // synopsys translate_on
3857
3858 // atom is at LC_X78_Y32_N8
3859 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_6_ (
3860 // Equation(s):
3861 // \inst|vga_driver_unit|un2_column_counter_next_combout [6] = \inst|vga_driver_unit|column_counter_sig_6  $ (\inst|vga_driver_unit|un2_column_counter_next_cout [4])
3862 // \inst|vga_driver_unit|un2_column_counter_next_cout [6] = CARRY(!\inst|vga_driver_unit|un2_column_counter_next_cout [4] # !\inst|vga_driver_unit|column_counter_sig_7  # !\inst|vga_driver_unit|column_counter_sig_6 )
3863 // \inst|vga_driver_unit|un2_column_counter_next_cout[6]~COUT1_24  = CARRY(!\inst|vga_driver_unit|un2_column_counter_next_cout[4]~COUT1_22  # !\inst|vga_driver_unit|column_counter_sig_7  # !\inst|vga_driver_unit|column_counter_sig_6 )
3864
3865         .clk(gnd),
3866         .dataa(\inst|vga_driver_unit|column_counter_sig_6 ),
3867         .datab(\inst|vga_driver_unit|column_counter_sig_7 ),
3868         .datac(vcc),
3869         .datad(vcc),
3870         .aclr(gnd),
3871         .aload(gnd),
3872         .sclr(gnd),
3873         .sload(gnd),
3874         .ena(vcc),
3875         .cin(gnd),
3876         .cin0(\inst|vga_driver_unit|un2_column_counter_next_cout [4]),
3877         .cin1(\inst|vga_driver_unit|un2_column_counter_next_cout[4]~COUT1_22 ),
3878         .inverta(gnd),
3879         .regcascin(gnd),
3880         .devclrn(devclrn),
3881         .devpor(devpor),
3882         .combout(\inst|vga_driver_unit|un2_column_counter_next_combout [6]),
3883         .regout(),
3884         .cout(),
3885         .cout0(\inst|vga_driver_unit|un2_column_counter_next_cout [6]),
3886         .cout1(\inst|vga_driver_unit|un2_column_counter_next_cout[6]~COUT1_24 ));
3887 // synopsys translate_off
3888 defparam \inst|vga_driver_unit|un2_column_counter_next_6_ .cin0_used = "true";
3889 defparam \inst|vga_driver_unit|un2_column_counter_next_6_ .cin1_used = "true";
3890 defparam \inst|vga_driver_unit|un2_column_counter_next_6_ .lut_mask = "5a7f";
3891 defparam \inst|vga_driver_unit|un2_column_counter_next_6_ .operation_mode = "arithmetic";
3892 defparam \inst|vga_driver_unit|un2_column_counter_next_6_ .output_mode = "comb_only";
3893 defparam \inst|vga_driver_unit|un2_column_counter_next_6_ .register_cascade_mode = "off";
3894 defparam \inst|vga_driver_unit|un2_column_counter_next_6_ .sum_lutc_input = "cin";
3895 defparam \inst|vga_driver_unit|un2_column_counter_next_6_ .synch_mode = "off";
3896 // synopsys translate_on
3897
3898 // atom is at LC_X78_Y32_N9
3899 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_8_ (
3900 // Equation(s):
3901 // \inst|vga_driver_unit|un2_column_counter_next_combout [8] = \inst|vga_driver_unit|un2_column_counter_next_cout [6] $ !\inst|vga_driver_unit|column_counter_sig_8
3902
3903         .clk(gnd),
3904         .dataa(vcc),
3905         .datab(vcc),
3906         .datac(vcc),
3907         .datad(\inst|vga_driver_unit|column_counter_sig_8 ),
3908         .aclr(gnd),
3909         .aload(gnd),
3910         .sclr(gnd),
3911         .sload(gnd),
3912         .ena(vcc),
3913         .cin(gnd),
3914         .cin0(\inst|vga_driver_unit|un2_column_counter_next_cout [6]),
3915         .cin1(\inst|vga_driver_unit|un2_column_counter_next_cout[6]~COUT1_24 ),
3916         .inverta(gnd),
3917         .regcascin(gnd),
3918         .devclrn(devclrn),
3919         .devpor(devpor),
3920         .combout(\inst|vga_driver_unit|un2_column_counter_next_combout [8]),
3921         .regout(),
3922         .cout(),
3923         .cout0(),
3924         .cout1());
3925 // synopsys translate_off
3926 defparam \inst|vga_driver_unit|un2_column_counter_next_8_ .cin0_used = "true";
3927 defparam \inst|vga_driver_unit|un2_column_counter_next_8_ .cin1_used = "true";
3928 defparam \inst|vga_driver_unit|un2_column_counter_next_8_ .lut_mask = "f00f";
3929 defparam \inst|vga_driver_unit|un2_column_counter_next_8_ .operation_mode = "normal";
3930 defparam \inst|vga_driver_unit|un2_column_counter_next_8_ .output_mode = "comb_only";
3931 defparam \inst|vga_driver_unit|un2_column_counter_next_8_ .register_cascade_mode = "off";
3932 defparam \inst|vga_driver_unit|un2_column_counter_next_8_ .sum_lutc_input = "cin";
3933 defparam \inst|vga_driver_unit|un2_column_counter_next_8_ .synch_mode = "off";
3934 // synopsys translate_on
3935
3936 // atom is at LC_X78_Y32_N2
3937 stratix_lcell \inst|vga_driver_unit|column_counter_sig_8_ (
3938 // Equation(s):
3939 // \inst|vga_driver_unit|column_counter_sig_8  = DFFEAS(\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1  & \inst|vga_driver_unit|un10_column_counter_siglto9  & \inst|vga_driver_unit|un2_column_counter_next_combout [8],
3940 // GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , , , )
3941
3942         .clk(\inst1|altpll_component|_clk0 ),
3943         .dataa(vcc),
3944         .datab(\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
3945         .datac(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
3946         .datad(\inst|vga_driver_unit|un2_column_counter_next_combout [8]),
3947         .aclr(gnd),
3948         .aload(gnd),
3949         .sclr(gnd),
3950         .sload(gnd),
3951         .ena(vcc),
3952         .cin(gnd),
3953         .cin0(gnd),
3954         .cin1(vcc),
3955         .inverta(gnd),
3956         .regcascin(gnd),
3957         .devclrn(devclrn),
3958         .devpor(devpor),
3959         .combout(),
3960         .regout(\inst|vga_driver_unit|column_counter_sig_8 ),
3961         .cout(),
3962         .cout0(),
3963         .cout1());
3964 // synopsys translate_off
3965 defparam \inst|vga_driver_unit|column_counter_sig_8_ .lut_mask = "c000";
3966 defparam \inst|vga_driver_unit|column_counter_sig_8_ .operation_mode = "normal";
3967 defparam \inst|vga_driver_unit|column_counter_sig_8_ .output_mode = "reg_only";
3968 defparam \inst|vga_driver_unit|column_counter_sig_8_ .register_cascade_mode = "off";
3969 defparam \inst|vga_driver_unit|column_counter_sig_8_ .sum_lutc_input = "datac";
3970 defparam \inst|vga_driver_unit|column_counter_sig_8_ .synch_mode = "off";
3971 // synopsys translate_on
3972
3973 // atom is at LC_X77_Y33_N7
3974 stratix_lcell \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_1 (
3975 // Equation(s):
3976 // \inst|vga_driver_unit|un10_column_counter_siglt6_1  = !\inst|vga_driver_unit|column_counter_sig_1  # !\inst|vga_driver_unit|column_counter_sig_2  # !\inst|vga_driver_unit|column_counter_sig_0
3977
3978         .clk(gnd),
3979         .dataa(\inst|vga_driver_unit|column_counter_sig_0 ),
3980         .datab(vcc),
3981         .datac(\inst|vga_driver_unit|column_counter_sig_2 ),
3982         .datad(\inst|vga_driver_unit|column_counter_sig_1 ),
3983         .aclr(gnd),
3984         .aload(gnd),
3985         .sclr(gnd),
3986         .sload(gnd),
3987         .ena(vcc),
3988         .cin(gnd),
3989         .cin0(gnd),
3990         .cin1(vcc),
3991         .inverta(gnd),
3992         .regcascin(gnd),
3993         .devclrn(devclrn),
3994         .devpor(devpor),
3995         .combout(\inst|vga_driver_unit|un10_column_counter_siglt6_1 ),
3996         .regout(),
3997         .cout(),
3998         .cout0(),
3999         .cout1());
4000 // synopsys translate_off
4001 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_1 .lut_mask = "5fff";
4002 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_1 .operation_mode = "normal";
4003 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_1 .output_mode = "comb_only";
4004 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_1 .register_cascade_mode = "off";
4005 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_1 .sum_lutc_input = "datac";
4006 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_1 .synch_mode = "off";
4007 // synopsys translate_on
4008
4009 // atom is at LC_X77_Y33_N3
4010 stratix_lcell \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6 (
4011 // Equation(s):
4012 // \inst|vga_driver_unit|un10_column_counter_siglt6  = \inst|vga_driver_unit|un10_column_counter_siglt6_3  # \inst|vga_driver_unit|un10_column_counter_siglt6_1  # !\inst|vga_driver_unit|column_counter_sig_3  # !\inst|vga_driver_unit|column_counter_sig_4
4013
4014         .clk(gnd),
4015         .dataa(\inst|vga_driver_unit|column_counter_sig_4 ),
4016         .datab(\inst|vga_driver_unit|un10_column_counter_siglt6_3 ),
4017         .datac(\inst|vga_driver_unit|un10_column_counter_siglt6_1 ),
4018         .datad(\inst|vga_driver_unit|column_counter_sig_3 ),
4019         .aclr(gnd),
4020         .aload(gnd),
4021         .sclr(gnd),
4022         .sload(gnd),
4023         .ena(vcc),
4024         .cin(gnd),
4025         .cin0(gnd),
4026         .cin1(vcc),
4027         .inverta(gnd),
4028         .regcascin(gnd),
4029         .devclrn(devclrn),
4030         .devpor(devpor),
4031         .combout(\inst|vga_driver_unit|un10_column_counter_siglt6 ),
4032         .regout(),
4033         .cout(),
4034         .cout0(),
4035         .cout1());
4036 // synopsys translate_off
4037 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6 .lut_mask = "fdff";
4038 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6 .operation_mode = "normal";
4039 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6 .output_mode = "comb_only";
4040 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6 .register_cascade_mode = "off";
4041 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6 .sum_lutc_input = "datac";
4042 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6 .synch_mode = "off";
4043 // synopsys translate_on
4044
4045 // atom is at LC_X78_Y33_N8
4046 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_7_ (
4047 // Equation(s):
4048 // \inst|vga_driver_unit|un2_column_counter_next_combout [7] = \inst|vga_driver_unit|column_counter_sig_7  $ (\inst|vga_driver_unit|column_counter_sig_6  & \inst|vga_driver_unit|un2_column_counter_next_cout [5])
4049 // \inst|vga_driver_unit|un2_column_counter_next_cout [7] = CARRY(!\inst|vga_driver_unit|un2_column_counter_next_cout [5] # !\inst|vga_driver_unit|column_counter_sig_6  # !\inst|vga_driver_unit|column_counter_sig_7 )
4050 // \inst|vga_driver_unit|un2_column_counter_next_cout[7]~COUT1_16  = CARRY(!\inst|vga_driver_unit|un2_column_counter_next_cout[5]~COUT1_14  # !\inst|vga_driver_unit|column_counter_sig_6  # !\inst|vga_driver_unit|column_counter_sig_7 )
4051
4052         .clk(gnd),
4053         .dataa(\inst|vga_driver_unit|column_counter_sig_7 ),
4054         .datab(\inst|vga_driver_unit|column_counter_sig_6 ),
4055         .datac(vcc),
4056         .datad(vcc),
4057         .aclr(gnd),
4058         .aload(gnd),
4059         .sclr(gnd),
4060         .sload(gnd),
4061         .ena(vcc),
4062         .cin(gnd),
4063         .cin0(\inst|vga_driver_unit|un2_column_counter_next_cout [5]),
4064         .cin1(\inst|vga_driver_unit|un2_column_counter_next_cout[5]~COUT1_14 ),
4065         .inverta(gnd),
4066         .regcascin(gnd),
4067         .devclrn(devclrn),
4068         .devpor(devpor),
4069         .combout(\inst|vga_driver_unit|un2_column_counter_next_combout [7]),
4070         .regout(),
4071         .cout(),
4072         .cout0(\inst|vga_driver_unit|un2_column_counter_next_cout [7]),
4073         .cout1(\inst|vga_driver_unit|un2_column_counter_next_cout[7]~COUT1_16 ));
4074 // synopsys translate_off
4075 defparam \inst|vga_driver_unit|un2_column_counter_next_7_ .cin0_used = "true";
4076 defparam \inst|vga_driver_unit|un2_column_counter_next_7_ .cin1_used = "true";
4077 defparam \inst|vga_driver_unit|un2_column_counter_next_7_ .lut_mask = "6a7f";
4078 defparam \inst|vga_driver_unit|un2_column_counter_next_7_ .operation_mode = "arithmetic";
4079 defparam \inst|vga_driver_unit|un2_column_counter_next_7_ .output_mode = "comb_only";
4080 defparam \inst|vga_driver_unit|un2_column_counter_next_7_ .register_cascade_mode = "off";
4081 defparam \inst|vga_driver_unit|un2_column_counter_next_7_ .sum_lutc_input = "cin";
4082 defparam \inst|vga_driver_unit|un2_column_counter_next_7_ .synch_mode = "off";
4083 // synopsys translate_on
4084
4085 // atom is at LC_X78_Y33_N9
4086 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_9_ (
4087 // Equation(s):
4088 // \inst|vga_driver_unit|un2_column_counter_next_combout [9] = \inst|vga_driver_unit|column_counter_sig_9  $ (\inst|vga_driver_unit|column_counter_sig_8  & !\inst|vga_driver_unit|un2_column_counter_next_cout [7])
4089
4090         .clk(gnd),
4091         .dataa(vcc),
4092         .datab(\inst|vga_driver_unit|column_counter_sig_8 ),
4093         .datac(vcc),
4094         .datad(\inst|vga_driver_unit|column_counter_sig_9 ),
4095         .aclr(gnd),
4096         .aload(gnd),
4097         .sclr(gnd),
4098         .sload(gnd),
4099         .ena(vcc),
4100         .cin(gnd),
4101         .cin0(\inst|vga_driver_unit|un2_column_counter_next_cout [7]),
4102         .cin1(\inst|vga_driver_unit|un2_column_counter_next_cout[7]~COUT1_16 ),
4103         .inverta(gnd),
4104         .regcascin(gnd),
4105         .devclrn(devclrn),
4106         .devpor(devpor),
4107         .combout(\inst|vga_driver_unit|un2_column_counter_next_combout [9]),
4108         .regout(),
4109         .cout(),
4110         .cout0(),
4111         .cout1());
4112 // synopsys translate_off
4113 defparam \inst|vga_driver_unit|un2_column_counter_next_9_ .cin0_used = "true";
4114 defparam \inst|vga_driver_unit|un2_column_counter_next_9_ .cin1_used = "true";
4115 defparam \inst|vga_driver_unit|un2_column_counter_next_9_ .lut_mask = "f30c";
4116 defparam \inst|vga_driver_unit|un2_column_counter_next_9_ .operation_mode = "normal";
4117 defparam \inst|vga_driver_unit|un2_column_counter_next_9_ .output_mode = "comb_only";
4118 defparam \inst|vga_driver_unit|un2_column_counter_next_9_ .register_cascade_mode = "off";
4119 defparam \inst|vga_driver_unit|un2_column_counter_next_9_ .sum_lutc_input = "cin";
4120 defparam \inst|vga_driver_unit|un2_column_counter_next_9_ .synch_mode = "off";
4121 // synopsys translate_on
4122
4123 // atom is at LC_X78_Y33_N0
4124 stratix_lcell \inst|vga_driver_unit|column_counter_sig_9_ (
4125 // Equation(s):
4126 // \inst|vga_driver_unit|column_counter_sig_9  = DFFEAS(\inst|vga_driver_unit|un2_column_counter_next_combout [9] # !\inst|vga_driver_unit|un10_column_counter_siglto9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
4127 // !\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 , )
4128
4129         .clk(\inst1|altpll_component|_clk0 ),
4130         .dataa(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
4131         .datab(vcc),
4132         .datac(vcc),
4133         .datad(\inst|vga_driver_unit|un2_column_counter_next_combout [9]),
4134         .aclr(gnd),
4135         .aload(gnd),
4136         .sclr(!\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
4137         .sload(gnd),
4138         .ena(vcc),
4139         .cin(gnd),
4140         .cin0(gnd),
4141         .cin1(vcc),
4142         .inverta(gnd),
4143         .regcascin(gnd),
4144         .devclrn(devclrn),
4145         .devpor(devpor),
4146         .combout(),
4147         .regout(\inst|vga_driver_unit|column_counter_sig_9 ),
4148         .cout(),
4149         .cout0(),
4150         .cout1());
4151 // synopsys translate_off
4152 defparam \inst|vga_driver_unit|column_counter_sig_9_ .lut_mask = "ff55";
4153 defparam \inst|vga_driver_unit|column_counter_sig_9_ .operation_mode = "normal";
4154 defparam \inst|vga_driver_unit|column_counter_sig_9_ .output_mode = "reg_only";
4155 defparam \inst|vga_driver_unit|column_counter_sig_9_ .register_cascade_mode = "off";
4156 defparam \inst|vga_driver_unit|column_counter_sig_9_ .sum_lutc_input = "datac";
4157 defparam \inst|vga_driver_unit|column_counter_sig_9_ .synch_mode = "on";
4158 // synopsys translate_on
4159
4160 // atom is at LC_X77_Y33_N1
4161 stratix_lcell \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglto9 (
4162 // Equation(s):
4163 // \inst|vga_driver_unit|un10_column_counter_siglto9  = !\inst|vga_driver_unit|column_counter_sig_7  & !\inst|vga_driver_unit|column_counter_sig_8  & \inst|vga_driver_unit|un10_column_counter_siglt6  # !\inst|vga_driver_unit|column_counter_sig_9
4164
4165         .clk(gnd),
4166         .dataa(\inst|vga_driver_unit|column_counter_sig_7 ),
4167         .datab(\inst|vga_driver_unit|column_counter_sig_8 ),
4168         .datac(\inst|vga_driver_unit|un10_column_counter_siglt6 ),
4169         .datad(\inst|vga_driver_unit|column_counter_sig_9 ),
4170         .aclr(gnd),
4171         .aload(gnd),
4172         .sclr(gnd),
4173         .sload(gnd),
4174         .ena(vcc),
4175         .cin(gnd),
4176         .cin0(gnd),
4177         .cin1(vcc),
4178         .inverta(gnd),
4179         .regcascin(gnd),
4180         .devclrn(devclrn),
4181         .devpor(devpor),
4182         .combout(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
4183         .regout(),
4184         .cout(),
4185         .cout0(),
4186         .cout1());
4187 // synopsys translate_off
4188 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglto9 .lut_mask = "10ff";
4189 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglto9 .operation_mode = "normal";
4190 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglto9 .output_mode = "comb_only";
4191 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglto9 .register_cascade_mode = "off";
4192 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglto9 .sum_lutc_input = "datac";
4193 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglto9 .synch_mode = "off";
4194 // synopsys translate_on
4195
4196 // atom is at LC_X78_Y33_N4
4197 stratix_lcell \inst|vga_driver_unit|column_counter_sig_7_ (
4198 // Equation(s):
4199 // \inst|vga_driver_unit|column_counter_sig_7  = DFFEAS(\inst|vga_driver_unit|un10_column_counter_siglto9  & (\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1  & \inst|vga_driver_unit|un2_column_counter_next_combout [7]),
4200 // GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , , , )
4201
4202         .clk(\inst1|altpll_component|_clk0 ),
4203         .dataa(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
4204         .datab(vcc),
4205         .datac(\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
4206         .datad(\inst|vga_driver_unit|un2_column_counter_next_combout [7]),
4207         .aclr(gnd),
4208         .aload(gnd),
4209         .sclr(gnd),
4210         .sload(gnd),
4211         .ena(vcc),
4212         .cin(gnd),
4213         .cin0(gnd),
4214         .cin1(vcc),
4215         .inverta(gnd),
4216         .regcascin(gnd),
4217         .devclrn(devclrn),
4218         .devpor(devpor),
4219         .combout(),
4220         .regout(\inst|vga_driver_unit|column_counter_sig_7 ),
4221         .cout(),
4222         .cout0(),
4223         .cout1());
4224 // synopsys translate_off
4225 defparam \inst|vga_driver_unit|column_counter_sig_7_ .lut_mask = "a000";
4226 defparam \inst|vga_driver_unit|column_counter_sig_7_ .operation_mode = "normal";
4227 defparam \inst|vga_driver_unit|column_counter_sig_7_ .output_mode = "reg_only";
4228 defparam \inst|vga_driver_unit|column_counter_sig_7_ .register_cascade_mode = "off";
4229 defparam \inst|vga_driver_unit|column_counter_sig_7_ .sum_lutc_input = "datac";
4230 defparam \inst|vga_driver_unit|column_counter_sig_7_ .synch_mode = "off";
4231 // synopsys translate_on
4232
4233 // atom is at LC_X77_Y33_N6
4234 stratix_lcell \inst|vga_driver_unit|column_counter_sig_6_ (
4235 // Equation(s):
4236 // \inst|vga_driver_unit|column_counter_sig_6  = DFFEAS(\inst|vga_driver_unit|un2_column_counter_next_combout [6] # !\inst|vga_driver_unit|un10_column_counter_siglto9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
4237 // !\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 , )
4238
4239         .clk(\inst1|altpll_component|_clk0 ),
4240         .dataa(vcc),
4241         .datab(\inst|vga_driver_unit|un2_column_counter_next_combout [6]),
4242         .datac(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
4243         .datad(vcc),
4244         .aclr(gnd),
4245         .aload(gnd),
4246         .sclr(!\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
4247         .sload(gnd),
4248         .ena(vcc),
4249         .cin(gnd),
4250         .cin0(gnd),
4251         .cin1(vcc),
4252         .inverta(gnd),
4253         .regcascin(gnd),
4254         .devclrn(devclrn),
4255         .devpor(devpor),
4256         .combout(),
4257         .regout(\inst|vga_driver_unit|column_counter_sig_6 ),
4258         .cout(),
4259         .cout0(),
4260         .cout1());
4261 // synopsys translate_off
4262 defparam \inst|vga_driver_unit|column_counter_sig_6_ .lut_mask = "cfcf";
4263 defparam \inst|vga_driver_unit|column_counter_sig_6_ .operation_mode = "normal";
4264 defparam \inst|vga_driver_unit|column_counter_sig_6_ .output_mode = "reg_only";
4265 defparam \inst|vga_driver_unit|column_counter_sig_6_ .register_cascade_mode = "off";
4266 defparam \inst|vga_driver_unit|column_counter_sig_6_ .sum_lutc_input = "datac";
4267 defparam \inst|vga_driver_unit|column_counter_sig_6_ .synch_mode = "on";
4268 // synopsys translate_on
4269
4270 // atom is at LC_X77_Y33_N0
4271 stratix_lcell \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_3 (
4272 // Equation(s):
4273 // \inst|vga_driver_unit|un10_column_counter_siglt6_3  = !\inst|vga_driver_unit|column_counter_sig_5  # !\inst|vga_driver_unit|column_counter_sig_6
4274
4275         .clk(gnd),
4276         .dataa(vcc),
4277         .datab(\inst|vga_driver_unit|column_counter_sig_6 ),
4278         .datac(vcc),
4279         .datad(\inst|vga_driver_unit|column_counter_sig_5 ),
4280         .aclr(gnd),
4281         .aload(gnd),
4282         .sclr(gnd),
4283         .sload(gnd),
4284         .ena(vcc),
4285         .cin(gnd),
4286         .cin0(gnd),
4287         .cin1(vcc),
4288         .inverta(gnd),
4289         .regcascin(gnd),
4290         .devclrn(devclrn),
4291         .devpor(devpor),
4292         .combout(\inst|vga_driver_unit|un10_column_counter_siglt6_3 ),
4293         .regout(),
4294         .cout(),
4295         .cout0(),
4296         .cout1());
4297 // synopsys translate_off
4298 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_3 .lut_mask = "33ff";
4299 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_3 .operation_mode = "normal";
4300 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_3 .output_mode = "comb_only";
4301 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_3 .register_cascade_mode = "off";
4302 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_3 .sum_lutc_input = "datac";
4303 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_3 .synch_mode = "off";
4304 // synopsys translate_on
4305
4306 // atom is at LC_X78_Y32_N1
4307 stratix_lcell \inst|vga_control_unit|b_next_i_o3_0_cZ (
4308 // Equation(s):
4309 // \inst|vga_control_unit|b_next_i_o3_0  = \inst|vga_driver_unit|column_counter_sig_7  # \inst|vga_driver_unit|column_counter_sig_6  & \inst|vga_driver_unit|column_counter_sig_4  & \inst|vga_driver_unit|column_counter_sig_5
4310
4311         .clk(gnd),
4312         .dataa(\inst|vga_driver_unit|column_counter_sig_6 ),
4313         .datab(\inst|vga_driver_unit|column_counter_sig_7 ),
4314         .datac(\inst|vga_driver_unit|column_counter_sig_4 ),
4315         .datad(\inst|vga_driver_unit|column_counter_sig_5 ),
4316         .aclr(gnd),
4317         .aload(gnd),
4318         .sclr(gnd),
4319         .sload(gnd),
4320         .ena(vcc),
4321         .cin(gnd),
4322         .cin0(gnd),
4323         .cin1(vcc),
4324         .inverta(gnd),
4325         .regcascin(gnd),
4326         .devclrn(devclrn),
4327         .devpor(devpor),
4328         .combout(\inst|vga_control_unit|b_next_i_o3_0 ),
4329         .regout(),
4330         .cout(),
4331         .cout0(),
4332         .cout1());
4333 // synopsys translate_off
4334 defparam \inst|vga_control_unit|b_next_i_o3_0_cZ .lut_mask = "eccc";
4335 defparam \inst|vga_control_unit|b_next_i_o3_0_cZ .operation_mode = "normal";
4336 defparam \inst|vga_control_unit|b_next_i_o3_0_cZ .output_mode = "comb_only";
4337 defparam \inst|vga_control_unit|b_next_i_o3_0_cZ .register_cascade_mode = "off";
4338 defparam \inst|vga_control_unit|b_next_i_o3_0_cZ .sum_lutc_input = "datac";
4339 defparam \inst|vga_control_unit|b_next_i_o3_0_cZ .synch_mode = "off";
4340 // synopsys translate_on
4341
4342 // atom is at LC_X78_Y33_N3
4343 stratix_lcell \inst|vga_control_unit|g_next_i_o3_cZ (
4344 // Equation(s):
4345 // \inst|vga_control_unit|g_next_i_o3  = \inst|vga_driver_unit|column_counter_sig_4  # \inst|vga_driver_unit|column_counter_sig_3
4346
4347         .clk(gnd),
4348         .dataa(vcc),
4349         .datab(\inst|vga_driver_unit|column_counter_sig_4 ),
4350         .datac(vcc),
4351         .datad(\inst|vga_driver_unit|column_counter_sig_3 ),
4352         .aclr(gnd),
4353         .aload(gnd),
4354         .sclr(gnd),
4355         .sload(gnd),
4356         .ena(vcc),
4357         .cin(gnd),
4358         .cin0(gnd),
4359         .cin1(vcc),
4360         .inverta(gnd),
4361         .regcascin(gnd),
4362         .devclrn(devclrn),
4363         .devpor(devpor),
4364         .combout(\inst|vga_control_unit|g_next_i_o3 ),
4365         .regout(),
4366         .cout(),
4367         .cout0(),
4368         .cout1());
4369 // synopsys translate_off
4370 defparam \inst|vga_control_unit|g_next_i_o3_cZ .lut_mask = "ffcc";
4371 defparam \inst|vga_control_unit|g_next_i_o3_cZ .operation_mode = "normal";
4372 defparam \inst|vga_control_unit|g_next_i_o3_cZ .output_mode = "comb_only";
4373 defparam \inst|vga_control_unit|g_next_i_o3_cZ .register_cascade_mode = "off";
4374 defparam \inst|vga_control_unit|g_next_i_o3_cZ .sum_lutc_input = "datac";
4375 defparam \inst|vga_control_unit|g_next_i_o3_cZ .synch_mode = "off";
4376 // synopsys translate_on
4377
4378 // atom is at LC_X56_Y45_N2
4379 stratix_lcell \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4_cZ (
4380 // Equation(s):
4381 // \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4  = \inst|vga_driver_unit|un6_dly_counter_0_x  # !\inst|vga_driver_unit|hsync_state_5  & !\inst|vga_driver_unit|hsync_state_4
4382
4383         .clk(gnd),
4384         .dataa(vcc),
4385         .datab(\inst|vga_driver_unit|hsync_state_5 ),
4386         .datac(\inst|vga_driver_unit|un6_dly_counter_0_x ),
4387         .datad(\inst|vga_driver_unit|hsync_state_4 ),
4388         .aclr(gnd),
4389         .aload(gnd),
4390         .sclr(gnd),
4391         .sload(gnd),
4392         .ena(vcc),
4393         .cin(gnd),
4394         .cin0(gnd),
4395         .cin1(vcc),
4396         .inverta(gnd),
4397         .regcascin(gnd),
4398         .devclrn(devclrn),
4399         .devpor(devpor),
4400         .combout(\inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4 ),
4401         .regout(),
4402         .cout(),
4403         .cout0(),
4404         .cout1());
4405 // synopsys translate_off
4406 defparam \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4_cZ .lut_mask = "f0f3";
4407 defparam \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4_cZ .operation_mode = "normal";
4408 defparam \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4_cZ .output_mode = "comb_only";
4409 defparam \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4_cZ .register_cascade_mode = "off";
4410 defparam \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4_cZ .sum_lutc_input = "datac";
4411 defparam \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4_cZ .synch_mode = "off";
4412 // synopsys translate_on
4413
4414 // atom is at LC_X56_Y45_N0
4415 stratix_lcell \inst|vga_driver_unit|v_enable_sig_Z (
4416 // Equation(s):
4417 // \inst|vga_driver_unit|v_enable_sig  = DFFEAS(\inst|vga_driver_unit|hsync_state_3  # \inst|vga_driver_unit|hsync_state_1 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4 , , ,
4418 // \inst|vga_driver_unit|un6_dly_counter_0_x , )
4419
4420         .clk(\inst1|altpll_component|_clk0 ),
4421         .dataa(vcc),
4422         .datab(vcc),
4423         .datac(\inst|vga_driver_unit|hsync_state_3 ),
4424         .datad(\inst|vga_driver_unit|hsync_state_1 ),
4425         .aclr(gnd),
4426         .aload(gnd),
4427         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
4428         .sload(gnd),
4429         .ena(\inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4 ),
4430         .cin(gnd),
4431         .cin0(gnd),
4432         .cin1(vcc),
4433         .inverta(gnd),
4434         .regcascin(gnd),
4435         .devclrn(devclrn),
4436         .devpor(devpor),
4437         .combout(),
4438         .regout(\inst|vga_driver_unit|v_enable_sig ),
4439         .cout(),
4440         .cout0(),
4441         .cout1());
4442 // synopsys translate_off
4443 defparam \inst|vga_driver_unit|v_enable_sig_Z .lut_mask = "fff0";
4444 defparam \inst|vga_driver_unit|v_enable_sig_Z .operation_mode = "normal";
4445 defparam \inst|vga_driver_unit|v_enable_sig_Z .output_mode = "reg_only";
4446 defparam \inst|vga_driver_unit|v_enable_sig_Z .register_cascade_mode = "off";
4447 defparam \inst|vga_driver_unit|v_enable_sig_Z .sum_lutc_input = "datac";
4448 defparam \inst|vga_driver_unit|v_enable_sig_Z .synch_mode = "on";
4449 // synopsys translate_on
4450
4451 // atom is at LC_X34_Y34_N6
4452 stratix_lcell \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4_cZ (
4453 // Equation(s):
4454 // \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4  = \inst|vga_driver_unit|un6_dly_counter_0_x  # !\inst|vga_driver_unit|vsync_state_4  & !\inst|vga_driver_unit|vsync_state_5
4455
4456         .clk(gnd),
4457         .dataa(vcc),
4458         .datab(\inst|vga_driver_unit|un6_dly_counter_0_x ),
4459         .datac(\inst|vga_driver_unit|vsync_state_4 ),
4460         .datad(\inst|vga_driver_unit|vsync_state_5 ),
4461         .aclr(gnd),
4462         .aload(gnd),
4463         .sclr(gnd),
4464         .sload(gnd),
4465         .ena(vcc),
4466         .cin(gnd),
4467         .cin0(gnd),
4468         .cin1(vcc),
4469         .inverta(gnd),
4470         .regcascin(gnd),
4471         .devclrn(devclrn),
4472         .devpor(devpor),
4473         .combout(\inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4 ),
4474         .regout(),
4475         .cout(),
4476         .cout0(),
4477         .cout1());
4478 // synopsys translate_off
4479 defparam \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4_cZ .lut_mask = "cccf";
4480 defparam \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4_cZ .operation_mode = "normal";
4481 defparam \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4_cZ .output_mode = "comb_only";
4482 defparam \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4_cZ .register_cascade_mode = "off";
4483 defparam \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4_cZ .sum_lutc_input = "datac";
4484 defparam \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4_cZ .synch_mode = "off";
4485 // synopsys translate_on
4486
4487 // atom is at LC_X52_Y35_N2
4488 stratix_lcell \inst|vga_driver_unit|h_enable_sig_Z (
4489 // Equation(s):
4490 // \inst|vga_driver_unit|h_enable_sig  = DFFEAS(\inst|vga_driver_unit|vsync_state_3  # \inst|vga_driver_unit|vsync_state_1 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4 , , ,
4491 // \inst|vga_driver_unit|un6_dly_counter_0_x , )
4492
4493         .clk(\inst1|altpll_component|_clk0 ),
4494         .dataa(vcc),
4495         .datab(vcc),
4496         .datac(\inst|vga_driver_unit|vsync_state_3 ),
4497         .datad(\inst|vga_driver_unit|vsync_state_1 ),
4498         .aclr(gnd),
4499         .aload(gnd),
4500         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
4501         .sload(gnd),
4502         .ena(\inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4 ),
4503         .cin(gnd),
4504         .cin0(gnd),
4505         .cin1(vcc),
4506         .inverta(gnd),
4507         .regcascin(gnd),
4508         .devclrn(devclrn),
4509         .devpor(devpor),
4510         .combout(),
4511         .regout(\inst|vga_driver_unit|h_enable_sig ),
4512         .cout(),
4513         .cout0(),
4514         .cout1());
4515 // synopsys translate_off
4516 defparam \inst|vga_driver_unit|h_enable_sig_Z .lut_mask = "fff0";
4517 defparam \inst|vga_driver_unit|h_enable_sig_Z .operation_mode = "normal";
4518 defparam \inst|vga_driver_unit|h_enable_sig_Z .output_mode = "reg_only";
4519 defparam \inst|vga_driver_unit|h_enable_sig_Z .register_cascade_mode = "off";
4520 defparam \inst|vga_driver_unit|h_enable_sig_Z .sum_lutc_input = "datac";
4521 defparam \inst|vga_driver_unit|h_enable_sig_Z .synch_mode = "on";
4522 // synopsys translate_on
4523
4524 // atom is at LC_X56_Y45_N5
4525 stratix_lcell \inst|vga_control_unit|r_next_i_o7_cZ (
4526 // Equation(s):
4527 // \inst|vga_control_unit|r_next_i_o7  = \inst|vga_driver_unit|column_counter_sig_9  # !\inst|vga_driver_unit|h_enable_sig  # !\inst|vga_driver_unit|v_enable_sig
4528
4529         .clk(gnd),
4530         .dataa(vcc),
4531         .datab(\inst|vga_driver_unit|v_enable_sig ),
4532         .datac(\inst|vga_driver_unit|h_enable_sig ),
4533         .datad(\inst|vga_driver_unit|column_counter_sig_9 ),
4534         .aclr(gnd),
4535         .aload(gnd),
4536         .sclr(gnd),
4537         .sload(gnd),
4538         .ena(vcc),
4539         .cin(gnd),
4540         .cin0(gnd),
4541         .cin1(vcc),
4542         .inverta(gnd),
4543         .regcascin(gnd),
4544         .devclrn(devclrn),
4545         .devpor(devpor),
4546         .combout(\inst|vga_control_unit|r_next_i_o7 ),
4547         .regout(),
4548         .cout(),
4549         .cout0(),
4550         .cout1());
4551 // synopsys translate_off
4552 defparam \inst|vga_control_unit|r_next_i_o7_cZ .lut_mask = "ff3f";
4553 defparam \inst|vga_control_unit|r_next_i_o7_cZ .operation_mode = "normal";
4554 defparam \inst|vga_control_unit|r_next_i_o7_cZ .output_mode = "comb_only";
4555 defparam \inst|vga_control_unit|r_next_i_o7_cZ .register_cascade_mode = "off";
4556 defparam \inst|vga_control_unit|r_next_i_o7_cZ .sum_lutc_input = "datac";
4557 defparam \inst|vga_control_unit|r_next_i_o7_cZ .synch_mode = "off";
4558 // synopsys translate_on
4559
4560 // atom is at LC_X78_Y32_N3
4561 stratix_lcell \inst|vga_control_unit|N_4_i_0_g0_1_cZ (
4562 // Equation(s):
4563 // \inst|vga_control_unit|N_4_i_0_g0_1  = !\inst|vga_control_unit|r_next_i_o7  & (\inst|vga_driver_unit|column_counter_sig_8  # \inst|vga_control_unit|g_next_i_o3  & \inst|vga_driver_unit|column_counter_sig_7 )
4564
4565         .clk(gnd),
4566         .dataa(\inst|vga_driver_unit|column_counter_sig_8 ),
4567         .datab(\inst|vga_control_unit|g_next_i_o3 ),
4568         .datac(\inst|vga_control_unit|r_next_i_o7 ),
4569         .datad(\inst|vga_driver_unit|column_counter_sig_7 ),
4570         .aclr(gnd),
4571         .aload(gnd),
4572         .sclr(gnd),
4573         .sload(gnd),
4574         .ena(vcc),
4575         .cin(gnd),
4576         .cin0(gnd),
4577         .cin1(vcc),
4578         .inverta(gnd),
4579         .regcascin(gnd),
4580         .devclrn(devclrn),
4581         .devpor(devpor),
4582         .combout(\inst|vga_control_unit|N_4_i_0_g0_1 ),
4583         .regout(),
4584         .cout(),
4585         .cout0(),
4586         .cout1());
4587 // synopsys translate_off
4588 defparam \inst|vga_control_unit|N_4_i_0_g0_1_cZ .lut_mask = "0e0a";
4589 defparam \inst|vga_control_unit|N_4_i_0_g0_1_cZ .operation_mode = "normal";
4590 defparam \inst|vga_control_unit|N_4_i_0_g0_1_cZ .output_mode = "comb_only";
4591 defparam \inst|vga_control_unit|N_4_i_0_g0_1_cZ .register_cascade_mode = "off";
4592 defparam \inst|vga_control_unit|N_4_i_0_g0_1_cZ .sum_lutc_input = "datac";
4593 defparam \inst|vga_control_unit|N_4_i_0_g0_1_cZ .synch_mode = "off";
4594 // synopsys translate_on
4595
4596 // atom is at LC_X78_Y32_N0
4597 stratix_lcell \inst|vga_control_unit|r_Z (
4598 // Equation(s):
4599 // \inst|vga_control_unit|r  = DFFEAS(\inst|vga_control_unit|N_4_i_0_g0_1  & (\inst|vga_driver_unit|column_counter_sig_8  & (!\inst|vga_control_unit|b_next_i_o3_0 ) # !\inst|vga_driver_unit|column_counter_sig_8  &
4600 // !\inst|vga_driver_unit|un10_column_counter_siglt6_3 ), GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , , , )
4601
4602         .clk(\inst1|altpll_component|_clk0 ),
4603         .dataa(\inst|vga_driver_unit|un10_column_counter_siglt6_3 ),
4604         .datab(\inst|vga_control_unit|b_next_i_o3_0 ),
4605         .datac(\inst|vga_control_unit|N_4_i_0_g0_1 ),
4606         .datad(\inst|vga_driver_unit|column_counter_sig_8 ),
4607         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
4608         .aload(gnd),
4609         .sclr(gnd),
4610         .sload(gnd),
4611         .ena(vcc),
4612         .cin(gnd),
4613         .cin0(gnd),
4614         .cin1(vcc),
4615         .inverta(gnd),
4616         .regcascin(gnd),
4617         .devclrn(devclrn),
4618         .devpor(devpor),
4619         .combout(),
4620         .regout(\inst|vga_control_unit|r ),
4621         .cout(),
4622         .cout0(),
4623         .cout1());
4624 // synopsys translate_off
4625 defparam \inst|vga_control_unit|r_Z .lut_mask = "3050";
4626 defparam \inst|vga_control_unit|r_Z .operation_mode = "normal";
4627 defparam \inst|vga_control_unit|r_Z .output_mode = "reg_only";
4628 defparam \inst|vga_control_unit|r_Z .register_cascade_mode = "off";
4629 defparam \inst|vga_control_unit|r_Z .sum_lutc_input = "datac";
4630 defparam \inst|vga_control_unit|r_Z .synch_mode = "off";
4631 // synopsys translate_on
4632
4633 // atom is at LC_X76_Y33_N5
4634 stratix_lcell \inst|vga_control_unit|N_23_i_0_g0_a_cZ (
4635 // Equation(s):
4636 // \inst|vga_control_unit|N_23_i_0_g0_a  = \inst|vga_driver_unit|column_counter_sig_5  & (\inst|vga_driver_unit|column_counter_sig_6  & (!\inst|vga_control_unit|g_next_i_o3 ) # !\inst|vga_driver_unit|column_counter_sig_6  &
4637 // (\inst|vga_control_unit|g_next_i_o3  # !\inst|vga_driver_unit|un10_column_counter_siglt6_1 )) # !\inst|vga_driver_unit|column_counter_sig_5  & (\inst|vga_driver_unit|column_counter_sig_6 )
4638
4639         .clk(gnd),
4640         .dataa(\inst|vga_driver_unit|un10_column_counter_siglt6_1 ),
4641         .datab(\inst|vga_driver_unit|column_counter_sig_5 ),
4642         .datac(\inst|vga_driver_unit|column_counter_sig_6 ),
4643         .datad(\inst|vga_control_unit|g_next_i_o3 ),
4644         .aclr(gnd),
4645         .aload(gnd),
4646         .sclr(gnd),
4647         .sload(gnd),
4648         .ena(vcc),
4649         .cin(gnd),
4650         .cin0(gnd),
4651         .cin1(vcc),
4652         .inverta(gnd),
4653         .regcascin(gnd),
4654         .devclrn(devclrn),
4655         .devpor(devpor),
4656         .combout(\inst|vga_control_unit|N_23_i_0_g0_a ),
4657         .regout(),
4658         .cout(),
4659         .cout0(),
4660         .cout1());
4661 // synopsys translate_off
4662 defparam \inst|vga_control_unit|N_23_i_0_g0_a_cZ .lut_mask = "3cf4";
4663 defparam \inst|vga_control_unit|N_23_i_0_g0_a_cZ .operation_mode = "normal";
4664 defparam \inst|vga_control_unit|N_23_i_0_g0_a_cZ .output_mode = "comb_only";
4665 defparam \inst|vga_control_unit|N_23_i_0_g0_a_cZ .register_cascade_mode = "off";
4666 defparam \inst|vga_control_unit|N_23_i_0_g0_a_cZ .sum_lutc_input = "datac";
4667 defparam \inst|vga_control_unit|N_23_i_0_g0_a_cZ .synch_mode = "off";
4668 // synopsys translate_on
4669
4670 // atom is at LC_X76_Y33_N2
4671 stratix_lcell \inst|vga_control_unit|g_Z (
4672 // Equation(s):
4673 // \inst|vga_control_unit|g  = DFFEAS(!\inst|vga_driver_unit|column_counter_sig_8  & !\inst|vga_control_unit|r_next_i_o7  & \inst|vga_control_unit|N_23_i_0_g0_a  & \inst|vga_driver_unit|column_counter_sig_7 , GLOBAL(\inst1|altpll_component|_clk0 ),
4674 // !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , , , )
4675
4676         .clk(\inst1|altpll_component|_clk0 ),
4677         .dataa(\inst|vga_driver_unit|column_counter_sig_8 ),
4678         .datab(\inst|vga_control_unit|r_next_i_o7 ),
4679         .datac(\inst|vga_control_unit|N_23_i_0_g0_a ),
4680         .datad(\inst|vga_driver_unit|column_counter_sig_7 ),
4681         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
4682         .aload(gnd),
4683         .sclr(gnd),
4684         .sload(gnd),
4685         .ena(vcc),
4686         .cin(gnd),
4687         .cin0(gnd),
4688         .cin1(vcc),
4689         .inverta(gnd),
4690         .regcascin(gnd),
4691         .devclrn(devclrn),
4692         .devpor(devpor),
4693         .combout(),
4694         .regout(\inst|vga_control_unit|g ),
4695         .cout(),
4696         .cout0(),
4697         .cout1());
4698 // synopsys translate_off
4699 defparam \inst|vga_control_unit|g_Z .lut_mask = "1000";
4700 defparam \inst|vga_control_unit|g_Z .operation_mode = "normal";
4701 defparam \inst|vga_control_unit|g_Z .output_mode = "reg_only";
4702 defparam \inst|vga_control_unit|g_Z .register_cascade_mode = "off";
4703 defparam \inst|vga_control_unit|g_Z .sum_lutc_input = "datac";
4704 defparam \inst|vga_control_unit|g_Z .synch_mode = "off";
4705 // synopsys translate_on
4706
4707 // atom is at LC_X76_Y33_N4
4708 stratix_lcell \inst|vga_control_unit|N_6_i_0_g0_0_cZ (
4709 // Equation(s):
4710 // \inst|vga_control_unit|N_6_i_0_g0_0  = !\inst|vga_control_unit|r_next_i_o7  & (\inst|vga_driver_unit|column_counter_sig_8  # \inst|vga_driver_unit|column_counter_sig_7  # !\inst|vga_driver_unit|un10_column_counter_siglt6_3 )
4711
4712         .clk(gnd),
4713         .dataa(\inst|vga_driver_unit|column_counter_sig_8 ),
4714         .datab(\inst|vga_control_unit|r_next_i_o7 ),
4715         .datac(\inst|vga_driver_unit|un10_column_counter_siglt6_3 ),
4716         .datad(\inst|vga_driver_unit|column_counter_sig_7 ),
4717         .aclr(gnd),
4718         .aload(gnd),
4719         .sclr(gnd),
4720         .sload(gnd),
4721         .ena(vcc),
4722         .cin(gnd),
4723         .cin0(gnd),
4724         .cin1(vcc),
4725         .inverta(gnd),
4726         .regcascin(gnd),
4727         .devclrn(devclrn),
4728         .devpor(devpor),
4729         .combout(\inst|vga_control_unit|N_6_i_0_g0_0 ),
4730         .regout(),
4731         .cout(),
4732         .cout0(),
4733         .cout1());
4734 // synopsys translate_off
4735 defparam \inst|vga_control_unit|N_6_i_0_g0_0_cZ .lut_mask = "3323";
4736 defparam \inst|vga_control_unit|N_6_i_0_g0_0_cZ .operation_mode = "normal";
4737 defparam \inst|vga_control_unit|N_6_i_0_g0_0_cZ .output_mode = "comb_only";
4738 defparam \inst|vga_control_unit|N_6_i_0_g0_0_cZ .register_cascade_mode = "off";
4739 defparam \inst|vga_control_unit|N_6_i_0_g0_0_cZ .sum_lutc_input = "datac";
4740 defparam \inst|vga_control_unit|N_6_i_0_g0_0_cZ .synch_mode = "off";
4741 // synopsys translate_on
4742
4743 // atom is at LC_X78_Y33_N1
4744 stratix_lcell \inst|vga_control_unit|b_next_i_a7_1_cZ (
4745 // Equation(s):
4746 // \inst|vga_control_unit|b_next_i_a7_1  = !\inst|vga_control_unit|g_next_i_o3  & !\inst|vga_driver_unit|column_counter_sig_2  & !\inst|vga_driver_unit|column_counter_sig_8  & !\inst|vga_driver_unit|column_counter_sig_7
4747
4748         .clk(gnd),
4749         .dataa(\inst|vga_control_unit|g_next_i_o3 ),
4750         .datab(\inst|vga_driver_unit|column_counter_sig_2 ),
4751         .datac(\inst|vga_driver_unit|column_counter_sig_8 ),
4752         .datad(\inst|vga_driver_unit|column_counter_sig_7 ),
4753         .aclr(gnd),
4754         .aload(gnd),
4755         .sclr(gnd),
4756         .sload(gnd),
4757         .ena(vcc),
4758         .cin(gnd),
4759         .cin0(gnd),
4760         .cin1(vcc),
4761         .inverta(gnd),
4762         .regcascin(gnd),
4763         .devclrn(devclrn),
4764         .devpor(devpor),
4765         .combout(\inst|vga_control_unit|b_next_i_a7_1 ),
4766         .regout(),
4767         .cout(),
4768         .cout0(),
4769         .cout1());
4770 // synopsys translate_off
4771 defparam \inst|vga_control_unit|b_next_i_a7_1_cZ .lut_mask = "0001";
4772 defparam \inst|vga_control_unit|b_next_i_a7_1_cZ .operation_mode = "normal";
4773 defparam \inst|vga_control_unit|b_next_i_a7_1_cZ .output_mode = "comb_only";
4774 defparam \inst|vga_control_unit|b_next_i_a7_1_cZ .register_cascade_mode = "off";
4775 defparam \inst|vga_control_unit|b_next_i_a7_1_cZ .sum_lutc_input = "datac";
4776 defparam \inst|vga_control_unit|b_next_i_a7_1_cZ .synch_mode = "off";
4777 // synopsys translate_on
4778
4779 // atom is at LC_X78_Y32_N4
4780 stratix_lcell \inst|vga_control_unit|b_Z (
4781 // Equation(s):
4782 // \inst|vga_control_unit|b  = DFFEAS(\inst|vga_control_unit|N_6_i_0_g0_0  & !\inst|vga_control_unit|b_next_i_a7_1  & (!\inst|vga_control_unit|b_next_i_o3_0  # !\inst|vga_driver_unit|column_counter_sig_8 ), GLOBAL(\inst1|altpll_component|_clk0 ),
4783 // !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , , , )
4784
4785         .clk(\inst1|altpll_component|_clk0 ),
4786         .dataa(\inst|vga_driver_unit|column_counter_sig_8 ),
4787         .datab(\inst|vga_control_unit|b_next_i_o3_0 ),
4788         .datac(\inst|vga_control_unit|N_6_i_0_g0_0 ),
4789         .datad(\inst|vga_control_unit|b_next_i_a7_1 ),
4790         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
4791         .aload(gnd),
4792         .sclr(gnd),
4793         .sload(gnd),
4794         .ena(vcc),
4795         .cin(gnd),
4796         .cin0(gnd),
4797         .cin1(vcc),
4798         .inverta(gnd),
4799         .regcascin(gnd),
4800         .devclrn(devclrn),
4801         .devpor(devpor),
4802         .combout(),
4803         .regout(\inst|vga_control_unit|b ),
4804         .cout(),
4805         .cout0(),
4806         .cout1());
4807 // synopsys translate_off
4808 defparam \inst|vga_control_unit|b_Z .lut_mask = "0070";
4809 defparam \inst|vga_control_unit|b_Z .operation_mode = "normal";
4810 defparam \inst|vga_control_unit|b_Z .output_mode = "reg_only";
4811 defparam \inst|vga_control_unit|b_Z .register_cascade_mode = "off";
4812 defparam \inst|vga_control_unit|b_Z .sum_lutc_input = "datac";
4813 defparam \inst|vga_control_unit|b_Z .synch_mode = "off";
4814 // synopsys translate_on
4815
4816 // atom is at LC_X54_Y31_N5
4817 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_1_ (
4818 // Equation(s):
4819 // \inst|vga_driver_unit|un1_line_counter_sig_combout [1] = \inst|vga_driver_unit|d_set_hsync_counter  $ \inst|vga_driver_unit|line_counter_sig_0
4820 // \inst|vga_driver_unit|un1_line_counter_sig_cout [1] = CARRY(\inst|vga_driver_unit|d_set_hsync_counter  & \inst|vga_driver_unit|line_counter_sig_0 )
4821 // \inst|vga_driver_unit|un1_line_counter_sig_cout[1]~COUT1_9  = CARRY(\inst|vga_driver_unit|d_set_hsync_counter  & \inst|vga_driver_unit|line_counter_sig_0 )
4822
4823         .clk(gnd),
4824         .dataa(\inst|vga_driver_unit|d_set_hsync_counter ),
4825         .datab(\inst|vga_driver_unit|line_counter_sig_0 ),
4826         .datac(vcc),
4827         .datad(vcc),
4828         .aclr(gnd),
4829         .aload(gnd),
4830         .sclr(gnd),
4831         .sload(gnd),
4832         .ena(vcc),
4833         .cin(gnd),
4834         .cin0(gnd),
4835         .cin1(vcc),
4836         .inverta(gnd),
4837         .regcascin(gnd),
4838         .devclrn(devclrn),
4839         .devpor(devpor),
4840         .combout(\inst|vga_driver_unit|un1_line_counter_sig_combout [1]),
4841         .regout(),
4842         .cout(),
4843         .cout0(\inst|vga_driver_unit|un1_line_counter_sig_cout [1]),
4844         .cout1(\inst|vga_driver_unit|un1_line_counter_sig_cout[1]~COUT1_9 ));
4845 // synopsys translate_off
4846 defparam \inst|vga_driver_unit|un1_line_counter_sig_1_ .lut_mask = "6688";
4847 defparam \inst|vga_driver_unit|un1_line_counter_sig_1_ .operation_mode = "arithmetic";
4848 defparam \inst|vga_driver_unit|un1_line_counter_sig_1_ .output_mode = "comb_only";
4849 defparam \inst|vga_driver_unit|un1_line_counter_sig_1_ .register_cascade_mode = "off";
4850 defparam \inst|vga_driver_unit|un1_line_counter_sig_1_ .sum_lutc_input = "datac";
4851 defparam \inst|vga_driver_unit|un1_line_counter_sig_1_ .synch_mode = "off";
4852 // synopsys translate_on
4853
4854 // atom is at LC_X36_Y33_N6
4855 stratix_lcell \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1_cZ (
4856 // Equation(s):
4857 // \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1  = \reset~combout  & !\inst|vga_driver_unit|vsync_state_1  & \inst|dly_counter [0] & \inst|dly_counter [1]
4858
4859         .clk(gnd),
4860         .dataa(\reset~combout ),
4861         .datab(\inst|vga_driver_unit|vsync_state_1 ),
4862         .datac(\inst|dly_counter [0]),
4863         .datad(\inst|dly_counter [1]),
4864         .aclr(gnd),
4865         .aload(gnd),
4866         .sclr(gnd),
4867         .sload(gnd),
4868         .ena(vcc),
4869         .cin(gnd),
4870         .cin0(gnd),
4871         .cin1(vcc),
4872         .inverta(gnd),
4873         .regcascin(gnd),
4874         .devclrn(devclrn),
4875         .devpor(devpor),
4876         .combout(\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
4877         .regout(),
4878         .cout(),
4879         .cout0(),
4880         .cout1());
4881 // synopsys translate_off
4882 defparam \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1_cZ .lut_mask = "2000";
4883 defparam \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1_cZ .operation_mode = "normal";
4884 defparam \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1_cZ .output_mode = "comb_only";
4885 defparam \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1_cZ .register_cascade_mode = "off";
4886 defparam \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1_cZ .sum_lutc_input = "datac";
4887 defparam \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1_cZ .synch_mode = "off";
4888 // synopsys translate_on
4889
4890 // atom is at LC_X54_Y32_N6
4891 stratix_lcell \inst|vga_driver_unit|line_counter_sig_0_ (
4892 // Equation(s):
4893 // \inst|vga_driver_unit|line_counter_sig_0  = DFFEAS(\inst|vga_driver_unit|un1_line_counter_sig_combout [1] # !\inst|vga_driver_unit|un10_line_counter_siglto8 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
4894 // !\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 , )
4895
4896         .clk(\inst1|altpll_component|_clk0 ),
4897         .dataa(\inst|vga_driver_unit|un1_line_counter_sig_combout [1]),
4898         .datab(vcc),
4899         .datac(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
4900         .datad(vcc),
4901         .aclr(gnd),
4902         .aload(gnd),
4903         .sclr(!\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
4904         .sload(gnd),
4905         .ena(vcc),
4906         .cin(gnd),
4907         .cin0(gnd),
4908         .cin1(vcc),
4909         .inverta(gnd),
4910         .regcascin(gnd),
4911         .devclrn(devclrn),
4912         .devpor(devpor),
4913         .combout(),
4914         .regout(\inst|vga_driver_unit|line_counter_sig_0 ),
4915         .cout(),
4916         .cout0(),
4917         .cout1());
4918 // synopsys translate_off
4919 defparam \inst|vga_driver_unit|line_counter_sig_0_ .lut_mask = "afaf";
4920 defparam \inst|vga_driver_unit|line_counter_sig_0_ .operation_mode = "normal";
4921 defparam \inst|vga_driver_unit|line_counter_sig_0_ .output_mode = "reg_only";
4922 defparam \inst|vga_driver_unit|line_counter_sig_0_ .register_cascade_mode = "off";
4923 defparam \inst|vga_driver_unit|line_counter_sig_0_ .sum_lutc_input = "datac";
4924 defparam \inst|vga_driver_unit|line_counter_sig_0_ .synch_mode = "on";
4925 // synopsys translate_on
4926
4927 // atom is at LC_X54_Y31_N6
4928 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_3_ (
4929 // Equation(s):
4930 // \inst|vga_driver_unit|un1_line_counter_sig_combout [3] = \inst|vga_driver_unit|line_counter_sig_2  $ (\inst|vga_driver_unit|line_counter_sig_1  & \inst|vga_driver_unit|un1_line_counter_sig_cout [1])
4931 // \inst|vga_driver_unit|un1_line_counter_sig_cout [3] = CARRY(!\inst|vga_driver_unit|un1_line_counter_sig_cout [1] # !\inst|vga_driver_unit|line_counter_sig_2  # !\inst|vga_driver_unit|line_counter_sig_1 )
4932 // \inst|vga_driver_unit|un1_line_counter_sig_cout[3]~COUT1_11  = CARRY(!\inst|vga_driver_unit|un1_line_counter_sig_cout[1]~COUT1_9  # !\inst|vga_driver_unit|line_counter_sig_2  # !\inst|vga_driver_unit|line_counter_sig_1 )
4933
4934         .clk(gnd),
4935         .dataa(\inst|vga_driver_unit|line_counter_sig_1 ),
4936         .datab(\inst|vga_driver_unit|line_counter_sig_2 ),
4937         .datac(vcc),
4938         .datad(vcc),
4939         .aclr(gnd),
4940         .aload(gnd),
4941         .sclr(gnd),
4942         .sload(gnd),
4943         .ena(vcc),
4944         .cin(gnd),
4945         .cin0(\inst|vga_driver_unit|un1_line_counter_sig_cout [1]),
4946         .cin1(\inst|vga_driver_unit|un1_line_counter_sig_cout[1]~COUT1_9 ),
4947         .inverta(gnd),
4948         .regcascin(gnd),
4949         .devclrn(devclrn),
4950         .devpor(devpor),
4951         .combout(\inst|vga_driver_unit|un1_line_counter_sig_combout [3]),
4952         .regout(),
4953         .cout(),
4954         .cout0(\inst|vga_driver_unit|un1_line_counter_sig_cout [3]),
4955         .cout1(\inst|vga_driver_unit|un1_line_counter_sig_cout[3]~COUT1_11 ));
4956 // synopsys translate_off
4957 defparam \inst|vga_driver_unit|un1_line_counter_sig_3_ .cin0_used = "true";
4958 defparam \inst|vga_driver_unit|un1_line_counter_sig_3_ .cin1_used = "true";
4959 defparam \inst|vga_driver_unit|un1_line_counter_sig_3_ .lut_mask = "6c7f";
4960 defparam \inst|vga_driver_unit|un1_line_counter_sig_3_ .operation_mode = "arithmetic";
4961 defparam \inst|vga_driver_unit|un1_line_counter_sig_3_ .output_mode = "comb_only";
4962 defparam \inst|vga_driver_unit|un1_line_counter_sig_3_ .register_cascade_mode = "off";
4963 defparam \inst|vga_driver_unit|un1_line_counter_sig_3_ .sum_lutc_input = "cin";
4964 defparam \inst|vga_driver_unit|un1_line_counter_sig_3_ .synch_mode = "off";
4965 // synopsys translate_on
4966
4967 // atom is at LC_X55_Y31_N2
4968 stratix_lcell \inst|vga_driver_unit|line_counter_sig_2_ (
4969 // Equation(s):
4970 // \inst|vga_driver_unit|line_counter_sig_2  = DFFEAS(\inst|vga_driver_unit|un1_line_counter_sig_combout [3] # !\inst|vga_driver_unit|un10_line_counter_siglto8 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
4971 // !\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 , )
4972
4973         .clk(\inst1|altpll_component|_clk0 ),
4974         .dataa(vcc),
4975         .datab(\inst|vga_driver_unit|un1_line_counter_sig_combout [3]),
4976         .datac(vcc),
4977         .datad(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
4978         .aclr(gnd),
4979         .aload(gnd),
4980         .sclr(!\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
4981         .sload(gnd),
4982         .ena(vcc),
4983         .cin(gnd),
4984         .cin0(gnd),
4985         .cin1(vcc),
4986         .inverta(gnd),
4987         .regcascin(gnd),
4988         .devclrn(devclrn),
4989         .devpor(devpor),
4990         .combout(),
4991         .regout(\inst|vga_driver_unit|line_counter_sig_2 ),
4992         .cout(),
4993         .cout0(),
4994         .cout1());
4995 // synopsys translate_off
4996 defparam \inst|vga_driver_unit|line_counter_sig_2_ .lut_mask = "ccff";
4997 defparam \inst|vga_driver_unit|line_counter_sig_2_ .operation_mode = "normal";
4998 defparam \inst|vga_driver_unit|line_counter_sig_2_ .output_mode = "reg_only";
4999 defparam \inst|vga_driver_unit|line_counter_sig_2_ .register_cascade_mode = "off";
5000 defparam \inst|vga_driver_unit|line_counter_sig_2_ .sum_lutc_input = "datac";
5001 defparam \inst|vga_driver_unit|line_counter_sig_2_ .synch_mode = "on";
5002 // synopsys translate_on
5003
5004 // atom is at LC_X54_Y32_N0
5005 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_a_1_ (
5006 // Equation(s):
5007 // \inst|vga_driver_unit|un1_line_counter_sig_a_cout [1] = CARRY(\inst|vga_driver_unit|d_set_hsync_counter  & \inst|vga_driver_unit|line_counter_sig_0 )
5008 // \inst|vga_driver_unit|un1_line_counter_sig_a_cout[1]~COUT1_3  = CARRY(\inst|vga_driver_unit|d_set_hsync_counter  & \inst|vga_driver_unit|line_counter_sig_0 )
5009
5010         .clk(gnd),
5011         .dataa(\inst|vga_driver_unit|d_set_hsync_counter ),
5012         .datab(\inst|vga_driver_unit|line_counter_sig_0 ),
5013         .datac(vcc),
5014         .datad(vcc),
5015         .aclr(gnd),
5016         .aload(gnd),
5017         .sclr(gnd),
5018         .sload(gnd),
5019         .ena(vcc),
5020         .cin(gnd),
5021         .cin0(gnd),
5022         .cin1(vcc),
5023         .inverta(gnd),
5024         .regcascin(gnd),
5025         .devclrn(devclrn),
5026         .devpor(devpor),
5027         .combout(\inst|vga_driver_unit|un1_line_counter_sig_a_1_~COMBOUT ),
5028         .regout(),
5029         .cout(),
5030         .cout0(\inst|vga_driver_unit|un1_line_counter_sig_a_cout [1]),
5031         .cout1(\inst|vga_driver_unit|un1_line_counter_sig_a_cout[1]~COUT1_3 ));
5032 // synopsys translate_off
5033 defparam \inst|vga_driver_unit|un1_line_counter_sig_a_1_ .lut_mask = "ff88";
5034 defparam \inst|vga_driver_unit|un1_line_counter_sig_a_1_ .operation_mode = "arithmetic";
5035 defparam \inst|vga_driver_unit|un1_line_counter_sig_a_1_ .output_mode = "none";
5036 defparam \inst|vga_driver_unit|un1_line_counter_sig_a_1_ .register_cascade_mode = "off";
5037 defparam \inst|vga_driver_unit|un1_line_counter_sig_a_1_ .sum_lutc_input = "datac";
5038 defparam \inst|vga_driver_unit|un1_line_counter_sig_a_1_ .synch_mode = "off";
5039 // synopsys translate_on
5040
5041 // atom is at LC_X54_Y32_N1
5042 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_2_ (
5043 // Equation(s):
5044 // \inst|vga_driver_unit|un1_line_counter_sig_combout [2] = \inst|vga_driver_unit|line_counter_sig_1  $ (\inst|vga_driver_unit|un1_line_counter_sig_a_cout [1])
5045 // \inst|vga_driver_unit|un1_line_counter_sig_cout [2] = CARRY(!\inst|vga_driver_unit|un1_line_counter_sig_a_cout [1] # !\inst|vga_driver_unit|line_counter_sig_2  # !\inst|vga_driver_unit|line_counter_sig_1 )
5046 // \inst|vga_driver_unit|un1_line_counter_sig_cout[2]~COUT1_17  = CARRY(!\inst|vga_driver_unit|un1_line_counter_sig_a_cout[1]~COUT1_3  # !\inst|vga_driver_unit|line_counter_sig_2  # !\inst|vga_driver_unit|line_counter_sig_1 )
5047
5048         .clk(gnd),
5049         .dataa(\inst|vga_driver_unit|line_counter_sig_1 ),
5050         .datab(\inst|vga_driver_unit|line_counter_sig_2 ),
5051         .datac(vcc),
5052         .datad(vcc),
5053         .aclr(gnd),
5054         .aload(gnd),
5055         .sclr(gnd),
5056         .sload(gnd),
5057         .ena(vcc),
5058         .cin(gnd),
5059         .cin0(\inst|vga_driver_unit|un1_line_counter_sig_a_cout [1]),
5060         .cin1(\inst|vga_driver_unit|un1_line_counter_sig_a_cout[1]~COUT1_3 ),
5061         .inverta(gnd),
5062         .regcascin(gnd),
5063         .devclrn(devclrn),
5064         .devpor(devpor),
5065         .combout(\inst|vga_driver_unit|un1_line_counter_sig_combout [2]),
5066         .regout(),
5067         .cout(),
5068         .cout0(\inst|vga_driver_unit|un1_line_counter_sig_cout [2]),
5069         .cout1(\inst|vga_driver_unit|un1_line_counter_sig_cout[2]~COUT1_17 ));
5070 // synopsys translate_off
5071 defparam \inst|vga_driver_unit|un1_line_counter_sig_2_ .cin0_used = "true";
5072 defparam \inst|vga_driver_unit|un1_line_counter_sig_2_ .cin1_used = "true";
5073 defparam \inst|vga_driver_unit|un1_line_counter_sig_2_ .lut_mask = "5a7f";
5074 defparam \inst|vga_driver_unit|un1_line_counter_sig_2_ .operation_mode = "arithmetic";
5075 defparam \inst|vga_driver_unit|un1_line_counter_sig_2_ .output_mode = "comb_only";
5076 defparam \inst|vga_driver_unit|un1_line_counter_sig_2_ .register_cascade_mode = "off";
5077 defparam \inst|vga_driver_unit|un1_line_counter_sig_2_ .sum_lutc_input = "cin";
5078 defparam \inst|vga_driver_unit|un1_line_counter_sig_2_ .synch_mode = "off";
5079 // synopsys translate_on
5080
5081 // atom is at LC_X54_Y32_N7
5082 stratix_lcell \inst|vga_driver_unit|line_counter_sig_1_ (
5083 // Equation(s):
5084 // \inst|vga_driver_unit|line_counter_sig_1  = DFFEAS(\inst|vga_driver_unit|un1_line_counter_sig_combout [2] # !\inst|vga_driver_unit|un10_line_counter_siglto8 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
5085 // !\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 , )
5086
5087         .clk(\inst1|altpll_component|_clk0 ),
5088         .dataa(vcc),
5089         .datab(\inst|vga_driver_unit|un1_line_counter_sig_combout [2]),
5090         .datac(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
5091         .datad(vcc),
5092         .aclr(gnd),
5093         .aload(gnd),
5094         .sclr(!\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
5095         .sload(gnd),
5096         .ena(vcc),
5097         .cin(gnd),
5098         .cin0(gnd),
5099         .cin1(vcc),
5100         .inverta(gnd),
5101         .regcascin(gnd),
5102         .devclrn(devclrn),
5103         .devpor(devpor),
5104         .combout(),
5105         .regout(\inst|vga_driver_unit|line_counter_sig_1 ),
5106         .cout(),
5107         .cout0(),
5108         .cout1());
5109 // synopsys translate_off
5110 defparam \inst|vga_driver_unit|line_counter_sig_1_ .lut_mask = "cfcf";
5111 defparam \inst|vga_driver_unit|line_counter_sig_1_ .operation_mode = "normal";
5112 defparam \inst|vga_driver_unit|line_counter_sig_1_ .output_mode = "reg_only";
5113 defparam \inst|vga_driver_unit|line_counter_sig_1_ .register_cascade_mode = "off";
5114 defparam \inst|vga_driver_unit|line_counter_sig_1_ .sum_lutc_input = "datac";
5115 defparam \inst|vga_driver_unit|line_counter_sig_1_ .synch_mode = "on";
5116 // synopsys translate_on
5117
5118 // atom is at LC_X54_Y32_N2
5119 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_4_ (
5120 // Equation(s):
5121 // \inst|vga_driver_unit|un1_line_counter_sig_combout [4] = \inst|vga_driver_unit|line_counter_sig_3  $ !\inst|vga_driver_unit|un1_line_counter_sig_cout [2]
5122 // \inst|vga_driver_unit|un1_line_counter_sig_cout [4] = CARRY(\inst|vga_driver_unit|line_counter_sig_4  & \inst|vga_driver_unit|line_counter_sig_3  & !\inst|vga_driver_unit|un1_line_counter_sig_cout [2])
5123 // \inst|vga_driver_unit|un1_line_counter_sig_cout[4]~COUT1_19  = CARRY(\inst|vga_driver_unit|line_counter_sig_4  & \inst|vga_driver_unit|line_counter_sig_3  & !\inst|vga_driver_unit|un1_line_counter_sig_cout[2]~COUT1_17 )
5124
5125         .clk(gnd),
5126         .dataa(\inst|vga_driver_unit|line_counter_sig_4 ),
5127         .datab(\inst|vga_driver_unit|line_counter_sig_3 ),
5128         .datac(vcc),
5129         .datad(vcc),
5130         .aclr(gnd),
5131         .aload(gnd),
5132         .sclr(gnd),
5133         .sload(gnd),
5134         .ena(vcc),
5135         .cin(gnd),
5136         .cin0(\inst|vga_driver_unit|un1_line_counter_sig_cout [2]),
5137         .cin1(\inst|vga_driver_unit|un1_line_counter_sig_cout[2]~COUT1_17 ),
5138         .inverta(gnd),
5139         .regcascin(gnd),
5140         .devclrn(devclrn),
5141         .devpor(devpor),
5142         .combout(\inst|vga_driver_unit|un1_line_counter_sig_combout [4]),
5143         .regout(),
5144         .cout(),
5145         .cout0(\inst|vga_driver_unit|un1_line_counter_sig_cout [4]),
5146         .cout1(\inst|vga_driver_unit|un1_line_counter_sig_cout[4]~COUT1_19 ));
5147 // synopsys translate_off
5148 defparam \inst|vga_driver_unit|un1_line_counter_sig_4_ .cin0_used = "true";
5149 defparam \inst|vga_driver_unit|un1_line_counter_sig_4_ .cin1_used = "true";
5150 defparam \inst|vga_driver_unit|un1_line_counter_sig_4_ .lut_mask = "c308";
5151 defparam \inst|vga_driver_unit|un1_line_counter_sig_4_ .operation_mode = "arithmetic";
5152 defparam \inst|vga_driver_unit|un1_line_counter_sig_4_ .output_mode = "comb_only";
5153 defparam \inst|vga_driver_unit|un1_line_counter_sig_4_ .register_cascade_mode = "off";
5154 defparam \inst|vga_driver_unit|un1_line_counter_sig_4_ .sum_lutc_input = "cin";
5155 defparam \inst|vga_driver_unit|un1_line_counter_sig_4_ .synch_mode = "off";
5156 // synopsys translate_on
5157
5158 // atom is at LC_X54_Y32_N5
5159 stratix_lcell \inst|vga_driver_unit|line_counter_sig_3_ (
5160 // Equation(s):
5161 // \inst|vga_driver_unit|line_counter_sig_3  = DFFEAS(\inst|vga_driver_unit|un1_line_counter_sig_combout [4] # !\inst|vga_driver_unit|un10_line_counter_siglto8 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
5162 // !\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 , )
5163
5164         .clk(\inst1|altpll_component|_clk0 ),
5165         .dataa(vcc),
5166         .datab(vcc),
5167         .datac(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
5168         .datad(\inst|vga_driver_unit|un1_line_counter_sig_combout [4]),
5169         .aclr(gnd),
5170         .aload(gnd),
5171         .sclr(!\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
5172         .sload(gnd),
5173         .ena(vcc),
5174         .cin(gnd),
5175         .cin0(gnd),
5176         .cin1(vcc),
5177         .inverta(gnd),
5178         .regcascin(gnd),
5179         .devclrn(devclrn),
5180         .devpor(devpor),
5181         .combout(),
5182         .regout(\inst|vga_driver_unit|line_counter_sig_3 ),
5183         .cout(),
5184         .cout0(),
5185         .cout1());
5186 // synopsys translate_off
5187 defparam \inst|vga_driver_unit|line_counter_sig_3_ .lut_mask = "ff0f";
5188 defparam \inst|vga_driver_unit|line_counter_sig_3_ .operation_mode = "normal";
5189 defparam \inst|vga_driver_unit|line_counter_sig_3_ .output_mode = "reg_only";
5190 defparam \inst|vga_driver_unit|line_counter_sig_3_ .register_cascade_mode = "off";
5191 defparam \inst|vga_driver_unit|line_counter_sig_3_ .sum_lutc_input = "datac";
5192 defparam \inst|vga_driver_unit|line_counter_sig_3_ .synch_mode = "on";
5193 // synopsys translate_on
5194
5195 // atom is at LC_X54_Y31_N7
5196 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_5_ (
5197 // Equation(s):
5198 // \inst|vga_driver_unit|un1_line_counter_sig_combout [5] = \inst|vga_driver_unit|line_counter_sig_4  $ (\inst|vga_driver_unit|line_counter_sig_3  & !\inst|vga_driver_unit|un1_line_counter_sig_cout [3])
5199 // \inst|vga_driver_unit|un1_line_counter_sig_cout [5] = CARRY(\inst|vga_driver_unit|line_counter_sig_4  & \inst|vga_driver_unit|line_counter_sig_3  & !\inst|vga_driver_unit|un1_line_counter_sig_cout [3])
5200 // \inst|vga_driver_unit|un1_line_counter_sig_cout[5]~COUT1_13  = CARRY(\inst|vga_driver_unit|line_counter_sig_4  & \inst|vga_driver_unit|line_counter_sig_3  & !\inst|vga_driver_unit|un1_line_counter_sig_cout[3]~COUT1_11 )
5201
5202         .clk(gnd),
5203         .dataa(\inst|vga_driver_unit|line_counter_sig_4 ),
5204         .datab(\inst|vga_driver_unit|line_counter_sig_3 ),
5205         .datac(vcc),
5206         .datad(vcc),
5207         .aclr(gnd),
5208         .aload(gnd),
5209         .sclr(gnd),
5210         .sload(gnd),
5211         .ena(vcc),
5212         .cin(gnd),
5213         .cin0(\inst|vga_driver_unit|un1_line_counter_sig_cout [3]),
5214         .cin1(\inst|vga_driver_unit|un1_line_counter_sig_cout[3]~COUT1_11 ),
5215         .inverta(gnd),
5216         .regcascin(gnd),
5217         .devclrn(devclrn),
5218         .devpor(devpor),
5219         .combout(\inst|vga_driver_unit|un1_line_counter_sig_combout [5]),
5220         .regout(),
5221         .cout(),
5222         .cout0(\inst|vga_driver_unit|un1_line_counter_sig_cout [5]),
5223         .cout1(\inst|vga_driver_unit|un1_line_counter_sig_cout[5]~COUT1_13 ));
5224 // synopsys translate_off
5225 defparam \inst|vga_driver_unit|un1_line_counter_sig_5_ .cin0_used = "true";
5226 defparam \inst|vga_driver_unit|un1_line_counter_sig_5_ .cin1_used = "true";
5227 defparam \inst|vga_driver_unit|un1_line_counter_sig_5_ .lut_mask = "a608";
5228 defparam \inst|vga_driver_unit|un1_line_counter_sig_5_ .operation_mode = "arithmetic";
5229 defparam \inst|vga_driver_unit|un1_line_counter_sig_5_ .output_mode = "comb_only";
5230 defparam \inst|vga_driver_unit|un1_line_counter_sig_5_ .register_cascade_mode = "off";
5231 defparam \inst|vga_driver_unit|un1_line_counter_sig_5_ .sum_lutc_input = "cin";
5232 defparam \inst|vga_driver_unit|un1_line_counter_sig_5_ .synch_mode = "off";
5233 // synopsys translate_on
5234
5235 // atom is at LC_X54_Y31_N4
5236 stratix_lcell \inst|vga_driver_unit|line_counter_sig_4_ (
5237 // Equation(s):
5238 // \inst|vga_driver_unit|line_counter_sig_4  = DFFEAS(\inst|vga_driver_unit|un1_line_counter_sig_combout [5] # !\inst|vga_driver_unit|un10_line_counter_siglto8 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
5239 // !\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 , )
5240
5241         .clk(\inst1|altpll_component|_clk0 ),
5242         .dataa(vcc),
5243         .datab(vcc),
5244         .datac(\inst|vga_driver_unit|un1_line_counter_sig_combout [5]),
5245         .datad(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
5246         .aclr(gnd),
5247         .aload(gnd),
5248         .sclr(!\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
5249         .sload(gnd),
5250         .ena(vcc),
5251         .cin(gnd),
5252         .cin0(gnd),
5253         .cin1(vcc),
5254         .inverta(gnd),
5255         .regcascin(gnd),
5256         .devclrn(devclrn),
5257         .devpor(devpor),
5258         .combout(),
5259         .regout(\inst|vga_driver_unit|line_counter_sig_4 ),
5260         .cout(),
5261         .cout0(),
5262         .cout1());
5263 // synopsys translate_off
5264 defparam \inst|vga_driver_unit|line_counter_sig_4_ .lut_mask = "f0ff";
5265 defparam \inst|vga_driver_unit|line_counter_sig_4_ .operation_mode = "normal";
5266 defparam \inst|vga_driver_unit|line_counter_sig_4_ .output_mode = "reg_only";
5267 defparam \inst|vga_driver_unit|line_counter_sig_4_ .register_cascade_mode = "off";
5268 defparam \inst|vga_driver_unit|line_counter_sig_4_ .sum_lutc_input = "datac";
5269 defparam \inst|vga_driver_unit|line_counter_sig_4_ .synch_mode = "on";
5270 // synopsys translate_on
5271
5272 // atom is at LC_X54_Y32_N3
5273 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_6_ (
5274 // Equation(s):
5275 // \inst|vga_driver_unit|un1_line_counter_sig_combout [6] = \inst|vga_driver_unit|line_counter_sig_5  $ (\inst|vga_driver_unit|un1_line_counter_sig_cout [4])
5276 // \inst|vga_driver_unit|un1_line_counter_sig_cout [6] = CARRY(!\inst|vga_driver_unit|un1_line_counter_sig_cout [4] # !\inst|vga_driver_unit|line_counter_sig_6  # !\inst|vga_driver_unit|line_counter_sig_5 )
5277 // \inst|vga_driver_unit|un1_line_counter_sig_cout[6]~COUT1_21  = CARRY(!\inst|vga_driver_unit|un1_line_counter_sig_cout[4]~COUT1_19  # !\inst|vga_driver_unit|line_counter_sig_6  # !\inst|vga_driver_unit|line_counter_sig_5 )
5278
5279         .clk(gnd),
5280         .dataa(\inst|vga_driver_unit|line_counter_sig_5 ),
5281         .datab(\inst|vga_driver_unit|line_counter_sig_6 ),
5282         .datac(vcc),
5283         .datad(vcc),
5284         .aclr(gnd),
5285         .aload(gnd),
5286         .sclr(gnd),
5287         .sload(gnd),
5288         .ena(vcc),
5289         .cin(gnd),
5290         .cin0(\inst|vga_driver_unit|un1_line_counter_sig_cout [4]),
5291         .cin1(\inst|vga_driver_unit|un1_line_counter_sig_cout[4]~COUT1_19 ),
5292         .inverta(gnd),
5293         .regcascin(gnd),
5294         .devclrn(devclrn),
5295         .devpor(devpor),
5296         .combout(\inst|vga_driver_unit|un1_line_counter_sig_combout [6]),
5297         .regout(),
5298         .cout(),
5299         .cout0(\inst|vga_driver_unit|un1_line_counter_sig_cout [6]),
5300         .cout1(\inst|vga_driver_unit|un1_line_counter_sig_cout[6]~COUT1_21 ));
5301 // synopsys translate_off
5302 defparam \inst|vga_driver_unit|un1_line_counter_sig_6_ .cin0_used = "true";
5303 defparam \inst|vga_driver_unit|un1_line_counter_sig_6_ .cin1_used = "true";
5304 defparam \inst|vga_driver_unit|un1_line_counter_sig_6_ .lut_mask = "5a7f";
5305 defparam \inst|vga_driver_unit|un1_line_counter_sig_6_ .operation_mode = "arithmetic";
5306 defparam \inst|vga_driver_unit|un1_line_counter_sig_6_ .output_mode = "comb_only";
5307 defparam \inst|vga_driver_unit|un1_line_counter_sig_6_ .register_cascade_mode = "off";
5308 defparam \inst|vga_driver_unit|un1_line_counter_sig_6_ .sum_lutc_input = "cin";
5309 defparam \inst|vga_driver_unit|un1_line_counter_sig_6_ .synch_mode = "off";
5310 // synopsys translate_on
5311
5312 // atom is at LC_X54_Y32_N8
5313 stratix_lcell \inst|vga_driver_unit|line_counter_sig_5_ (
5314 // Equation(s):
5315 // \inst|vga_driver_unit|line_counter_sig_5  = DFFEAS(\inst|vga_driver_unit|un1_line_counter_sig_combout [6] & \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1  & \inst|vga_driver_unit|un10_line_counter_siglto8 , GLOBAL(\inst1|altpll_component|_clk0 ),
5316 // VCC, , , , , , )
5317
5318         .clk(\inst1|altpll_component|_clk0 ),
5319         .dataa(\inst|vga_driver_unit|un1_line_counter_sig_combout [6]),
5320         .datab(\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
5321         .datac(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
5322         .datad(vcc),
5323         .aclr(gnd),
5324         .aload(gnd),
5325         .sclr(gnd),
5326         .sload(gnd),
5327         .ena(vcc),
5328         .cin(gnd),
5329         .cin0(gnd),
5330         .cin1(vcc),
5331         .inverta(gnd),
5332         .regcascin(gnd),
5333         .devclrn(devclrn),
5334         .devpor(devpor),
5335         .combout(),
5336         .regout(\inst|vga_driver_unit|line_counter_sig_5 ),
5337         .cout(),
5338         .cout0(),
5339         .cout1());
5340 // synopsys translate_off
5341 defparam \inst|vga_driver_unit|line_counter_sig_5_ .lut_mask = "8080";
5342 defparam \inst|vga_driver_unit|line_counter_sig_5_ .operation_mode = "normal";
5343 defparam \inst|vga_driver_unit|line_counter_sig_5_ .output_mode = "reg_only";
5344 defparam \inst|vga_driver_unit|line_counter_sig_5_ .register_cascade_mode = "off";
5345 defparam \inst|vga_driver_unit|line_counter_sig_5_ .sum_lutc_input = "datac";
5346 defparam \inst|vga_driver_unit|line_counter_sig_5_ .synch_mode = "off";
5347 // synopsys translate_on
5348
5349 // atom is at LC_X54_Y31_N8
5350 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_7_ (
5351 // Equation(s):
5352 // \inst|vga_driver_unit|un1_line_counter_sig_combout [7] = \inst|vga_driver_unit|line_counter_sig_6  $ (\inst|vga_driver_unit|line_counter_sig_5  & \inst|vga_driver_unit|un1_line_counter_sig_cout [5])
5353 // \inst|vga_driver_unit|un1_line_counter_sig_cout [7] = CARRY(!\inst|vga_driver_unit|un1_line_counter_sig_cout [5] # !\inst|vga_driver_unit|line_counter_sig_5  # !\inst|vga_driver_unit|line_counter_sig_6 )
5354 // \inst|vga_driver_unit|un1_line_counter_sig_cout[7]~COUT1_15  = CARRY(!\inst|vga_driver_unit|un1_line_counter_sig_cout[5]~COUT1_13  # !\inst|vga_driver_unit|line_counter_sig_5  # !\inst|vga_driver_unit|line_counter_sig_6 )
5355
5356         .clk(gnd),
5357         .dataa(\inst|vga_driver_unit|line_counter_sig_6 ),
5358         .datab(\inst|vga_driver_unit|line_counter_sig_5 ),
5359         .datac(vcc),
5360         .datad(vcc),
5361         .aclr(gnd),
5362         .aload(gnd),
5363         .sclr(gnd),
5364         .sload(gnd),
5365         .ena(vcc),
5366         .cin(gnd),
5367         .cin0(\inst|vga_driver_unit|un1_line_counter_sig_cout [5]),
5368         .cin1(\inst|vga_driver_unit|un1_line_counter_sig_cout[5]~COUT1_13 ),
5369         .inverta(gnd),
5370         .regcascin(gnd),
5371         .devclrn(devclrn),
5372         .devpor(devpor),
5373         .combout(\inst|vga_driver_unit|un1_line_counter_sig_combout [7]),
5374         .regout(),
5375         .cout(),
5376         .cout0(\inst|vga_driver_unit|un1_line_counter_sig_cout [7]),
5377         .cout1(\inst|vga_driver_unit|un1_line_counter_sig_cout[7]~COUT1_15 ));
5378 // synopsys translate_off
5379 defparam \inst|vga_driver_unit|un1_line_counter_sig_7_ .cin0_used = "true";
5380 defparam \inst|vga_driver_unit|un1_line_counter_sig_7_ .cin1_used = "true";
5381 defparam \inst|vga_driver_unit|un1_line_counter_sig_7_ .lut_mask = "6a7f";
5382 defparam \inst|vga_driver_unit|un1_line_counter_sig_7_ .operation_mode = "arithmetic";
5383 defparam \inst|vga_driver_unit|un1_line_counter_sig_7_ .output_mode = "comb_only";
5384 defparam \inst|vga_driver_unit|un1_line_counter_sig_7_ .register_cascade_mode = "off";
5385 defparam \inst|vga_driver_unit|un1_line_counter_sig_7_ .sum_lutc_input = "cin";
5386 defparam \inst|vga_driver_unit|un1_line_counter_sig_7_ .synch_mode = "off";
5387 // synopsys translate_on
5388
5389 // atom is at LC_X55_Y31_N4
5390 stratix_lcell \inst|vga_driver_unit|line_counter_sig_6_ (
5391 // Equation(s):
5392 // \inst|vga_driver_unit|line_counter_sig_6  = DFFEAS(\inst|vga_driver_unit|un1_line_counter_sig_combout [7] # !\inst|vga_driver_unit|un10_line_counter_siglto8 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
5393 // !\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 , )
5394
5395         .clk(\inst1|altpll_component|_clk0 ),
5396         .dataa(vcc),
5397         .datab(\inst|vga_driver_unit|un1_line_counter_sig_combout [7]),
5398         .datac(vcc),
5399         .datad(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
5400         .aclr(gnd),
5401         .aload(gnd),
5402         .sclr(!\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
5403         .sload(gnd),
5404         .ena(vcc),
5405         .cin(gnd),
5406         .cin0(gnd),
5407         .cin1(vcc),
5408         .inverta(gnd),
5409         .regcascin(gnd),
5410         .devclrn(devclrn),
5411         .devpor(devpor),
5412         .combout(),
5413         .regout(\inst|vga_driver_unit|line_counter_sig_6 ),
5414         .cout(),
5415         .cout0(),
5416         .cout1());
5417 // synopsys translate_off
5418 defparam \inst|vga_driver_unit|line_counter_sig_6_ .lut_mask = "ccff";
5419 defparam \inst|vga_driver_unit|line_counter_sig_6_ .operation_mode = "normal";
5420 defparam \inst|vga_driver_unit|line_counter_sig_6_ .output_mode = "reg_only";
5421 defparam \inst|vga_driver_unit|line_counter_sig_6_ .register_cascade_mode = "off";
5422 defparam \inst|vga_driver_unit|line_counter_sig_6_ .sum_lutc_input = "datac";
5423 defparam \inst|vga_driver_unit|line_counter_sig_6_ .synch_mode = "on";
5424 // synopsys translate_on
5425
5426 // atom is at LC_X54_Y31_N1
5427 stratix_lcell \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglt4_2 (
5428 // Equation(s):
5429 // \inst|vga_driver_unit|un10_line_counter_siglt4_2  = !\inst|vga_driver_unit|line_counter_sig_3  # !\inst|vga_driver_unit|line_counter_sig_0  # !\inst|vga_driver_unit|line_counter_sig_4
5430
5431         .clk(gnd),
5432         .dataa(\inst|vga_driver_unit|line_counter_sig_4 ),
5433         .datab(\inst|vga_driver_unit|line_counter_sig_0 ),
5434         .datac(\inst|vga_driver_unit|line_counter_sig_3 ),
5435         .datad(vcc),
5436         .aclr(gnd),
5437         .aload(gnd),
5438         .sclr(gnd),
5439         .sload(gnd),
5440         .ena(vcc),
5441         .cin(gnd),
5442         .cin0(gnd),
5443         .cin1(vcc),
5444         .inverta(gnd),
5445         .regcascin(gnd),
5446         .devclrn(devclrn),
5447         .devpor(devpor),
5448         .combout(\inst|vga_driver_unit|un10_line_counter_siglt4_2 ),
5449         .regout(),
5450         .cout(),
5451         .cout0(),
5452         .cout1());
5453 // synopsys translate_off
5454 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglt4_2 .lut_mask = "7f7f";
5455 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglt4_2 .operation_mode = "normal";
5456 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglt4_2 .output_mode = "comb_only";
5457 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglt4_2 .register_cascade_mode = "off";
5458 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglt4_2 .sum_lutc_input = "datac";
5459 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglt4_2 .synch_mode = "off";
5460 // synopsys translate_on
5461
5462 // atom is at LC_X54_Y31_N3
5463 stratix_lcell \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto5 (
5464 // Equation(s):
5465 // \inst|vga_driver_unit|un10_line_counter_siglto5  = !\inst|vga_driver_unit|line_counter_sig_5  & (\inst|vga_driver_unit|un10_line_counter_siglt4_2  # !\inst|vga_driver_unit|line_counter_sig_2  # !\inst|vga_driver_unit|line_counter_sig_1 )
5466
5467         .clk(gnd),
5468         .dataa(\inst|vga_driver_unit|line_counter_sig_1 ),
5469         .datab(\inst|vga_driver_unit|un10_line_counter_siglt4_2 ),
5470         .datac(\inst|vga_driver_unit|line_counter_sig_5 ),
5471         .datad(\inst|vga_driver_unit|line_counter_sig_2 ),
5472         .aclr(gnd),
5473         .aload(gnd),
5474         .sclr(gnd),
5475         .sload(gnd),
5476         .ena(vcc),
5477         .cin(gnd),
5478         .cin0(gnd),
5479         .cin1(vcc),
5480         .inverta(gnd),
5481         .regcascin(gnd),
5482         .devclrn(devclrn),
5483         .devpor(devpor),
5484         .combout(\inst|vga_driver_unit|un10_line_counter_siglto5 ),
5485         .regout(),
5486         .cout(),
5487         .cout0(),
5488         .cout1());
5489 // synopsys translate_off
5490 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto5 .lut_mask = "0d0f";
5491 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto5 .operation_mode = "normal";
5492 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto5 .output_mode = "comb_only";
5493 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto5 .register_cascade_mode = "off";
5494 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto5 .sum_lutc_input = "datac";
5495 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto5 .synch_mode = "off";
5496 // synopsys translate_on
5497
5498 // atom is at LC_X54_Y31_N2
5499 stratix_lcell \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto8 (
5500 // Equation(s):
5501 // \inst|vga_driver_unit|un10_line_counter_siglto8  = \inst|vga_driver_unit|un10_line_counter_siglto5  # !\inst|vga_driver_unit|line_counter_sig_7  # !\inst|vga_driver_unit|line_counter_sig_8  # !\inst|vga_driver_unit|line_counter_sig_6
5502
5503         .clk(gnd),
5504         .dataa(\inst|vga_driver_unit|line_counter_sig_6 ),
5505         .datab(\inst|vga_driver_unit|line_counter_sig_8 ),
5506         .datac(\inst|vga_driver_unit|un10_line_counter_siglto5 ),
5507         .datad(\inst|vga_driver_unit|line_counter_sig_7 ),
5508         .aclr(gnd),
5509         .aload(gnd),
5510         .sclr(gnd),
5511         .sload(gnd),
5512         .ena(vcc),
5513         .cin(gnd),
5514         .cin0(gnd),
5515         .cin1(vcc),
5516         .inverta(gnd),
5517         .regcascin(gnd),
5518         .devclrn(devclrn),
5519         .devpor(devpor),
5520         .combout(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
5521         .regout(),
5522         .cout(),
5523         .cout0(),
5524         .cout1());
5525 // synopsys translate_off
5526 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto8 .lut_mask = "f7ff";
5527 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto8 .operation_mode = "normal";
5528 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto8 .output_mode = "comb_only";
5529 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto8 .register_cascade_mode = "off";
5530 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto8 .sum_lutc_input = "datac";
5531 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto8 .synch_mode = "off";
5532 // synopsys translate_on
5533
5534 // atom is at LC_X54_Y32_N4
5535 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_8_ (
5536 // Equation(s):
5537 // \inst|vga_driver_unit|un1_line_counter_sig_combout [8] = \inst|vga_driver_unit|un1_line_counter_sig_cout [6] $ !\inst|vga_driver_unit|line_counter_sig_7
5538
5539         .clk(gnd),
5540         .dataa(vcc),
5541         .datab(vcc),
5542         .datac(vcc),
5543         .datad(\inst|vga_driver_unit|line_counter_sig_7 ),
5544         .aclr(gnd),
5545         .aload(gnd),
5546         .sclr(gnd),
5547         .sload(gnd),
5548         .ena(vcc),
5549         .cin(gnd),
5550         .cin0(\inst|vga_driver_unit|un1_line_counter_sig_cout [6]),
5551         .cin1(\inst|vga_driver_unit|un1_line_counter_sig_cout[6]~COUT1_21 ),
5552         .inverta(gnd),
5553         .regcascin(gnd),
5554         .devclrn(devclrn),
5555         .devpor(devpor),
5556         .combout(\inst|vga_driver_unit|un1_line_counter_sig_combout [8]),
5557         .regout(),
5558         .cout(),
5559         .cout0(),
5560         .cout1());
5561 // synopsys translate_off
5562 defparam \inst|vga_driver_unit|un1_line_counter_sig_8_ .cin0_used = "true";
5563 defparam \inst|vga_driver_unit|un1_line_counter_sig_8_ .cin1_used = "true";
5564 defparam \inst|vga_driver_unit|un1_line_counter_sig_8_ .lut_mask = "f00f";
5565 defparam \inst|vga_driver_unit|un1_line_counter_sig_8_ .operation_mode = "normal";
5566 defparam \inst|vga_driver_unit|un1_line_counter_sig_8_ .output_mode = "comb_only";
5567 defparam \inst|vga_driver_unit|un1_line_counter_sig_8_ .register_cascade_mode = "off";
5568 defparam \inst|vga_driver_unit|un1_line_counter_sig_8_ .sum_lutc_input = "cin";
5569 defparam \inst|vga_driver_unit|un1_line_counter_sig_8_ .synch_mode = "off";
5570 // synopsys translate_on
5571
5572 // atom is at LC_X54_Y32_N9
5573 stratix_lcell \inst|vga_driver_unit|line_counter_sig_7_ (
5574 // Equation(s):
5575 // \inst|vga_driver_unit|line_counter_sig_7  = DFFEAS(\inst|vga_driver_unit|un1_line_counter_sig_combout [8] # !\inst|vga_driver_unit|un10_line_counter_siglto8 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
5576 // !\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 , )
5577
5578         .clk(\inst1|altpll_component|_clk0 ),
5579         .dataa(vcc),
5580         .datab(vcc),
5581         .datac(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
5582         .datad(\inst|vga_driver_unit|un1_line_counter_sig_combout [8]),
5583         .aclr(gnd),
5584         .aload(gnd),
5585         .sclr(!\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
5586         .sload(gnd),
5587         .ena(vcc),
5588         .cin(gnd),
5589         .cin0(gnd),
5590         .cin1(vcc),
5591         .inverta(gnd),
5592         .regcascin(gnd),
5593         .devclrn(devclrn),
5594         .devpor(devpor),
5595         .combout(),
5596         .regout(\inst|vga_driver_unit|line_counter_sig_7 ),
5597         .cout(),
5598         .cout0(),
5599         .cout1());
5600 // synopsys translate_off
5601 defparam \inst|vga_driver_unit|line_counter_sig_7_ .lut_mask = "ff0f";
5602 defparam \inst|vga_driver_unit|line_counter_sig_7_ .operation_mode = "normal";
5603 defparam \inst|vga_driver_unit|line_counter_sig_7_ .output_mode = "reg_only";
5604 defparam \inst|vga_driver_unit|line_counter_sig_7_ .register_cascade_mode = "off";
5605 defparam \inst|vga_driver_unit|line_counter_sig_7_ .sum_lutc_input = "datac";
5606 defparam \inst|vga_driver_unit|line_counter_sig_7_ .synch_mode = "on";
5607 // synopsys translate_on
5608
5609 // atom is at LC_X54_Y31_N9
5610 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_9_ (
5611 // Equation(s):
5612 // \inst|vga_driver_unit|un1_line_counter_sig_combout [9] = \inst|vga_driver_unit|line_counter_sig_8  $ (!\inst|vga_driver_unit|un1_line_counter_sig_cout [7] & \inst|vga_driver_unit|line_counter_sig_7 )
5613
5614         .clk(gnd),
5615         .dataa(vcc),
5616         .datab(\inst|vga_driver_unit|line_counter_sig_8 ),
5617         .datac(vcc),
5618         .datad(\inst|vga_driver_unit|line_counter_sig_7 ),
5619         .aclr(gnd),
5620         .aload(gnd),
5621         .sclr(gnd),
5622         .sload(gnd),
5623         .ena(vcc),
5624         .cin(gnd),
5625         .cin0(\inst|vga_driver_unit|un1_line_counter_sig_cout [7]),
5626         .cin1(\inst|vga_driver_unit|un1_line_counter_sig_cout[7]~COUT1_15 ),
5627         .inverta(gnd),
5628         .regcascin(gnd),
5629         .devclrn(devclrn),
5630         .devpor(devpor),
5631         .combout(\inst|vga_driver_unit|un1_line_counter_sig_combout [9]),
5632         .regout(),
5633         .cout(),
5634         .cout0(),
5635         .cout1());
5636 // synopsys translate_off
5637 defparam \inst|vga_driver_unit|un1_line_counter_sig_9_ .cin0_used = "true";
5638 defparam \inst|vga_driver_unit|un1_line_counter_sig_9_ .cin1_used = "true";
5639 defparam \inst|vga_driver_unit|un1_line_counter_sig_9_ .lut_mask = "c3cc";
5640 defparam \inst|vga_driver_unit|un1_line_counter_sig_9_ .operation_mode = "normal";
5641 defparam \inst|vga_driver_unit|un1_line_counter_sig_9_ .output_mode = "comb_only";
5642 defparam \inst|vga_driver_unit|un1_line_counter_sig_9_ .register_cascade_mode = "off";
5643 defparam \inst|vga_driver_unit|un1_line_counter_sig_9_ .sum_lutc_input = "cin";
5644 defparam \inst|vga_driver_unit|un1_line_counter_sig_9_ .synch_mode = "off";
5645 // synopsys translate_on
5646
5647 // atom is at LC_X54_Y31_N0
5648 stratix_lcell \inst|vga_driver_unit|line_counter_sig_8_ (
5649 // Equation(s):
5650 // \inst|vga_driver_unit|line_counter_sig_8  = DFFEAS(\inst|vga_driver_unit|un1_line_counter_sig_combout [9] # !\inst|vga_driver_unit|un10_line_counter_siglto8 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
5651 // !\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 , )
5652
5653         .clk(\inst1|altpll_component|_clk0 ),
5654         .dataa(vcc),
5655         .datab(\inst|vga_driver_unit|un1_line_counter_sig_combout [9]),
5656         .datac(vcc),
5657         .datad(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
5658         .aclr(gnd),
5659         .aload(gnd),
5660         .sclr(!\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
5661         .sload(gnd),
5662         .ena(vcc),
5663         .cin(gnd),
5664         .cin0(gnd),
5665         .cin1(vcc),
5666         .inverta(gnd),
5667         .regcascin(gnd),
5668         .devclrn(devclrn),
5669         .devpor(devpor),
5670         .combout(),
5671         .regout(\inst|vga_driver_unit|line_counter_sig_8 ),
5672         .cout(),
5673         .cout0(),
5674         .cout1());
5675 // synopsys translate_off
5676 defparam \inst|vga_driver_unit|line_counter_sig_8_ .lut_mask = "ccff";
5677 defparam \inst|vga_driver_unit|line_counter_sig_8_ .operation_mode = "normal";
5678 defparam \inst|vga_driver_unit|line_counter_sig_8_ .output_mode = "reg_only";
5679 defparam \inst|vga_driver_unit|line_counter_sig_8_ .register_cascade_mode = "off";
5680 defparam \inst|vga_driver_unit|line_counter_sig_8_ .sum_lutc_input = "datac";
5681 defparam \inst|vga_driver_unit|line_counter_sig_8_ .synch_mode = "on";
5682 // synopsys translate_on
5683
5684 // atom is at LC_X41_Y19_N2
5685 stratix_lcell \~STRATIX_FITTER_CREATED_GND~I (
5686 // Equation(s):
5687 // \~STRATIX_FITTER_CREATED_GND~I_combout  = GND
5688
5689         .clk(gnd),
5690         .dataa(vcc),
5691         .datab(vcc),
5692         .datac(vcc),
5693         .datad(vcc),
5694         .aclr(gnd),
5695         .aload(gnd),
5696         .sclr(gnd),
5697         .sload(gnd),
5698         .ena(vcc),
5699         .cin(gnd),
5700         .cin0(gnd),
5701         .cin1(vcc),
5702         .inverta(gnd),
5703         .regcascin(gnd),
5704         .devclrn(devclrn),
5705         .devpor(devpor),
5706         .combout(\~STRATIX_FITTER_CREATED_GND~I_combout ),
5707         .regout(),
5708         .cout(),
5709         .cout0(),
5710         .cout1());
5711 // synopsys translate_off
5712 defparam \~STRATIX_FITTER_CREATED_GND~I .lut_mask = "0000";
5713 defparam \~STRATIX_FITTER_CREATED_GND~I .operation_mode = "normal";
5714 defparam \~STRATIX_FITTER_CREATED_GND~I .output_mode = "comb_only";
5715 defparam \~STRATIX_FITTER_CREATED_GND~I .register_cascade_mode = "off";
5716 defparam \~STRATIX_FITTER_CREATED_GND~I .sum_lutc_input = "datac";
5717 defparam \~STRATIX_FITTER_CREATED_GND~I .synch_mode = "off";
5718 // synopsys translate_on
5719
5720 // atom is at PIN_L7
5721 stratix_io \inst|d_hsync_out~I (
5722         .datain(\inst|vga_driver_unit|h_sync ),
5723         .ddiodatain(gnd),
5724         .oe(vcc),
5725         .outclk(gnd),
5726         .outclkena(vcc),
5727         .inclk(gnd),
5728         .inclkena(vcc),
5729         .areset(gnd),
5730         .sreset(gnd),
5731         .delayctrlin(gnd),
5732         .devclrn(devclrn),
5733         .devpor(devpor),
5734         .devoe(devoe),
5735         .combout(),
5736         .regout(),
5737         .ddioregout(),
5738         .padio(d_hsync),
5739         .dqsundelayedout());
5740 // synopsys translate_off
5741 defparam \inst|d_hsync_out~I .ddio_mode = "none";
5742 defparam \inst|d_hsync_out~I .input_async_reset = "none";
5743 defparam \inst|d_hsync_out~I .input_power_up = "low";
5744 defparam \inst|d_hsync_out~I .input_register_mode = "none";
5745 defparam \inst|d_hsync_out~I .input_sync_reset = "none";
5746 defparam \inst|d_hsync_out~I .oe_async_reset = "none";
5747 defparam \inst|d_hsync_out~I .oe_power_up = "low";
5748 defparam \inst|d_hsync_out~I .oe_register_mode = "none";
5749 defparam \inst|d_hsync_out~I .oe_sync_reset = "none";
5750 defparam \inst|d_hsync_out~I .operation_mode = "output";
5751 defparam \inst|d_hsync_out~I .output_async_reset = "none";
5752 defparam \inst|d_hsync_out~I .output_power_up = "low";
5753 defparam \inst|d_hsync_out~I .output_register_mode = "none";
5754 defparam \inst|d_hsync_out~I .output_sync_reset = "none";
5755 // synopsys translate_on
5756
5757 // atom is at PIN_L5
5758 stratix_io \inst|d_vsync_out~I (
5759         .datain(\inst|vga_driver_unit|v_sync ),
5760         .ddiodatain(gnd),
5761         .oe(vcc),
5762         .outclk(gnd),
5763         .outclkena(vcc),
5764         .inclk(gnd),
5765         .inclkena(vcc),
5766         .areset(gnd),
5767         .sreset(gnd),
5768         .delayctrlin(gnd),
5769         .devclrn(devclrn),
5770         .devpor(devpor),
5771         .devoe(devoe),
5772         .combout(),
5773         .regout(),
5774         .ddioregout(),
5775         .padio(d_vsync),
5776         .dqsundelayedout());
5777 // synopsys translate_off
5778 defparam \inst|d_vsync_out~I .ddio_mode = "none";
5779 defparam \inst|d_vsync_out~I .input_async_reset = "none";
5780 defparam \inst|d_vsync_out~I .input_power_up = "low";
5781 defparam \inst|d_vsync_out~I .input_register_mode = "none";
5782 defparam \inst|d_vsync_out~I .input_sync_reset = "none";
5783 defparam \inst|d_vsync_out~I .oe_async_reset = "none";
5784 defparam \inst|d_vsync_out~I .oe_power_up = "low";
5785 defparam \inst|d_vsync_out~I .oe_register_mode = "none";
5786 defparam \inst|d_vsync_out~I .oe_sync_reset = "none";
5787 defparam \inst|d_vsync_out~I .operation_mode = "output";
5788 defparam \inst|d_vsync_out~I .output_async_reset = "none";
5789 defparam \inst|d_vsync_out~I .output_power_up = "low";
5790 defparam \inst|d_vsync_out~I .output_register_mode = "none";
5791 defparam \inst|d_vsync_out~I .output_sync_reset = "none";
5792 // synopsys translate_on
5793
5794 // atom is at PIN_Y23
5795 stratix_io \inst|d_set_column_counter_out~I (
5796         .datain(\inst|vga_driver_unit|hsync_state_1 ),
5797         .ddiodatain(gnd),
5798         .oe(vcc),
5799         .outclk(gnd),
5800         .outclkena(vcc),
5801         .inclk(gnd),
5802         .inclkena(vcc),
5803         .areset(gnd),
5804         .sreset(gnd),
5805         .delayctrlin(gnd),
5806         .devclrn(devclrn),
5807         .devpor(devpor),
5808         .devoe(devoe),
5809         .combout(),
5810         .regout(),
5811         .ddioregout(),
5812         .padio(d_set_column_counter),
5813         .dqsundelayedout());
5814 // synopsys translate_off
5815 defparam \inst|d_set_column_counter_out~I .ddio_mode = "none";
5816 defparam \inst|d_set_column_counter_out~I .input_async_reset = "none";
5817 defparam \inst|d_set_column_counter_out~I .input_power_up = "low";
5818 defparam \inst|d_set_column_counter_out~I .input_register_mode = "none";
5819 defparam \inst|d_set_column_counter_out~I .input_sync_reset = "none";
5820 defparam \inst|d_set_column_counter_out~I .oe_async_reset = "none";
5821 defparam \inst|d_set_column_counter_out~I .oe_power_up = "low";
5822 defparam \inst|d_set_column_counter_out~I .oe_register_mode = "none";
5823 defparam \inst|d_set_column_counter_out~I .oe_sync_reset = "none";
5824 defparam \inst|d_set_column_counter_out~I .operation_mode = "output";
5825 defparam \inst|d_set_column_counter_out~I .output_async_reset = "none";
5826 defparam \inst|d_set_column_counter_out~I .output_power_up = "low";
5827 defparam \inst|d_set_column_counter_out~I .output_register_mode = "none";
5828 defparam \inst|d_set_column_counter_out~I .output_sync_reset = "none";
5829 // synopsys translate_on
5830
5831 // atom is at PIN_F21
5832 stratix_io \inst|d_set_line_counter_out~I (
5833         .datain(\inst|vga_driver_unit|vsync_state_1 ),
5834         .ddiodatain(gnd),
5835         .oe(vcc),
5836         .outclk(gnd),
5837         .outclkena(vcc),
5838         .inclk(gnd),
5839         .inclkena(vcc),
5840         .areset(gnd),
5841         .sreset(gnd),
5842         .delayctrlin(gnd),
5843         .devclrn(devclrn),
5844         .devpor(devpor),
5845         .devoe(devoe),
5846         .combout(),
5847         .regout(),
5848         .ddioregout(),
5849         .padio(d_set_line_counter),
5850         .dqsundelayedout());
5851 // synopsys translate_off
5852 defparam \inst|d_set_line_counter_out~I .ddio_mode = "none";
5853 defparam \inst|d_set_line_counter_out~I .input_async_reset = "none";
5854 defparam \inst|d_set_line_counter_out~I .input_power_up = "low";
5855 defparam \inst|d_set_line_counter_out~I .input_register_mode = "none";
5856 defparam \inst|d_set_line_counter_out~I .input_sync_reset = "none";
5857 defparam \inst|d_set_line_counter_out~I .oe_async_reset = "none";
5858 defparam \inst|d_set_line_counter_out~I .oe_power_up = "low";
5859 defparam \inst|d_set_line_counter_out~I .oe_register_mode = "none";
5860 defparam \inst|d_set_line_counter_out~I .oe_sync_reset = "none";
5861 defparam \inst|d_set_line_counter_out~I .operation_mode = "output";
5862 defparam \inst|d_set_line_counter_out~I .output_async_reset = "none";
5863 defparam \inst|d_set_line_counter_out~I .output_power_up = "low";
5864 defparam \inst|d_set_line_counter_out~I .output_register_mode = "none";
5865 defparam \inst|d_set_line_counter_out~I .output_sync_reset = "none";
5866 // synopsys translate_on
5867
5868 // atom is at PIN_F26
5869 stratix_io \inst|d_set_hsync_counter_out~I (
5870         .datain(\inst|vga_driver_unit|d_set_hsync_counter ),
5871         .ddiodatain(gnd),
5872         .oe(vcc),
5873         .outclk(gnd),
5874         .outclkena(vcc),
5875         .inclk(gnd),
5876         .inclkena(vcc),
5877         .areset(gnd),
5878         .sreset(gnd),
5879         .delayctrlin(gnd),
5880         .devclrn(devclrn),
5881         .devpor(devpor),
5882         .devoe(devoe),
5883         .combout(),
5884         .regout(),
5885         .ddioregout(),
5886         .padio(d_set_hsync_counter),
5887         .dqsundelayedout());
5888 // synopsys translate_off
5889 defparam \inst|d_set_hsync_counter_out~I .ddio_mode = "none";
5890 defparam \inst|d_set_hsync_counter_out~I .input_async_reset = "none";
5891 defparam \inst|d_set_hsync_counter_out~I .input_power_up = "low";
5892 defparam \inst|d_set_hsync_counter_out~I .input_register_mode = "none";
5893 defparam \inst|d_set_hsync_counter_out~I .input_sync_reset = "none";
5894 defparam \inst|d_set_hsync_counter_out~I .oe_async_reset = "none";
5895 defparam \inst|d_set_hsync_counter_out~I .oe_power_up = "low";
5896 defparam \inst|d_set_hsync_counter_out~I .oe_register_mode = "none";
5897 defparam \inst|d_set_hsync_counter_out~I .oe_sync_reset = "none";
5898 defparam \inst|d_set_hsync_counter_out~I .operation_mode = "output";
5899 defparam \inst|d_set_hsync_counter_out~I .output_async_reset = "none";
5900 defparam \inst|d_set_hsync_counter_out~I .output_power_up = "low";
5901 defparam \inst|d_set_hsync_counter_out~I .output_register_mode = "none";
5902 defparam \inst|d_set_hsync_counter_out~I .output_sync_reset = "none";
5903 // synopsys translate_on
5904
5905 // atom is at PIN_F24
5906 stratix_io \inst|d_set_vsync_counter_out~I (
5907         .datain(\inst|vga_driver_unit|d_set_vsync_counter ),
5908         .ddiodatain(gnd),
5909         .oe(vcc),
5910         .outclk(gnd),
5911         .outclkena(vcc),
5912         .inclk(gnd),
5913         .inclkena(vcc),
5914         .areset(gnd),
5915         .sreset(gnd),
5916         .delayctrlin(gnd),
5917         .devclrn(devclrn),
5918         .devpor(devpor),
5919         .devoe(devoe),
5920         .combout(),
5921         .regout(),
5922         .ddioregout(),
5923         .padio(d_set_vsync_counter),
5924         .dqsundelayedout());
5925 // synopsys translate_off
5926 defparam \inst|d_set_vsync_counter_out~I .ddio_mode = "none";
5927 defparam \inst|d_set_vsync_counter_out~I .input_async_reset = "none";
5928 defparam \inst|d_set_vsync_counter_out~I .input_power_up = "low";
5929 defparam \inst|d_set_vsync_counter_out~I .input_register_mode = "none";
5930 defparam \inst|d_set_vsync_counter_out~I .input_sync_reset = "none";
5931 defparam \inst|d_set_vsync_counter_out~I .oe_async_reset = "none";
5932 defparam \inst|d_set_vsync_counter_out~I .oe_power_up = "low";
5933 defparam \inst|d_set_vsync_counter_out~I .oe_register_mode = "none";
5934 defparam \inst|d_set_vsync_counter_out~I .oe_sync_reset = "none";
5935 defparam \inst|d_set_vsync_counter_out~I .operation_mode = "output";
5936 defparam \inst|d_set_vsync_counter_out~I .output_async_reset = "none";
5937 defparam \inst|d_set_vsync_counter_out~I .output_power_up = "low";
5938 defparam \inst|d_set_vsync_counter_out~I .output_register_mode = "none";
5939 defparam \inst|d_set_vsync_counter_out~I .output_sync_reset = "none";
5940 // synopsys translate_on
5941
5942 // atom is at PIN_L3
5943 stratix_io \inst|d_r_out~I (
5944         .datain(\inst|vga_control_unit|r ),
5945         .ddiodatain(gnd),
5946         .oe(vcc),
5947         .outclk(gnd),
5948         .outclkena(vcc),
5949         .inclk(gnd),
5950         .inclkena(vcc),
5951         .areset(gnd),
5952         .sreset(gnd),
5953         .delayctrlin(gnd),
5954         .devclrn(devclrn),
5955         .devpor(devpor),
5956         .devoe(devoe),
5957         .combout(),
5958         .regout(),
5959         .ddioregout(),
5960         .padio(d_r),
5961         .dqsundelayedout());
5962 // synopsys translate_off
5963 defparam \inst|d_r_out~I .ddio_mode = "none";
5964 defparam \inst|d_r_out~I .input_async_reset = "none";
5965 defparam \inst|d_r_out~I .input_power_up = "low";
5966 defparam \inst|d_r_out~I .input_register_mode = "none";
5967 defparam \inst|d_r_out~I .input_sync_reset = "none";
5968 defparam \inst|d_r_out~I .oe_async_reset = "none";
5969 defparam \inst|d_r_out~I .oe_power_up = "low";
5970 defparam \inst|d_r_out~I .oe_register_mode = "none";
5971 defparam \inst|d_r_out~I .oe_sync_reset = "none";
5972 defparam \inst|d_r_out~I .operation_mode = "output";
5973 defparam \inst|d_r_out~I .output_async_reset = "none";
5974 defparam \inst|d_r_out~I .output_power_up = "low";
5975 defparam \inst|d_r_out~I .output_register_mode = "none";
5976 defparam \inst|d_r_out~I .output_sync_reset = "none";
5977 // synopsys translate_on
5978
5979 // atom is at PIN_K24
5980 stratix_io \inst|d_g_out~I (
5981         .datain(\inst|vga_control_unit|g ),
5982         .ddiodatain(gnd),
5983         .oe(vcc),
5984         .outclk(gnd),
5985         .outclkena(vcc),
5986         .inclk(gnd),
5987         .inclkena(vcc),
5988         .areset(gnd),
5989         .sreset(gnd),
5990         .delayctrlin(gnd),
5991         .devclrn(devclrn),
5992         .devpor(devpor),
5993         .devoe(devoe),
5994         .combout(),
5995         .regout(),
5996         .ddioregout(),
5997         .padio(d_g),
5998         .dqsundelayedout());
5999 // synopsys translate_off
6000 defparam \inst|d_g_out~I .ddio_mode = "none";
6001 defparam \inst|d_g_out~I .input_async_reset = "none";
6002 defparam \inst|d_g_out~I .input_power_up = "low";
6003 defparam \inst|d_g_out~I .input_register_mode = "none";
6004 defparam \inst|d_g_out~I .input_sync_reset = "none";
6005 defparam \inst|d_g_out~I .oe_async_reset = "none";
6006 defparam \inst|d_g_out~I .oe_power_up = "low";
6007 defparam \inst|d_g_out~I .oe_register_mode = "none";
6008 defparam \inst|d_g_out~I .oe_sync_reset = "none";
6009 defparam \inst|d_g_out~I .operation_mode = "output";
6010 defparam \inst|d_g_out~I .output_async_reset = "none";
6011 defparam \inst|d_g_out~I .output_power_up = "low";
6012 defparam \inst|d_g_out~I .output_register_mode = "none";
6013 defparam \inst|d_g_out~I .output_sync_reset = "none";
6014 // synopsys translate_on
6015
6016 // atom is at PIN_K20
6017 stratix_io \inst|d_b_out~I (
6018         .datain(\inst|vga_control_unit|b ),
6019         .ddiodatain(gnd),
6020         .oe(vcc),
6021         .outclk(gnd),
6022         .outclkena(vcc),
6023         .inclk(gnd),
6024         .inclkena(vcc),
6025         .areset(gnd),
6026         .sreset(gnd),
6027         .delayctrlin(gnd),
6028         .devclrn(devclrn),
6029         .devpor(devpor),
6030         .devoe(devoe),
6031         .combout(),
6032         .regout(),
6033         .ddioregout(),
6034         .padio(d_b),
6035         .dqsundelayedout());
6036 // synopsys translate_off
6037 defparam \inst|d_b_out~I .ddio_mode = "none";
6038 defparam \inst|d_b_out~I .input_async_reset = "none";
6039 defparam \inst|d_b_out~I .input_power_up = "low";
6040 defparam \inst|d_b_out~I .input_register_mode = "none";
6041 defparam \inst|d_b_out~I .input_sync_reset = "none";
6042 defparam \inst|d_b_out~I .oe_async_reset = "none";
6043 defparam \inst|d_b_out~I .oe_power_up = "low";
6044 defparam \inst|d_b_out~I .oe_register_mode = "none";
6045 defparam \inst|d_b_out~I .oe_sync_reset = "none";
6046 defparam \inst|d_b_out~I .operation_mode = "output";
6047 defparam \inst|d_b_out~I .output_async_reset = "none";
6048 defparam \inst|d_b_out~I .output_power_up = "low";
6049 defparam \inst|d_b_out~I .output_register_mode = "none";
6050 defparam \inst|d_b_out~I .output_sync_reset = "none";
6051 // synopsys translate_on
6052
6053 // atom is at PIN_J21
6054 stratix_io \inst|d_h_enable_out~I (
6055         .datain(\inst|vga_driver_unit|h_enable_sig ),
6056         .ddiodatain(gnd),
6057         .oe(vcc),
6058         .outclk(gnd),
6059         .outclkena(vcc),
6060         .inclk(gnd),
6061         .inclkena(vcc),
6062         .areset(gnd),
6063         .sreset(gnd),
6064         .delayctrlin(gnd),
6065         .devclrn(devclrn),
6066         .devpor(devpor),
6067         .devoe(devoe),
6068         .combout(),
6069         .regout(),
6070         .ddioregout(),
6071         .padio(d_h_enable),
6072         .dqsundelayedout());
6073 // synopsys translate_off
6074 defparam \inst|d_h_enable_out~I .ddio_mode = "none";
6075 defparam \inst|d_h_enable_out~I .input_async_reset = "none";
6076 defparam \inst|d_h_enable_out~I .input_power_up = "low";
6077 defparam \inst|d_h_enable_out~I .input_register_mode = "none";
6078 defparam \inst|d_h_enable_out~I .input_sync_reset = "none";
6079 defparam \inst|d_h_enable_out~I .oe_async_reset = "none";
6080 defparam \inst|d_h_enable_out~I .oe_power_up = "low";
6081 defparam \inst|d_h_enable_out~I .oe_register_mode = "none";
6082 defparam \inst|d_h_enable_out~I .oe_sync_reset = "none";
6083 defparam \inst|d_h_enable_out~I .operation_mode = "output";
6084 defparam \inst|d_h_enable_out~I .output_async_reset = "none";
6085 defparam \inst|d_h_enable_out~I .output_power_up = "low";
6086 defparam \inst|d_h_enable_out~I .output_register_mode = "none";
6087 defparam \inst|d_h_enable_out~I .output_sync_reset = "none";
6088 // synopsys translate_on
6089
6090 // atom is at PIN_H18
6091 stratix_io \inst|d_v_enable_out~I (
6092         .datain(\inst|vga_driver_unit|v_enable_sig ),
6093         .ddiodatain(gnd),
6094         .oe(vcc),
6095         .outclk(gnd),
6096         .outclkena(vcc),
6097         .inclk(gnd),
6098         .inclkena(vcc),
6099         .areset(gnd),
6100         .sreset(gnd),
6101         .delayctrlin(gnd),
6102         .devclrn(devclrn),
6103         .devpor(devpor),
6104         .devoe(devoe),
6105         .combout(),
6106         .regout(),
6107         .ddioregout(),
6108         .padio(d_v_enable),
6109         .dqsundelayedout());
6110 // synopsys translate_off
6111 defparam \inst|d_v_enable_out~I .ddio_mode = "none";
6112 defparam \inst|d_v_enable_out~I .input_async_reset = "none";
6113 defparam \inst|d_v_enable_out~I .input_power_up = "low";
6114 defparam \inst|d_v_enable_out~I .input_register_mode = "none";
6115 defparam \inst|d_v_enable_out~I .input_sync_reset = "none";
6116 defparam \inst|d_v_enable_out~I .oe_async_reset = "none";
6117 defparam \inst|d_v_enable_out~I .oe_power_up = "low";
6118 defparam \inst|d_v_enable_out~I .oe_register_mode = "none";
6119 defparam \inst|d_v_enable_out~I .oe_sync_reset = "none";
6120 defparam \inst|d_v_enable_out~I .operation_mode = "output";
6121 defparam \inst|d_v_enable_out~I .output_async_reset = "none";
6122 defparam \inst|d_v_enable_out~I .output_power_up = "low";
6123 defparam \inst|d_v_enable_out~I .output_register_mode = "none";
6124 defparam \inst|d_v_enable_out~I .output_sync_reset = "none";
6125 // synopsys translate_on
6126
6127 // atom is at PIN_K3
6128 stratix_io \inst|d_state_clk_out~I (
6129         .datain(\inst1|altpll_component|_clk0 ),
6130         .ddiodatain(gnd),
6131         .oe(vcc),
6132         .outclk(gnd),
6133         .outclkena(vcc),
6134         .inclk(gnd),
6135         .inclkena(vcc),
6136         .areset(gnd),
6137         .sreset(gnd),
6138         .delayctrlin(gnd),
6139         .devclrn(devclrn),
6140         .devpor(devpor),
6141         .devoe(devoe),
6142         .combout(),
6143         .regout(),
6144         .ddioregout(),
6145         .padio(d_state_clk),
6146         .dqsundelayedout());
6147 // synopsys translate_off
6148 defparam \inst|d_state_clk_out~I .ddio_mode = "none";
6149 defparam \inst|d_state_clk_out~I .input_async_reset = "none";
6150 defparam \inst|d_state_clk_out~I .input_power_up = "low";
6151 defparam \inst|d_state_clk_out~I .input_register_mode = "none";
6152 defparam \inst|d_state_clk_out~I .input_sync_reset = "none";
6153 defparam \inst|d_state_clk_out~I .oe_async_reset = "none";
6154 defparam \inst|d_state_clk_out~I .oe_power_up = "low";
6155 defparam \inst|d_state_clk_out~I .oe_register_mode = "none";
6156 defparam \inst|d_state_clk_out~I .oe_sync_reset = "none";
6157 defparam \inst|d_state_clk_out~I .operation_mode = "output";
6158 defparam \inst|d_state_clk_out~I .output_async_reset = "none";
6159 defparam \inst|d_state_clk_out~I .output_power_up = "low";
6160 defparam \inst|d_state_clk_out~I .output_register_mode = "none";
6161 defparam \inst|d_state_clk_out~I .output_sync_reset = "none";
6162 // synopsys translate_on
6163
6164 // atom is at PIN_E22
6165 stratix_io \inst|r0_pin_out~I (
6166         .datain(\inst|vga_control_unit|r ),
6167         .ddiodatain(gnd),
6168         .oe(vcc),
6169         .outclk(gnd),
6170         .outclkena(vcc),
6171         .inclk(gnd),
6172         .inclkena(vcc),
6173         .areset(gnd),
6174         .sreset(gnd),
6175         .delayctrlin(gnd),
6176         .devclrn(devclrn),
6177         .devpor(devpor),
6178         .devoe(devoe),
6179         .combout(),
6180         .regout(),
6181         .ddioregout(),
6182         .padio(r0_pin),
6183         .dqsundelayedout());
6184 // synopsys translate_off
6185 defparam \inst|r0_pin_out~I .ddio_mode = "none";
6186 defparam \inst|r0_pin_out~I .input_async_reset = "none";
6187 defparam \inst|r0_pin_out~I .input_power_up = "low";
6188 defparam \inst|r0_pin_out~I .input_register_mode = "none";
6189 defparam \inst|r0_pin_out~I .input_sync_reset = "none";
6190 defparam \inst|r0_pin_out~I .oe_async_reset = "none";
6191 defparam \inst|r0_pin_out~I .oe_power_up = "low";
6192 defparam \inst|r0_pin_out~I .oe_register_mode = "none";
6193 defparam \inst|r0_pin_out~I .oe_sync_reset = "none";
6194 defparam \inst|r0_pin_out~I .operation_mode = "output";
6195 defparam \inst|r0_pin_out~I .output_async_reset = "none";
6196 defparam \inst|r0_pin_out~I .output_power_up = "low";
6197 defparam \inst|r0_pin_out~I .output_register_mode = "none";
6198 defparam \inst|r0_pin_out~I .output_sync_reset = "none";
6199 // synopsys translate_on
6200
6201 // atom is at PIN_T4
6202 stratix_io \inst|r1_pin_out~I (
6203         .datain(\inst|vga_control_unit|r ),
6204         .ddiodatain(gnd),
6205         .oe(vcc),
6206         .outclk(gnd),
6207         .outclkena(vcc),
6208         .inclk(gnd),
6209         .inclkena(vcc),
6210         .areset(gnd),
6211         .sreset(gnd),
6212         .delayctrlin(gnd),
6213         .devclrn(devclrn),
6214         .devpor(devpor),
6215         .devoe(devoe),
6216         .combout(),
6217         .regout(),
6218         .ddioregout(),
6219         .padio(r1_pin),
6220         .dqsundelayedout());
6221 // synopsys translate_off
6222 defparam \inst|r1_pin_out~I .ddio_mode = "none";
6223 defparam \inst|r1_pin_out~I .input_async_reset = "none";
6224 defparam \inst|r1_pin_out~I .input_power_up = "low";
6225 defparam \inst|r1_pin_out~I .input_register_mode = "none";
6226 defparam \inst|r1_pin_out~I .input_sync_reset = "none";
6227 defparam \inst|r1_pin_out~I .oe_async_reset = "none";
6228 defparam \inst|r1_pin_out~I .oe_power_up = "low";
6229 defparam \inst|r1_pin_out~I .oe_register_mode = "none";
6230 defparam \inst|r1_pin_out~I .oe_sync_reset = "none";
6231 defparam \inst|r1_pin_out~I .operation_mode = "output";
6232 defparam \inst|r1_pin_out~I .output_async_reset = "none";
6233 defparam \inst|r1_pin_out~I .output_power_up = "low";
6234 defparam \inst|r1_pin_out~I .output_register_mode = "none";
6235 defparam \inst|r1_pin_out~I .output_sync_reset = "none";
6236 // synopsys translate_on
6237
6238 // atom is at PIN_T7
6239 stratix_io \inst|r2_pin_out~I (
6240         .datain(\inst|vga_control_unit|r ),
6241         .ddiodatain(gnd),
6242         .oe(vcc),
6243         .outclk(gnd),
6244         .outclkena(vcc),
6245         .inclk(gnd),
6246         .inclkena(vcc),
6247         .areset(gnd),
6248         .sreset(gnd),
6249         .delayctrlin(gnd),
6250         .devclrn(devclrn),
6251         .devpor(devpor),
6252         .devoe(devoe),
6253         .combout(),
6254         .regout(),
6255         .ddioregout(),
6256         .padio(r2_pin),
6257         .dqsundelayedout());
6258 // synopsys translate_off
6259 defparam \inst|r2_pin_out~I .ddio_mode = "none";
6260 defparam \inst|r2_pin_out~I .input_async_reset = "none";
6261 defparam \inst|r2_pin_out~I .input_power_up = "low";
6262 defparam \inst|r2_pin_out~I .input_register_mode = "none";
6263 defparam \inst|r2_pin_out~I .input_sync_reset = "none";
6264 defparam \inst|r2_pin_out~I .oe_async_reset = "none";
6265 defparam \inst|r2_pin_out~I .oe_power_up = "low";
6266 defparam \inst|r2_pin_out~I .oe_register_mode = "none";
6267 defparam \inst|r2_pin_out~I .oe_sync_reset = "none";
6268 defparam \inst|r2_pin_out~I .operation_mode = "output";
6269 defparam \inst|r2_pin_out~I .output_async_reset = "none";
6270 defparam \inst|r2_pin_out~I .output_power_up = "low";
6271 defparam \inst|r2_pin_out~I .output_register_mode = "none";
6272 defparam \inst|r2_pin_out~I .output_sync_reset = "none";
6273 // synopsys translate_on
6274
6275 // atom is at PIN_E23
6276 stratix_io \inst|g0_pin_out~I (
6277         .datain(\inst|vga_control_unit|g ),
6278         .ddiodatain(gnd),
6279         .oe(vcc),
6280         .outclk(gnd),
6281         .outclkena(vcc),
6282         .inclk(gnd),
6283         .inclkena(vcc),
6284         .areset(gnd),
6285         .sreset(gnd),
6286         .delayctrlin(gnd),
6287         .devclrn(devclrn),
6288         .devpor(devpor),
6289         .devoe(devoe),
6290         .combout(),
6291         .regout(),
6292         .ddioregout(),
6293         .padio(g0_pin),
6294         .dqsundelayedout());
6295 // synopsys translate_off
6296 defparam \inst|g0_pin_out~I .ddio_mode = "none";
6297 defparam \inst|g0_pin_out~I .input_async_reset = "none";
6298 defparam \inst|g0_pin_out~I .input_power_up = "low";
6299 defparam \inst|g0_pin_out~I .input_register_mode = "none";
6300 defparam \inst|g0_pin_out~I .input_sync_reset = "none";
6301 defparam \inst|g0_pin_out~I .oe_async_reset = "none";
6302 defparam \inst|g0_pin_out~I .oe_power_up = "low";
6303 defparam \inst|g0_pin_out~I .oe_register_mode = "none";
6304 defparam \inst|g0_pin_out~I .oe_sync_reset = "none";
6305 defparam \inst|g0_pin_out~I .operation_mode = "output";
6306 defparam \inst|g0_pin_out~I .output_async_reset = "none";
6307 defparam \inst|g0_pin_out~I .output_power_up = "low";
6308 defparam \inst|g0_pin_out~I .output_register_mode = "none";
6309 defparam \inst|g0_pin_out~I .output_sync_reset = "none";
6310 // synopsys translate_on
6311
6312 // atom is at PIN_T5
6313 stratix_io \inst|g1_pin_out~I (
6314         .datain(\inst|vga_control_unit|g ),
6315         .ddiodatain(gnd),
6316         .oe(vcc),
6317         .outclk(gnd),
6318         .outclkena(vcc),
6319         .inclk(gnd),
6320         .inclkena(vcc),
6321         .areset(gnd),
6322         .sreset(gnd),
6323         .delayctrlin(gnd),
6324         .devclrn(devclrn),
6325         .devpor(devpor),
6326         .devoe(devoe),
6327         .combout(),
6328         .regout(),
6329         .ddioregout(),
6330         .padio(g1_pin),
6331         .dqsundelayedout());
6332 // synopsys translate_off
6333 defparam \inst|g1_pin_out~I .ddio_mode = "none";
6334 defparam \inst|g1_pin_out~I .input_async_reset = "none";
6335 defparam \inst|g1_pin_out~I .input_power_up = "low";
6336 defparam \inst|g1_pin_out~I .input_register_mode = "none";
6337 defparam \inst|g1_pin_out~I .input_sync_reset = "none";
6338 defparam \inst|g1_pin_out~I .oe_async_reset = "none";
6339 defparam \inst|g1_pin_out~I .oe_power_up = "low";
6340 defparam \inst|g1_pin_out~I .oe_register_mode = "none";
6341 defparam \inst|g1_pin_out~I .oe_sync_reset = "none";
6342 defparam \inst|g1_pin_out~I .operation_mode = "output";
6343 defparam \inst|g1_pin_out~I .output_async_reset = "none";
6344 defparam \inst|g1_pin_out~I .output_power_up = "low";
6345 defparam \inst|g1_pin_out~I .output_register_mode = "none";
6346 defparam \inst|g1_pin_out~I .output_sync_reset = "none";
6347 // synopsys translate_on
6348
6349 // atom is at PIN_T24
6350 stratix_io \inst|g2_pin_out~I (
6351         .datain(\inst|vga_control_unit|g ),
6352         .ddiodatain(gnd),
6353         .oe(vcc),
6354         .outclk(gnd),
6355         .outclkena(vcc),
6356         .inclk(gnd),
6357         .inclkena(vcc),
6358         .areset(gnd),
6359         .sreset(gnd),
6360         .delayctrlin(gnd),
6361         .devclrn(devclrn),
6362         .devpor(devpor),
6363         .devoe(devoe),
6364         .combout(),
6365         .regout(),
6366         .ddioregout(),
6367         .padio(g2_pin),
6368         .dqsundelayedout());
6369 // synopsys translate_off
6370 defparam \inst|g2_pin_out~I .ddio_mode = "none";
6371 defparam \inst|g2_pin_out~I .input_async_reset = "none";
6372 defparam \inst|g2_pin_out~I .input_power_up = "low";
6373 defparam \inst|g2_pin_out~I .input_register_mode = "none";
6374 defparam \inst|g2_pin_out~I .input_sync_reset = "none";
6375 defparam \inst|g2_pin_out~I .oe_async_reset = "none";
6376 defparam \inst|g2_pin_out~I .oe_power_up = "low";
6377 defparam \inst|g2_pin_out~I .oe_register_mode = "none";
6378 defparam \inst|g2_pin_out~I .oe_sync_reset = "none";
6379 defparam \inst|g2_pin_out~I .operation_mode = "output";
6380 defparam \inst|g2_pin_out~I .output_async_reset = "none";
6381 defparam \inst|g2_pin_out~I .output_power_up = "low";
6382 defparam \inst|g2_pin_out~I .output_register_mode = "none";
6383 defparam \inst|g2_pin_out~I .output_sync_reset = "none";
6384 // synopsys translate_on
6385
6386 // atom is at PIN_E24
6387 stratix_io \inst|b0_pin_out~I (
6388         .datain(\inst|vga_control_unit|b ),
6389         .ddiodatain(gnd),
6390         .oe(vcc),
6391         .outclk(gnd),
6392         .outclkena(vcc),
6393         .inclk(gnd),
6394         .inclkena(vcc),
6395         .areset(gnd),
6396         .sreset(gnd),
6397         .delayctrlin(gnd),
6398         .devclrn(devclrn),
6399         .devpor(devpor),
6400         .devoe(devoe),
6401         .combout(),
6402         .regout(),
6403         .ddioregout(),
6404         .padio(b0_pin),
6405         .dqsundelayedout());
6406 // synopsys translate_off
6407 defparam \inst|b0_pin_out~I .ddio_mode = "none";
6408 defparam \inst|b0_pin_out~I .input_async_reset = "none";
6409 defparam \inst|b0_pin_out~I .input_power_up = "low";
6410 defparam \inst|b0_pin_out~I .input_register_mode = "none";
6411 defparam \inst|b0_pin_out~I .input_sync_reset = "none";
6412 defparam \inst|b0_pin_out~I .oe_async_reset = "none";
6413 defparam \inst|b0_pin_out~I .oe_power_up = "low";
6414 defparam \inst|b0_pin_out~I .oe_register_mode = "none";
6415 defparam \inst|b0_pin_out~I .oe_sync_reset = "none";
6416 defparam \inst|b0_pin_out~I .operation_mode = "output";
6417 defparam \inst|b0_pin_out~I .output_async_reset = "none";
6418 defparam \inst|b0_pin_out~I .output_power_up = "low";
6419 defparam \inst|b0_pin_out~I .output_register_mode = "none";
6420 defparam \inst|b0_pin_out~I .output_sync_reset = "none";
6421 // synopsys translate_on
6422
6423 // atom is at PIN_T6
6424 stratix_io \inst|b1_pin_out~I (
6425         .datain(\inst|vga_control_unit|b ),
6426         .ddiodatain(gnd),
6427         .oe(vcc),
6428         .outclk(gnd),
6429         .outclkena(vcc),
6430         .inclk(gnd),
6431         .inclkena(vcc),
6432         .areset(gnd),
6433         .sreset(gnd),
6434         .delayctrlin(gnd),
6435         .devclrn(devclrn),
6436         .devpor(devpor),
6437         .devoe(devoe),
6438         .combout(),
6439         .regout(),
6440         .ddioregout(),
6441         .padio(b1_pin),
6442         .dqsundelayedout());
6443 // synopsys translate_off
6444 defparam \inst|b1_pin_out~I .ddio_mode = "none";
6445 defparam \inst|b1_pin_out~I .input_async_reset = "none";
6446 defparam \inst|b1_pin_out~I .input_power_up = "low";
6447 defparam \inst|b1_pin_out~I .input_register_mode = "none";
6448 defparam \inst|b1_pin_out~I .input_sync_reset = "none";
6449 defparam \inst|b1_pin_out~I .oe_async_reset = "none";
6450 defparam \inst|b1_pin_out~I .oe_power_up = "low";
6451 defparam \inst|b1_pin_out~I .oe_register_mode = "none";
6452 defparam \inst|b1_pin_out~I .oe_sync_reset = "none";
6453 defparam \inst|b1_pin_out~I .operation_mode = "output";
6454 defparam \inst|b1_pin_out~I .output_async_reset = "none";
6455 defparam \inst|b1_pin_out~I .output_power_up = "low";
6456 defparam \inst|b1_pin_out~I .output_register_mode = "none";
6457 defparam \inst|b1_pin_out~I .output_sync_reset = "none";
6458 // synopsys translate_on
6459
6460 // atom is at PIN_F1
6461 stratix_io \inst|hsync_pin_out~I (
6462         .datain(\inst|vga_driver_unit|h_sync ),
6463         .ddiodatain(gnd),
6464         .oe(vcc),
6465         .outclk(gnd),
6466         .outclkena(vcc),
6467         .inclk(gnd),
6468         .inclkena(vcc),
6469         .areset(gnd),
6470         .sreset(gnd),
6471         .delayctrlin(gnd),
6472         .devclrn(devclrn),
6473         .devpor(devpor),
6474         .devoe(devoe),
6475         .combout(),
6476         .regout(),
6477         .ddioregout(),
6478         .padio(hsync_pin),
6479         .dqsundelayedout());
6480 // synopsys translate_off
6481 defparam \inst|hsync_pin_out~I .ddio_mode = "none";
6482 defparam \inst|hsync_pin_out~I .input_async_reset = "none";
6483 defparam \inst|hsync_pin_out~I .input_power_up = "low";
6484 defparam \inst|hsync_pin_out~I .input_register_mode = "none";
6485 defparam \inst|hsync_pin_out~I .input_sync_reset = "none";
6486 defparam \inst|hsync_pin_out~I .oe_async_reset = "none";
6487 defparam \inst|hsync_pin_out~I .oe_power_up = "low";
6488 defparam \inst|hsync_pin_out~I .oe_register_mode = "none";
6489 defparam \inst|hsync_pin_out~I .oe_sync_reset = "none";
6490 defparam \inst|hsync_pin_out~I .operation_mode = "output";
6491 defparam \inst|hsync_pin_out~I .output_async_reset = "none";
6492 defparam \inst|hsync_pin_out~I .output_power_up = "low";
6493 defparam \inst|hsync_pin_out~I .output_register_mode = "none";
6494 defparam \inst|hsync_pin_out~I .output_sync_reset = "none";
6495 // synopsys translate_on
6496
6497 // atom is at PIN_F2
6498 stratix_io \inst|vsync_pin_out~I (
6499         .datain(\inst|vga_driver_unit|v_sync ),
6500         .ddiodatain(gnd),
6501         .oe(vcc),
6502         .outclk(gnd),
6503         .outclkena(vcc),
6504         .inclk(gnd),
6505         .inclkena(vcc),
6506         .areset(gnd),
6507         .sreset(gnd),
6508         .delayctrlin(gnd),
6509         .devclrn(devclrn),
6510         .devpor(devpor),
6511         .devoe(devoe),
6512         .combout(),
6513         .regout(),
6514         .ddioregout(),
6515         .padio(vsync_pin),
6516         .dqsundelayedout());
6517 // synopsys translate_off
6518 defparam \inst|vsync_pin_out~I .ddio_mode = "none";
6519 defparam \inst|vsync_pin_out~I .input_async_reset = "none";
6520 defparam \inst|vsync_pin_out~I .input_power_up = "low";
6521 defparam \inst|vsync_pin_out~I .input_register_mode = "none";
6522 defparam \inst|vsync_pin_out~I .input_sync_reset = "none";
6523 defparam \inst|vsync_pin_out~I .oe_async_reset = "none";
6524 defparam \inst|vsync_pin_out~I .oe_power_up = "low";
6525 defparam \inst|vsync_pin_out~I .oe_register_mode = "none";
6526 defparam \inst|vsync_pin_out~I .oe_sync_reset = "none";
6527 defparam \inst|vsync_pin_out~I .operation_mode = "output";
6528 defparam \inst|vsync_pin_out~I .output_async_reset = "none";
6529 defparam \inst|vsync_pin_out~I .output_power_up = "low";
6530 defparam \inst|vsync_pin_out~I .output_register_mode = "none";
6531 defparam \inst|vsync_pin_out~I .output_sync_reset = "none";
6532 // synopsys translate_on
6533
6534 // atom is at PIN_K5
6535 stratix_io \inst|d_column_counter_out_9_~I (
6536         .datain(\inst|vga_driver_unit|column_counter_sig_9 ),
6537         .ddiodatain(gnd),
6538         .oe(vcc),
6539         .outclk(gnd),
6540         .outclkena(vcc),
6541         .inclk(gnd),
6542         .inclkena(vcc),
6543         .areset(gnd),
6544         .sreset(gnd),
6545         .delayctrlin(gnd),
6546         .devclrn(devclrn),
6547         .devpor(devpor),
6548         .devoe(devoe),
6549         .combout(),
6550         .regout(),
6551         .ddioregout(),
6552         .padio(d_column_counter[9]),
6553         .dqsundelayedout());
6554 // synopsys translate_off
6555 defparam \inst|d_column_counter_out_9_~I .ddio_mode = "none";
6556 defparam \inst|d_column_counter_out_9_~I .input_async_reset = "none";
6557 defparam \inst|d_column_counter_out_9_~I .input_power_up = "low";
6558 defparam \inst|d_column_counter_out_9_~I .input_register_mode = "none";
6559 defparam \inst|d_column_counter_out_9_~I .input_sync_reset = "none";
6560 defparam \inst|d_column_counter_out_9_~I .oe_async_reset = "none";
6561 defparam \inst|d_column_counter_out_9_~I .oe_power_up = "low";
6562 defparam \inst|d_column_counter_out_9_~I .oe_register_mode = "none";
6563 defparam \inst|d_column_counter_out_9_~I .oe_sync_reset = "none";
6564 defparam \inst|d_column_counter_out_9_~I .operation_mode = "output";
6565 defparam \inst|d_column_counter_out_9_~I .output_async_reset = "none";
6566 defparam \inst|d_column_counter_out_9_~I .output_power_up = "low";
6567 defparam \inst|d_column_counter_out_9_~I .output_register_mode = "none";
6568 defparam \inst|d_column_counter_out_9_~I .output_sync_reset = "none";
6569 // synopsys translate_on
6570
6571 // atom is at PIN_K19
6572 stratix_io \inst|d_column_counter_out_8_~I (
6573         .datain(\inst|vga_driver_unit|column_counter_sig_8 ),
6574         .ddiodatain(gnd),
6575         .oe(vcc),
6576         .outclk(gnd),
6577         .outclkena(vcc),
6578         .inclk(gnd),
6579         .inclkena(vcc),
6580         .areset(gnd),
6581         .sreset(gnd),
6582         .delayctrlin(gnd),
6583         .devclrn(devclrn),
6584         .devpor(devpor),
6585         .devoe(devoe),
6586         .combout(),
6587         .regout(),
6588         .ddioregout(),
6589         .padio(d_column_counter[8]),
6590         .dqsundelayedout());
6591 // synopsys translate_off
6592 defparam \inst|d_column_counter_out_8_~I .ddio_mode = "none";
6593 defparam \inst|d_column_counter_out_8_~I .input_async_reset = "none";
6594 defparam \inst|d_column_counter_out_8_~I .input_power_up = "low";
6595 defparam \inst|d_column_counter_out_8_~I .input_register_mode = "none";
6596 defparam \inst|d_column_counter_out_8_~I .input_sync_reset = "none";
6597 defparam \inst|d_column_counter_out_8_~I .oe_async_reset = "none";
6598 defparam \inst|d_column_counter_out_8_~I .oe_power_up = "low";
6599 defparam \inst|d_column_counter_out_8_~I .oe_register_mode = "none";
6600 defparam \inst|d_column_counter_out_8_~I .oe_sync_reset = "none";
6601 defparam \inst|d_column_counter_out_8_~I .operation_mode = "output";
6602 defparam \inst|d_column_counter_out_8_~I .output_async_reset = "none";
6603 defparam \inst|d_column_counter_out_8_~I .output_power_up = "low";
6604 defparam \inst|d_column_counter_out_8_~I .output_register_mode = "none";
6605 defparam \inst|d_column_counter_out_8_~I .output_sync_reset = "none";
6606 // synopsys translate_on
6607
6608 // atom is at PIN_K23
6609 stratix_io \inst|d_column_counter_out_7_~I (
6610         .datain(\inst|vga_driver_unit|column_counter_sig_7 ),
6611         .ddiodatain(gnd),
6612         .oe(vcc),
6613         .outclk(gnd),
6614         .outclkena(vcc),
6615         .inclk(gnd),
6616         .inclkena(vcc),
6617         .areset(gnd),
6618         .sreset(gnd),
6619         .delayctrlin(gnd),
6620         .devclrn(devclrn),
6621         .devpor(devpor),
6622         .devoe(devoe),
6623         .combout(),
6624         .regout(),
6625         .ddioregout(),
6626         .padio(d_column_counter[7]),
6627         .dqsundelayedout());
6628 // synopsys translate_off
6629 defparam \inst|d_column_counter_out_7_~I .ddio_mode = "none";
6630 defparam \inst|d_column_counter_out_7_~I .input_async_reset = "none";
6631 defparam \inst|d_column_counter_out_7_~I .input_power_up = "low";
6632 defparam \inst|d_column_counter_out_7_~I .input_register_mode = "none";
6633 defparam \inst|d_column_counter_out_7_~I .input_sync_reset = "none";
6634 defparam \inst|d_column_counter_out_7_~I .oe_async_reset = "none";
6635 defparam \inst|d_column_counter_out_7_~I .oe_power_up = "low";
6636 defparam \inst|d_column_counter_out_7_~I .oe_register_mode = "none";
6637 defparam \inst|d_column_counter_out_7_~I .oe_sync_reset = "none";
6638 defparam \inst|d_column_counter_out_7_~I .operation_mode = "output";
6639 defparam \inst|d_column_counter_out_7_~I .output_async_reset = "none";
6640 defparam \inst|d_column_counter_out_7_~I .output_power_up = "low";
6641 defparam \inst|d_column_counter_out_7_~I .output_register_mode = "none";
6642 defparam \inst|d_column_counter_out_7_~I .output_sync_reset = "none";
6643 // synopsys translate_on
6644
6645 // atom is at PIN_L2
6646 stratix_io \inst|d_column_counter_out_6_~I (
6647         .datain(\inst|vga_driver_unit|column_counter_sig_6 ),
6648         .ddiodatain(gnd),
6649         .oe(vcc),
6650         .outclk(gnd),
6651         .outclkena(vcc),
6652         .inclk(gnd),
6653         .inclkena(vcc),
6654         .areset(gnd),
6655         .sreset(gnd),
6656         .delayctrlin(gnd),
6657         .devclrn(devclrn),
6658         .devpor(devpor),
6659         .devoe(devoe),
6660         .combout(),
6661         .regout(),
6662         .ddioregout(),
6663         .padio(d_column_counter[6]),
6664         .dqsundelayedout());
6665 // synopsys translate_off
6666 defparam \inst|d_column_counter_out_6_~I .ddio_mode = "none";
6667 defparam \inst|d_column_counter_out_6_~I .input_async_reset = "none";
6668 defparam \inst|d_column_counter_out_6_~I .input_power_up = "low";
6669 defparam \inst|d_column_counter_out_6_~I .input_register_mode = "none";
6670 defparam \inst|d_column_counter_out_6_~I .input_sync_reset = "none";
6671 defparam \inst|d_column_counter_out_6_~I .oe_async_reset = "none";
6672 defparam \inst|d_column_counter_out_6_~I .oe_power_up = "low";
6673 defparam \inst|d_column_counter_out_6_~I .oe_register_mode = "none";
6674 defparam \inst|d_column_counter_out_6_~I .oe_sync_reset = "none";
6675 defparam \inst|d_column_counter_out_6_~I .operation_mode = "output";
6676 defparam \inst|d_column_counter_out_6_~I .output_async_reset = "none";
6677 defparam \inst|d_column_counter_out_6_~I .output_power_up = "low";
6678 defparam \inst|d_column_counter_out_6_~I .output_register_mode = "none";
6679 defparam \inst|d_column_counter_out_6_~I .output_sync_reset = "none";
6680 // synopsys translate_on
6681
6682 // atom is at PIN_L4
6683 stratix_io \inst|d_column_counter_out_5_~I (
6684         .datain(\inst|vga_driver_unit|column_counter_sig_5 ),
6685         .ddiodatain(gnd),
6686         .oe(vcc),
6687         .outclk(gnd),
6688         .outclkena(vcc),
6689         .inclk(gnd),
6690         .inclkena(vcc),
6691         .areset(gnd),
6692         .sreset(gnd),
6693         .delayctrlin(gnd),
6694         .devclrn(devclrn),
6695         .devpor(devpor),
6696         .devoe(devoe),
6697         .combout(),
6698         .regout(),
6699         .ddioregout(),
6700         .padio(d_column_counter[5]),
6701         .dqsundelayedout());
6702 // synopsys translate_off
6703 defparam \inst|d_column_counter_out_5_~I .ddio_mode = "none";
6704 defparam \inst|d_column_counter_out_5_~I .input_async_reset = "none";
6705 defparam \inst|d_column_counter_out_5_~I .input_power_up = "low";
6706 defparam \inst|d_column_counter_out_5_~I .input_register_mode = "none";
6707 defparam \inst|d_column_counter_out_5_~I .input_sync_reset = "none";
6708 defparam \inst|d_column_counter_out_5_~I .oe_async_reset = "none";
6709 defparam \inst|d_column_counter_out_5_~I .oe_power_up = "low";
6710 defparam \inst|d_column_counter_out_5_~I .oe_register_mode = "none";
6711 defparam \inst|d_column_counter_out_5_~I .oe_sync_reset = "none";
6712 defparam \inst|d_column_counter_out_5_~I .operation_mode = "output";
6713 defparam \inst|d_column_counter_out_5_~I .output_async_reset = "none";
6714 defparam \inst|d_column_counter_out_5_~I .output_power_up = "low";
6715 defparam \inst|d_column_counter_out_5_~I .output_register_mode = "none";
6716 defparam \inst|d_column_counter_out_5_~I .output_sync_reset = "none";
6717 // synopsys translate_on
6718
6719 // atom is at PIN_L6
6720 stratix_io \inst|d_column_counter_out_4_~I (
6721         .datain(\inst|vga_driver_unit|column_counter_sig_4 ),
6722         .ddiodatain(gnd),
6723         .oe(vcc),
6724         .outclk(gnd),
6725         .outclkena(vcc),
6726         .inclk(gnd),
6727         .inclkena(vcc),
6728         .areset(gnd),
6729         .sreset(gnd),
6730         .delayctrlin(gnd),
6731         .devclrn(devclrn),
6732         .devpor(devpor),
6733         .devoe(devoe),
6734         .combout(),
6735         .regout(),
6736         .ddioregout(),
6737         .padio(d_column_counter[4]),
6738         .dqsundelayedout());
6739 // synopsys translate_off
6740 defparam \inst|d_column_counter_out_4_~I .ddio_mode = "none";
6741 defparam \inst|d_column_counter_out_4_~I .input_async_reset = "none";
6742 defparam \inst|d_column_counter_out_4_~I .input_power_up = "low";
6743 defparam \inst|d_column_counter_out_4_~I .input_register_mode = "none";
6744 defparam \inst|d_column_counter_out_4_~I .input_sync_reset = "none";
6745 defparam \inst|d_column_counter_out_4_~I .oe_async_reset = "none";
6746 defparam \inst|d_column_counter_out_4_~I .oe_power_up = "low";
6747 defparam \inst|d_column_counter_out_4_~I .oe_register_mode = "none";
6748 defparam \inst|d_column_counter_out_4_~I .oe_sync_reset = "none";
6749 defparam \inst|d_column_counter_out_4_~I .operation_mode = "output";
6750 defparam \inst|d_column_counter_out_4_~I .output_async_reset = "none";
6751 defparam \inst|d_column_counter_out_4_~I .output_power_up = "low";
6752 defparam \inst|d_column_counter_out_4_~I .output_register_mode = "none";
6753 defparam \inst|d_column_counter_out_4_~I .output_sync_reset = "none";
6754 // synopsys translate_on
6755
6756 // atom is at PIN_L20
6757 stratix_io \inst|d_column_counter_out_3_~I (
6758         .datain(\inst|vga_driver_unit|column_counter_sig_3 ),
6759         .ddiodatain(gnd),
6760         .oe(vcc),
6761         .outclk(gnd),
6762         .outclkena(vcc),
6763         .inclk(gnd),
6764         .inclkena(vcc),
6765         .areset(gnd),
6766         .sreset(gnd),
6767         .delayctrlin(gnd),
6768         .devclrn(devclrn),
6769         .devpor(devpor),
6770         .devoe(devoe),
6771         .combout(),
6772         .regout(),
6773         .ddioregout(),
6774         .padio(d_column_counter[3]),
6775         .dqsundelayedout());
6776 // synopsys translate_off
6777 defparam \inst|d_column_counter_out_3_~I .ddio_mode = "none";
6778 defparam \inst|d_column_counter_out_3_~I .input_async_reset = "none";
6779 defparam \inst|d_column_counter_out_3_~I .input_power_up = "low";
6780 defparam \inst|d_column_counter_out_3_~I .input_register_mode = "none";
6781 defparam \inst|d_column_counter_out_3_~I .input_sync_reset = "none";
6782 defparam \inst|d_column_counter_out_3_~I .oe_async_reset = "none";
6783 defparam \inst|d_column_counter_out_3_~I .oe_power_up = "low";
6784 defparam \inst|d_column_counter_out_3_~I .oe_register_mode = "none";
6785 defparam \inst|d_column_counter_out_3_~I .oe_sync_reset = "none";
6786 defparam \inst|d_column_counter_out_3_~I .operation_mode = "output";
6787 defparam \inst|d_column_counter_out_3_~I .output_async_reset = "none";
6788 defparam \inst|d_column_counter_out_3_~I .output_power_up = "low";
6789 defparam \inst|d_column_counter_out_3_~I .output_register_mode = "none";
6790 defparam \inst|d_column_counter_out_3_~I .output_sync_reset = "none";
6791 // synopsys translate_on
6792
6793 // atom is at PIN_L21
6794 stratix_io \inst|d_column_counter_out_2_~I (
6795         .datain(\inst|vga_driver_unit|column_counter_sig_2 ),
6796         .ddiodatain(gnd),
6797         .oe(vcc),
6798         .outclk(gnd),
6799         .outclkena(vcc),
6800         .inclk(gnd),
6801         .inclkena(vcc),
6802         .areset(gnd),
6803         .sreset(gnd),
6804         .delayctrlin(gnd),
6805         .devclrn(devclrn),
6806         .devpor(devpor),
6807         .devoe(devoe),
6808         .combout(),
6809         .regout(),
6810         .ddioregout(),
6811         .padio(d_column_counter[2]),
6812         .dqsundelayedout());
6813 // synopsys translate_off
6814 defparam \inst|d_column_counter_out_2_~I .ddio_mode = "none";
6815 defparam \inst|d_column_counter_out_2_~I .input_async_reset = "none";
6816 defparam \inst|d_column_counter_out_2_~I .input_power_up = "low";
6817 defparam \inst|d_column_counter_out_2_~I .input_register_mode = "none";
6818 defparam \inst|d_column_counter_out_2_~I .input_sync_reset = "none";
6819 defparam \inst|d_column_counter_out_2_~I .oe_async_reset = "none";
6820 defparam \inst|d_column_counter_out_2_~I .oe_power_up = "low";
6821 defparam \inst|d_column_counter_out_2_~I .oe_register_mode = "none";
6822 defparam \inst|d_column_counter_out_2_~I .oe_sync_reset = "none";
6823 defparam \inst|d_column_counter_out_2_~I .operation_mode = "output";
6824 defparam \inst|d_column_counter_out_2_~I .output_async_reset = "none";
6825 defparam \inst|d_column_counter_out_2_~I .output_power_up = "low";
6826 defparam \inst|d_column_counter_out_2_~I .output_register_mode = "none";
6827 defparam \inst|d_column_counter_out_2_~I .output_sync_reset = "none";
6828 // synopsys translate_on
6829
6830 // atom is at PIN_L22
6831 stratix_io \inst|d_column_counter_out_1_~I (
6832         .datain(\inst|vga_driver_unit|column_counter_sig_1 ),
6833         .ddiodatain(gnd),
6834         .oe(vcc),
6835         .outclk(gnd),
6836         .outclkena(vcc),
6837         .inclk(gnd),
6838         .inclkena(vcc),
6839         .areset(gnd),
6840         .sreset(gnd),
6841         .delayctrlin(gnd),
6842         .devclrn(devclrn),
6843         .devpor(devpor),
6844         .devoe(devoe),
6845         .combout(),
6846         .regout(),
6847         .ddioregout(),
6848         .padio(d_column_counter[1]),
6849         .dqsundelayedout());
6850 // synopsys translate_off
6851 defparam \inst|d_column_counter_out_1_~I .ddio_mode = "none";
6852 defparam \inst|d_column_counter_out_1_~I .input_async_reset = "none";
6853 defparam \inst|d_column_counter_out_1_~I .input_power_up = "low";
6854 defparam \inst|d_column_counter_out_1_~I .input_register_mode = "none";
6855 defparam \inst|d_column_counter_out_1_~I .input_sync_reset = "none";
6856 defparam \inst|d_column_counter_out_1_~I .oe_async_reset = "none";
6857 defparam \inst|d_column_counter_out_1_~I .oe_power_up = "low";
6858 defparam \inst|d_column_counter_out_1_~I .oe_register_mode = "none";
6859 defparam \inst|d_column_counter_out_1_~I .oe_sync_reset = "none";
6860 defparam \inst|d_column_counter_out_1_~I .operation_mode = "output";
6861 defparam \inst|d_column_counter_out_1_~I .output_async_reset = "none";
6862 defparam \inst|d_column_counter_out_1_~I .output_power_up = "low";
6863 defparam \inst|d_column_counter_out_1_~I .output_register_mode = "none";
6864 defparam \inst|d_column_counter_out_1_~I .output_sync_reset = "none";
6865 // synopsys translate_on
6866
6867 // atom is at PIN_L23
6868 stratix_io \inst|d_column_counter_out_0_~I (
6869         .datain(\inst|vga_driver_unit|column_counter_sig_0 ),
6870         .ddiodatain(gnd),
6871         .oe(vcc),
6872         .outclk(gnd),
6873         .outclkena(vcc),
6874         .inclk(gnd),
6875         .inclkena(vcc),
6876         .areset(gnd),
6877         .sreset(gnd),
6878         .delayctrlin(gnd),
6879         .devclrn(devclrn),
6880         .devpor(devpor),
6881         .devoe(devoe),
6882         .combout(),
6883         .regout(),
6884         .ddioregout(),
6885         .padio(d_column_counter[0]),
6886         .dqsundelayedout());
6887 // synopsys translate_off
6888 defparam \inst|d_column_counter_out_0_~I .ddio_mode = "none";
6889 defparam \inst|d_column_counter_out_0_~I .input_async_reset = "none";
6890 defparam \inst|d_column_counter_out_0_~I .input_power_up = "low";
6891 defparam \inst|d_column_counter_out_0_~I .input_register_mode = "none";
6892 defparam \inst|d_column_counter_out_0_~I .input_sync_reset = "none";
6893 defparam \inst|d_column_counter_out_0_~I .oe_async_reset = "none";
6894 defparam \inst|d_column_counter_out_0_~I .oe_power_up = "low";
6895 defparam \inst|d_column_counter_out_0_~I .oe_register_mode = "none";
6896 defparam \inst|d_column_counter_out_0_~I .oe_sync_reset = "none";
6897 defparam \inst|d_column_counter_out_0_~I .operation_mode = "output";
6898 defparam \inst|d_column_counter_out_0_~I .output_async_reset = "none";
6899 defparam \inst|d_column_counter_out_0_~I .output_power_up = "low";
6900 defparam \inst|d_column_counter_out_0_~I .output_register_mode = "none";
6901 defparam \inst|d_column_counter_out_0_~I .output_sync_reset = "none";
6902 // synopsys translate_on
6903
6904 // atom is at PIN_G18
6905 stratix_io \inst|d_hsync_counter_out_9_~I (
6906         .datain(\inst|vga_driver_unit|hsync_counter_9 ),
6907         .ddiodatain(gnd),
6908         .oe(vcc),
6909         .outclk(gnd),
6910         .outclkena(vcc),
6911         .inclk(gnd),
6912         .inclkena(vcc),
6913         .areset(gnd),
6914         .sreset(gnd),
6915         .delayctrlin(gnd),
6916         .devclrn(devclrn),
6917         .devpor(devpor),
6918         .devoe(devoe),
6919         .combout(),
6920         .regout(),
6921         .ddioregout(),
6922         .padio(d_hsync_counter[9]),
6923         .dqsundelayedout());
6924 // synopsys translate_off
6925 defparam \inst|d_hsync_counter_out_9_~I .ddio_mode = "none";
6926 defparam \inst|d_hsync_counter_out_9_~I .input_async_reset = "none";
6927 defparam \inst|d_hsync_counter_out_9_~I .input_power_up = "low";
6928 defparam \inst|d_hsync_counter_out_9_~I .input_register_mode = "none";
6929 defparam \inst|d_hsync_counter_out_9_~I .input_sync_reset = "none";
6930 defparam \inst|d_hsync_counter_out_9_~I .oe_async_reset = "none";
6931 defparam \inst|d_hsync_counter_out_9_~I .oe_power_up = "low";
6932 defparam \inst|d_hsync_counter_out_9_~I .oe_register_mode = "none";
6933 defparam \inst|d_hsync_counter_out_9_~I .oe_sync_reset = "none";
6934 defparam \inst|d_hsync_counter_out_9_~I .operation_mode = "output";
6935 defparam \inst|d_hsync_counter_out_9_~I .output_async_reset = "none";
6936 defparam \inst|d_hsync_counter_out_9_~I .output_power_up = "low";
6937 defparam \inst|d_hsync_counter_out_9_~I .output_register_mode = "none";
6938 defparam \inst|d_hsync_counter_out_9_~I .output_sync_reset = "none";
6939 // synopsys translate_on
6940
6941 // atom is at PIN_G22
6942 stratix_io \inst|d_hsync_counter_out_8_~I (
6943         .datain(\inst|vga_driver_unit|hsync_counter_8 ),
6944         .ddiodatain(gnd),
6945         .oe(vcc),
6946         .outclk(gnd),
6947         .outclkena(vcc),
6948         .inclk(gnd),
6949         .inclkena(vcc),
6950         .areset(gnd),
6951         .sreset(gnd),
6952         .delayctrlin(gnd),
6953         .devclrn(devclrn),
6954         .devpor(devpor),
6955         .devoe(devoe),
6956         .combout(),
6957         .regout(),
6958         .ddioregout(),
6959         .padio(d_hsync_counter[8]),
6960         .dqsundelayedout());
6961 // synopsys translate_off
6962 defparam \inst|d_hsync_counter_out_8_~I .ddio_mode = "none";
6963 defparam \inst|d_hsync_counter_out_8_~I .input_async_reset = "none";
6964 defparam \inst|d_hsync_counter_out_8_~I .input_power_up = "low";
6965 defparam \inst|d_hsync_counter_out_8_~I .input_register_mode = "none";
6966 defparam \inst|d_hsync_counter_out_8_~I .input_sync_reset = "none";
6967 defparam \inst|d_hsync_counter_out_8_~I .oe_async_reset = "none";
6968 defparam \inst|d_hsync_counter_out_8_~I .oe_power_up = "low";
6969 defparam \inst|d_hsync_counter_out_8_~I .oe_register_mode = "none";
6970 defparam \inst|d_hsync_counter_out_8_~I .oe_sync_reset = "none";
6971 defparam \inst|d_hsync_counter_out_8_~I .operation_mode = "output";
6972 defparam \inst|d_hsync_counter_out_8_~I .output_async_reset = "none";
6973 defparam \inst|d_hsync_counter_out_8_~I .output_power_up = "low";
6974 defparam \inst|d_hsync_counter_out_8_~I .output_register_mode = "none";
6975 defparam \inst|d_hsync_counter_out_8_~I .output_sync_reset = "none";
6976 // synopsys translate_on
6977
6978 // atom is at PIN_G25
6979 stratix_io \inst|d_hsync_counter_out_7_~I (
6980         .datain(\inst|vga_driver_unit|hsync_counter_7 ),
6981         .ddiodatain(gnd),
6982         .oe(vcc),
6983         .outclk(gnd),
6984         .outclkena(vcc),
6985         .inclk(gnd),
6986         .inclkena(vcc),
6987         .areset(gnd),
6988         .sreset(gnd),
6989         .delayctrlin(gnd),
6990         .devclrn(devclrn),
6991         .devpor(devpor),
6992         .devoe(devoe),
6993         .combout(),
6994         .regout(),
6995         .ddioregout(),
6996         .padio(d_hsync_counter[7]),
6997         .dqsundelayedout());
6998 // synopsys translate_off
6999 defparam \inst|d_hsync_counter_out_7_~I .ddio_mode = "none";
7000 defparam \inst|d_hsync_counter_out_7_~I .input_async_reset = "none";
7001 defparam \inst|d_hsync_counter_out_7_~I .input_power_up = "low";
7002 defparam \inst|d_hsync_counter_out_7_~I .input_register_mode = "none";
7003 defparam \inst|d_hsync_counter_out_7_~I .input_sync_reset = "none";
7004 defparam \inst|d_hsync_counter_out_7_~I .oe_async_reset = "none";
7005 defparam \inst|d_hsync_counter_out_7_~I .oe_power_up = "low";
7006 defparam \inst|d_hsync_counter_out_7_~I .oe_register_mode = "none";
7007 defparam \inst|d_hsync_counter_out_7_~I .oe_sync_reset = "none";
7008 defparam \inst|d_hsync_counter_out_7_~I .operation_mode = "output";
7009 defparam \inst|d_hsync_counter_out_7_~I .output_async_reset = "none";
7010 defparam \inst|d_hsync_counter_out_7_~I .output_power_up = "low";
7011 defparam \inst|d_hsync_counter_out_7_~I .output_register_mode = "none";
7012 defparam \inst|d_hsync_counter_out_7_~I .output_sync_reset = "none";
7013 // synopsys translate_on
7014
7015 // atom is at PIN_A17
7016 stratix_io \inst|d_hsync_counter_out_6_~I (
7017         .datain(\inst|vga_driver_unit|hsync_counter_6 ),
7018         .ddiodatain(gnd),
7019         .oe(vcc),
7020         .outclk(gnd),
7021         .outclkena(vcc),
7022         .inclk(gnd),
7023         .inclkena(vcc),
7024         .areset(gnd),
7025         .sreset(gnd),
7026         .delayctrlin(gnd),
7027         .devclrn(devclrn),
7028         .devpor(devpor),
7029         .devoe(devoe),
7030         .combout(),
7031         .regout(),
7032         .ddioregout(),
7033         .padio(d_hsync_counter[6]),
7034         .dqsundelayedout());
7035 // synopsys translate_off
7036 defparam \inst|d_hsync_counter_out_6_~I .ddio_mode = "none";
7037 defparam \inst|d_hsync_counter_out_6_~I .input_async_reset = "none";
7038 defparam \inst|d_hsync_counter_out_6_~I .input_power_up = "low";
7039 defparam \inst|d_hsync_counter_out_6_~I .input_register_mode = "none";
7040 defparam \inst|d_hsync_counter_out_6_~I .input_sync_reset = "none";
7041 defparam \inst|d_hsync_counter_out_6_~I .oe_async_reset = "none";
7042 defparam \inst|d_hsync_counter_out_6_~I .oe_power_up = "low";
7043 defparam \inst|d_hsync_counter_out_6_~I .oe_register_mode = "none";
7044 defparam \inst|d_hsync_counter_out_6_~I .oe_sync_reset = "none";
7045 defparam \inst|d_hsync_counter_out_6_~I .operation_mode = "output";
7046 defparam \inst|d_hsync_counter_out_6_~I .output_async_reset = "none";
7047 defparam \inst|d_hsync_counter_out_6_~I .output_power_up = "low";
7048 defparam \inst|d_hsync_counter_out_6_~I .output_register_mode = "none";
7049 defparam \inst|d_hsync_counter_out_6_~I .output_sync_reset = "none";
7050 // synopsys translate_on
7051
7052 // atom is at PIN_F25
7053 stratix_io \inst|d_hsync_counter_out_5_~I (
7054         .datain(\inst|vga_driver_unit|hsync_counter_5 ),
7055         .ddiodatain(gnd),
7056         .oe(vcc),
7057         .outclk(gnd),
7058         .outclkena(vcc),
7059         .inclk(gnd),
7060         .inclkena(vcc),
7061         .areset(gnd),
7062         .sreset(gnd),
7063         .delayctrlin(gnd),
7064         .devclrn(devclrn),
7065         .devpor(devpor),
7066         .devoe(devoe),
7067         .combout(),
7068         .regout(),
7069         .ddioregout(),
7070         .padio(d_hsync_counter[5]),
7071         .dqsundelayedout());
7072 // synopsys translate_off
7073 defparam \inst|d_hsync_counter_out_5_~I .ddio_mode = "none";
7074 defparam \inst|d_hsync_counter_out_5_~I .input_async_reset = "none";
7075 defparam \inst|d_hsync_counter_out_5_~I .input_power_up = "low";
7076 defparam \inst|d_hsync_counter_out_5_~I .input_register_mode = "none";
7077 defparam \inst|d_hsync_counter_out_5_~I .input_sync_reset = "none";
7078 defparam \inst|d_hsync_counter_out_5_~I .oe_async_reset = "none";
7079 defparam \inst|d_hsync_counter_out_5_~I .oe_power_up = "low";
7080 defparam \inst|d_hsync_counter_out_5_~I .oe_register_mode = "none";
7081 defparam \inst|d_hsync_counter_out_5_~I .oe_sync_reset = "none";
7082 defparam \inst|d_hsync_counter_out_5_~I .operation_mode = "output";
7083 defparam \inst|d_hsync_counter_out_5_~I .output_async_reset = "none";
7084 defparam \inst|d_hsync_counter_out_5_~I .output_power_up = "low";
7085 defparam \inst|d_hsync_counter_out_5_~I .output_register_mode = "none";
7086 defparam \inst|d_hsync_counter_out_5_~I .output_sync_reset = "none";
7087 // synopsys translate_on
7088
7089 // atom is at PIN_D17
7090 stratix_io \inst|d_hsync_counter_out_4_~I (
7091         .datain(\inst|vga_driver_unit|hsync_counter_4 ),
7092         .ddiodatain(gnd),
7093         .oe(vcc),
7094         .outclk(gnd),
7095         .outclkena(vcc),
7096         .inclk(gnd),
7097         .inclkena(vcc),
7098         .areset(gnd),
7099         .sreset(gnd),
7100         .delayctrlin(gnd),
7101         .devclrn(devclrn),
7102         .devpor(devpor),
7103         .devoe(devoe),
7104         .combout(),
7105         .regout(),
7106         .ddioregout(),
7107         .padio(d_hsync_counter[4]),
7108         .dqsundelayedout());
7109 // synopsys translate_off
7110 defparam \inst|d_hsync_counter_out_4_~I .ddio_mode = "none";
7111 defparam \inst|d_hsync_counter_out_4_~I .input_async_reset = "none";
7112 defparam \inst|d_hsync_counter_out_4_~I .input_power_up = "low";
7113 defparam \inst|d_hsync_counter_out_4_~I .input_register_mode = "none";
7114 defparam \inst|d_hsync_counter_out_4_~I .input_sync_reset = "none";
7115 defparam \inst|d_hsync_counter_out_4_~I .oe_async_reset = "none";
7116 defparam \inst|d_hsync_counter_out_4_~I .oe_power_up = "low";
7117 defparam \inst|d_hsync_counter_out_4_~I .oe_register_mode = "none";
7118 defparam \inst|d_hsync_counter_out_4_~I .oe_sync_reset = "none";
7119 defparam \inst|d_hsync_counter_out_4_~I .operation_mode = "output";
7120 defparam \inst|d_hsync_counter_out_4_~I .output_async_reset = "none";
7121 defparam \inst|d_hsync_counter_out_4_~I .output_power_up = "low";
7122 defparam \inst|d_hsync_counter_out_4_~I .output_register_mode = "none";
7123 defparam \inst|d_hsync_counter_out_4_~I .output_sync_reset = "none";
7124 // synopsys translate_on
7125
7126 // atom is at PIN_AE16
7127 stratix_io \inst|d_hsync_counter_out_3_~I (
7128         .datain(\inst|vga_driver_unit|hsync_counter_3 ),
7129         .ddiodatain(gnd),
7130         .oe(vcc),
7131         .outclk(gnd),
7132         .outclkena(vcc),
7133         .inclk(gnd),
7134         .inclkena(vcc),
7135         .areset(gnd),
7136         .sreset(gnd),
7137         .delayctrlin(gnd),
7138         .devclrn(devclrn),
7139         .devpor(devpor),
7140         .devoe(devoe),
7141         .combout(),
7142         .regout(),
7143         .ddioregout(),
7144         .padio(d_hsync_counter[3]),
7145         .dqsundelayedout());
7146 // synopsys translate_off
7147 defparam \inst|d_hsync_counter_out_3_~I .ddio_mode = "none";
7148 defparam \inst|d_hsync_counter_out_3_~I .input_async_reset = "none";
7149 defparam \inst|d_hsync_counter_out_3_~I .input_power_up = "low";
7150 defparam \inst|d_hsync_counter_out_3_~I .input_register_mode = "none";
7151 defparam \inst|d_hsync_counter_out_3_~I .input_sync_reset = "none";
7152 defparam \inst|d_hsync_counter_out_3_~I .oe_async_reset = "none";
7153 defparam \inst|d_hsync_counter_out_3_~I .oe_power_up = "low";
7154 defparam \inst|d_hsync_counter_out_3_~I .oe_register_mode = "none";
7155 defparam \inst|d_hsync_counter_out_3_~I .oe_sync_reset = "none";
7156 defparam \inst|d_hsync_counter_out_3_~I .operation_mode = "output";
7157 defparam \inst|d_hsync_counter_out_3_~I .output_async_reset = "none";
7158 defparam \inst|d_hsync_counter_out_3_~I .output_power_up = "low";
7159 defparam \inst|d_hsync_counter_out_3_~I .output_register_mode = "none";
7160 defparam \inst|d_hsync_counter_out_3_~I .output_sync_reset = "none";
7161 // synopsys translate_on
7162
7163 // atom is at PIN_G17
7164 stratix_io \inst|d_hsync_counter_out_2_~I (
7165         .datain(\inst|vga_driver_unit|hsync_counter_2 ),
7166         .ddiodatain(gnd),
7167         .oe(vcc),
7168         .outclk(gnd),
7169         .outclkena(vcc),
7170         .inclk(gnd),
7171         .inclkena(vcc),
7172         .areset(gnd),
7173         .sreset(gnd),
7174         .delayctrlin(gnd),
7175         .devclrn(devclrn),
7176         .devpor(devpor),
7177         .devoe(devoe),
7178         .combout(),
7179         .regout(),
7180         .ddioregout(),
7181         .padio(d_hsync_counter[2]),
7182         .dqsundelayedout());
7183 // synopsys translate_off
7184 defparam \inst|d_hsync_counter_out_2_~I .ddio_mode = "none";
7185 defparam \inst|d_hsync_counter_out_2_~I .input_async_reset = "none";
7186 defparam \inst|d_hsync_counter_out_2_~I .input_power_up = "low";
7187 defparam \inst|d_hsync_counter_out_2_~I .input_register_mode = "none";
7188 defparam \inst|d_hsync_counter_out_2_~I .input_sync_reset = "none";
7189 defparam \inst|d_hsync_counter_out_2_~I .oe_async_reset = "none";
7190 defparam \inst|d_hsync_counter_out_2_~I .oe_power_up = "low";
7191 defparam \inst|d_hsync_counter_out_2_~I .oe_register_mode = "none";
7192 defparam \inst|d_hsync_counter_out_2_~I .oe_sync_reset = "none";
7193 defparam \inst|d_hsync_counter_out_2_~I .operation_mode = "output";
7194 defparam \inst|d_hsync_counter_out_2_~I .output_async_reset = "none";
7195 defparam \inst|d_hsync_counter_out_2_~I .output_power_up = "low";
7196 defparam \inst|d_hsync_counter_out_2_~I .output_register_mode = "none";
7197 defparam \inst|d_hsync_counter_out_2_~I .output_sync_reset = "none";
7198 // synopsys translate_on
7199
7200 // atom is at PIN_AA17
7201 stratix_io \inst|d_hsync_counter_out_1_~I (
7202         .datain(\inst|vga_driver_unit|hsync_counter_1 ),
7203         .ddiodatain(gnd),
7204         .oe(vcc),
7205         .outclk(gnd),
7206         .outclkena(vcc),
7207         .inclk(gnd),
7208         .inclkena(vcc),
7209         .areset(gnd),
7210         .sreset(gnd),
7211         .delayctrlin(gnd),
7212         .devclrn(devclrn),
7213         .devpor(devpor),
7214         .devoe(devoe),
7215         .combout(),
7216         .regout(),
7217         .ddioregout(),
7218         .padio(d_hsync_counter[1]),
7219         .dqsundelayedout());
7220 // synopsys translate_off
7221 defparam \inst|d_hsync_counter_out_1_~I .ddio_mode = "none";
7222 defparam \inst|d_hsync_counter_out_1_~I .input_async_reset = "none";
7223 defparam \inst|d_hsync_counter_out_1_~I .input_power_up = "low";
7224 defparam \inst|d_hsync_counter_out_1_~I .input_register_mode = "none";
7225 defparam \inst|d_hsync_counter_out_1_~I .input_sync_reset = "none";
7226 defparam \inst|d_hsync_counter_out_1_~I .oe_async_reset = "none";
7227 defparam \inst|d_hsync_counter_out_1_~I .oe_power_up = "low";
7228 defparam \inst|d_hsync_counter_out_1_~I .oe_register_mode = "none";
7229 defparam \inst|d_hsync_counter_out_1_~I .oe_sync_reset = "none";
7230 defparam \inst|d_hsync_counter_out_1_~I .operation_mode = "output";
7231 defparam \inst|d_hsync_counter_out_1_~I .output_async_reset = "none";
7232 defparam \inst|d_hsync_counter_out_1_~I .output_power_up = "low";
7233 defparam \inst|d_hsync_counter_out_1_~I .output_register_mode = "none";
7234 defparam \inst|d_hsync_counter_out_1_~I .output_sync_reset = "none";
7235 // synopsys translate_on
7236
7237 // atom is at PIN_H4
7238 stratix_io \inst|d_hsync_counter_out_0_~I (
7239         .datain(\inst|vga_driver_unit|hsync_counter_0 ),
7240         .ddiodatain(gnd),
7241         .oe(vcc),
7242         .outclk(gnd),
7243         .outclkena(vcc),
7244         .inclk(gnd),
7245         .inclkena(vcc),
7246         .areset(gnd),
7247         .sreset(gnd),
7248         .delayctrlin(gnd),
7249         .devclrn(devclrn),
7250         .devpor(devpor),
7251         .devoe(devoe),
7252         .combout(),
7253         .regout(),
7254         .ddioregout(),
7255         .padio(d_hsync_counter[0]),
7256         .dqsundelayedout());
7257 // synopsys translate_off
7258 defparam \inst|d_hsync_counter_out_0_~I .ddio_mode = "none";
7259 defparam \inst|d_hsync_counter_out_0_~I .input_async_reset = "none";
7260 defparam \inst|d_hsync_counter_out_0_~I .input_power_up = "low";
7261 defparam \inst|d_hsync_counter_out_0_~I .input_register_mode = "none";
7262 defparam \inst|d_hsync_counter_out_0_~I .input_sync_reset = "none";
7263 defparam \inst|d_hsync_counter_out_0_~I .oe_async_reset = "none";
7264 defparam \inst|d_hsync_counter_out_0_~I .oe_power_up = "low";
7265 defparam \inst|d_hsync_counter_out_0_~I .oe_register_mode = "none";
7266 defparam \inst|d_hsync_counter_out_0_~I .oe_sync_reset = "none";
7267 defparam \inst|d_hsync_counter_out_0_~I .operation_mode = "output";
7268 defparam \inst|d_hsync_counter_out_0_~I .output_async_reset = "none";
7269 defparam \inst|d_hsync_counter_out_0_~I .output_power_up = "low";
7270 defparam \inst|d_hsync_counter_out_0_~I .output_register_mode = "none";
7271 defparam \inst|d_hsync_counter_out_0_~I .output_sync_reset = "none";
7272 // synopsys translate_on
7273
7274 // atom is at PIN_Y5
7275 stratix_io \inst|d_hsync_state_out_0_~I (
7276         .datain(\inst|vga_driver_unit|hsync_state_0 ),
7277         .ddiodatain(gnd),
7278         .oe(vcc),
7279         .outclk(gnd),
7280         .outclkena(vcc),
7281         .inclk(gnd),
7282         .inclkena(vcc),
7283         .areset(gnd),
7284         .sreset(gnd),
7285         .delayctrlin(gnd),
7286         .devclrn(devclrn),
7287         .devpor(devpor),
7288         .devoe(devoe),
7289         .combout(),
7290         .regout(),
7291         .ddioregout(),
7292         .padio(d_hsync_state[0]),
7293         .dqsundelayedout());
7294 // synopsys translate_off
7295 defparam \inst|d_hsync_state_out_0_~I .ddio_mode = "none";
7296 defparam \inst|d_hsync_state_out_0_~I .input_async_reset = "none";
7297 defparam \inst|d_hsync_state_out_0_~I .input_power_up = "low";
7298 defparam \inst|d_hsync_state_out_0_~I .input_register_mode = "none";
7299 defparam \inst|d_hsync_state_out_0_~I .input_sync_reset = "none";
7300 defparam \inst|d_hsync_state_out_0_~I .oe_async_reset = "none";
7301 defparam \inst|d_hsync_state_out_0_~I .oe_power_up = "low";
7302 defparam \inst|d_hsync_state_out_0_~I .oe_register_mode = "none";
7303 defparam \inst|d_hsync_state_out_0_~I .oe_sync_reset = "none";
7304 defparam \inst|d_hsync_state_out_0_~I .operation_mode = "output";
7305 defparam \inst|d_hsync_state_out_0_~I .output_async_reset = "none";
7306 defparam \inst|d_hsync_state_out_0_~I .output_power_up = "low";
7307 defparam \inst|d_hsync_state_out_0_~I .output_register_mode = "none";
7308 defparam \inst|d_hsync_state_out_0_~I .output_sync_reset = "none";
7309 // synopsys translate_on
7310
7311 // atom is at PIN_F19
7312 stratix_io \inst|d_hsync_state_out_1_~I (
7313         .datain(\inst|vga_driver_unit|hsync_state_1 ),
7314         .ddiodatain(gnd),
7315         .oe(vcc),
7316         .outclk(gnd),
7317         .outclkena(vcc),
7318         .inclk(gnd),
7319         .inclkena(vcc),
7320         .areset(gnd),
7321         .sreset(gnd),
7322         .delayctrlin(gnd),
7323         .devclrn(devclrn),
7324         .devpor(devpor),
7325         .devoe(devoe),
7326         .combout(),
7327         .regout(),
7328         .ddioregout(),
7329         .padio(d_hsync_state[1]),
7330         .dqsundelayedout());
7331 // synopsys translate_off
7332 defparam \inst|d_hsync_state_out_1_~I .ddio_mode = "none";
7333 defparam \inst|d_hsync_state_out_1_~I .input_async_reset = "none";
7334 defparam \inst|d_hsync_state_out_1_~I .input_power_up = "low";
7335 defparam \inst|d_hsync_state_out_1_~I .input_register_mode = "none";
7336 defparam \inst|d_hsync_state_out_1_~I .input_sync_reset = "none";
7337 defparam \inst|d_hsync_state_out_1_~I .oe_async_reset = "none";
7338 defparam \inst|d_hsync_state_out_1_~I .oe_power_up = "low";
7339 defparam \inst|d_hsync_state_out_1_~I .oe_register_mode = "none";
7340 defparam \inst|d_hsync_state_out_1_~I .oe_sync_reset = "none";
7341 defparam \inst|d_hsync_state_out_1_~I .operation_mode = "output";
7342 defparam \inst|d_hsync_state_out_1_~I .output_async_reset = "none";
7343 defparam \inst|d_hsync_state_out_1_~I .output_power_up = "low";
7344 defparam \inst|d_hsync_state_out_1_~I .output_register_mode = "none";
7345 defparam \inst|d_hsync_state_out_1_~I .output_sync_reset = "none";
7346 // synopsys translate_on
7347
7348 // atom is at PIN_F17
7349 stratix_io \inst|d_hsync_state_out_2_~I (
7350         .datain(\inst|vga_driver_unit|hsync_state_2 ),
7351         .ddiodatain(gnd),
7352         .oe(vcc),
7353         .outclk(gnd),
7354         .outclkena(vcc),
7355         .inclk(gnd),
7356         .inclkena(vcc),
7357         .areset(gnd),
7358         .sreset(gnd),
7359         .delayctrlin(gnd),
7360         .devclrn(devclrn),
7361         .devpor(devpor),
7362         .devoe(devoe),
7363         .combout(),
7364         .regout(),
7365         .ddioregout(),
7366         .padio(d_hsync_state[2]),
7367         .dqsundelayedout());
7368 // synopsys translate_off
7369 defparam \inst|d_hsync_state_out_2_~I .ddio_mode = "none";
7370 defparam \inst|d_hsync_state_out_2_~I .input_async_reset = "none";
7371 defparam \inst|d_hsync_state_out_2_~I .input_power_up = "low";
7372 defparam \inst|d_hsync_state_out_2_~I .input_register_mode = "none";
7373 defparam \inst|d_hsync_state_out_2_~I .input_sync_reset = "none";
7374 defparam \inst|d_hsync_state_out_2_~I .oe_async_reset = "none";
7375 defparam \inst|d_hsync_state_out_2_~I .oe_power_up = "low";
7376 defparam \inst|d_hsync_state_out_2_~I .oe_register_mode = "none";
7377 defparam \inst|d_hsync_state_out_2_~I .oe_sync_reset = "none";
7378 defparam \inst|d_hsync_state_out_2_~I .operation_mode = "output";
7379 defparam \inst|d_hsync_state_out_2_~I .output_async_reset = "none";
7380 defparam \inst|d_hsync_state_out_2_~I .output_power_up = "low";
7381 defparam \inst|d_hsync_state_out_2_~I .output_register_mode = "none";
7382 defparam \inst|d_hsync_state_out_2_~I .output_sync_reset = "none";
7383 // synopsys translate_on
7384
7385 // atom is at PIN_Y2
7386 stratix_io \inst|d_hsync_state_out_3_~I (
7387         .datain(\inst|vga_driver_unit|hsync_state_3 ),
7388         .ddiodatain(gnd),
7389         .oe(vcc),
7390         .outclk(gnd),
7391         .outclkena(vcc),
7392         .inclk(gnd),
7393         .inclkena(vcc),
7394         .areset(gnd),
7395         .sreset(gnd),
7396         .delayctrlin(gnd),
7397         .devclrn(devclrn),
7398         .devpor(devpor),
7399         .devoe(devoe),
7400         .combout(),
7401         .regout(),
7402         .ddioregout(),
7403         .padio(d_hsync_state[3]),
7404         .dqsundelayedout());
7405 // synopsys translate_off
7406 defparam \inst|d_hsync_state_out_3_~I .ddio_mode = "none";
7407 defparam \inst|d_hsync_state_out_3_~I .input_async_reset = "none";
7408 defparam \inst|d_hsync_state_out_3_~I .input_power_up = "low";
7409 defparam \inst|d_hsync_state_out_3_~I .input_register_mode = "none";
7410 defparam \inst|d_hsync_state_out_3_~I .input_sync_reset = "none";
7411 defparam \inst|d_hsync_state_out_3_~I .oe_async_reset = "none";
7412 defparam \inst|d_hsync_state_out_3_~I .oe_power_up = "low";
7413 defparam \inst|d_hsync_state_out_3_~I .oe_register_mode = "none";
7414 defparam \inst|d_hsync_state_out_3_~I .oe_sync_reset = "none";
7415 defparam \inst|d_hsync_state_out_3_~I .operation_mode = "output";
7416 defparam \inst|d_hsync_state_out_3_~I .output_async_reset = "none";
7417 defparam \inst|d_hsync_state_out_3_~I .output_power_up = "low";
7418 defparam \inst|d_hsync_state_out_3_~I .output_register_mode = "none";
7419 defparam \inst|d_hsync_state_out_3_~I .output_sync_reset = "none";
7420 // synopsys translate_on
7421
7422 // atom is at PIN_F10
7423 stratix_io \inst|d_hsync_state_out_4_~I (
7424         .datain(\inst|vga_driver_unit|hsync_state_4 ),
7425         .ddiodatain(gnd),
7426         .oe(vcc),
7427         .outclk(gnd),
7428         .outclkena(vcc),
7429         .inclk(gnd),
7430         .inclkena(vcc),
7431         .areset(gnd),
7432         .sreset(gnd),
7433         .delayctrlin(gnd),
7434         .devclrn(devclrn),
7435         .devpor(devpor),
7436         .devoe(devoe),
7437         .combout(),
7438         .regout(),
7439         .ddioregout(),
7440         .padio(d_hsync_state[4]),
7441         .dqsundelayedout());
7442 // synopsys translate_off
7443 defparam \inst|d_hsync_state_out_4_~I .ddio_mode = "none";
7444 defparam \inst|d_hsync_state_out_4_~I .input_async_reset = "none";
7445 defparam \inst|d_hsync_state_out_4_~I .input_power_up = "low";
7446 defparam \inst|d_hsync_state_out_4_~I .input_register_mode = "none";
7447 defparam \inst|d_hsync_state_out_4_~I .input_sync_reset = "none";
7448 defparam \inst|d_hsync_state_out_4_~I .oe_async_reset = "none";
7449 defparam \inst|d_hsync_state_out_4_~I .oe_power_up = "low";
7450 defparam \inst|d_hsync_state_out_4_~I .oe_register_mode = "none";
7451 defparam \inst|d_hsync_state_out_4_~I .oe_sync_reset = "none";
7452 defparam \inst|d_hsync_state_out_4_~I .operation_mode = "output";
7453 defparam \inst|d_hsync_state_out_4_~I .output_async_reset = "none";
7454 defparam \inst|d_hsync_state_out_4_~I .output_power_up = "low";
7455 defparam \inst|d_hsync_state_out_4_~I .output_register_mode = "none";
7456 defparam \inst|d_hsync_state_out_4_~I .output_sync_reset = "none";
7457 // synopsys translate_on
7458
7459 // atom is at PIN_F9
7460 stratix_io \inst|d_hsync_state_out_5_~I (
7461         .datain(\inst|vga_driver_unit|hsync_state_5 ),
7462         .ddiodatain(gnd),
7463         .oe(vcc),
7464         .outclk(gnd),
7465         .outclkena(vcc),
7466         .inclk(gnd),
7467         .inclkena(vcc),
7468         .areset(gnd),
7469         .sreset(gnd),
7470         .delayctrlin(gnd),
7471         .devclrn(devclrn),
7472         .devpor(devpor),
7473         .devoe(devoe),
7474         .combout(),
7475         .regout(),
7476         .ddioregout(),
7477         .padio(d_hsync_state[5]),
7478         .dqsundelayedout());
7479 // synopsys translate_off
7480 defparam \inst|d_hsync_state_out_5_~I .ddio_mode = "none";
7481 defparam \inst|d_hsync_state_out_5_~I .input_async_reset = "none";
7482 defparam \inst|d_hsync_state_out_5_~I .input_power_up = "low";
7483 defparam \inst|d_hsync_state_out_5_~I .input_register_mode = "none";
7484 defparam \inst|d_hsync_state_out_5_~I .input_sync_reset = "none";
7485 defparam \inst|d_hsync_state_out_5_~I .oe_async_reset = "none";
7486 defparam \inst|d_hsync_state_out_5_~I .oe_power_up = "low";
7487 defparam \inst|d_hsync_state_out_5_~I .oe_register_mode = "none";
7488 defparam \inst|d_hsync_state_out_5_~I .oe_sync_reset = "none";
7489 defparam \inst|d_hsync_state_out_5_~I .operation_mode = "output";
7490 defparam \inst|d_hsync_state_out_5_~I .output_async_reset = "none";
7491 defparam \inst|d_hsync_state_out_5_~I .output_power_up = "low";
7492 defparam \inst|d_hsync_state_out_5_~I .output_register_mode = "none";
7493 defparam \inst|d_hsync_state_out_5_~I .output_sync_reset = "none";
7494 // synopsys translate_on
7495
7496 // atom is at PIN_F6
7497 stratix_io \inst|d_hsync_state_out_6_~I (
7498         .datain(\inst|vga_driver_unit|hsync_state_6 ),
7499         .ddiodatain(gnd),
7500         .oe(vcc),
7501         .outclk(gnd),
7502         .outclkena(vcc),
7503         .inclk(gnd),
7504         .inclkena(vcc),
7505         .areset(gnd),
7506         .sreset(gnd),
7507         .delayctrlin(gnd),
7508         .devclrn(devclrn),
7509         .devpor(devpor),
7510         .devoe(devoe),
7511         .combout(),
7512         .regout(),
7513         .ddioregout(),
7514         .padio(d_hsync_state[6]),
7515         .dqsundelayedout());
7516 // synopsys translate_off
7517 defparam \inst|d_hsync_state_out_6_~I .ddio_mode = "none";
7518 defparam \inst|d_hsync_state_out_6_~I .input_async_reset = "none";
7519 defparam \inst|d_hsync_state_out_6_~I .input_power_up = "low";
7520 defparam \inst|d_hsync_state_out_6_~I .input_register_mode = "none";
7521 defparam \inst|d_hsync_state_out_6_~I .input_sync_reset = "none";
7522 defparam \inst|d_hsync_state_out_6_~I .oe_async_reset = "none";
7523 defparam \inst|d_hsync_state_out_6_~I .oe_power_up = "low";
7524 defparam \inst|d_hsync_state_out_6_~I .oe_register_mode = "none";
7525 defparam \inst|d_hsync_state_out_6_~I .oe_sync_reset = "none";
7526 defparam \inst|d_hsync_state_out_6_~I .operation_mode = "output";
7527 defparam \inst|d_hsync_state_out_6_~I .output_async_reset = "none";
7528 defparam \inst|d_hsync_state_out_6_~I .output_power_up = "low";
7529 defparam \inst|d_hsync_state_out_6_~I .output_register_mode = "none";
7530 defparam \inst|d_hsync_state_out_6_~I .output_sync_reset = "none";
7531 // synopsys translate_on
7532
7533 // atom is at PIN_L25
7534 stratix_io \inst|d_line_counter_out_8_~I (
7535         .datain(\inst|vga_driver_unit|line_counter_sig_8 ),
7536         .ddiodatain(gnd),
7537         .oe(vcc),
7538         .outclk(gnd),
7539         .outclkena(vcc),
7540         .inclk(gnd),
7541         .inclkena(vcc),
7542         .areset(gnd),
7543         .sreset(gnd),
7544         .delayctrlin(gnd),
7545         .devclrn(devclrn),
7546         .devpor(devpor),
7547         .devoe(devoe),
7548         .combout(),
7549         .regout(),
7550         .ddioregout(),
7551         .padio(d_line_counter[8]),
7552         .dqsundelayedout());
7553 // synopsys translate_off
7554 defparam \inst|d_line_counter_out_8_~I .ddio_mode = "none";
7555 defparam \inst|d_line_counter_out_8_~I .input_async_reset = "none";
7556 defparam \inst|d_line_counter_out_8_~I .input_power_up = "low";
7557 defparam \inst|d_line_counter_out_8_~I .input_register_mode = "none";
7558 defparam \inst|d_line_counter_out_8_~I .input_sync_reset = "none";
7559 defparam \inst|d_line_counter_out_8_~I .oe_async_reset = "none";
7560 defparam \inst|d_line_counter_out_8_~I .oe_power_up = "low";
7561 defparam \inst|d_line_counter_out_8_~I .oe_register_mode = "none";
7562 defparam \inst|d_line_counter_out_8_~I .oe_sync_reset = "none";
7563 defparam \inst|d_line_counter_out_8_~I .operation_mode = "output";
7564 defparam \inst|d_line_counter_out_8_~I .output_async_reset = "none";
7565 defparam \inst|d_line_counter_out_8_~I .output_power_up = "low";
7566 defparam \inst|d_line_counter_out_8_~I .output_register_mode = "none";
7567 defparam \inst|d_line_counter_out_8_~I .output_sync_reset = "none";
7568 // synopsys translate_on
7569
7570 // atom is at PIN_L24
7571 stratix_io \inst|d_line_counter_out_7_~I (
7572         .datain(\inst|vga_driver_unit|line_counter_sig_7 ),
7573         .ddiodatain(gnd),
7574         .oe(vcc),
7575         .outclk(gnd),
7576         .outclkena(vcc),
7577         .inclk(gnd),
7578         .inclkena(vcc),
7579         .areset(gnd),
7580         .sreset(gnd),
7581         .delayctrlin(gnd),
7582         .devclrn(devclrn),
7583         .devpor(devpor),
7584         .devoe(devoe),
7585         .combout(),
7586         .regout(),
7587         .ddioregout(),
7588         .padio(d_line_counter[7]),
7589         .dqsundelayedout());
7590 // synopsys translate_off
7591 defparam \inst|d_line_counter_out_7_~I .ddio_mode = "none";
7592 defparam \inst|d_line_counter_out_7_~I .input_async_reset = "none";
7593 defparam \inst|d_line_counter_out_7_~I .input_power_up = "low";
7594 defparam \inst|d_line_counter_out_7_~I .input_register_mode = "none";
7595 defparam \inst|d_line_counter_out_7_~I .input_sync_reset = "none";
7596 defparam \inst|d_line_counter_out_7_~I .oe_async_reset = "none";
7597 defparam \inst|d_line_counter_out_7_~I .oe_power_up = "low";
7598 defparam \inst|d_line_counter_out_7_~I .oe_register_mode = "none";
7599 defparam \inst|d_line_counter_out_7_~I .oe_sync_reset = "none";
7600 defparam \inst|d_line_counter_out_7_~I .operation_mode = "output";
7601 defparam \inst|d_line_counter_out_7_~I .output_async_reset = "none";
7602 defparam \inst|d_line_counter_out_7_~I .output_power_up = "low";
7603 defparam \inst|d_line_counter_out_7_~I .output_register_mode = "none";
7604 defparam \inst|d_line_counter_out_7_~I .output_sync_reset = "none";
7605 // synopsys translate_on
7606
7607 // atom is at PIN_M5
7608 stratix_io \inst|d_line_counter_out_6_~I (
7609         .datain(\inst|vga_driver_unit|line_counter_sig_6 ),
7610         .ddiodatain(gnd),
7611         .oe(vcc),
7612         .outclk(gnd),
7613         .outclkena(vcc),
7614         .inclk(gnd),
7615         .inclkena(vcc),
7616         .areset(gnd),
7617         .sreset(gnd),
7618         .delayctrlin(gnd),
7619         .devclrn(devclrn),
7620         .devpor(devpor),
7621         .devoe(devoe),
7622         .combout(),
7623         .regout(),
7624         .ddioregout(),
7625         .padio(d_line_counter[6]),
7626         .dqsundelayedout());
7627 // synopsys translate_off
7628 defparam \inst|d_line_counter_out_6_~I .ddio_mode = "none";
7629 defparam \inst|d_line_counter_out_6_~I .input_async_reset = "none";
7630 defparam \inst|d_line_counter_out_6_~I .input_power_up = "low";
7631 defparam \inst|d_line_counter_out_6_~I .input_register_mode = "none";
7632 defparam \inst|d_line_counter_out_6_~I .input_sync_reset = "none";
7633 defparam \inst|d_line_counter_out_6_~I .oe_async_reset = "none";
7634 defparam \inst|d_line_counter_out_6_~I .oe_power_up = "low";
7635 defparam \inst|d_line_counter_out_6_~I .oe_register_mode = "none";
7636 defparam \inst|d_line_counter_out_6_~I .oe_sync_reset = "none";
7637 defparam \inst|d_line_counter_out_6_~I .operation_mode = "output";
7638 defparam \inst|d_line_counter_out_6_~I .output_async_reset = "none";
7639 defparam \inst|d_line_counter_out_6_~I .output_power_up = "low";
7640 defparam \inst|d_line_counter_out_6_~I .output_register_mode = "none";
7641 defparam \inst|d_line_counter_out_6_~I .output_sync_reset = "none";
7642 // synopsys translate_on
7643
7644 // atom is at PIN_M6
7645 stratix_io \inst|d_line_counter_out_5_~I (
7646         .datain(\inst|vga_driver_unit|line_counter_sig_5 ),
7647         .ddiodatain(gnd),
7648         .oe(vcc),
7649         .outclk(gnd),
7650         .outclkena(vcc),
7651         .inclk(gnd),
7652         .inclkena(vcc),
7653         .areset(gnd),
7654         .sreset(gnd),
7655         .delayctrlin(gnd),
7656         .devclrn(devclrn),
7657         .devpor(devpor),
7658         .devoe(devoe),
7659         .combout(),
7660         .regout(),
7661         .ddioregout(),
7662         .padio(d_line_counter[5]),
7663         .dqsundelayedout());
7664 // synopsys translate_off
7665 defparam \inst|d_line_counter_out_5_~I .ddio_mode = "none";
7666 defparam \inst|d_line_counter_out_5_~I .input_async_reset = "none";
7667 defparam \inst|d_line_counter_out_5_~I .input_power_up = "low";
7668 defparam \inst|d_line_counter_out_5_~I .input_register_mode = "none";
7669 defparam \inst|d_line_counter_out_5_~I .input_sync_reset = "none";
7670 defparam \inst|d_line_counter_out_5_~I .oe_async_reset = "none";
7671 defparam \inst|d_line_counter_out_5_~I .oe_power_up = "low";
7672 defparam \inst|d_line_counter_out_5_~I .oe_register_mode = "none";
7673 defparam \inst|d_line_counter_out_5_~I .oe_sync_reset = "none";
7674 defparam \inst|d_line_counter_out_5_~I .operation_mode = "output";
7675 defparam \inst|d_line_counter_out_5_~I .output_async_reset = "none";
7676 defparam \inst|d_line_counter_out_5_~I .output_power_up = "low";
7677 defparam \inst|d_line_counter_out_5_~I .output_register_mode = "none";
7678 defparam \inst|d_line_counter_out_5_~I .output_sync_reset = "none";
7679 // synopsys translate_on
7680
7681 // atom is at PIN_M8
7682 stratix_io \inst|d_line_counter_out_4_~I (
7683         .datain(\inst|vga_driver_unit|line_counter_sig_4 ),
7684         .ddiodatain(gnd),
7685         .oe(vcc),
7686         .outclk(gnd),
7687         .outclkena(vcc),
7688         .inclk(gnd),
7689         .inclkena(vcc),
7690         .areset(gnd),
7691         .sreset(gnd),
7692         .delayctrlin(gnd),
7693         .devclrn(devclrn),
7694         .devpor(devpor),
7695         .devoe(devoe),
7696         .combout(),
7697         .regout(),
7698         .ddioregout(),
7699         .padio(d_line_counter[4]),
7700         .dqsundelayedout());
7701 // synopsys translate_off
7702 defparam \inst|d_line_counter_out_4_~I .ddio_mode = "none";
7703 defparam \inst|d_line_counter_out_4_~I .input_async_reset = "none";
7704 defparam \inst|d_line_counter_out_4_~I .input_power_up = "low";
7705 defparam \inst|d_line_counter_out_4_~I .input_register_mode = "none";
7706 defparam \inst|d_line_counter_out_4_~I .input_sync_reset = "none";
7707 defparam \inst|d_line_counter_out_4_~I .oe_async_reset = "none";
7708 defparam \inst|d_line_counter_out_4_~I .oe_power_up = "low";
7709 defparam \inst|d_line_counter_out_4_~I .oe_register_mode = "none";
7710 defparam \inst|d_line_counter_out_4_~I .oe_sync_reset = "none";
7711 defparam \inst|d_line_counter_out_4_~I .operation_mode = "output";
7712 defparam \inst|d_line_counter_out_4_~I .output_async_reset = "none";
7713 defparam \inst|d_line_counter_out_4_~I .output_power_up = "low";
7714 defparam \inst|d_line_counter_out_4_~I .output_register_mode = "none";
7715 defparam \inst|d_line_counter_out_4_~I .output_sync_reset = "none";
7716 // synopsys translate_on
7717
7718 // atom is at PIN_M9
7719 stratix_io \inst|d_line_counter_out_3_~I (
7720         .datain(\inst|vga_driver_unit|line_counter_sig_3 ),
7721         .ddiodatain(gnd),
7722         .oe(vcc),
7723         .outclk(gnd),
7724         .outclkena(vcc),
7725         .inclk(gnd),
7726         .inclkena(vcc),
7727         .areset(gnd),
7728         .sreset(gnd),
7729         .delayctrlin(gnd),
7730         .devclrn(devclrn),
7731         .devpor(devpor),
7732         .devoe(devoe),
7733         .combout(),
7734         .regout(),
7735         .ddioregout(),
7736         .padio(d_line_counter[3]),
7737         .dqsundelayedout());
7738 // synopsys translate_off
7739 defparam \inst|d_line_counter_out_3_~I .ddio_mode = "none";
7740 defparam \inst|d_line_counter_out_3_~I .input_async_reset = "none";
7741 defparam \inst|d_line_counter_out_3_~I .input_power_up = "low";
7742 defparam \inst|d_line_counter_out_3_~I .input_register_mode = "none";
7743 defparam \inst|d_line_counter_out_3_~I .input_sync_reset = "none";
7744 defparam \inst|d_line_counter_out_3_~I .oe_async_reset = "none";
7745 defparam \inst|d_line_counter_out_3_~I .oe_power_up = "low";
7746 defparam \inst|d_line_counter_out_3_~I .oe_register_mode = "none";
7747 defparam \inst|d_line_counter_out_3_~I .oe_sync_reset = "none";
7748 defparam \inst|d_line_counter_out_3_~I .operation_mode = "output";
7749 defparam \inst|d_line_counter_out_3_~I .output_async_reset = "none";
7750 defparam \inst|d_line_counter_out_3_~I .output_power_up = "low";
7751 defparam \inst|d_line_counter_out_3_~I .output_register_mode = "none";
7752 defparam \inst|d_line_counter_out_3_~I .output_sync_reset = "none";
7753 // synopsys translate_on
7754
7755 // atom is at PIN_J22
7756 stratix_io \inst|d_line_counter_out_2_~I (
7757         .datain(\inst|vga_driver_unit|line_counter_sig_2 ),
7758         .ddiodatain(gnd),
7759         .oe(vcc),
7760         .outclk(gnd),
7761         .outclkena(vcc),
7762         .inclk(gnd),
7763         .inclkena(vcc),
7764         .areset(gnd),
7765         .sreset(gnd),
7766         .delayctrlin(gnd),
7767         .devclrn(devclrn),
7768         .devpor(devpor),
7769         .devoe(devoe),
7770         .combout(),
7771         .regout(),
7772         .ddioregout(),
7773         .padio(d_line_counter[2]),
7774         .dqsundelayedout());
7775 // synopsys translate_off
7776 defparam \inst|d_line_counter_out_2_~I .ddio_mode = "none";
7777 defparam \inst|d_line_counter_out_2_~I .input_async_reset = "none";
7778 defparam \inst|d_line_counter_out_2_~I .input_power_up = "low";
7779 defparam \inst|d_line_counter_out_2_~I .input_register_mode = "none";
7780 defparam \inst|d_line_counter_out_2_~I .input_sync_reset = "none";
7781 defparam \inst|d_line_counter_out_2_~I .oe_async_reset = "none";
7782 defparam \inst|d_line_counter_out_2_~I .oe_power_up = "low";
7783 defparam \inst|d_line_counter_out_2_~I .oe_register_mode = "none";
7784 defparam \inst|d_line_counter_out_2_~I .oe_sync_reset = "none";
7785 defparam \inst|d_line_counter_out_2_~I .operation_mode = "output";
7786 defparam \inst|d_line_counter_out_2_~I .output_async_reset = "none";
7787 defparam \inst|d_line_counter_out_2_~I .output_power_up = "low";
7788 defparam \inst|d_line_counter_out_2_~I .output_register_mode = "none";
7789 defparam \inst|d_line_counter_out_2_~I .output_sync_reset = "none";
7790 // synopsys translate_on
7791
7792 // atom is at PIN_K4
7793 stratix_io \inst|d_line_counter_out_1_~I (
7794         .datain(\inst|vga_driver_unit|line_counter_sig_1 ),
7795         .ddiodatain(gnd),
7796         .oe(vcc),
7797         .outclk(gnd),
7798         .outclkena(vcc),
7799         .inclk(gnd),
7800         .inclkena(vcc),
7801         .areset(gnd),
7802         .sreset(gnd),
7803         .delayctrlin(gnd),
7804         .devclrn(devclrn),
7805         .devpor(devpor),
7806         .devoe(devoe),
7807         .combout(),
7808         .regout(),
7809         .ddioregout(),
7810         .padio(d_line_counter[1]),
7811         .dqsundelayedout());
7812 // synopsys translate_off
7813 defparam \inst|d_line_counter_out_1_~I .ddio_mode = "none";
7814 defparam \inst|d_line_counter_out_1_~I .input_async_reset = "none";
7815 defparam \inst|d_line_counter_out_1_~I .input_power_up = "low";
7816 defparam \inst|d_line_counter_out_1_~I .input_register_mode = "none";
7817 defparam \inst|d_line_counter_out_1_~I .input_sync_reset = "none";
7818 defparam \inst|d_line_counter_out_1_~I .oe_async_reset = "none";
7819 defparam \inst|d_line_counter_out_1_~I .oe_power_up = "low";
7820 defparam \inst|d_line_counter_out_1_~I .oe_register_mode = "none";
7821 defparam \inst|d_line_counter_out_1_~I .oe_sync_reset = "none";
7822 defparam \inst|d_line_counter_out_1_~I .operation_mode = "output";
7823 defparam \inst|d_line_counter_out_1_~I .output_async_reset = "none";
7824 defparam \inst|d_line_counter_out_1_~I .output_power_up = "low";
7825 defparam \inst|d_line_counter_out_1_~I .output_register_mode = "none";
7826 defparam \inst|d_line_counter_out_1_~I .output_sync_reset = "none";
7827 // synopsys translate_on
7828
7829 // atom is at PIN_K6
7830 stratix_io \inst|d_line_counter_out_0_~I (
7831         .datain(\inst|vga_driver_unit|line_counter_sig_0 ),
7832         .ddiodatain(gnd),
7833         .oe(vcc),
7834         .outclk(gnd),
7835         .outclkena(vcc),
7836         .inclk(gnd),
7837         .inclkena(vcc),
7838         .areset(gnd),
7839         .sreset(gnd),
7840         .delayctrlin(gnd),
7841         .devclrn(devclrn),
7842         .devpor(devpor),
7843         .devoe(devoe),
7844         .combout(),
7845         .regout(),
7846         .ddioregout(),
7847         .padio(d_line_counter[0]),
7848         .dqsundelayedout());
7849 // synopsys translate_off
7850 defparam \inst|d_line_counter_out_0_~I .ddio_mode = "none";
7851 defparam \inst|d_line_counter_out_0_~I .input_async_reset = "none";
7852 defparam \inst|d_line_counter_out_0_~I .input_power_up = "low";
7853 defparam \inst|d_line_counter_out_0_~I .input_register_mode = "none";
7854 defparam \inst|d_line_counter_out_0_~I .input_sync_reset = "none";
7855 defparam \inst|d_line_counter_out_0_~I .oe_async_reset = "none";
7856 defparam \inst|d_line_counter_out_0_~I .oe_power_up = "low";
7857 defparam \inst|d_line_counter_out_0_~I .oe_register_mode = "none";
7858 defparam \inst|d_line_counter_out_0_~I .oe_sync_reset = "none";
7859 defparam \inst|d_line_counter_out_0_~I .operation_mode = "output";
7860 defparam \inst|d_line_counter_out_0_~I .output_async_reset = "none";
7861 defparam \inst|d_line_counter_out_0_~I .output_power_up = "low";
7862 defparam \inst|d_line_counter_out_0_~I .output_register_mode = "none";
7863 defparam \inst|d_line_counter_out_0_~I .output_sync_reset = "none";
7864 // synopsys translate_on
7865
7866 // atom is at PIN_G2
7867 stratix_io \inst|d_vsync_counter_out_9_~I (
7868         .datain(\inst|vga_driver_unit|vsync_counter_9 ),
7869         .ddiodatain(gnd),
7870         .oe(vcc),
7871         .outclk(gnd),
7872         .outclkena(vcc),
7873         .inclk(gnd),
7874         .inclkena(vcc),
7875         .areset(gnd),
7876         .sreset(gnd),
7877         .delayctrlin(gnd),
7878         .devclrn(devclrn),
7879         .devpor(devpor),
7880         .devoe(devoe),
7881         .combout(),
7882         .regout(),
7883         .ddioregout(),
7884         .padio(d_vsync_counter[9]),
7885         .dqsundelayedout());
7886 // synopsys translate_off
7887 defparam \inst|d_vsync_counter_out_9_~I .ddio_mode = "none";
7888 defparam \inst|d_vsync_counter_out_9_~I .input_async_reset = "none";
7889 defparam \inst|d_vsync_counter_out_9_~I .input_power_up = "low";
7890 defparam \inst|d_vsync_counter_out_9_~I .input_register_mode = "none";
7891 defparam \inst|d_vsync_counter_out_9_~I .input_sync_reset = "none";
7892 defparam \inst|d_vsync_counter_out_9_~I .oe_async_reset = "none";
7893 defparam \inst|d_vsync_counter_out_9_~I .oe_power_up = "low";
7894 defparam \inst|d_vsync_counter_out_9_~I .oe_register_mode = "none";
7895 defparam \inst|d_vsync_counter_out_9_~I .oe_sync_reset = "none";
7896 defparam \inst|d_vsync_counter_out_9_~I .operation_mode = "output";
7897 defparam \inst|d_vsync_counter_out_9_~I .output_async_reset = "none";
7898 defparam \inst|d_vsync_counter_out_9_~I .output_power_up = "low";
7899 defparam \inst|d_vsync_counter_out_9_~I .output_register_mode = "none";
7900 defparam \inst|d_vsync_counter_out_9_~I .output_sync_reset = "none";
7901 // synopsys translate_on
7902
7903 // atom is at PIN_G4
7904 stratix_io \inst|d_vsync_counter_out_8_~I (
7905         .datain(\inst|vga_driver_unit|vsync_counter_8 ),
7906         .ddiodatain(gnd),
7907         .oe(vcc),
7908         .outclk(gnd),
7909         .outclkena(vcc),
7910         .inclk(gnd),
7911         .inclkena(vcc),
7912         .areset(gnd),
7913         .sreset(gnd),
7914         .delayctrlin(gnd),
7915         .devclrn(devclrn),
7916         .devpor(devpor),
7917         .devoe(devoe),
7918         .combout(),
7919         .regout(),
7920         .ddioregout(),
7921         .padio(d_vsync_counter[8]),
7922         .dqsundelayedout());
7923 // synopsys translate_off
7924 defparam \inst|d_vsync_counter_out_8_~I .ddio_mode = "none";
7925 defparam \inst|d_vsync_counter_out_8_~I .input_async_reset = "none";
7926 defparam \inst|d_vsync_counter_out_8_~I .input_power_up = "low";
7927 defparam \inst|d_vsync_counter_out_8_~I .input_register_mode = "none";
7928 defparam \inst|d_vsync_counter_out_8_~I .input_sync_reset = "none";
7929 defparam \inst|d_vsync_counter_out_8_~I .oe_async_reset = "none";
7930 defparam \inst|d_vsync_counter_out_8_~I .oe_power_up = "low";
7931 defparam \inst|d_vsync_counter_out_8_~I .oe_register_mode = "none";
7932 defparam \inst|d_vsync_counter_out_8_~I .oe_sync_reset = "none";
7933 defparam \inst|d_vsync_counter_out_8_~I .operation_mode = "output";
7934 defparam \inst|d_vsync_counter_out_8_~I .output_async_reset = "none";
7935 defparam \inst|d_vsync_counter_out_8_~I .output_power_up = "low";
7936 defparam \inst|d_vsync_counter_out_8_~I .output_register_mode = "none";
7937 defparam \inst|d_vsync_counter_out_8_~I .output_sync_reset = "none";
7938 // synopsys translate_on
7939
7940 // atom is at PIN_G6
7941 stratix_io \inst|d_vsync_counter_out_7_~I (
7942         .datain(\inst|vga_driver_unit|vsync_counter_7 ),
7943         .ddiodatain(gnd),
7944         .oe(vcc),
7945         .outclk(gnd),
7946         .outclkena(vcc),
7947         .inclk(gnd),
7948         .inclkena(vcc),
7949         .areset(gnd),
7950         .sreset(gnd),
7951         .delayctrlin(gnd),
7952         .devclrn(devclrn),
7953         .devpor(devpor),
7954         .devoe(devoe),
7955         .combout(),
7956         .regout(),
7957         .ddioregout(),
7958         .padio(d_vsync_counter[7]),
7959         .dqsundelayedout());
7960 // synopsys translate_off
7961 defparam \inst|d_vsync_counter_out_7_~I .ddio_mode = "none";
7962 defparam \inst|d_vsync_counter_out_7_~I .input_async_reset = "none";
7963 defparam \inst|d_vsync_counter_out_7_~I .input_power_up = "low";
7964 defparam \inst|d_vsync_counter_out_7_~I .input_register_mode = "none";
7965 defparam \inst|d_vsync_counter_out_7_~I .input_sync_reset = "none";
7966 defparam \inst|d_vsync_counter_out_7_~I .oe_async_reset = "none";
7967 defparam \inst|d_vsync_counter_out_7_~I .oe_power_up = "low";
7968 defparam \inst|d_vsync_counter_out_7_~I .oe_register_mode = "none";
7969 defparam \inst|d_vsync_counter_out_7_~I .oe_sync_reset = "none";
7970 defparam \inst|d_vsync_counter_out_7_~I .operation_mode = "output";
7971 defparam \inst|d_vsync_counter_out_7_~I .output_async_reset = "none";
7972 defparam \inst|d_vsync_counter_out_7_~I .output_power_up = "low";
7973 defparam \inst|d_vsync_counter_out_7_~I .output_register_mode = "none";
7974 defparam \inst|d_vsync_counter_out_7_~I .output_sync_reset = "none";
7975 // synopsys translate_on
7976
7977 // atom is at PIN_K21
7978 stratix_io \inst|d_vsync_counter_out_6_~I (
7979         .datain(\inst|vga_driver_unit|vsync_counter_6 ),
7980         .ddiodatain(gnd),
7981         .oe(vcc),
7982         .outclk(gnd),
7983         .outclkena(vcc),
7984         .inclk(gnd),
7985         .inclkena(vcc),
7986         .areset(gnd),
7987         .sreset(gnd),
7988         .delayctrlin(gnd),
7989         .devclrn(devclrn),
7990         .devpor(devpor),
7991         .devoe(devoe),
7992         .combout(),
7993         .regout(),
7994         .ddioregout(),
7995         .padio(d_vsync_counter[6]),
7996         .dqsundelayedout());
7997 // synopsys translate_off
7998 defparam \inst|d_vsync_counter_out_6_~I .ddio_mode = "none";
7999 defparam \inst|d_vsync_counter_out_6_~I .input_async_reset = "none";
8000 defparam \inst|d_vsync_counter_out_6_~I .input_power_up = "low";
8001 defparam \inst|d_vsync_counter_out_6_~I .input_register_mode = "none";
8002 defparam \inst|d_vsync_counter_out_6_~I .input_sync_reset = "none";
8003 defparam \inst|d_vsync_counter_out_6_~I .oe_async_reset = "none";
8004 defparam \inst|d_vsync_counter_out_6_~I .oe_power_up = "low";
8005 defparam \inst|d_vsync_counter_out_6_~I .oe_register_mode = "none";
8006 defparam \inst|d_vsync_counter_out_6_~I .oe_sync_reset = "none";
8007 defparam \inst|d_vsync_counter_out_6_~I .operation_mode = "output";
8008 defparam \inst|d_vsync_counter_out_6_~I .output_async_reset = "none";
8009 defparam \inst|d_vsync_counter_out_6_~I .output_power_up = "low";
8010 defparam \inst|d_vsync_counter_out_6_~I .output_register_mode = "none";
8011 defparam \inst|d_vsync_counter_out_6_~I .output_sync_reset = "none";
8012 // synopsys translate_on
8013
8014 // atom is at PIN_AA14
8015 stratix_io \inst|d_vsync_counter_out_5_~I (
8016         .datain(\inst|vga_driver_unit|vsync_counter_5 ),
8017         .ddiodatain(gnd),
8018         .oe(vcc),
8019         .outclk(gnd),
8020         .outclkena(vcc),
8021         .inclk(gnd),
8022         .inclkena(vcc),
8023         .areset(gnd),
8024         .sreset(gnd),
8025         .delayctrlin(gnd),
8026         .devclrn(devclrn),
8027         .devpor(devpor),
8028         .devoe(devoe),
8029         .combout(),
8030         .regout(),
8031         .ddioregout(),
8032         .padio(d_vsync_counter[5]),
8033         .dqsundelayedout());
8034 // synopsys translate_off
8035 defparam \inst|d_vsync_counter_out_5_~I .ddio_mode = "none";
8036 defparam \inst|d_vsync_counter_out_5_~I .input_async_reset = "none";
8037 defparam \inst|d_vsync_counter_out_5_~I .input_power_up = "low";
8038 defparam \inst|d_vsync_counter_out_5_~I .input_register_mode = "none";
8039 defparam \inst|d_vsync_counter_out_5_~I .input_sync_reset = "none";
8040 defparam \inst|d_vsync_counter_out_5_~I .oe_async_reset = "none";
8041 defparam \inst|d_vsync_counter_out_5_~I .oe_power_up = "low";
8042 defparam \inst|d_vsync_counter_out_5_~I .oe_register_mode = "none";
8043 defparam \inst|d_vsync_counter_out_5_~I .oe_sync_reset = "none";
8044 defparam \inst|d_vsync_counter_out_5_~I .operation_mode = "output";
8045 defparam \inst|d_vsync_counter_out_5_~I .output_async_reset = "none";
8046 defparam \inst|d_vsync_counter_out_5_~I .output_power_up = "low";
8047 defparam \inst|d_vsync_counter_out_5_~I .output_register_mode = "none";
8048 defparam \inst|d_vsync_counter_out_5_~I .output_sync_reset = "none";
8049 // synopsys translate_on
8050
8051 // atom is at PIN_AB12
8052 stratix_io \inst|d_vsync_counter_out_4_~I (
8053         .datain(\inst|vga_driver_unit|vsync_counter_4 ),
8054         .ddiodatain(gnd),
8055         .oe(vcc),
8056         .outclk(gnd),
8057         .outclkena(vcc),
8058         .inclk(gnd),
8059         .inclkena(vcc),
8060         .areset(gnd),
8061         .sreset(gnd),
8062         .delayctrlin(gnd),
8063         .devclrn(devclrn),
8064         .devpor(devpor),
8065         .devoe(devoe),
8066         .combout(),
8067         .regout(),
8068         .ddioregout(),
8069         .padio(d_vsync_counter[4]),
8070         .dqsundelayedout());
8071 // synopsys translate_off
8072 defparam \inst|d_vsync_counter_out_4_~I .ddio_mode = "none";
8073 defparam \inst|d_vsync_counter_out_4_~I .input_async_reset = "none";
8074 defparam \inst|d_vsync_counter_out_4_~I .input_power_up = "low";
8075 defparam \inst|d_vsync_counter_out_4_~I .input_register_mode = "none";
8076 defparam \inst|d_vsync_counter_out_4_~I .input_sync_reset = "none";
8077 defparam \inst|d_vsync_counter_out_4_~I .oe_async_reset = "none";
8078 defparam \inst|d_vsync_counter_out_4_~I .oe_power_up = "low";
8079 defparam \inst|d_vsync_counter_out_4_~I .oe_register_mode = "none";
8080 defparam \inst|d_vsync_counter_out_4_~I .oe_sync_reset = "none";
8081 defparam \inst|d_vsync_counter_out_4_~I .operation_mode = "output";
8082 defparam \inst|d_vsync_counter_out_4_~I .output_async_reset = "none";
8083 defparam \inst|d_vsync_counter_out_4_~I .output_power_up = "low";
8084 defparam \inst|d_vsync_counter_out_4_~I .output_register_mode = "none";
8085 defparam \inst|d_vsync_counter_out_4_~I .output_sync_reset = "none";
8086 // synopsys translate_on
8087
8088 // atom is at PIN_K7
8089 stratix_io \inst|d_vsync_counter_out_3_~I (
8090         .datain(\inst|vga_driver_unit|vsync_counter_3 ),
8091         .ddiodatain(gnd),
8092         .oe(vcc),
8093         .outclk(gnd),
8094         .outclkena(vcc),
8095         .inclk(gnd),
8096         .inclkena(vcc),
8097         .areset(gnd),
8098         .sreset(gnd),
8099         .delayctrlin(gnd),
8100         .devclrn(devclrn),
8101         .devpor(devpor),
8102         .devoe(devoe),
8103         .combout(),
8104         .regout(),
8105         .ddioregout(),
8106         .padio(d_vsync_counter[3]),
8107         .dqsundelayedout());
8108 // synopsys translate_off
8109 defparam \inst|d_vsync_counter_out_3_~I .ddio_mode = "none";
8110 defparam \inst|d_vsync_counter_out_3_~I .input_async_reset = "none";
8111 defparam \inst|d_vsync_counter_out_3_~I .input_power_up = "low";
8112 defparam \inst|d_vsync_counter_out_3_~I .input_register_mode = "none";
8113 defparam \inst|d_vsync_counter_out_3_~I .input_sync_reset = "none";
8114 defparam \inst|d_vsync_counter_out_3_~I .oe_async_reset = "none";
8115 defparam \inst|d_vsync_counter_out_3_~I .oe_power_up = "low";
8116 defparam \inst|d_vsync_counter_out_3_~I .oe_register_mode = "none";
8117 defparam \inst|d_vsync_counter_out_3_~I .oe_sync_reset = "none";
8118 defparam \inst|d_vsync_counter_out_3_~I .operation_mode = "output";
8119 defparam \inst|d_vsync_counter_out_3_~I .output_async_reset = "none";
8120 defparam \inst|d_vsync_counter_out_3_~I .output_power_up = "low";
8121 defparam \inst|d_vsync_counter_out_3_~I .output_register_mode = "none";
8122 defparam \inst|d_vsync_counter_out_3_~I .output_sync_reset = "none";
8123 // synopsys translate_on
8124
8125 // atom is at PIN_E12
8126 stratix_io \inst|d_vsync_counter_out_2_~I (
8127         .datain(\inst|vga_driver_unit|vsync_counter_2 ),
8128         .ddiodatain(gnd),
8129         .oe(vcc),
8130         .outclk(gnd),
8131         .outclkena(vcc),
8132         .inclk(gnd),
8133         .inclkena(vcc),
8134         .areset(gnd),
8135         .sreset(gnd),
8136         .delayctrlin(gnd),
8137         .devclrn(devclrn),
8138         .devpor(devpor),
8139         .devoe(devoe),
8140         .combout(),
8141         .regout(),
8142         .ddioregout(),
8143         .padio(d_vsync_counter[2]),
8144         .dqsundelayedout());
8145 // synopsys translate_off
8146 defparam \inst|d_vsync_counter_out_2_~I .ddio_mode = "none";
8147 defparam \inst|d_vsync_counter_out_2_~I .input_async_reset = "none";
8148 defparam \inst|d_vsync_counter_out_2_~I .input_power_up = "low";
8149 defparam \inst|d_vsync_counter_out_2_~I .input_register_mode = "none";
8150 defparam \inst|d_vsync_counter_out_2_~I .input_sync_reset = "none";
8151 defparam \inst|d_vsync_counter_out_2_~I .oe_async_reset = "none";
8152 defparam \inst|d_vsync_counter_out_2_~I .oe_power_up = "low";
8153 defparam \inst|d_vsync_counter_out_2_~I .oe_register_mode = "none";
8154 defparam \inst|d_vsync_counter_out_2_~I .oe_sync_reset = "none";
8155 defparam \inst|d_vsync_counter_out_2_~I .operation_mode = "output";
8156 defparam \inst|d_vsync_counter_out_2_~I .output_async_reset = "none";
8157 defparam \inst|d_vsync_counter_out_2_~I .output_power_up = "low";
8158 defparam \inst|d_vsync_counter_out_2_~I .output_register_mode = "none";
8159 defparam \inst|d_vsync_counter_out_2_~I .output_sync_reset = "none";
8160 // synopsys translate_on
8161
8162 // atom is at PIN_F14
8163 stratix_io \inst|d_vsync_counter_out_1_~I (
8164         .datain(\inst|vga_driver_unit|vsync_counter_1 ),
8165         .ddiodatain(gnd),
8166         .oe(vcc),
8167         .outclk(gnd),
8168         .outclkena(vcc),
8169         .inclk(gnd),
8170         .inclkena(vcc),
8171         .areset(gnd),
8172         .sreset(gnd),
8173         .delayctrlin(gnd),
8174         .devclrn(devclrn),
8175         .devpor(devpor),
8176         .devoe(devoe),
8177         .combout(),
8178         .regout(),
8179         .ddioregout(),
8180         .padio(d_vsync_counter[1]),
8181         .dqsundelayedout());
8182 // synopsys translate_off
8183 defparam \inst|d_vsync_counter_out_1_~I .ddio_mode = "none";
8184 defparam \inst|d_vsync_counter_out_1_~I .input_async_reset = "none";
8185 defparam \inst|d_vsync_counter_out_1_~I .input_power_up = "low";
8186 defparam \inst|d_vsync_counter_out_1_~I .input_register_mode = "none";
8187 defparam \inst|d_vsync_counter_out_1_~I .input_sync_reset = "none";
8188 defparam \inst|d_vsync_counter_out_1_~I .oe_async_reset = "none";
8189 defparam \inst|d_vsync_counter_out_1_~I .oe_power_up = "low";
8190 defparam \inst|d_vsync_counter_out_1_~I .oe_register_mode = "none";
8191 defparam \inst|d_vsync_counter_out_1_~I .oe_sync_reset = "none";
8192 defparam \inst|d_vsync_counter_out_1_~I .operation_mode = "output";
8193 defparam \inst|d_vsync_counter_out_1_~I .output_async_reset = "none";
8194 defparam \inst|d_vsync_counter_out_1_~I .output_power_up = "low";
8195 defparam \inst|d_vsync_counter_out_1_~I .output_register_mode = "none";
8196 defparam \inst|d_vsync_counter_out_1_~I .output_sync_reset = "none";
8197 // synopsys translate_on
8198
8199 // atom is at PIN_G9
8200 stratix_io \inst|d_vsync_counter_out_0_~I (
8201         .datain(\inst|vga_driver_unit|vsync_counter_0 ),
8202         .ddiodatain(gnd),
8203         .oe(vcc),
8204         .outclk(gnd),
8205         .outclkena(vcc),
8206         .inclk(gnd),
8207         .inclkena(vcc),
8208         .areset(gnd),
8209         .sreset(gnd),
8210         .delayctrlin(gnd),
8211         .devclrn(devclrn),
8212         .devpor(devpor),
8213         .devoe(devoe),
8214         .combout(),
8215         .regout(),
8216         .ddioregout(),
8217         .padio(d_vsync_counter[0]),
8218         .dqsundelayedout());
8219 // synopsys translate_off
8220 defparam \inst|d_vsync_counter_out_0_~I .ddio_mode = "none";
8221 defparam \inst|d_vsync_counter_out_0_~I .input_async_reset = "none";
8222 defparam \inst|d_vsync_counter_out_0_~I .input_power_up = "low";
8223 defparam \inst|d_vsync_counter_out_0_~I .input_register_mode = "none";
8224 defparam \inst|d_vsync_counter_out_0_~I .input_sync_reset = "none";
8225 defparam \inst|d_vsync_counter_out_0_~I .oe_async_reset = "none";
8226 defparam \inst|d_vsync_counter_out_0_~I .oe_power_up = "low";
8227 defparam \inst|d_vsync_counter_out_0_~I .oe_register_mode = "none";
8228 defparam \inst|d_vsync_counter_out_0_~I .oe_sync_reset = "none";
8229 defparam \inst|d_vsync_counter_out_0_~I .operation_mode = "output";
8230 defparam \inst|d_vsync_counter_out_0_~I .output_async_reset = "none";
8231 defparam \inst|d_vsync_counter_out_0_~I .output_power_up = "low";
8232 defparam \inst|d_vsync_counter_out_0_~I .output_register_mode = "none";
8233 defparam \inst|d_vsync_counter_out_0_~I .output_sync_reset = "none";
8234 // synopsys translate_on
8235
8236 // atom is at PIN_F5
8237 stratix_io \inst|d_vsync_state_out_0_~I (
8238         .datain(\inst|vga_driver_unit|vsync_state_0 ),
8239         .ddiodatain(gnd),
8240         .oe(vcc),
8241         .outclk(gnd),
8242         .outclkena(vcc),
8243         .inclk(gnd),
8244         .inclkena(vcc),
8245         .areset(gnd),
8246         .sreset(gnd),
8247         .delayctrlin(gnd),
8248         .devclrn(devclrn),
8249         .devpor(devpor),
8250         .devoe(devoe),
8251         .combout(),
8252         .regout(),
8253         .ddioregout(),
8254         .padio(d_vsync_state[0]),
8255         .dqsundelayedout());
8256 // synopsys translate_off
8257 defparam \inst|d_vsync_state_out_0_~I .ddio_mode = "none";
8258 defparam \inst|d_vsync_state_out_0_~I .input_async_reset = "none";
8259 defparam \inst|d_vsync_state_out_0_~I .input_power_up = "low";
8260 defparam \inst|d_vsync_state_out_0_~I .input_register_mode = "none";
8261 defparam \inst|d_vsync_state_out_0_~I .input_sync_reset = "none";
8262 defparam \inst|d_vsync_state_out_0_~I .oe_async_reset = "none";
8263 defparam \inst|d_vsync_state_out_0_~I .oe_power_up = "low";
8264 defparam \inst|d_vsync_state_out_0_~I .oe_register_mode = "none";
8265 defparam \inst|d_vsync_state_out_0_~I .oe_sync_reset = "none";
8266 defparam \inst|d_vsync_state_out_0_~I .operation_mode = "output";
8267 defparam \inst|d_vsync_state_out_0_~I .output_async_reset = "none";
8268 defparam \inst|d_vsync_state_out_0_~I .output_power_up = "low";
8269 defparam \inst|d_vsync_state_out_0_~I .output_register_mode = "none";
8270 defparam \inst|d_vsync_state_out_0_~I .output_sync_reset = "none";
8271 // synopsys translate_on
8272
8273 // atom is at PIN_F4
8274 stratix_io \inst|d_vsync_state_out_1_~I (
8275         .datain(\inst|vga_driver_unit|vsync_state_1 ),
8276         .ddiodatain(gnd),
8277         .oe(vcc),
8278         .outclk(gnd),
8279         .outclkena(vcc),
8280         .inclk(gnd),
8281         .inclkena(vcc),
8282         .areset(gnd),
8283         .sreset(gnd),
8284         .delayctrlin(gnd),
8285         .devclrn(devclrn),
8286         .devpor(devpor),
8287         .devoe(devoe),
8288         .combout(),
8289         .regout(),
8290         .ddioregout(),
8291         .padio(d_vsync_state[1]),
8292         .dqsundelayedout());
8293 // synopsys translate_off
8294 defparam \inst|d_vsync_state_out_1_~I .ddio_mode = "none";
8295 defparam \inst|d_vsync_state_out_1_~I .input_async_reset = "none";
8296 defparam \inst|d_vsync_state_out_1_~I .input_power_up = "low";
8297 defparam \inst|d_vsync_state_out_1_~I .input_register_mode = "none";
8298 defparam \inst|d_vsync_state_out_1_~I .input_sync_reset = "none";
8299 defparam \inst|d_vsync_state_out_1_~I .oe_async_reset = "none";
8300 defparam \inst|d_vsync_state_out_1_~I .oe_power_up = "low";
8301 defparam \inst|d_vsync_state_out_1_~I .oe_register_mode = "none";
8302 defparam \inst|d_vsync_state_out_1_~I .oe_sync_reset = "none";
8303 defparam \inst|d_vsync_state_out_1_~I .operation_mode = "output";
8304 defparam \inst|d_vsync_state_out_1_~I .output_async_reset = "none";
8305 defparam \inst|d_vsync_state_out_1_~I .output_power_up = "low";
8306 defparam \inst|d_vsync_state_out_1_~I .output_register_mode = "none";
8307 defparam \inst|d_vsync_state_out_1_~I .output_sync_reset = "none";
8308 // synopsys translate_on
8309
8310 // atom is at PIN_F3
8311 stratix_io \inst|d_vsync_state_out_2_~I (
8312         .datain(\inst|vga_driver_unit|vsync_state_2 ),
8313         .ddiodatain(gnd),
8314         .oe(vcc),
8315         .outclk(gnd),
8316         .outclkena(vcc),
8317         .inclk(gnd),
8318         .inclkena(vcc),
8319         .areset(gnd),
8320         .sreset(gnd),
8321         .delayctrlin(gnd),
8322         .devclrn(devclrn),
8323         .devpor(devpor),
8324         .devoe(devoe),
8325         .combout(),
8326         .regout(),
8327         .ddioregout(),
8328         .padio(d_vsync_state[2]),
8329         .dqsundelayedout());
8330 // synopsys translate_off
8331 defparam \inst|d_vsync_state_out_2_~I .ddio_mode = "none";
8332 defparam \inst|d_vsync_state_out_2_~I .input_async_reset = "none";
8333 defparam \inst|d_vsync_state_out_2_~I .input_power_up = "low";
8334 defparam \inst|d_vsync_state_out_2_~I .input_register_mode = "none";
8335 defparam \inst|d_vsync_state_out_2_~I .input_sync_reset = "none";
8336 defparam \inst|d_vsync_state_out_2_~I .oe_async_reset = "none";
8337 defparam \inst|d_vsync_state_out_2_~I .oe_power_up = "low";
8338 defparam \inst|d_vsync_state_out_2_~I .oe_register_mode = "none";
8339 defparam \inst|d_vsync_state_out_2_~I .oe_sync_reset = "none";
8340 defparam \inst|d_vsync_state_out_2_~I .operation_mode = "output";
8341 defparam \inst|d_vsync_state_out_2_~I .output_async_reset = "none";
8342 defparam \inst|d_vsync_state_out_2_~I .output_power_up = "low";
8343 defparam \inst|d_vsync_state_out_2_~I .output_register_mode = "none";
8344 defparam \inst|d_vsync_state_out_2_~I .output_sync_reset = "none";
8345 // synopsys translate_on
8346
8347 // atom is at PIN_M19
8348 stratix_io \inst|d_vsync_state_out_3_~I (
8349         .datain(\inst|vga_driver_unit|vsync_state_3 ),
8350         .ddiodatain(gnd),
8351         .oe(vcc),
8352         .outclk(gnd),
8353         .outclkena(vcc),
8354         .inclk(gnd),
8355         .inclkena(vcc),
8356         .areset(gnd),
8357         .sreset(gnd),
8358         .delayctrlin(gnd),
8359         .devclrn(devclrn),
8360         .devpor(devpor),
8361         .devoe(devoe),
8362         .combout(),
8363         .regout(),
8364         .ddioregout(),
8365         .padio(d_vsync_state[3]),
8366         .dqsundelayedout());
8367 // synopsys translate_off
8368 defparam \inst|d_vsync_state_out_3_~I .ddio_mode = "none";
8369 defparam \inst|d_vsync_state_out_3_~I .input_async_reset = "none";
8370 defparam \inst|d_vsync_state_out_3_~I .input_power_up = "low";
8371 defparam \inst|d_vsync_state_out_3_~I .input_register_mode = "none";
8372 defparam \inst|d_vsync_state_out_3_~I .input_sync_reset = "none";
8373 defparam \inst|d_vsync_state_out_3_~I .oe_async_reset = "none";
8374 defparam \inst|d_vsync_state_out_3_~I .oe_power_up = "low";
8375 defparam \inst|d_vsync_state_out_3_~I .oe_register_mode = "none";
8376 defparam \inst|d_vsync_state_out_3_~I .oe_sync_reset = "none";
8377 defparam \inst|d_vsync_state_out_3_~I .operation_mode = "output";
8378 defparam \inst|d_vsync_state_out_3_~I .output_async_reset = "none";
8379 defparam \inst|d_vsync_state_out_3_~I .output_power_up = "low";
8380 defparam \inst|d_vsync_state_out_3_~I .output_register_mode = "none";
8381 defparam \inst|d_vsync_state_out_3_~I .output_sync_reset = "none";
8382 // synopsys translate_on
8383
8384 // atom is at PIN_M18
8385 stratix_io \inst|d_vsync_state_out_4_~I (
8386         .datain(\inst|vga_driver_unit|vsync_state_4 ),
8387         .ddiodatain(gnd),
8388         .oe(vcc),
8389         .outclk(gnd),
8390         .outclkena(vcc),
8391         .inclk(gnd),
8392         .inclkena(vcc),
8393         .areset(gnd),
8394         .sreset(gnd),
8395         .delayctrlin(gnd),
8396         .devclrn(devclrn),
8397         .devpor(devpor),
8398         .devoe(devoe),
8399         .combout(),
8400         .regout(),
8401         .ddioregout(),
8402         .padio(d_vsync_state[4]),
8403         .dqsundelayedout());
8404 // synopsys translate_off
8405 defparam \inst|d_vsync_state_out_4_~I .ddio_mode = "none";
8406 defparam \inst|d_vsync_state_out_4_~I .input_async_reset = "none";
8407 defparam \inst|d_vsync_state_out_4_~I .input_power_up = "low";
8408 defparam \inst|d_vsync_state_out_4_~I .input_register_mode = "none";
8409 defparam \inst|d_vsync_state_out_4_~I .input_sync_reset = "none";
8410 defparam \inst|d_vsync_state_out_4_~I .oe_async_reset = "none";
8411 defparam \inst|d_vsync_state_out_4_~I .oe_power_up = "low";
8412 defparam \inst|d_vsync_state_out_4_~I .oe_register_mode = "none";
8413 defparam \inst|d_vsync_state_out_4_~I .oe_sync_reset = "none";
8414 defparam \inst|d_vsync_state_out_4_~I .operation_mode = "output";
8415 defparam \inst|d_vsync_state_out_4_~I .output_async_reset = "none";
8416 defparam \inst|d_vsync_state_out_4_~I .output_power_up = "low";
8417 defparam \inst|d_vsync_state_out_4_~I .output_register_mode = "none";
8418 defparam \inst|d_vsync_state_out_4_~I .output_sync_reset = "none";
8419 // synopsys translate_on
8420
8421 // atom is at PIN_M7
8422 stratix_io \inst|d_vsync_state_out_5_~I (
8423         .datain(\inst|vga_driver_unit|vsync_state_5 ),
8424         .ddiodatain(gnd),
8425         .oe(vcc),
8426         .outclk(gnd),
8427         .outclkena(vcc),
8428         .inclk(gnd),
8429         .inclkena(vcc),
8430         .areset(gnd),
8431         .sreset(gnd),
8432         .delayctrlin(gnd),
8433         .devclrn(devclrn),
8434         .devpor(devpor),
8435         .devoe(devoe),
8436         .combout(),
8437         .regout(),
8438         .ddioregout(),
8439         .padio(d_vsync_state[5]),
8440         .dqsundelayedout());
8441 // synopsys translate_off
8442 defparam \inst|d_vsync_state_out_5_~I .ddio_mode = "none";
8443 defparam \inst|d_vsync_state_out_5_~I .input_async_reset = "none";
8444 defparam \inst|d_vsync_state_out_5_~I .input_power_up = "low";
8445 defparam \inst|d_vsync_state_out_5_~I .input_register_mode = "none";
8446 defparam \inst|d_vsync_state_out_5_~I .input_sync_reset = "none";
8447 defparam \inst|d_vsync_state_out_5_~I .oe_async_reset = "none";
8448 defparam \inst|d_vsync_state_out_5_~I .oe_power_up = "low";
8449 defparam \inst|d_vsync_state_out_5_~I .oe_register_mode = "none";
8450 defparam \inst|d_vsync_state_out_5_~I .oe_sync_reset = "none";
8451 defparam \inst|d_vsync_state_out_5_~I .operation_mode = "output";
8452 defparam \inst|d_vsync_state_out_5_~I .output_async_reset = "none";
8453 defparam \inst|d_vsync_state_out_5_~I .output_power_up = "low";
8454 defparam \inst|d_vsync_state_out_5_~I .output_register_mode = "none";
8455 defparam \inst|d_vsync_state_out_5_~I .output_sync_reset = "none";
8456 // synopsys translate_on
8457
8458 // atom is at PIN_M4
8459 stratix_io \inst|d_vsync_state_out_6_~I (
8460         .datain(\inst|vga_driver_unit|vsync_state_6 ),
8461         .ddiodatain(gnd),
8462         .oe(vcc),
8463         .outclk(gnd),
8464         .outclkena(vcc),
8465         .inclk(gnd),
8466         .inclkena(vcc),
8467         .areset(gnd),
8468         .sreset(gnd),
8469         .delayctrlin(gnd),
8470         .devclrn(devclrn),
8471         .devpor(devpor),
8472         .devoe(devoe),
8473         .combout(),
8474         .regout(),
8475         .ddioregout(),
8476         .padio(d_vsync_state[6]),
8477         .dqsundelayedout());
8478 // synopsys translate_off
8479 defparam \inst|d_vsync_state_out_6_~I .ddio_mode = "none";
8480 defparam \inst|d_vsync_state_out_6_~I .input_async_reset = "none";
8481 defparam \inst|d_vsync_state_out_6_~I .input_power_up = "low";
8482 defparam \inst|d_vsync_state_out_6_~I .input_register_mode = "none";
8483 defparam \inst|d_vsync_state_out_6_~I .input_sync_reset = "none";
8484 defparam \inst|d_vsync_state_out_6_~I .oe_async_reset = "none";
8485 defparam \inst|d_vsync_state_out_6_~I .oe_power_up = "low";
8486 defparam \inst|d_vsync_state_out_6_~I .oe_register_mode = "none";
8487 defparam \inst|d_vsync_state_out_6_~I .oe_sync_reset = "none";
8488 defparam \inst|d_vsync_state_out_6_~I .operation_mode = "output";
8489 defparam \inst|d_vsync_state_out_6_~I .output_async_reset = "none";
8490 defparam \inst|d_vsync_state_out_6_~I .output_power_up = "low";
8491 defparam \inst|d_vsync_state_out_6_~I .output_register_mode = "none";
8492 defparam \inst|d_vsync_state_out_6_~I .output_sync_reset = "none";
8493 // synopsys translate_on
8494
8495 // atom is at PIN_T2
8496 stratix_io \inst|seven_seg_pin_tri_13_~I (
8497         .datain(!\~STRATIX_FITTER_CREATED_GND~I_combout ),
8498         .ddiodatain(gnd),
8499         .oe(vcc),
8500         .outclk(gnd),
8501         .outclkena(vcc),
8502         .inclk(gnd),
8503         .inclkena(vcc),
8504         .areset(gnd),
8505         .sreset(gnd),
8506         .delayctrlin(gnd),
8507         .devclrn(devclrn),
8508         .devpor(devpor),
8509         .devoe(devoe),
8510         .combout(),
8511         .regout(),
8512         .ddioregout(),
8513         .padio(seven_seg_pin[13]),
8514         .dqsundelayedout());
8515 // synopsys translate_off
8516 defparam \inst|seven_seg_pin_tri_13_~I .ddio_mode = "none";
8517 defparam \inst|seven_seg_pin_tri_13_~I .input_async_reset = "none";
8518 defparam \inst|seven_seg_pin_tri_13_~I .input_power_up = "low";
8519 defparam \inst|seven_seg_pin_tri_13_~I .input_register_mode = "none";
8520 defparam \inst|seven_seg_pin_tri_13_~I .input_sync_reset = "none";
8521 defparam \inst|seven_seg_pin_tri_13_~I .oe_async_reset = "none";
8522 defparam \inst|seven_seg_pin_tri_13_~I .oe_power_up = "low";
8523 defparam \inst|seven_seg_pin_tri_13_~I .oe_register_mode = "none";
8524 defparam \inst|seven_seg_pin_tri_13_~I .oe_sync_reset = "none";
8525 defparam \inst|seven_seg_pin_tri_13_~I .operation_mode = "output";
8526 defparam \inst|seven_seg_pin_tri_13_~I .output_async_reset = "none";
8527 defparam \inst|seven_seg_pin_tri_13_~I .output_power_up = "low";
8528 defparam \inst|seven_seg_pin_tri_13_~I .output_register_mode = "none";
8529 defparam \inst|seven_seg_pin_tri_13_~I .output_sync_reset = "none";
8530 // synopsys translate_on
8531
8532 // atom is at PIN_AA11
8533 stratix_io \inst|seven_seg_pin_out_12_~I (
8534         .datain(\inst|vga_driver_unit|un6_dly_counter_0_x ),
8535         .ddiodatain(gnd),
8536         .oe(vcc),
8537         .outclk(gnd),
8538         .outclkena(vcc),
8539         .inclk(gnd),
8540         .inclkena(vcc),
8541         .areset(gnd),
8542         .sreset(gnd),
8543         .delayctrlin(gnd),
8544         .devclrn(devclrn),
8545         .devpor(devpor),
8546         .devoe(devoe),
8547         .combout(),
8548         .regout(),
8549         .ddioregout(),
8550         .padio(seven_seg_pin[12]),
8551         .dqsundelayedout());
8552 // synopsys translate_off
8553 defparam \inst|seven_seg_pin_out_12_~I .ddio_mode = "none";
8554 defparam \inst|seven_seg_pin_out_12_~I .input_async_reset = "none";
8555 defparam \inst|seven_seg_pin_out_12_~I .input_power_up = "low";
8556 defparam \inst|seven_seg_pin_out_12_~I .input_register_mode = "none";
8557 defparam \inst|seven_seg_pin_out_12_~I .input_sync_reset = "none";
8558 defparam \inst|seven_seg_pin_out_12_~I .oe_async_reset = "none";
8559 defparam \inst|seven_seg_pin_out_12_~I .oe_power_up = "low";
8560 defparam \inst|seven_seg_pin_out_12_~I .oe_register_mode = "none";
8561 defparam \inst|seven_seg_pin_out_12_~I .oe_sync_reset = "none";
8562 defparam \inst|seven_seg_pin_out_12_~I .operation_mode = "output";
8563 defparam \inst|seven_seg_pin_out_12_~I .output_async_reset = "none";
8564 defparam \inst|seven_seg_pin_out_12_~I .output_power_up = "low";
8565 defparam \inst|seven_seg_pin_out_12_~I .output_register_mode = "none";
8566 defparam \inst|seven_seg_pin_out_12_~I .output_sync_reset = "none";
8567 // synopsys translate_on
8568
8569 // atom is at PIN_R6
8570 stratix_io \inst|seven_seg_pin_out_11_~I (
8571         .datain(\inst|vga_driver_unit|un6_dly_counter_0_x ),
8572         .ddiodatain(gnd),
8573         .oe(vcc),
8574         .outclk(gnd),
8575         .outclkena(vcc),
8576         .inclk(gnd),
8577         .inclkena(vcc),
8578         .areset(gnd),
8579         .sreset(gnd),
8580         .delayctrlin(gnd),
8581         .devclrn(devclrn),
8582         .devpor(devpor),
8583         .devoe(devoe),
8584         .combout(),
8585         .regout(),
8586         .ddioregout(),
8587         .padio(seven_seg_pin[11]),
8588         .dqsundelayedout());
8589 // synopsys translate_off
8590 defparam \inst|seven_seg_pin_out_11_~I .ddio_mode = "none";
8591 defparam \inst|seven_seg_pin_out_11_~I .input_async_reset = "none";
8592 defparam \inst|seven_seg_pin_out_11_~I .input_power_up = "low";
8593 defparam \inst|seven_seg_pin_out_11_~I .input_register_mode = "none";
8594 defparam \inst|seven_seg_pin_out_11_~I .input_sync_reset = "none";
8595 defparam \inst|seven_seg_pin_out_11_~I .oe_async_reset = "none";
8596 defparam \inst|seven_seg_pin_out_11_~I .oe_power_up = "low";
8597 defparam \inst|seven_seg_pin_out_11_~I .oe_register_mode = "none";
8598 defparam \inst|seven_seg_pin_out_11_~I .oe_sync_reset = "none";
8599 defparam \inst|seven_seg_pin_out_11_~I .operation_mode = "output";
8600 defparam \inst|seven_seg_pin_out_11_~I .output_async_reset = "none";
8601 defparam \inst|seven_seg_pin_out_11_~I .output_power_up = "low";
8602 defparam \inst|seven_seg_pin_out_11_~I .output_register_mode = "none";
8603 defparam \inst|seven_seg_pin_out_11_~I .output_sync_reset = "none";
8604 // synopsys translate_on
8605
8606 // atom is at PIN_R4
8607 stratix_io \inst|seven_seg_pin_out_10_~I (
8608         .datain(\inst|vga_driver_unit|un6_dly_counter_0_x ),
8609         .ddiodatain(gnd),
8610         .oe(vcc),
8611         .outclk(gnd),
8612         .outclkena(vcc),
8613         .inclk(gnd),
8614         .inclkena(vcc),
8615         .areset(gnd),
8616         .sreset(gnd),
8617         .delayctrlin(gnd),
8618         .devclrn(devclrn),
8619         .devpor(devpor),
8620         .devoe(devoe),
8621         .combout(),
8622         .regout(),
8623         .ddioregout(),
8624         .padio(seven_seg_pin[10]),
8625         .dqsundelayedout());
8626 // synopsys translate_off
8627 defparam \inst|seven_seg_pin_out_10_~I .ddio_mode = "none";
8628 defparam \inst|seven_seg_pin_out_10_~I .input_async_reset = "none";
8629 defparam \inst|seven_seg_pin_out_10_~I .input_power_up = "low";
8630 defparam \inst|seven_seg_pin_out_10_~I .input_register_mode = "none";
8631 defparam \inst|seven_seg_pin_out_10_~I .input_sync_reset = "none";
8632 defparam \inst|seven_seg_pin_out_10_~I .oe_async_reset = "none";
8633 defparam \inst|seven_seg_pin_out_10_~I .oe_power_up = "low";
8634 defparam \inst|seven_seg_pin_out_10_~I .oe_register_mode = "none";
8635 defparam \inst|seven_seg_pin_out_10_~I .oe_sync_reset = "none";
8636 defparam \inst|seven_seg_pin_out_10_~I .operation_mode = "output";
8637 defparam \inst|seven_seg_pin_out_10_~I .output_async_reset = "none";
8638 defparam \inst|seven_seg_pin_out_10_~I .output_power_up = "low";
8639 defparam \inst|seven_seg_pin_out_10_~I .output_register_mode = "none";
8640 defparam \inst|seven_seg_pin_out_10_~I .output_sync_reset = "none";
8641 // synopsys translate_on
8642
8643 // atom is at PIN_N8
8644 stratix_io \inst|seven_seg_pin_out_9_~I (
8645         .datain(\inst|vga_driver_unit|un6_dly_counter_0_x ),
8646         .ddiodatain(gnd),
8647         .oe(vcc),
8648         .outclk(gnd),
8649         .outclkena(vcc),
8650         .inclk(gnd),
8651         .inclkena(vcc),
8652         .areset(gnd),
8653         .sreset(gnd),
8654         .delayctrlin(gnd),
8655         .devclrn(devclrn),
8656         .devpor(devpor),
8657         .devoe(devoe),
8658         .combout(),
8659         .regout(),
8660         .ddioregout(),
8661         .padio(seven_seg_pin[9]),
8662         .dqsundelayedout());
8663 // synopsys translate_off
8664 defparam \inst|seven_seg_pin_out_9_~I .ddio_mode = "none";
8665 defparam \inst|seven_seg_pin_out_9_~I .input_async_reset = "none";
8666 defparam \inst|seven_seg_pin_out_9_~I .input_power_up = "low";
8667 defparam \inst|seven_seg_pin_out_9_~I .input_register_mode = "none";
8668 defparam \inst|seven_seg_pin_out_9_~I .input_sync_reset = "none";
8669 defparam \inst|seven_seg_pin_out_9_~I .oe_async_reset = "none";
8670 defparam \inst|seven_seg_pin_out_9_~I .oe_power_up = "low";
8671 defparam \inst|seven_seg_pin_out_9_~I .oe_register_mode = "none";
8672 defparam \inst|seven_seg_pin_out_9_~I .oe_sync_reset = "none";
8673 defparam \inst|seven_seg_pin_out_9_~I .operation_mode = "output";
8674 defparam \inst|seven_seg_pin_out_9_~I .output_async_reset = "none";
8675 defparam \inst|seven_seg_pin_out_9_~I .output_power_up = "low";
8676 defparam \inst|seven_seg_pin_out_9_~I .output_register_mode = "none";
8677 defparam \inst|seven_seg_pin_out_9_~I .output_sync_reset = "none";
8678 // synopsys translate_on
8679
8680 // atom is at PIN_N7
8681 stratix_io \inst|seven_seg_pin_out_8_~I (
8682         .datain(\inst|vga_driver_unit|un6_dly_counter_0_x ),
8683         .ddiodatain(gnd),
8684         .oe(vcc),
8685         .outclk(gnd),
8686         .outclkena(vcc),
8687         .inclk(gnd),
8688         .inclkena(vcc),
8689         .areset(gnd),
8690         .sreset(gnd),
8691         .delayctrlin(gnd),
8692         .devclrn(devclrn),
8693         .devpor(devpor),
8694         .devoe(devoe),
8695         .combout(),
8696         .regout(),
8697         .ddioregout(),
8698         .padio(seven_seg_pin[8]),
8699         .dqsundelayedout());
8700 // synopsys translate_off
8701 defparam \inst|seven_seg_pin_out_8_~I .ddio_mode = "none";
8702 defparam \inst|seven_seg_pin_out_8_~I .input_async_reset = "none";
8703 defparam \inst|seven_seg_pin_out_8_~I .input_power_up = "low";
8704 defparam \inst|seven_seg_pin_out_8_~I .input_register_mode = "none";
8705 defparam \inst|seven_seg_pin_out_8_~I .input_sync_reset = "none";
8706 defparam \inst|seven_seg_pin_out_8_~I .oe_async_reset = "none";
8707 defparam \inst|seven_seg_pin_out_8_~I .oe_power_up = "low";
8708 defparam \inst|seven_seg_pin_out_8_~I .oe_register_mode = "none";
8709 defparam \inst|seven_seg_pin_out_8_~I .oe_sync_reset = "none";
8710 defparam \inst|seven_seg_pin_out_8_~I .operation_mode = "output";
8711 defparam \inst|seven_seg_pin_out_8_~I .output_async_reset = "none";
8712 defparam \inst|seven_seg_pin_out_8_~I .output_power_up = "low";
8713 defparam \inst|seven_seg_pin_out_8_~I .output_register_mode = "none";
8714 defparam \inst|seven_seg_pin_out_8_~I .output_sync_reset = "none";
8715 // synopsys translate_on
8716
8717 // atom is at PIN_Y11
8718 stratix_io \inst|seven_seg_pin_out_7_~I (
8719         .datain(\inst|vga_driver_unit|un6_dly_counter_0_x ),
8720         .ddiodatain(gnd),
8721         .oe(vcc),
8722         .outclk(gnd),
8723         .outclkena(vcc),
8724         .inclk(gnd),
8725         .inclkena(vcc),
8726         .areset(gnd),
8727         .sreset(gnd),
8728         .delayctrlin(gnd),
8729         .devclrn(devclrn),
8730         .devpor(devpor),
8731         .devoe(devoe),
8732         .combout(),
8733         .regout(),
8734         .ddioregout(),
8735         .padio(seven_seg_pin[7]),
8736         .dqsundelayedout());
8737 // synopsys translate_off
8738 defparam \inst|seven_seg_pin_out_7_~I .ddio_mode = "none";
8739 defparam \inst|seven_seg_pin_out_7_~I .input_async_reset = "none";
8740 defparam \inst|seven_seg_pin_out_7_~I .input_power_up = "low";
8741 defparam \inst|seven_seg_pin_out_7_~I .input_register_mode = "none";
8742 defparam \inst|seven_seg_pin_out_7_~I .input_sync_reset = "none";
8743 defparam \inst|seven_seg_pin_out_7_~I .oe_async_reset = "none";
8744 defparam \inst|seven_seg_pin_out_7_~I .oe_power_up = "low";
8745 defparam \inst|seven_seg_pin_out_7_~I .oe_register_mode = "none";
8746 defparam \inst|seven_seg_pin_out_7_~I .oe_sync_reset = "none";
8747 defparam \inst|seven_seg_pin_out_7_~I .operation_mode = "output";
8748 defparam \inst|seven_seg_pin_out_7_~I .output_async_reset = "none";
8749 defparam \inst|seven_seg_pin_out_7_~I .output_power_up = "low";
8750 defparam \inst|seven_seg_pin_out_7_~I .output_register_mode = "none";
8751 defparam \inst|seven_seg_pin_out_7_~I .output_sync_reset = "none";
8752 // synopsys translate_on
8753
8754 // atom is at PIN_R23
8755 stratix_io \inst|seven_seg_pin_tri_6_~I (
8756         .datain(!\~STRATIX_FITTER_CREATED_GND~I_combout ),
8757         .ddiodatain(gnd),
8758         .oe(vcc),
8759         .outclk(gnd),
8760         .outclkena(vcc),
8761         .inclk(gnd),
8762         .inclkena(vcc),
8763         .areset(gnd),
8764         .sreset(gnd),
8765         .delayctrlin(gnd),
8766         .devclrn(devclrn),
8767         .devpor(devpor),
8768         .devoe(devoe),
8769         .combout(),
8770         .regout(),
8771         .ddioregout(),
8772         .padio(seven_seg_pin[6]),
8773         .dqsundelayedout());
8774 // synopsys translate_off
8775 defparam \inst|seven_seg_pin_tri_6_~I .ddio_mode = "none";
8776 defparam \inst|seven_seg_pin_tri_6_~I .input_async_reset = "none";
8777 defparam \inst|seven_seg_pin_tri_6_~I .input_power_up = "low";
8778 defparam \inst|seven_seg_pin_tri_6_~I .input_register_mode = "none";
8779 defparam \inst|seven_seg_pin_tri_6_~I .input_sync_reset = "none";
8780 defparam \inst|seven_seg_pin_tri_6_~I .oe_async_reset = "none";
8781 defparam \inst|seven_seg_pin_tri_6_~I .oe_power_up = "low";
8782 defparam \inst|seven_seg_pin_tri_6_~I .oe_register_mode = "none";
8783 defparam \inst|seven_seg_pin_tri_6_~I .oe_sync_reset = "none";
8784 defparam \inst|seven_seg_pin_tri_6_~I .operation_mode = "output";
8785 defparam \inst|seven_seg_pin_tri_6_~I .output_async_reset = "none";
8786 defparam \inst|seven_seg_pin_tri_6_~I .output_power_up = "low";
8787 defparam \inst|seven_seg_pin_tri_6_~I .output_register_mode = "none";
8788 defparam \inst|seven_seg_pin_tri_6_~I .output_sync_reset = "none";
8789 // synopsys translate_on
8790
8791 // atom is at PIN_R22
8792 stratix_io \inst|seven_seg_pin_tri_5_~I (
8793         .datain(!\~STRATIX_FITTER_CREATED_GND~I_combout ),
8794         .ddiodatain(gnd),
8795         .oe(vcc),
8796         .outclk(gnd),
8797         .outclkena(vcc),
8798         .inclk(gnd),
8799         .inclkena(vcc),
8800         .areset(gnd),
8801         .sreset(gnd),
8802         .delayctrlin(gnd),
8803         .devclrn(devclrn),
8804         .devpor(devpor),
8805         .devoe(devoe),
8806         .combout(),
8807         .regout(),
8808         .ddioregout(),
8809         .padio(seven_seg_pin[5]),
8810         .dqsundelayedout());
8811 // synopsys translate_off
8812 defparam \inst|seven_seg_pin_tri_5_~I .ddio_mode = "none";
8813 defparam \inst|seven_seg_pin_tri_5_~I .input_async_reset = "none";
8814 defparam \inst|seven_seg_pin_tri_5_~I .input_power_up = "low";
8815 defparam \inst|seven_seg_pin_tri_5_~I .input_register_mode = "none";
8816 defparam \inst|seven_seg_pin_tri_5_~I .input_sync_reset = "none";
8817 defparam \inst|seven_seg_pin_tri_5_~I .oe_async_reset = "none";
8818 defparam \inst|seven_seg_pin_tri_5_~I .oe_power_up = "low";
8819 defparam \inst|seven_seg_pin_tri_5_~I .oe_register_mode = "none";
8820 defparam \inst|seven_seg_pin_tri_5_~I .oe_sync_reset = "none";
8821 defparam \inst|seven_seg_pin_tri_5_~I .operation_mode = "output";
8822 defparam \inst|seven_seg_pin_tri_5_~I .output_async_reset = "none";
8823 defparam \inst|seven_seg_pin_tri_5_~I .output_power_up = "low";
8824 defparam \inst|seven_seg_pin_tri_5_~I .output_register_mode = "none";
8825 defparam \inst|seven_seg_pin_tri_5_~I .output_sync_reset = "none";
8826 // synopsys translate_on
8827
8828 // atom is at PIN_R21
8829 stratix_io \inst|seven_seg_pin_tri_4_~I (
8830         .datain(!\~STRATIX_FITTER_CREATED_GND~I_combout ),
8831         .ddiodatain(gnd),
8832         .oe(vcc),
8833         .outclk(gnd),
8834         .outclkena(vcc),
8835         .inclk(gnd),
8836         .inclkena(vcc),
8837         .areset(gnd),
8838         .sreset(gnd),
8839         .delayctrlin(gnd),
8840         .devclrn(devclrn),
8841         .devpor(devpor),
8842         .devoe(devoe),
8843         .combout(),
8844         .regout(),
8845         .ddioregout(),
8846         .padio(seven_seg_pin[4]),
8847         .dqsundelayedout());
8848 // synopsys translate_off
8849 defparam \inst|seven_seg_pin_tri_4_~I .ddio_mode = "none";
8850 defparam \inst|seven_seg_pin_tri_4_~I .input_async_reset = "none";
8851 defparam \inst|seven_seg_pin_tri_4_~I .input_power_up = "low";
8852 defparam \inst|seven_seg_pin_tri_4_~I .input_register_mode = "none";
8853 defparam \inst|seven_seg_pin_tri_4_~I .input_sync_reset = "none";
8854 defparam \inst|seven_seg_pin_tri_4_~I .oe_async_reset = "none";
8855 defparam \inst|seven_seg_pin_tri_4_~I .oe_power_up = "low";
8856 defparam \inst|seven_seg_pin_tri_4_~I .oe_register_mode = "none";
8857 defparam \inst|seven_seg_pin_tri_4_~I .oe_sync_reset = "none";
8858 defparam \inst|seven_seg_pin_tri_4_~I .operation_mode = "output";
8859 defparam \inst|seven_seg_pin_tri_4_~I .output_async_reset = "none";
8860 defparam \inst|seven_seg_pin_tri_4_~I .output_power_up = "low";
8861 defparam \inst|seven_seg_pin_tri_4_~I .output_register_mode = "none";
8862 defparam \inst|seven_seg_pin_tri_4_~I .output_sync_reset = "none";
8863 // synopsys translate_on
8864
8865 // atom is at PIN_R20
8866 stratix_io \inst|seven_seg_pin_tri_3_~I (
8867         .datain(!\~STRATIX_FITTER_CREATED_GND~I_combout ),
8868         .ddiodatain(gnd),
8869         .oe(vcc),
8870         .outclk(gnd),
8871         .outclkena(vcc),
8872         .inclk(gnd),
8873         .inclkena(vcc),
8874         .areset(gnd),
8875         .sreset(gnd),
8876         .delayctrlin(gnd),
8877         .devclrn(devclrn),
8878         .devpor(devpor),
8879         .devoe(devoe),
8880         .combout(),
8881         .regout(),
8882         .ddioregout(),
8883         .padio(seven_seg_pin[3]),
8884         .dqsundelayedout());
8885 // synopsys translate_off
8886 defparam \inst|seven_seg_pin_tri_3_~I .ddio_mode = "none";
8887 defparam \inst|seven_seg_pin_tri_3_~I .input_async_reset = "none";
8888 defparam \inst|seven_seg_pin_tri_3_~I .input_power_up = "low";
8889 defparam \inst|seven_seg_pin_tri_3_~I .input_register_mode = "none";
8890 defparam \inst|seven_seg_pin_tri_3_~I .input_sync_reset = "none";
8891 defparam \inst|seven_seg_pin_tri_3_~I .oe_async_reset = "none";
8892 defparam \inst|seven_seg_pin_tri_3_~I .oe_power_up = "low";
8893 defparam \inst|seven_seg_pin_tri_3_~I .oe_register_mode = "none";
8894 defparam \inst|seven_seg_pin_tri_3_~I .oe_sync_reset = "none";
8895 defparam \inst|seven_seg_pin_tri_3_~I .operation_mode = "output";
8896 defparam \inst|seven_seg_pin_tri_3_~I .output_async_reset = "none";
8897 defparam \inst|seven_seg_pin_tri_3_~I .output_power_up = "low";
8898 defparam \inst|seven_seg_pin_tri_3_~I .output_register_mode = "none";
8899 defparam \inst|seven_seg_pin_tri_3_~I .output_sync_reset = "none";
8900 // synopsys translate_on
8901
8902 // atom is at PIN_R19
8903 stratix_io \inst|seven_seg_pin_out_2_~I (
8904         .datain(\inst|vga_driver_unit|un6_dly_counter_0_x ),
8905         .ddiodatain(gnd),
8906         .oe(vcc),
8907         .outclk(gnd),
8908         .outclkena(vcc),
8909         .inclk(gnd),
8910         .inclkena(vcc),
8911         .areset(gnd),
8912         .sreset(gnd),
8913         .delayctrlin(gnd),
8914         .devclrn(devclrn),
8915         .devpor(devpor),
8916         .devoe(devoe),
8917         .combout(),
8918         .regout(),
8919         .ddioregout(),
8920         .padio(seven_seg_pin[2]),
8921         .dqsundelayedout());
8922 // synopsys translate_off
8923 defparam \inst|seven_seg_pin_out_2_~I .ddio_mode = "none";
8924 defparam \inst|seven_seg_pin_out_2_~I .input_async_reset = "none";
8925 defparam \inst|seven_seg_pin_out_2_~I .input_power_up = "low";
8926 defparam \inst|seven_seg_pin_out_2_~I .input_register_mode = "none";
8927 defparam \inst|seven_seg_pin_out_2_~I .input_sync_reset = "none";
8928 defparam \inst|seven_seg_pin_out_2_~I .oe_async_reset = "none";
8929 defparam \inst|seven_seg_pin_out_2_~I .oe_power_up = "low";
8930 defparam \inst|seven_seg_pin_out_2_~I .oe_register_mode = "none";
8931 defparam \inst|seven_seg_pin_out_2_~I .oe_sync_reset = "none";
8932 defparam \inst|seven_seg_pin_out_2_~I .operation_mode = "output";
8933 defparam \inst|seven_seg_pin_out_2_~I .output_async_reset = "none";
8934 defparam \inst|seven_seg_pin_out_2_~I .output_power_up = "low";
8935 defparam \inst|seven_seg_pin_out_2_~I .output_register_mode = "none";
8936 defparam \inst|seven_seg_pin_out_2_~I .output_sync_reset = "none";
8937 // synopsys translate_on
8938
8939 // atom is at PIN_R9
8940 stratix_io \inst|seven_seg_pin_out_1_~I (
8941         .datain(\inst|vga_driver_unit|un6_dly_counter_0_x ),
8942         .ddiodatain(gnd),
8943         .oe(vcc),
8944         .outclk(gnd),
8945         .outclkena(vcc),
8946         .inclk(gnd),
8947         .inclkena(vcc),
8948         .areset(gnd),
8949         .sreset(gnd),
8950         .delayctrlin(gnd),
8951         .devclrn(devclrn),
8952         .devpor(devpor),
8953         .devoe(devoe),
8954         .combout(),
8955         .regout(),
8956         .ddioregout(),
8957         .padio(seven_seg_pin[1]),
8958         .dqsundelayedout());
8959 // synopsys translate_off
8960 defparam \inst|seven_seg_pin_out_1_~I .ddio_mode = "none";
8961 defparam \inst|seven_seg_pin_out_1_~I .input_async_reset = "none";
8962 defparam \inst|seven_seg_pin_out_1_~I .input_power_up = "low";
8963 defparam \inst|seven_seg_pin_out_1_~I .input_register_mode = "none";
8964 defparam \inst|seven_seg_pin_out_1_~I .input_sync_reset = "none";
8965 defparam \inst|seven_seg_pin_out_1_~I .oe_async_reset = "none";
8966 defparam \inst|seven_seg_pin_out_1_~I .oe_power_up = "low";
8967 defparam \inst|seven_seg_pin_out_1_~I .oe_register_mode = "none";
8968 defparam \inst|seven_seg_pin_out_1_~I .oe_sync_reset = "none";
8969 defparam \inst|seven_seg_pin_out_1_~I .operation_mode = "output";
8970 defparam \inst|seven_seg_pin_out_1_~I .output_async_reset = "none";
8971 defparam \inst|seven_seg_pin_out_1_~I .output_power_up = "low";
8972 defparam \inst|seven_seg_pin_out_1_~I .output_register_mode = "none";
8973 defparam \inst|seven_seg_pin_out_1_~I .output_sync_reset = "none";
8974 // synopsys translate_on
8975
8976 // atom is at PIN_R8
8977 stratix_io \inst|seven_seg_pin_tri_0_~I (
8978         .datain(!\~STRATIX_FITTER_CREATED_GND~I_combout ),
8979         .ddiodatain(gnd),
8980         .oe(vcc),
8981         .outclk(gnd),
8982         .outclkena(vcc),
8983         .inclk(gnd),
8984         .inclkena(vcc),
8985         .areset(gnd),
8986         .sreset(gnd),
8987         .delayctrlin(gnd),
8988         .devclrn(devclrn),
8989         .devpor(devpor),
8990         .devoe(devoe),
8991         .combout(),
8992         .regout(),
8993         .ddioregout(),
8994         .padio(seven_seg_pin[0]),
8995         .dqsundelayedout());
8996 // synopsys translate_off
8997 defparam \inst|seven_seg_pin_tri_0_~I .ddio_mode = "none";
8998 defparam \inst|seven_seg_pin_tri_0_~I .input_async_reset = "none";
8999 defparam \inst|seven_seg_pin_tri_0_~I .input_power_up = "low";
9000 defparam \inst|seven_seg_pin_tri_0_~I .input_register_mode = "none";
9001 defparam \inst|seven_seg_pin_tri_0_~I .input_sync_reset = "none";
9002 defparam \inst|seven_seg_pin_tri_0_~I .oe_async_reset = "none";
9003 defparam \inst|seven_seg_pin_tri_0_~I .oe_power_up = "low";
9004 defparam \inst|seven_seg_pin_tri_0_~I .oe_register_mode = "none";
9005 defparam \inst|seven_seg_pin_tri_0_~I .oe_sync_reset = "none";
9006 defparam \inst|seven_seg_pin_tri_0_~I .operation_mode = "output";
9007 defparam \inst|seven_seg_pin_tri_0_~I .output_async_reset = "none";
9008 defparam \inst|seven_seg_pin_tri_0_~I .output_power_up = "low";
9009 defparam \inst|seven_seg_pin_tri_0_~I .output_register_mode = "none";
9010 defparam \inst|seven_seg_pin_tri_0_~I .output_sync_reset = "none";
9011 // synopsys translate_on
9012
9013 endmodule