bsp2/Designflow/syn/rev_1/syntmp/vga_toc.htm

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   6 <font size=3><b>rev_1 (vga)</b><br></font>
   7 <b><a href="vga_srr.htm#compilerReport1" target="srrFrame">Compiler Report</a></b><br>
   8 <b><a href="vga_srr.htm#mapperReport2" target="srrFrame">Mapper Report</a></b><br>
   9 <b><a href="vga_srr.htm#timingReport3" target="srrFrame">Timing Report</a></b><br>
  10 <a href="vga_srr.htm#performanceSummary4" target="srrFrame">Performance Summary</a><br>
  11 <a href="vga_srr.htm#clockRelationships5" target="srrFrame">Clock Relationships</a><br>
  12 <a href="vga_srr.htm#interfaceInfo6" target="srrFrame">Interface Information</a><br>
  13 <a href="vga_srr.htm#clockReport7" target="srrFrame">Detailed Report for Clock: vga|clk_pin</a><br>
  14 &nbsp;&nbsp;&nbsp;<a href="vga_srr.htm#startingSlack8" target="srrFrame">Starting Points with Worst Slack</a><br>
  15 &nbsp;&nbsp;&nbsp;<a href="vga_srr.htm#endingSlack9" target="srrFrame">Ending Points with Worst Slack</a><br>
  16 &nbsp;&nbsp;&nbsp;<a href="vga_srr.htm#worstPaths10" target="srrFrame">Worst Path Information</a><br>
  17 <b><a href="vga_srr.htm#areaReport11" target="srrFrame">Resource Utilization</a></b><br>