1 // Copyright (C) 1991-2009 Altera Corporation
2 // Your use of Altera Corporation's design tools, logic functions
3 // and other software and tools, and its AMPP partner logic
4 // functions, and any output files from any of the foregoing
5 // (including device programming or simulation files), and any
6 // associated documentation or information are expressly subject
7 // to the terms and conditions of the Altera Program License
8 // Subscription Agreement, Altera MegaCore Function License
9 // Agreement, or other applicable license agreement, including,
10 // without limitation, that your use is for the sole purpose of
11 // programming logic devices manufactured by Altera and sold by
12 // Altera or its authorized distributors. Please refer to the
13 // applicable agreement for further details.
17 // Device: Altera EP1S25F672C6 Package FBGA672
21 // This SDF file should be used for ModelSim (VHDL) only
27 (DATE "10/28/2009 14:19:55")
29 (PROGRAM "Quartus II")
30 (VERSION "Version 9.0 Build 132 02/25/2009 SJ Full Version")
35 (CELLTYPE "stratix_asynch_io")
36 (INSTANCE clk_pin_in.inst1)
39 (IOPATH padio combout (868:868:868) (868:868:868))
44 (CELLTYPE "stratix_asynch_io")
45 (INSTANCE reset_pin_in.inst1)
48 (IOPATH padio combout (760:760:760) (760:760:760))
53 (CELLTYPE "stratix_asynch_lcell")
54 (INSTANCE \\dly_counter_0_\\.lecomb)
57 (PORT dataa (1030:1030:1030) (1030:1030:1030))
58 (PORT datac (5264:5264:5264) (5264:5264:5264))
59 (PORT datad (447:447:447) (447:447:447))
60 (IOPATH dataa regin (583:583:583) (583:583:583))
61 (IOPATH datac regin (364:364:364) (364:364:364))
62 (IOPATH datad regin (235:235:235) (235:235:235))
67 (CELLTYPE "stratix_lcell_register")
68 (INSTANCE \\dly_counter_0_\\.lereg)
71 (PORT aclr (668:668:668) (668:668:668))
72 (PORT clk (2379:2379:2379) (2379:2379:2379))
73 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
74 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
78 (SETUP datain (posedge clk) (10:10:10))
79 (HOLD datain (posedge clk) (100:100:100))
83 (CELLTYPE "stratix_asynch_lcell")
84 (INSTANCE \\dly_counter_1_\\.lecomb)
87 (PORT dataa (1107:1107:1107) (1107:1107:1107))
88 (PORT datab (2654:2654:2654) (2654:2654:2654))
89 (PORT datac (5010:5010:5010) (5010:5010:5010))
90 (IOPATH dataa regin (583:583:583) (583:583:583))
91 (IOPATH datab regin (489:489:489) (489:489:489))
92 (IOPATH datac regin (364:364:364) (364:364:364))
97 (CELLTYPE "stratix_lcell_register")
98 (INSTANCE \\dly_counter_1_\\.lereg)
101 (PORT aclr (668:668:668) (668:668:668))
102 (PORT clk (2379:2379:2379) (2379:2379:2379))
103 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
104 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
108 (SETUP datain (posedge clk) (10:10:10))
109 (HOLD datain (posedge clk) (100:100:100))
113 (CELLTYPE "stratix_asynch_lcell")
114 (INSTANCE \\vga_driver_unit\|vsync_state_6_\\.lecomb)
117 (PORT datab (427:427:427) (427:427:427))
118 (PORT datac (5016:5016:5016) (5016:5016:5016))
119 (PORT datad (1088:1088:1088) (1088:1088:1088))
120 (IOPATH datab regin (489:489:489) (489:489:489))
121 (IOPATH datac regin (364:364:364) (364:364:364))
122 (IOPATH datad regin (235:235:235) (235:235:235))
123 (IOPATH datab combout (332:332:332) (332:332:332))
124 (IOPATH datac combout (213:213:213) (213:213:213))
125 (IOPATH datad combout (87:87:87) (87:87:87))
130 (CELLTYPE "stratix_lcell_register")
131 (INSTANCE \\vga_driver_unit\|vsync_state_6_\\.lereg)
134 (PORT aclr (668:668:668) (668:668:668))
135 (PORT clk (2379:2379:2379) (2379:2379:2379))
136 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
137 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
141 (SETUP datain (posedge clk) (10:10:10))
142 (HOLD datain (posedge clk) (100:100:100))
146 (CELLTYPE "stratix_asynch_lcell")
147 (INSTANCE \\vga_driver_unit\|hsync_state_6_\\.lecomb)
150 (PORT datac (1535:1535:1535) (1535:1535:1535))
151 (PORT datad (1150:1150:1150) (1150:1150:1150))
152 (IOPATH datad combout (87:87:87) (87:87:87))
153 (IOPATH qfbkin combout (291:291:291) (291:291:291))
158 (CELLTYPE "stratix_lcell_register")
159 (INSTANCE \\vga_driver_unit\|hsync_state_6_\\.lereg)
162 (PORT datac (1625:1625:1625) (1625:1625:1625))
163 (PORT aclr (668:668:668) (668:668:668))
164 (PORT clk (2369:2369:2369) (2369:2369:2369))
165 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
166 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
167 (IOPATH (posedge clk) qfbkout (176:176:176) (176:176:176))
168 (IOPATH (posedge aclr) qfbkout (212:212:212) (212:212:212))
172 (SETUP datac (posedge clk) (10:10:10))
173 (SETUP datain (posedge clk) (10:10:10))
174 (HOLD datac (posedge clk) (100:100:100))
175 (HOLD datain (posedge clk) (100:100:100))
179 (CELLTYPE "stratix_asynch_lcell")
180 (INSTANCE \\vga_driver_unit\|hsync_counter_0_\\.lecomb)
183 (PORT datab (423:423:423) (423:423:423))
184 (PORT datac (1506:1506:1506) (1506:1506:1506))
185 (IOPATH datab regin (489:489:489) (489:489:489))
186 (IOPATH datab cout0 (344:344:344) (344:344:344))
187 (IOPATH datab cout1 (341:341:341) (341:341:341))
192 (CELLTYPE "stratix_lcell_register")
193 (INSTANCE \\vga_driver_unit\|hsync_counter_0_\\.lereg)
196 (PORT sload (1448:1448:1448) (1448:1448:1448))
197 (PORT datac (1596:1596:1596) (1596:1596:1596))
198 (PORT sclr (1861:1861:1861) (1861:1861:1861))
199 (PORT aclr (668:668:668) (668:668:668))
200 (PORT clk (2394:2394:2394) (2394:2394:2394))
201 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
202 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
206 (SETUP datac (posedge clk) (10:10:10))
207 (SETUP datain (posedge clk) (10:10:10))
208 (SETUP sclr (posedge clk) (10:10:10))
209 (SETUP sload (posedge clk) (10:10:10))
210 (HOLD datac (posedge clk) (100:100:100))
211 (HOLD datain (posedge clk) (100:100:100))
212 (HOLD sclr (posedge clk) (100:100:100))
213 (HOLD sload (posedge clk) (100:100:100))
217 (CELLTYPE "stratix_asynch_lcell")
218 (INSTANCE \\vga_driver_unit\|hsync_counter_1_\\.lecomb)
221 (PORT datab (419:419:419) (419:419:419))
222 (PORT datac (1505:1505:1505) (1505:1505:1505))
223 (IOPATH datab regin (489:489:489) (489:489:489))
224 (IOPATH cin0 regin (571:571:571) (571:571:571))
225 (IOPATH cin1 regin (587:587:587) (587:587:587))
226 (IOPATH datab cout0 (344:344:344) (344:344:344))
227 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
228 (IOPATH datab cout1 (341:341:341) (341:341:341))
229 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
234 (CELLTYPE "stratix_lcell_register")
235 (INSTANCE \\vga_driver_unit\|hsync_counter_1_\\.lereg)
238 (PORT sload (1448:1448:1448) (1448:1448:1448))
239 (PORT datac (1595:1595:1595) (1595:1595:1595))
240 (PORT sclr (1861:1861:1861) (1861:1861:1861))
241 (PORT aclr (668:668:668) (668:668:668))
242 (PORT clk (2394:2394:2394) (2394:2394:2394))
243 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
244 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
248 (SETUP datac (posedge clk) (10:10:10))
249 (SETUP datain (posedge clk) (10:10:10))
250 (SETUP sclr (posedge clk) (10:10:10))
251 (SETUP sload (posedge clk) (10:10:10))
252 (HOLD datac (posedge clk) (100:100:100))
253 (HOLD datain (posedge clk) (100:100:100))
254 (HOLD sclr (posedge clk) (100:100:100))
255 (HOLD sload (posedge clk) (100:100:100))
259 (CELLTYPE "stratix_asynch_lcell")
260 (INSTANCE \\vga_driver_unit\|hsync_counter_2_\\.lecomb)
263 (PORT dataa (444:444:444) (444:444:444))
264 (PORT datac (1503:1503:1503) (1503:1503:1503))
265 (IOPATH dataa regin (583:583:583) (583:583:583))
266 (IOPATH cin0 regin (571:571:571) (571:571:571))
267 (IOPATH cin1 regin (587:587:587) (587:587:587))
268 (IOPATH dataa cout0 (443:443:443) (443:443:443))
269 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
270 (IOPATH dataa cout1 (451:451:451) (451:451:451))
271 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
276 (CELLTYPE "stratix_lcell_register")
277 (INSTANCE \\vga_driver_unit\|hsync_counter_2_\\.lereg)
280 (PORT sload (1448:1448:1448) (1448:1448:1448))
281 (PORT datac (1593:1593:1593) (1593:1593:1593))
282 (PORT sclr (1861:1861:1861) (1861:1861:1861))
283 (PORT aclr (668:668:668) (668:668:668))
284 (PORT clk (2394:2394:2394) (2394:2394:2394))
285 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
286 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
290 (SETUP datac (posedge clk) (10:10:10))
291 (SETUP datain (posedge clk) (10:10:10))
292 (SETUP sclr (posedge clk) (10:10:10))
293 (SETUP sload (posedge clk) (10:10:10))
294 (HOLD datac (posedge clk) (100:100:100))
295 (HOLD datain (posedge clk) (100:100:100))
296 (HOLD sclr (posedge clk) (100:100:100))
297 (HOLD sload (posedge clk) (100:100:100))
301 (CELLTYPE "stratix_asynch_lcell")
302 (INSTANCE \\vga_driver_unit\|hsync_counter_3_\\.lecomb)
305 (PORT dataa (437:437:437) (437:437:437))
306 (PORT datac (1506:1506:1506) (1506:1506:1506))
307 (IOPATH dataa regin (583:583:583) (583:583:583))
308 (IOPATH cin0 regin (571:571:571) (571:571:571))
309 (IOPATH cin1 regin (587:587:587) (587:587:587))
310 (IOPATH dataa cout0 (443:443:443) (443:443:443))
311 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
312 (IOPATH dataa cout1 (451:451:451) (451:451:451))
313 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
318 (CELLTYPE "stratix_lcell_register")
319 (INSTANCE \\vga_driver_unit\|hsync_counter_3_\\.lereg)
322 (PORT sload (1448:1448:1448) (1448:1448:1448))
323 (PORT datac (1596:1596:1596) (1596:1596:1596))
324 (PORT sclr (1861:1861:1861) (1861:1861:1861))
325 (PORT aclr (668:668:668) (668:668:668))
326 (PORT clk (2394:2394:2394) (2394:2394:2394))
327 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
328 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
332 (SETUP datac (posedge clk) (10:10:10))
333 (SETUP datain (posedge clk) (10:10:10))
334 (SETUP sclr (posedge clk) (10:10:10))
335 (SETUP sload (posedge clk) (10:10:10))
336 (HOLD datac (posedge clk) (100:100:100))
337 (HOLD datain (posedge clk) (100:100:100))
338 (HOLD sclr (posedge clk) (100:100:100))
339 (HOLD sload (posedge clk) (100:100:100))
343 (CELLTYPE "stratix_asynch_lcell")
344 (INSTANCE \\vga_driver_unit\|hsync_counter_4_\\.lecomb)
347 (PORT dataa (445:445:445) (445:445:445))
348 (PORT datac (1509:1509:1509) (1509:1509:1509))
349 (IOPATH dataa regin (583:583:583) (583:583:583))
350 (IOPATH cin0 regin (571:571:571) (571:571:571))
351 (IOPATH cin1 regin (587:587:587) (587:587:587))
352 (IOPATH dataa cout (551:551:551) (551:551:551))
353 (IOPATH cin0 cout (135:135:135) (135:135:135))
354 (IOPATH cin1 cout (123:123:123) (123:123:123))
359 (CELLTYPE "stratix_lcell_register")
360 (INSTANCE \\vga_driver_unit\|hsync_counter_4_\\.lereg)
363 (PORT sload (1448:1448:1448) (1448:1448:1448))
364 (PORT datac (1599:1599:1599) (1599:1599:1599))
365 (PORT sclr (1861:1861:1861) (1861:1861:1861))
366 (PORT aclr (668:668:668) (668:668:668))
367 (PORT clk (2394:2394:2394) (2394:2394:2394))
368 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
369 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
373 (SETUP datac (posedge clk) (10:10:10))
374 (SETUP datain (posedge clk) (10:10:10))
375 (SETUP sclr (posedge clk) (10:10:10))
376 (SETUP sload (posedge clk) (10:10:10))
377 (HOLD datac (posedge clk) (100:100:100))
378 (HOLD datain (posedge clk) (100:100:100))
379 (HOLD sclr (posedge clk) (100:100:100))
380 (HOLD sload (posedge clk) (100:100:100))
384 (CELLTYPE "stratix_asynch_lcell")
385 (INSTANCE \\vga_driver_unit\|hsync_counter_5_\\.lecomb)
388 (PORT datab (420:420:420) (420:420:420))
389 (PORT datac (1516:1516:1516) (1516:1516:1516))
390 (IOPATH datab regin (489:489:489) (489:489:489))
391 (IOPATH cin regin (607:607:607) (607:607:607))
392 (IOPATH datab cout0 (344:344:344) (344:344:344))
393 (IOPATH datab cout1 (341:341:341) (341:341:341))
398 (CELLTYPE "stratix_lcell_register")
399 (INSTANCE \\vga_driver_unit\|hsync_counter_5_\\.lereg)
402 (PORT sload (1448:1448:1448) (1448:1448:1448))
403 (PORT datac (1606:1606:1606) (1606:1606:1606))
404 (PORT sclr (1861:1861:1861) (1861:1861:1861))
405 (PORT aclr (668:668:668) (668:668:668))
406 (PORT clk (2394:2394:2394) (2394:2394:2394))
407 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
408 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
412 (SETUP datac (posedge clk) (10:10:10))
413 (SETUP datain (posedge clk) (10:10:10))
414 (SETUP sclr (posedge clk) (10:10:10))
415 (SETUP sload (posedge clk) (10:10:10))
416 (HOLD datac (posedge clk) (100:100:100))
417 (HOLD datain (posedge clk) (100:100:100))
418 (HOLD sclr (posedge clk) (100:100:100))
419 (HOLD sload (posedge clk) (100:100:100))
423 (CELLTYPE "stratix_asynch_lcell")
424 (INSTANCE \\vga_driver_unit\|hsync_counter_6_\\.lecomb)
427 (PORT datab (422:422:422) (422:422:422))
428 (PORT datac (1514:1514:1514) (1514:1514:1514))
429 (IOPATH datab regin (489:489:489) (489:489:489))
430 (IOPATH cin regin (607:607:607) (607:607:607))
431 (IOPATH cin0 regin (571:571:571) (571:571:571))
432 (IOPATH cin1 regin (587:587:587) (587:587:587))
433 (IOPATH datab cout0 (344:344:344) (344:344:344))
434 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
435 (IOPATH datab cout1 (341:341:341) (341:341:341))
436 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
441 (CELLTYPE "stratix_lcell_register")
442 (INSTANCE \\vga_driver_unit\|hsync_counter_6_\\.lereg)
445 (PORT sload (1448:1448:1448) (1448:1448:1448))
446 (PORT datac (1604:1604:1604) (1604:1604:1604))
447 (PORT sclr (1861:1861:1861) (1861:1861:1861))
448 (PORT aclr (668:668:668) (668:668:668))
449 (PORT clk (2394:2394:2394) (2394:2394:2394))
450 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
451 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
455 (SETUP datac (posedge clk) (10:10:10))
456 (SETUP datain (posedge clk) (10:10:10))
457 (SETUP sclr (posedge clk) (10:10:10))
458 (SETUP sload (posedge clk) (10:10:10))
459 (HOLD datac (posedge clk) (100:100:100))
460 (HOLD datain (posedge clk) (100:100:100))
461 (HOLD sclr (posedge clk) (100:100:100))
462 (HOLD sload (posedge clk) (100:100:100))
466 (CELLTYPE "stratix_asynch_lcell")
467 (INSTANCE \\vga_driver_unit\|hsync_counter_7_\\.lecomb)
470 (PORT dataa (436:436:436) (436:436:436))
471 (PORT datac (1513:1513:1513) (1513:1513:1513))
472 (IOPATH dataa regin (583:583:583) (583:583:583))
473 (IOPATH cin regin (607:607:607) (607:607:607))
474 (IOPATH cin0 regin (571:571:571) (571:571:571))
475 (IOPATH cin1 regin (587:587:587) (587:587:587))
476 (IOPATH dataa cout0 (443:443:443) (443:443:443))
477 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
478 (IOPATH dataa cout1 (451:451:451) (451:451:451))
479 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
484 (CELLTYPE "stratix_lcell_register")
485 (INSTANCE \\vga_driver_unit\|hsync_counter_7_\\.lereg)
488 (PORT sload (1448:1448:1448) (1448:1448:1448))
489 (PORT datac (1603:1603:1603) (1603:1603:1603))
490 (PORT sclr (1861:1861:1861) (1861:1861:1861))
491 (PORT aclr (668:668:668) (668:668:668))
492 (PORT clk (2394:2394:2394) (2394:2394:2394))
493 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
494 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
498 (SETUP datac (posedge clk) (10:10:10))
499 (SETUP datain (posedge clk) (10:10:10))
500 (SETUP sclr (posedge clk) (10:10:10))
501 (SETUP sload (posedge clk) (10:10:10))
502 (HOLD datac (posedge clk) (100:100:100))
503 (HOLD datain (posedge clk) (100:100:100))
504 (HOLD sclr (posedge clk) (100:100:100))
505 (HOLD sload (posedge clk) (100:100:100))
509 (CELLTYPE "stratix_asynch_lcell")
510 (INSTANCE \\vga_driver_unit\|hsync_counter_8_\\.lecomb)
513 (PORT dataa (445:445:445) (445:445:445))
514 (PORT datac (1513:1513:1513) (1513:1513:1513))
515 (IOPATH dataa regin (583:583:583) (583:583:583))
516 (IOPATH cin regin (607:607:607) (607:607:607))
517 (IOPATH cin0 regin (571:571:571) (571:571:571))
518 (IOPATH cin1 regin (587:587:587) (587:587:587))
519 (IOPATH dataa cout0 (443:443:443) (443:443:443))
520 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
521 (IOPATH dataa cout1 (451:451:451) (451:451:451))
522 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
527 (CELLTYPE "stratix_lcell_register")
528 (INSTANCE \\vga_driver_unit\|hsync_counter_8_\\.lereg)
531 (PORT sload (1448:1448:1448) (1448:1448:1448))
532 (PORT datac (1603:1603:1603) (1603:1603:1603))
533 (PORT sclr (1861:1861:1861) (1861:1861:1861))
534 (PORT aclr (668:668:668) (668:668:668))
535 (PORT clk (2394:2394:2394) (2394:2394:2394))
536 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
537 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
541 (SETUP datac (posedge clk) (10:10:10))
542 (SETUP datain (posedge clk) (10:10:10))
543 (SETUP sclr (posedge clk) (10:10:10))
544 (SETUP sload (posedge clk) (10:10:10))
545 (HOLD datac (posedge clk) (100:100:100))
546 (HOLD datain (posedge clk) (100:100:100))
547 (HOLD sclr (posedge clk) (100:100:100))
548 (HOLD sload (posedge clk) (100:100:100))
552 (CELLTYPE "stratix_asynch_lcell")
553 (INSTANCE \\vga_driver_unit\|hsync_counter_9_\\.lecomb)
556 (PORT datac (1512:1512:1512) (1512:1512:1512))
557 (PORT datad (432:432:432) (432:432:432))
558 (IOPATH datad regin (235:235:235) (235:235:235))
559 (IOPATH cin regin (607:607:607) (607:607:607))
560 (IOPATH cin0 regin (571:571:571) (571:571:571))
561 (IOPATH cin1 regin (587:587:587) (587:587:587))
566 (CELLTYPE "stratix_lcell_register")
567 (INSTANCE \\vga_driver_unit\|hsync_counter_9_\\.lereg)
570 (PORT sload (1448:1448:1448) (1448:1448:1448))
571 (PORT datac (1602:1602:1602) (1602:1602:1602))
572 (PORT sclr (1861:1861:1861) (1861:1861:1861))
573 (PORT aclr (668:668:668) (668:668:668))
574 (PORT clk (2394:2394:2394) (2394:2394:2394))
575 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
576 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
580 (SETUP datac (posedge clk) (10:10:10))
581 (SETUP datain (posedge clk) (10:10:10))
582 (SETUP sclr (posedge clk) (10:10:10))
583 (SETUP sload (posedge clk) (10:10:10))
584 (HOLD datac (posedge clk) (100:100:100))
585 (HOLD datain (posedge clk) (100:100:100))
586 (HOLD sclr (posedge clk) (100:100:100))
587 (HOLD sload (posedge clk) (100:100:100))
591 (CELLTYPE "stratix_asynch_lcell")
592 (INSTANCE \\vga_driver_unit\|HSYNC_COUNT_next_un9_hsync_counterlt9_3\\.lecomb)
595 (PORT dataa (663:663:663) (663:663:663))
596 (PORT datab (608:608:608) (608:608:608))
597 (PORT datac (653:653:653) (653:653:653))
598 (PORT datad (986:986:986) (986:986:986))
599 (IOPATH dataa combout (459:459:459) (459:459:459))
600 (IOPATH datab combout (332:332:332) (332:332:332))
601 (IOPATH datac combout (213:213:213) (213:213:213))
602 (IOPATH datad combout (87:87:87) (87:87:87))
607 (CELLTYPE "stratix_asynch_lcell")
608 (INSTANCE \\vga_driver_unit\|HSYNC_FSM_next_un13_hsync_counter_7\\.lecomb)
611 (PORT dataa (638:638:638) (638:638:638))
612 (PORT datab (591:591:591) (591:591:591))
613 (PORT datac (641:641:641) (641:641:641))
614 (PORT datad (641:641:641) (641:641:641))
615 (IOPATH dataa combout (459:459:459) (459:459:459))
616 (IOPATH datab combout (332:332:332) (332:332:332))
617 (IOPATH datac combout (213:213:213) (213:213:213))
618 (IOPATH datad combout (87:87:87) (87:87:87))
623 (CELLTYPE "stratix_asynch_lcell")
624 (INSTANCE \\vga_driver_unit\|HSYNC_COUNT_next_un9_hsync_counterlt9\\.lecomb)
627 (PORT dataa (975:975:975) (975:975:975))
628 (PORT datab (624:624:624) (624:624:624))
629 (PORT datac (366:366:366) (366:366:366))
630 (PORT datad (139:139:139) (139:139:139))
631 (IOPATH dataa combout (459:459:459) (459:459:459))
632 (IOPATH datab combout (332:332:332) (332:332:332))
633 (IOPATH datac combout (213:213:213) (213:213:213))
634 (IOPATH datad combout (87:87:87) (87:87:87))
639 (CELLTYPE "stratix_asynch_lcell")
640 (INSTANCE \\vga_driver_unit\|G_2\\.lecomb)
643 (PORT dataa (447:447:447) (447:447:447))
644 (PORT datab (1613:1613:1613) (1613:1613:1613))
645 (PORT datac (1074:1074:1074) (1074:1074:1074))
646 (PORT datad (1479:1479:1479) (1479:1479:1479))
647 (IOPATH dataa combout (459:459:459) (459:459:459))
648 (IOPATH datab combout (332:332:332) (332:332:332))
649 (IOPATH datac combout (213:213:213) (213:213:213))
650 (IOPATH datad combout (87:87:87) (87:87:87))
655 (CELLTYPE "stratix_asynch_lcell")
656 (INSTANCE \\vga_driver_unit\|HSYNC_FSM_next_un13_hsync_counter_2\\.lecomb)
659 (PORT dataa (662:662:662) (662:662:662))
660 (PORT datab (626:626:626) (626:626:626))
661 (PORT datac (970:970:970) (970:970:970))
662 (PORT datad (991:991:991) (991:991:991))
663 (IOPATH dataa combout (459:459:459) (459:459:459))
664 (IOPATH datab combout (332:332:332) (332:332:332))
665 (IOPATH datac combout (213:213:213) (213:213:213))
666 (IOPATH datad combout (87:87:87) (87:87:87))
671 (CELLTYPE "stratix_asynch_lcell")
672 (INSTANCE \\vga_driver_unit\|HSYNC_FSM_next_un13_hsync_counter\\.lecomb)
675 (PORT dataa (924:924:924) (924:924:924))
676 (PORT datab (609:609:609) (609:609:609))
677 (PORT datac (370:370:370) (370:370:370))
678 (PORT datad (351:351:351) (351:351:351))
679 (IOPATH dataa combout (459:459:459) (459:459:459))
680 (IOPATH datab combout (332:332:332) (332:332:332))
681 (IOPATH datac combout (213:213:213) (213:213:213))
682 (IOPATH datad combout (87:87:87) (87:87:87))
687 (CELLTYPE "stratix_asynch_lcell")
688 (INSTANCE \\vga_driver_unit\|HSYNC_FSM_next_un11_hsync_counter_3\\.lecomb)
691 (PORT dataa (936:936:936) (936:936:936))
692 (PORT datab (924:924:924) (924:924:924))
693 (PORT datac (922:922:922) (922:922:922))
694 (PORT datad (923:923:923) (923:923:923))
695 (IOPATH dataa combout (459:459:459) (459:459:459))
696 (IOPATH datab combout (332:332:332) (332:332:332))
697 (IOPATH datac combout (213:213:213) (213:213:213))
698 (IOPATH datad combout (87:87:87) (87:87:87))
703 (CELLTYPE "stratix_asynch_lcell")
704 (INSTANCE \\vga_driver_unit\|HSYNC_FSM_next_un11_hsync_counter_2\\.lecomb)
707 (PORT datab (927:927:927) (927:927:927))
708 (PORT datac (921:921:921) (921:921:921))
709 (PORT datad (938:938:938) (938:938:938))
710 (IOPATH datab combout (332:332:332) (332:332:332))
711 (IOPATH datac combout (213:213:213) (213:213:213))
712 (IOPATH datad combout (87:87:87) (87:87:87))
717 (CELLTYPE "stratix_asynch_lcell")
718 (INSTANCE \\vga_driver_unit\|HSYNC_FSM_next_un10_hsync_counter_1\\.lecomb)
721 (PORT datab (990:990:990) (990:990:990))
722 (PORT datac (1013:1013:1013) (1013:1013:1013))
723 (PORT datad (1020:1020:1020) (1020:1020:1020))
724 (IOPATH datab combout (332:332:332) (332:332:332))
725 (IOPATH datac combout (213:213:213) (213:213:213))
726 (IOPATH datad combout (87:87:87) (87:87:87))
731 (CELLTYPE "stratix_asynch_lcell")
732 (INSTANCE \\vga_driver_unit\|hsync_state_5_\\.lecomb)
735 (PORT dataa (447:447:447) (447:447:447))
736 (PORT datac (1641:1641:1641) (1641:1641:1641))
737 (IOPATH dataa regin (583:583:583) (583:583:583))
738 (IOPATH datac regin (364:364:364) (364:364:364))
743 (CELLTYPE "stratix_lcell_register")
744 (INSTANCE \\vga_driver_unit\|hsync_state_5_\\.lereg)
747 (PORT sclr (2555:2555:2555) (2555:2555:2555))
748 (PORT aclr (668:668:668) (668:668:668))
749 (PORT clk (2387:2387:2387) (2387:2387:2387))
750 (PORT ena (1796:1796:1796) (1796:1796:1796))
751 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
752 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
756 (SETUP datain (posedge clk) (10:10:10))
757 (SETUP sclr (posedge clk) (10:10:10))
758 (SETUP ena (posedge clk) (10:10:10))
759 (HOLD datain (posedge clk) (100:100:100))
760 (HOLD sclr (posedge clk) (100:100:100))
761 (HOLD ena (posedge clk) (100:100:100))
765 (CELLTYPE "stratix_asynch_lcell")
766 (INSTANCE \\vga_driver_unit\|HSYNC_FSM_next_un10_hsync_counter_4\\.lecomb)
769 (PORT dataa (922:922:922) (922:922:922))
770 (PORT datab (927:927:927) (927:927:927))
771 (PORT datac (958:958:958) (958:958:958))
772 (PORT datad (925:925:925) (925:925:925))
773 (IOPATH dataa combout (459:459:459) (459:459:459))
774 (IOPATH datab combout (332:332:332) (332:332:332))
775 (IOPATH datac combout (213:213:213) (213:213:213))
776 (IOPATH datad combout (87:87:87) (87:87:87))
781 (CELLTYPE "stratix_asynch_lcell")
782 (INSTANCE \\vga_driver_unit\|HSYNC_FSM_next_un10_hsync_counter_3\\.lecomb)
785 (PORT datab (926:926:926) (926:926:926))
786 (PORT datac (924:924:924) (924:924:924))
787 (PORT datad (938:938:938) (938:938:938))
788 (IOPATH datab combout (332:332:332) (332:332:332))
789 (IOPATH datac combout (213:213:213) (213:213:213))
790 (IOPATH datad combout (87:87:87) (87:87:87))
795 (CELLTYPE "stratix_asynch_lcell")
796 (INSTANCE \\vga_driver_unit\|hsync_state_4_\\.lecomb)
799 (PORT dataa (1226:1226:1226) (1226:1226:1226))
800 (PORT datab (856:856:856) (856:856:856))
801 (PORT datac (1030:1030:1030) (1030:1030:1030))
802 (PORT datad (856:856:856) (856:856:856))
803 (IOPATH dataa regin (583:583:583) (583:583:583))
804 (IOPATH datab regin (489:489:489) (489:489:489))
805 (IOPATH datac regin (364:364:364) (364:364:364))
806 (IOPATH datad regin (235:235:235) (235:235:235))
811 (CELLTYPE "stratix_lcell_register")
812 (INSTANCE \\vga_driver_unit\|hsync_state_4_\\.lereg)
815 (PORT sclr (2570:2570:2570) (2570:2570:2570))
816 (PORT aclr (668:668:668) (668:668:668))
817 (PORT clk (2394:2394:2394) (2394:2394:2394))
818 (PORT ena (1299:1299:1299) (1299:1299:1299))
819 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
820 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
824 (SETUP datain (posedge clk) (10:10:10))
825 (SETUP sclr (posedge clk) (10:10:10))
826 (SETUP ena (posedge clk) (10:10:10))
827 (HOLD datain (posedge clk) (100:100:100))
828 (HOLD sclr (posedge clk) (100:100:100))
829 (HOLD ena (posedge clk) (100:100:100))
833 (CELLTYPE "stratix_asynch_lcell")
834 (INSTANCE \\vga_driver_unit\|hsync_state_1_\\.lecomb)
837 (PORT dataa (565:565:565) (565:565:565))
838 (PORT datab (565:565:565) (565:565:565))
839 (PORT datac (1029:1029:1029) (1029:1029:1029))
840 (PORT datad (440:440:440) (440:440:440))
841 (IOPATH dataa regin (583:583:583) (583:583:583))
842 (IOPATH datab regin (489:489:489) (489:489:489))
843 (IOPATH datac regin (364:364:364) (364:364:364))
844 (IOPATH datad regin (235:235:235) (235:235:235))
849 (CELLTYPE "stratix_lcell_register")
850 (INSTANCE \\vga_driver_unit\|hsync_state_1_\\.lereg)
853 (PORT sclr (2570:2570:2570) (2570:2570:2570))
854 (PORT aclr (668:668:668) (668:668:668))
855 (PORT clk (2394:2394:2394) (2394:2394:2394))
856 (PORT ena (1299:1299:1299) (1299:1299:1299))
857 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
858 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
862 (SETUP datain (posedge clk) (10:10:10))
863 (SETUP sclr (posedge clk) (10:10:10))
864 (SETUP ena (posedge clk) (10:10:10))
865 (HOLD datain (posedge clk) (100:100:100))
866 (HOLD sclr (posedge clk) (100:100:100))
867 (HOLD ena (posedge clk) (100:100:100))
871 (CELLTYPE "stratix_asynch_lcell")
872 (INSTANCE \\vga_driver_unit\|hsync_state_3_\\.lecomb)
875 (PORT dataa (984:984:984) (984:984:984))
876 (PORT datab (343:343:343) (343:343:343))
877 (PORT datac (1016:1016:1016) (1016:1016:1016))
878 (PORT datad (353:353:353) (353:353:353))
879 (IOPATH dataa combout (459:459:459) (459:459:459))
880 (IOPATH datab combout (332:332:332) (332:332:332))
881 (IOPATH datad combout (87:87:87) (87:87:87))
882 (IOPATH qfbkin combout (291:291:291) (291:291:291))
887 (CELLTYPE "stratix_lcell_register")
888 (INSTANCE \\vga_driver_unit\|hsync_state_3_\\.lereg)
891 (PORT datac (1106:1106:1106) (1106:1106:1106))
892 (PORT sclr (2308:2308:2308) (2308:2308:2308))
893 (PORT aclr (668:668:668) (668:668:668))
894 (PORT clk (2394:2394:2394) (2394:2394:2394))
895 (PORT ena (1091:1091:1091) (1091:1091:1091))
896 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
897 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
898 (IOPATH (posedge clk) qfbkout (176:176:176) (176:176:176))
899 (IOPATH (posedge aclr) qfbkout (212:212:212) (212:212:212))
903 (SETUP datac (posedge clk) (10:10:10))
904 (SETUP datain (posedge clk) (10:10:10))
905 (SETUP sclr (posedge clk) (10:10:10))
906 (SETUP ena (posedge clk) (10:10:10))
907 (HOLD datac (posedge clk) (100:100:100))
908 (HOLD datain (posedge clk) (100:100:100))
909 (HOLD sclr (posedge clk) (100:100:100))
910 (HOLD ena (posedge clk) (100:100:100))
914 (CELLTYPE "stratix_asynch_lcell")
915 (INSTANCE \\vga_driver_unit\|hsync_state_next_1_sqmuxa_1_cZ\\.lecomb)
918 (PORT dataa (1228:1228:1228) (1228:1228:1228))
919 (PORT datab (547:547:547) (547:547:547))
920 (PORT datac (552:552:552) (552:552:552))
921 (PORT datad (1038:1038:1038) (1038:1038:1038))
922 (IOPATH dataa combout (459:459:459) (459:459:459))
923 (IOPATH datab combout (332:332:332) (332:332:332))
924 (IOPATH datac combout (213:213:213) (213:213:213))
925 (IOPATH datad combout (87:87:87) (87:87:87))
930 (CELLTYPE "stratix_asynch_lcell")
931 (INSTANCE \\vga_driver_unit\|hsync_state_next_1_sqmuxa_2_cZ\\.lecomb)
934 (PORT dataa (638:638:638) (638:638:638))
935 (PORT datab (560:560:560) (560:560:560))
936 (PORT datac (367:367:367) (367:367:367))
937 (PORT datad (1041:1041:1041) (1041:1041:1041))
938 (IOPATH dataa combout (459:459:459) (459:459:459))
939 (IOPATH datab combout (332:332:332) (332:332:332))
940 (IOPATH datac combout (213:213:213) (213:213:213))
941 (IOPATH datad combout (87:87:87) (87:87:87))
946 (CELLTYPE "stratix_asynch_lcell")
947 (INSTANCE \\vga_driver_unit\|hsync_state_3_0_0_0__g0_0_cZ\\.lecomb)
950 (PORT dataa (1544:1544:1544) (1544:1544:1544))
951 (PORT datab (343:343:343) (343:343:343))
952 (PORT datac (562:562:562) (562:562:562))
953 (PORT datad (544:544:544) (544:544:544))
954 (IOPATH dataa combout (459:459:459) (459:459:459))
955 (IOPATH datab combout (332:332:332) (332:332:332))
956 (IOPATH datac combout (213:213:213) (213:213:213))
957 (IOPATH datad combout (87:87:87) (87:87:87))
962 (CELLTYPE "stratix_asynch_lcell")
963 (INSTANCE \\vga_driver_unit\|hsync_state_0_\\.lecomb)
966 (PORT datab (1051:1051:1051) (1051:1051:1051))
967 (PORT datac (1129:1129:1129) (1129:1129:1129))
968 (IOPATH datab regin (489:489:489) (489:489:489))
969 (IOPATH datac regin (364:364:364) (364:364:364))
974 (CELLTYPE "stratix_lcell_register")
975 (INSTANCE \\vga_driver_unit\|hsync_state_0_\\.lereg)
978 (PORT sclr (2555:2555:2555) (2555:2555:2555))
979 (PORT aclr (668:668:668) (668:668:668))
980 (PORT clk (2387:2387:2387) (2387:2387:2387))
981 (PORT ena (1796:1796:1796) (1796:1796:1796))
982 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
983 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
987 (SETUP datain (posedge clk) (10:10:10))
988 (SETUP sclr (posedge clk) (10:10:10))
989 (SETUP ena (posedge clk) (10:10:10))
990 (HOLD datain (posedge clk) (100:100:100))
991 (HOLD sclr (posedge clk) (100:100:100))
992 (HOLD ena (posedge clk) (100:100:100))
996 (CELLTYPE "stratix_asynch_lcell")
997 (INSTANCE \\vga_driver_unit\|hsync_counter_next_1_sqmuxa_cZ\\.lecomb)
1000 (PORT dataa (5249:5249:5249) (5249:5249:5249))
1001 (PORT datab (1448:1448:1448) (1448:1448:1448))
1002 (PORT datac (1232:1232:1232) (1232:1232:1232))
1003 (PORT datad (139:139:139) (139:139:139))
1004 (IOPATH dataa combout (459:459:459) (459:459:459))
1005 (IOPATH datab combout (332:332:332) (332:332:332))
1006 (IOPATH datac combout (213:213:213) (213:213:213))
1007 (IOPATH datad combout (87:87:87) (87:87:87))
1012 (CELLTYPE "stratix_asynch_lcell")
1013 (INSTANCE \\vga_driver_unit\|HSYNC_FSM_next_un12_hsync_counter_4\\.lecomb)
1016 (PORT dataa (654:654:654) (654:654:654))
1017 (PORT datab (622:622:622) (622:622:622))
1018 (PORT datac (623:623:623) (623:623:623))
1019 (PORT datad (642:642:642) (642:642:642))
1020 (IOPATH dataa combout (459:459:459) (459:459:459))
1021 (IOPATH datab combout (332:332:332) (332:332:332))
1022 (IOPATH datac combout (213:213:213) (213:213:213))
1023 (IOPATH datad combout (87:87:87) (87:87:87))
1028 (CELLTYPE "stratix_asynch_lcell")
1029 (INSTANCE \\vga_driver_unit\|HSYNC_FSM_next_un12_hsync_counter_3\\.lecomb)
1032 (PORT dataa (667:667:667) (667:667:667))
1033 (PORT datab (592:592:592) (592:592:592))
1034 (PORT datac (971:971:971) (971:971:971))
1035 (PORT datad (986:986:986) (986:986:986))
1036 (IOPATH dataa combout (459:459:459) (459:459:459))
1037 (IOPATH datab combout (332:332:332) (332:332:332))
1038 (IOPATH datac combout (213:213:213) (213:213:213))
1039 (IOPATH datad combout (87:87:87) (87:87:87))
1044 (CELLTYPE "stratix_asynch_lcell")
1045 (INSTANCE \\vga_driver_unit\|HSYNC_FSM_next_un12_hsync_counter\\.lecomb)
1048 (PORT dataa (638:638:638) (638:638:638))
1049 (PORT datab (624:624:624) (624:624:624))
1050 (PORT datac (369:369:369) (369:369:369))
1051 (PORT datad (351:351:351) (351:351:351))
1052 (IOPATH dataa combout (459:459:459) (459:459:459))
1053 (IOPATH datab combout (332:332:332) (332:332:332))
1054 (IOPATH datac combout (213:213:213) (213:213:213))
1055 (IOPATH datad combout (87:87:87) (87:87:87))
1060 (CELLTYPE "stratix_asynch_lcell")
1061 (INSTANCE \\vga_driver_unit\|hsync_state_2_\\.lecomb)
1064 (PORT datab (951:951:951) (951:951:951))
1065 (PORT datac (561:561:561) (561:561:561))
1066 (IOPATH datab regin (489:489:489) (489:489:489))
1067 (IOPATH datac regin (364:364:364) (364:364:364))
1072 (CELLTYPE "stratix_lcell_register")
1073 (INSTANCE \\vga_driver_unit\|hsync_state_2_\\.lereg)
1076 (PORT sclr (2570:2570:2570) (2570:2570:2570))
1077 (PORT aclr (668:668:668) (668:668:668))
1078 (PORT clk (2394:2394:2394) (2394:2394:2394))
1079 (PORT ena (1299:1299:1299) (1299:1299:1299))
1080 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1081 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1085 (SETUP datain (posedge clk) (10:10:10))
1086 (SETUP sclr (posedge clk) (10:10:10))
1087 (SETUP ena (posedge clk) (10:10:10))
1088 (HOLD datain (posedge clk) (100:100:100))
1089 (HOLD sclr (posedge clk) (100:100:100))
1090 (HOLD ena (posedge clk) (100:100:100))
1094 (CELLTYPE "stratix_asynch_lcell")
1095 (INSTANCE \\vga_driver_unit\|v_enable_sig_1_0_0_0_g0_i_o4_cZ\\.lecomb)
1098 (PORT datab (435:435:435) (435:435:435))
1099 (PORT datac (1220:1220:1220) (1220:1220:1220))
1100 (PORT datad (1534:1534:1534) (1534:1534:1534))
1101 (IOPATH datab combout (332:332:332) (332:332:332))
1102 (IOPATH datac combout (213:213:213) (213:213:213))
1103 (IOPATH datad combout (87:87:87) (87:87:87))
1108 (CELLTYPE "stratix_asynch_lcell")
1109 (INSTANCE \\vga_driver_unit\|v_enable_sig_Z\\.lecomb)
1112 (PORT datab (1196:1196:1196) (1196:1196:1196))
1113 (PORT datac (1173:1173:1173) (1173:1173:1173))
1114 (IOPATH datab regin (489:489:489) (489:489:489))
1115 (IOPATH datac regin (364:364:364) (364:364:364))
1120 (CELLTYPE "stratix_lcell_register")
1121 (INSTANCE \\vga_driver_unit\|v_enable_sig_Z\\.lereg)
1124 (PORT sclr (2271:2271:2271) (2271:2271:2271))
1125 (PORT aclr (668:668:668) (668:668:668))
1126 (PORT clk (2359:2359:2359) (2359:2359:2359))
1127 (PORT ena (1824:1824:1824) (1824:1824:1824))
1128 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1129 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1133 (SETUP datain (posedge clk) (10:10:10))
1134 (SETUP sclr (posedge clk) (10:10:10))
1135 (SETUP ena (posedge clk) (10:10:10))
1136 (HOLD datain (posedge clk) (100:100:100))
1137 (HOLD sclr (posedge clk) (100:100:100))
1138 (HOLD ena (posedge clk) (100:100:100))
1142 (CELLTYPE "stratix_asynch_lcell")
1143 (INSTANCE \\vga_control_unit\|toggle_counter_sig_0_\\.lecomb)
1146 (PORT datac (441:441:441) (441:441:441))
1147 (IOPATH datac regin (364:364:364) (364:364:364))
1152 (CELLTYPE "stratix_lcell_register")
1153 (INSTANCE \\vga_control_unit\|toggle_counter_sig_0_\\.lereg)
1156 (PORT sclr (1149:1149:1149) (1149:1149:1149))
1157 (PORT aclr (5095:5095:5095) (5095:5095:5095))
1158 (PORT clk (2323:2323:2323) (2323:2323:2323))
1159 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1160 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1164 (SETUP datain (posedge clk) (10:10:10))
1165 (SETUP sclr (posedge clk) (10:10:10))
1166 (HOLD datain (posedge clk) (100:100:100))
1167 (HOLD sclr (posedge clk) (100:100:100))
1171 (CELLTYPE "stratix_asynch_lcell")
1172 (INSTANCE \\vga_control_unit\|toggle_counter_sig_1_\\.lecomb)
1175 (PORT dataa (607:607:607) (607:607:607))
1176 (PORT datab (423:423:423) (423:423:423))
1177 (IOPATH dataa regin (583:583:583) (583:583:583))
1178 (IOPATH datab regin (489:489:489) (489:489:489))
1179 (IOPATH dataa cout0 (443:443:443) (443:443:443))
1180 (IOPATH datab cout0 (344:344:344) (344:344:344))
1181 (IOPATH dataa cout1 (451:451:451) (451:451:451))
1182 (IOPATH datab cout1 (341:341:341) (341:341:341))
1187 (CELLTYPE "stratix_lcell_register")
1188 (INSTANCE \\vga_control_unit\|toggle_counter_sig_1_\\.lereg)
1191 (PORT sclr (1319:1319:1319) (1319:1319:1319))
1192 (PORT aclr (5095:5095:5095) (5095:5095:5095))
1193 (PORT clk (2323:2323:2323) (2323:2323:2323))
1194 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1195 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1199 (SETUP datain (posedge clk) (10:10:10))
1200 (SETUP sclr (posedge clk) (10:10:10))
1201 (HOLD datain (posedge clk) (100:100:100))
1202 (HOLD sclr (posedge clk) (100:100:100))
1206 (CELLTYPE "stratix_asynch_lcell")
1207 (INSTANCE \\vga_control_unit\|toggle_counter_sig_3_\\.lecomb)
1210 (PORT dataa (939:939:939) (939:939:939))
1211 (PORT datab (419:419:419) (419:419:419))
1212 (IOPATH dataa regin (583:583:583) (583:583:583))
1213 (IOPATH datab regin (489:489:489) (489:489:489))
1214 (IOPATH cin0 regin (571:571:571) (571:571:571))
1215 (IOPATH cin1 regin (587:587:587) (587:587:587))
1216 (IOPATH dataa cout0 (443:443:443) (443:443:443))
1217 (IOPATH datab cout0 (344:344:344) (344:344:344))
1218 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
1219 (IOPATH dataa cout1 (451:451:451) (451:451:451))
1220 (IOPATH datab cout1 (341:341:341) (341:341:341))
1221 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
1226 (CELLTYPE "stratix_lcell_register")
1227 (INSTANCE \\vga_control_unit\|toggle_counter_sig_3_\\.lereg)
1230 (PORT sclr (1319:1319:1319) (1319:1319:1319))
1231 (PORT aclr (5095:5095:5095) (5095:5095:5095))
1232 (PORT clk (2323:2323:2323) (2323:2323:2323))
1233 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1234 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1238 (SETUP datain (posedge clk) (10:10:10))
1239 (SETUP sclr (posedge clk) (10:10:10))
1240 (HOLD datain (posedge clk) (100:100:100))
1241 (HOLD sclr (posedge clk) (100:100:100))
1245 (CELLTYPE "stratix_asynch_lcell")
1246 (INSTANCE \\vga_control_unit\|un2_toggle_counter_next_0_\\.lecomb)
1249 (PORT dataa (618:618:618) (618:618:618))
1250 (PORT datab (906:906:906) (906:906:906))
1251 (IOPATH dataa cout0 (443:443:443) (443:443:443))
1252 (IOPATH datab cout0 (344:344:344) (344:344:344))
1253 (IOPATH dataa cout1 (451:451:451) (451:451:451))
1254 (IOPATH datab cout1 (341:341:341) (341:341:341))
1259 (CELLTYPE "stratix_asynch_lcell")
1260 (INSTANCE \\vga_control_unit\|toggle_counter_sig_2_\\.lecomb)
1263 (PORT dataa (634:634:634) (634:634:634))
1264 (PORT datab (889:889:889) (889:889:889))
1265 (IOPATH dataa regin (583:583:583) (583:583:583))
1266 (IOPATH datab regin (489:489:489) (489:489:489))
1267 (IOPATH cin0 regin (571:571:571) (571:571:571))
1268 (IOPATH cin1 regin (587:587:587) (587:587:587))
1269 (IOPATH dataa cout0 (443:443:443) (443:443:443))
1270 (IOPATH datab cout0 (344:344:344) (344:344:344))
1271 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
1272 (IOPATH dataa cout1 (451:451:451) (451:451:451))
1273 (IOPATH datab cout1 (341:341:341) (341:341:341))
1274 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
1279 (CELLTYPE "stratix_lcell_register")
1280 (INSTANCE \\vga_control_unit\|toggle_counter_sig_2_\\.lereg)
1283 (PORT sclr (1348:1348:1348) (1348:1348:1348))
1284 (PORT aclr (5095:5095:5095) (5095:5095:5095))
1285 (PORT clk (2323:2323:2323) (2323:2323:2323))
1286 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1287 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1291 (SETUP datain (posedge clk) (10:10:10))
1292 (SETUP sclr (posedge clk) (10:10:10))
1293 (HOLD datain (posedge clk) (100:100:100))
1294 (HOLD sclr (posedge clk) (100:100:100))
1298 (CELLTYPE "stratix_asynch_lcell")
1299 (INSTANCE \\vga_control_unit\|toggle_counter_sig_4_\\.lecomb)
1302 (PORT dataa (429:429:429) (429:429:429))
1303 (PORT datab (963:963:963) (963:963:963))
1304 (IOPATH dataa regin (583:583:583) (583:583:583))
1305 (IOPATH datab regin (489:489:489) (489:489:489))
1306 (IOPATH cin0 regin (571:571:571) (571:571:571))
1307 (IOPATH cin1 regin (587:587:587) (587:587:587))
1308 (IOPATH dataa cout0 (443:443:443) (443:443:443))
1309 (IOPATH datab cout0 (344:344:344) (344:344:344))
1310 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
1311 (IOPATH dataa cout1 (451:451:451) (451:451:451))
1312 (IOPATH datab cout1 (341:341:341) (341:341:341))
1313 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
1318 (CELLTYPE "stratix_lcell_register")
1319 (INSTANCE \\vga_control_unit\|toggle_counter_sig_4_\\.lereg)
1322 (PORT sclr (1348:1348:1348) (1348:1348:1348))
1323 (PORT aclr (5095:5095:5095) (5095:5095:5095))
1324 (PORT clk (2323:2323:2323) (2323:2323:2323))
1325 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1326 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1330 (SETUP datain (posedge clk) (10:10:10))
1331 (SETUP sclr (posedge clk) (10:10:10))
1332 (HOLD datain (posedge clk) (100:100:100))
1333 (HOLD sclr (posedge clk) (100:100:100))
1337 (CELLTYPE "stratix_asynch_lcell")
1338 (INSTANCE \\vga_control_unit\|toggle_counter_sig_5_\\.lecomb)
1341 (PORT dataa (444:444:444) (444:444:444))
1342 (PORT datab (894:894:894) (894:894:894))
1343 (IOPATH dataa regin (583:583:583) (583:583:583))
1344 (IOPATH datab regin (489:489:489) (489:489:489))
1345 (IOPATH cin0 regin (571:571:571) (571:571:571))
1346 (IOPATH cin1 regin (587:587:587) (587:587:587))
1347 (IOPATH dataa cout0 (443:443:443) (443:443:443))
1348 (IOPATH datab cout0 (344:344:344) (344:344:344))
1349 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
1350 (IOPATH dataa cout1 (451:451:451) (451:451:451))
1351 (IOPATH datab cout1 (341:341:341) (341:341:341))
1352 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
1357 (CELLTYPE "stratix_lcell_register")
1358 (INSTANCE \\vga_control_unit\|toggle_counter_sig_5_\\.lereg)
1361 (PORT sclr (1319:1319:1319) (1319:1319:1319))
1362 (PORT aclr (5095:5095:5095) (5095:5095:5095))
1363 (PORT clk (2323:2323:2323) (2323:2323:2323))
1364 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1365 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1369 (SETUP datain (posedge clk) (10:10:10))
1370 (SETUP sclr (posedge clk) (10:10:10))
1371 (HOLD datain (posedge clk) (100:100:100))
1372 (HOLD sclr (posedge clk) (100:100:100))
1376 (CELLTYPE "stratix_asynch_lcell")
1377 (INSTANCE \\vga_control_unit\|toggle_counter_sig_7_\\.lecomb)
1380 (PORT dataa (437:437:437) (437:437:437))
1381 (PORT datab (928:928:928) (928:928:928))
1382 (IOPATH dataa regin (583:583:583) (583:583:583))
1383 (IOPATH datab regin (489:489:489) (489:489:489))
1384 (IOPATH cin0 regin (571:571:571) (571:571:571))
1385 (IOPATH cin1 regin (587:587:587) (587:587:587))
1386 (IOPATH dataa cout0 (443:443:443) (443:443:443))
1387 (IOPATH datab cout0 (344:344:344) (344:344:344))
1388 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
1389 (IOPATH dataa cout1 (451:451:451) (451:451:451))
1390 (IOPATH datab cout1 (341:341:341) (341:341:341))
1391 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
1396 (CELLTYPE "stratix_lcell_register")
1397 (INSTANCE \\vga_control_unit\|toggle_counter_sig_7_\\.lereg)
1400 (PORT sclr (1319:1319:1319) (1319:1319:1319))
1401 (PORT aclr (5095:5095:5095) (5095:5095:5095))
1402 (PORT clk (2323:2323:2323) (2323:2323:2323))
1403 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1404 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1408 (SETUP datain (posedge clk) (10:10:10))
1409 (SETUP sclr (posedge clk) (10:10:10))
1410 (HOLD datain (posedge clk) (100:100:100))
1411 (HOLD sclr (posedge clk) (100:100:100))
1415 (CELLTYPE "stratix_asynch_lcell")
1416 (INSTANCE \\vga_control_unit\|toggle_counter_sig_6_\\.lecomb)
1419 (PORT dataa (432:432:432) (432:432:432))
1420 (PORT datab (908:908:908) (908:908:908))
1421 (IOPATH dataa regin (583:583:583) (583:583:583))
1422 (IOPATH datab regin (489:489:489) (489:489:489))
1423 (IOPATH cin0 regin (571:571:571) (571:571:571))
1424 (IOPATH cin1 regin (587:587:587) (587:587:587))
1425 (IOPATH dataa cout0 (443:443:443) (443:443:443))
1426 (IOPATH datab cout0 (344:344:344) (344:344:344))
1427 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
1428 (IOPATH dataa cout1 (451:451:451) (451:451:451))
1429 (IOPATH datab cout1 (341:341:341) (341:341:341))
1430 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
1435 (CELLTYPE "stratix_lcell_register")
1436 (INSTANCE \\vga_control_unit\|toggle_counter_sig_6_\\.lereg)
1439 (PORT sclr (1348:1348:1348) (1348:1348:1348))
1440 (PORT aclr (5095:5095:5095) (5095:5095:5095))
1441 (PORT clk (2323:2323:2323) (2323:2323:2323))
1442 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1443 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1447 (SETUP datain (posedge clk) (10:10:10))
1448 (SETUP sclr (posedge clk) (10:10:10))
1449 (HOLD datain (posedge clk) (100:100:100))
1450 (HOLD sclr (posedge clk) (100:100:100))
1454 (CELLTYPE "stratix_asynch_lcell")
1455 (INSTANCE \\vga_control_unit\|toggle_counter_sig_8_\\.lecomb)
1458 (PORT dataa (947:947:947) (947:947:947))
1459 (PORT datab (413:413:413) (413:413:413))
1460 (IOPATH dataa regin (583:583:583) (583:583:583))
1461 (IOPATH datab regin (489:489:489) (489:489:489))
1462 (IOPATH cin0 regin (571:571:571) (571:571:571))
1463 (IOPATH cin1 regin (587:587:587) (587:587:587))
1464 (IOPATH dataa cout (644:644:644) (644:644:644))
1465 (IOPATH datab cout (533:533:533) (533:533:533))
1466 (IOPATH cin0 cout (219:219:219) (219:219:219))
1467 (IOPATH cin1 cout (205:205:205) (205:205:205))
1472 (CELLTYPE "stratix_lcell_register")
1473 (INSTANCE \\vga_control_unit\|toggle_counter_sig_8_\\.lereg)
1476 (PORT sclr (1348:1348:1348) (1348:1348:1348))
1477 (PORT aclr (5095:5095:5095) (5095:5095:5095))
1478 (PORT clk (2323:2323:2323) (2323:2323:2323))
1479 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1480 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1484 (SETUP datain (posedge clk) (10:10:10))
1485 (SETUP sclr (posedge clk) (10:10:10))
1486 (HOLD datain (posedge clk) (100:100:100))
1487 (HOLD sclr (posedge clk) (100:100:100))
1491 (CELLTYPE "stratix_asynch_lcell")
1492 (INSTANCE \\vga_control_unit\|toggle_counter_sig_9_\\.lecomb)
1495 (PORT dataa (445:445:445) (445:445:445))
1496 (PORT datab (922:922:922) (922:922:922))
1497 (IOPATH dataa regin (583:583:583) (583:583:583))
1498 (IOPATH datab regin (489:489:489) (489:489:489))
1499 (IOPATH cin0 regin (571:571:571) (571:571:571))
1500 (IOPATH cin1 regin (587:587:587) (587:587:587))
1501 (IOPATH dataa cout (551:551:551) (551:551:551))
1502 (IOPATH datab cout (460:460:460) (460:460:460))
1503 (IOPATH cin0 cout (135:135:135) (135:135:135))
1504 (IOPATH cin1 cout (123:123:123) (123:123:123))
1509 (CELLTYPE "stratix_lcell_register")
1510 (INSTANCE \\vga_control_unit\|toggle_counter_sig_9_\\.lereg)
1513 (PORT sclr (1319:1319:1319) (1319:1319:1319))
1514 (PORT aclr (5095:5095:5095) (5095:5095:5095))
1515 (PORT clk (2323:2323:2323) (2323:2323:2323))
1516 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1517 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1521 (SETUP datain (posedge clk) (10:10:10))
1522 (SETUP sclr (posedge clk) (10:10:10))
1523 (HOLD datain (posedge clk) (100:100:100))
1524 (HOLD sclr (posedge clk) (100:100:100))
1528 (CELLTYPE "stratix_asynch_lcell")
1529 (INSTANCE \\vga_control_unit\|toggle_counter_sig_11_\\.lecomb)
1532 (PORT dataa (1371:1371:1371) (1371:1371:1371))
1533 (PORT datab (420:420:420) (420:420:420))
1534 (IOPATH dataa regin (583:583:583) (583:583:583))
1535 (IOPATH datab regin (489:489:489) (489:489:489))
1536 (IOPATH cin regin (607:607:607) (607:607:607))
1537 (IOPATH dataa cout0 (443:443:443) (443:443:443))
1538 (IOPATH datab cout0 (344:344:344) (344:344:344))
1539 (IOPATH dataa cout1 (451:451:451) (451:451:451))
1540 (IOPATH datab cout1 (341:341:341) (341:341:341))
1545 (CELLTYPE "stratix_lcell_register")
1546 (INSTANCE \\vga_control_unit\|toggle_counter_sig_11_\\.lereg)
1549 (PORT sclr (1319:1319:1319) (1319:1319:1319))
1550 (PORT aclr (5095:5095:5095) (5095:5095:5095))
1551 (PORT clk (2323:2323:2323) (2323:2323:2323))
1552 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1553 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1557 (SETUP datain (posedge clk) (10:10:10))
1558 (SETUP sclr (posedge clk) (10:10:10))
1559 (HOLD datain (posedge clk) (100:100:100))
1560 (HOLD sclr (posedge clk) (100:100:100))
1564 (CELLTYPE "stratix_asynch_lcell")
1565 (INSTANCE \\vga_control_unit\|toggle_counter_sig_10_\\.lecomb)
1568 (PORT dataa (607:607:607) (607:607:607))
1569 (PORT datab (1355:1355:1355) (1355:1355:1355))
1570 (IOPATH dataa regin (583:583:583) (583:583:583))
1571 (IOPATH datab regin (489:489:489) (489:489:489))
1572 (IOPATH cin regin (628:628:628) (628:628:628))
1573 (IOPATH dataa cout0 (443:443:443) (443:443:443))
1574 (IOPATH datab cout0 (344:344:344) (344:344:344))
1575 (IOPATH dataa cout1 (451:451:451) (451:451:451))
1576 (IOPATH datab cout1 (341:341:341) (341:341:341))
1581 (CELLTYPE "stratix_lcell_register")
1582 (INSTANCE \\vga_control_unit\|toggle_counter_sig_10_\\.lereg)
1585 (PORT sclr (1852:1852:1852) (1852:1852:1852))
1586 (PORT aclr (5079:5079:5079) (5079:5079:5079))
1587 (PORT clk (2336:2336:2336) (2336:2336:2336))
1588 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1589 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1593 (SETUP datain (posedge clk) (10:10:10))
1594 (SETUP sclr (posedge clk) (10:10:10))
1595 (HOLD datain (posedge clk) (100:100:100))
1596 (HOLD sclr (posedge clk) (100:100:100))
1600 (CELLTYPE "stratix_asynch_lcell")
1601 (INSTANCE \\vga_control_unit\|toggle_counter_sig_13_\\.lecomb)
1604 (PORT dataa (1364:1364:1364) (1364:1364:1364))
1605 (PORT datab (422:422:422) (422:422:422))
1606 (IOPATH dataa regin (583:583:583) (583:583:583))
1607 (IOPATH datab regin (489:489:489) (489:489:489))
1608 (IOPATH cin regin (607:607:607) (607:607:607))
1609 (IOPATH cin0 regin (571:571:571) (571:571:571))
1610 (IOPATH cin1 regin (587:587:587) (587:587:587))
1611 (IOPATH dataa cout0 (443:443:443) (443:443:443))
1612 (IOPATH datab cout0 (344:344:344) (344:344:344))
1613 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
1614 (IOPATH dataa cout1 (451:451:451) (451:451:451))
1615 (IOPATH datab cout1 (341:341:341) (341:341:341))
1616 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
1621 (CELLTYPE "stratix_lcell_register")
1622 (INSTANCE \\vga_control_unit\|toggle_counter_sig_13_\\.lereg)
1625 (PORT sclr (1319:1319:1319) (1319:1319:1319))
1626 (PORT aclr (5095:5095:5095) (5095:5095:5095))
1627 (PORT clk (2323:2323:2323) (2323:2323:2323))
1628 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1629 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1633 (SETUP datain (posedge clk) (10:10:10))
1634 (SETUP sclr (posedge clk) (10:10:10))
1635 (HOLD datain (posedge clk) (100:100:100))
1636 (HOLD sclr (posedge clk) (100:100:100))
1640 (CELLTYPE "stratix_asynch_lcell")
1641 (INSTANCE \\vga_control_unit\|toggle_counter_sig_12_\\.lecomb)
1644 (PORT dataa (1362:1362:1362) (1362:1362:1362))
1645 (PORT datab (419:419:419) (419:419:419))
1646 (IOPATH dataa regin (583:583:583) (583:583:583))
1647 (IOPATH datab regin (489:489:489) (489:489:489))
1648 (IOPATH cin regin (628:628:628) (628:628:628))
1649 (IOPATH cin0 regin (571:571:571) (571:571:571))
1650 (IOPATH cin1 regin (587:587:587) (587:587:587))
1651 (IOPATH dataa cout0 (443:443:443) (443:443:443))
1652 (IOPATH datab cout0 (344:344:344) (344:344:344))
1653 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
1654 (IOPATH dataa cout1 (451:451:451) (451:451:451))
1655 (IOPATH datab cout1 (341:341:341) (341:341:341))
1656 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
1661 (CELLTYPE "stratix_lcell_register")
1662 (INSTANCE \\vga_control_unit\|toggle_counter_sig_12_\\.lereg)
1665 (PORT sclr (1852:1852:1852) (1852:1852:1852))
1666 (PORT aclr (5079:5079:5079) (5079:5079:5079))
1667 (PORT clk (2336:2336:2336) (2336:2336:2336))
1668 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1669 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1673 (SETUP datain (posedge clk) (10:10:10))
1674 (SETUP sclr (posedge clk) (10:10:10))
1675 (HOLD datain (posedge clk) (100:100:100))
1676 (HOLD sclr (posedge clk) (100:100:100))
1680 (CELLTYPE "stratix_asynch_lcell")
1681 (INSTANCE \\vga_control_unit\|toggle_counter_sig_15_\\.lecomb)
1684 (PORT dataa (436:436:436) (436:436:436))
1685 (PORT datab (1360:1360:1360) (1360:1360:1360))
1686 (IOPATH dataa regin (583:583:583) (583:583:583))
1687 (IOPATH datab regin (489:489:489) (489:489:489))
1688 (IOPATH cin regin (607:607:607) (607:607:607))
1689 (IOPATH cin0 regin (571:571:571) (571:571:571))
1690 (IOPATH cin1 regin (587:587:587) (587:587:587))
1691 (IOPATH dataa cout0 (443:443:443) (443:443:443))
1692 (IOPATH datab cout0 (344:344:344) (344:344:344))
1693 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
1694 (IOPATH dataa cout1 (451:451:451) (451:451:451))
1695 (IOPATH datab cout1 (341:341:341) (341:341:341))
1696 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
1701 (CELLTYPE "stratix_lcell_register")
1702 (INSTANCE \\vga_control_unit\|toggle_counter_sig_15_\\.lereg)
1705 (PORT sclr (1319:1319:1319) (1319:1319:1319))
1706 (PORT aclr (5095:5095:5095) (5095:5095:5095))
1707 (PORT clk (2323:2323:2323) (2323:2323:2323))
1708 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1709 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1713 (SETUP datain (posedge clk) (10:10:10))
1714 (SETUP sclr (posedge clk) (10:10:10))
1715 (HOLD datain (posedge clk) (100:100:100))
1716 (HOLD sclr (posedge clk) (100:100:100))
1720 (CELLTYPE "stratix_asynch_lcell")
1721 (INSTANCE \\vga_control_unit\|toggle_counter_sig_14_\\.lecomb)
1724 (PORT dataa (438:438:438) (438:438:438))
1725 (PORT datab (1368:1368:1368) (1368:1368:1368))
1726 (IOPATH dataa regin (583:583:583) (583:583:583))
1727 (IOPATH datab regin (489:489:489) (489:489:489))
1728 (IOPATH cin regin (628:628:628) (628:628:628))
1729 (IOPATH cin0 regin (571:571:571) (571:571:571))
1730 (IOPATH cin1 regin (587:587:587) (587:587:587))
1731 (IOPATH dataa cout0 (443:443:443) (443:443:443))
1732 (IOPATH datab cout0 (344:344:344) (344:344:344))
1733 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
1734 (IOPATH dataa cout1 (451:451:451) (451:451:451))
1735 (IOPATH datab cout1 (341:341:341) (341:341:341))
1736 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
1741 (CELLTYPE "stratix_lcell_register")
1742 (INSTANCE \\vga_control_unit\|toggle_counter_sig_14_\\.lereg)
1745 (PORT sclr (1852:1852:1852) (1852:1852:1852))
1746 (PORT aclr (5079:5079:5079) (5079:5079:5079))
1747 (PORT clk (2336:2336:2336) (2336:2336:2336))
1748 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1749 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1753 (SETUP datain (posedge clk) (10:10:10))
1754 (SETUP sclr (posedge clk) (10:10:10))
1755 (HOLD datain (posedge clk) (100:100:100))
1756 (HOLD sclr (posedge clk) (100:100:100))
1760 (CELLTYPE "stratix_asynch_lcell")
1761 (INSTANCE \\vga_control_unit\|toggle_counter_sig_16_\\.lecomb)
1764 (PORT dataa (1370:1370:1370) (1370:1370:1370))
1765 (PORT datab (957:957:957) (957:957:957))
1766 (IOPATH dataa regin (583:583:583) (583:583:583))
1767 (IOPATH datab regin (489:489:489) (489:489:489))
1768 (IOPATH cin regin (628:628:628) (628:628:628))
1769 (IOPATH cin0 regin (571:571:571) (571:571:571))
1770 (IOPATH cin1 regin (587:587:587) (587:587:587))
1771 (IOPATH dataa cout0 (443:443:443) (443:443:443))
1772 (IOPATH datab cout0 (344:344:344) (344:344:344))
1773 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
1774 (IOPATH dataa cout1 (451:451:451) (451:451:451))
1775 (IOPATH datab cout1 (341:341:341) (341:341:341))
1776 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
1781 (CELLTYPE "stratix_lcell_register")
1782 (INSTANCE \\vga_control_unit\|toggle_counter_sig_16_\\.lereg)
1785 (PORT sclr (1852:1852:1852) (1852:1852:1852))
1786 (PORT aclr (5079:5079:5079) (5079:5079:5079))
1787 (PORT clk (2336:2336:2336) (2336:2336:2336))
1788 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1789 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1793 (SETUP datain (posedge clk) (10:10:10))
1794 (SETUP sclr (posedge clk) (10:10:10))
1795 (HOLD datain (posedge clk) (100:100:100))
1796 (HOLD sclr (posedge clk) (100:100:100))
1800 (CELLTYPE "stratix_asynch_lcell")
1801 (INSTANCE \\vga_control_unit\|toggle_counter_sig_17_\\.lecomb)
1804 (PORT dataa (445:445:445) (445:445:445))
1805 (PORT datab (1406:1406:1406) (1406:1406:1406))
1806 (IOPATH dataa regin (583:583:583) (583:583:583))
1807 (IOPATH datab regin (489:489:489) (489:489:489))
1808 (IOPATH cin regin (607:607:607) (607:607:607))
1809 (IOPATH cin0 regin (571:571:571) (571:571:571))
1810 (IOPATH cin1 regin (587:587:587) (587:587:587))
1811 (IOPATH dataa cout0 (443:443:443) (443:443:443))
1812 (IOPATH datab cout0 (344:344:344) (344:344:344))
1813 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
1814 (IOPATH dataa cout1 (451:451:451) (451:451:451))
1815 (IOPATH datab cout1 (341:341:341) (341:341:341))
1816 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
1821 (CELLTYPE "stratix_lcell_register")
1822 (INSTANCE \\vga_control_unit\|toggle_counter_sig_17_\\.lereg)
1825 (PORT sclr (1319:1319:1319) (1319:1319:1319))
1826 (PORT aclr (5095:5095:5095) (5095:5095:5095))
1827 (PORT clk (2323:2323:2323) (2323:2323:2323))
1828 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1829 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1833 (SETUP datain (posedge clk) (10:10:10))
1834 (SETUP sclr (posedge clk) (10:10:10))
1835 (HOLD datain (posedge clk) (100:100:100))
1836 (HOLD sclr (posedge clk) (100:100:100))
1840 (CELLTYPE "stratix_asynch_lcell")
1841 (INSTANCE \\vga_control_unit\|toggle_counter_sig_19_\\.lecomb)
1844 (PORT datab (1393:1393:1393) (1393:1393:1393))
1845 (PORT datad (432:432:432) (432:432:432))
1846 (IOPATH datab regin (489:489:489) (489:489:489))
1847 (IOPATH datad regin (235:235:235) (235:235:235))
1848 (IOPATH cin regin (607:607:607) (607:607:607))
1849 (IOPATH cin0 regin (571:571:571) (571:571:571))
1850 (IOPATH cin1 regin (587:587:587) (587:587:587))
1855 (CELLTYPE "stratix_lcell_register")
1856 (INSTANCE \\vga_control_unit\|toggle_counter_sig_19_\\.lereg)
1859 (PORT sclr (1319:1319:1319) (1319:1319:1319))
1860 (PORT aclr (5095:5095:5095) (5095:5095:5095))
1861 (PORT clk (2323:2323:2323) (2323:2323:2323))
1862 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1863 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1867 (SETUP datain (posedge clk) (10:10:10))
1868 (SETUP sclr (posedge clk) (10:10:10))
1869 (HOLD datain (posedge clk) (100:100:100))
1870 (HOLD sclr (posedge clk) (100:100:100))
1874 (CELLTYPE "stratix_asynch_lcell")
1875 (INSTANCE \\vga_control_unit\|toggle_counter_sig_18_\\.lecomb)
1878 (PORT dataa (439:439:439) (439:439:439))
1879 (PORT datab (1365:1365:1365) (1365:1365:1365))
1880 (IOPATH dataa regin (583:583:583) (583:583:583))
1881 (IOPATH datab regin (489:489:489) (489:489:489))
1882 (IOPATH cin regin (628:628:628) (628:628:628))
1883 (IOPATH cin0 regin (571:571:571) (571:571:571))
1884 (IOPATH cin1 regin (587:587:587) (587:587:587))
1885 (IOPATH dataa cout (551:551:551) (551:551:551))
1886 (IOPATH datab cout (460:460:460) (460:460:460))
1887 (IOPATH cin cout (110:110:110) (110:110:110))
1888 (IOPATH cin0 cout (135:135:135) (135:135:135))
1889 (IOPATH cin1 cout (123:123:123) (123:123:123))
1894 (CELLTYPE "stratix_lcell_register")
1895 (INSTANCE \\vga_control_unit\|toggle_counter_sig_18_\\.lereg)
1898 (PORT sclr (1852:1852:1852) (1852:1852:1852))
1899 (PORT aclr (5079:5079:5079) (5079:5079:5079))
1900 (PORT clk (2336:2336:2336) (2336:2336:2336))
1901 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1902 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1906 (SETUP datain (posedge clk) (10:10:10))
1907 (SETUP sclr (posedge clk) (10:10:10))
1908 (HOLD datain (posedge clk) (100:100:100))
1909 (HOLD sclr (posedge clk) (100:100:100))
1913 (CELLTYPE "stratix_asynch_lcell")
1914 (INSTANCE \\vga_control_unit\|toggle_counter_sig_20_\\.lecomb)
1917 (PORT datab (420:420:420) (420:420:420))
1918 (IOPATH datab regin (489:489:489) (489:489:489))
1919 (IOPATH cin regin (607:607:607) (607:607:607))
1924 (CELLTYPE "stratix_lcell_register")
1925 (INSTANCE \\vga_control_unit\|toggle_counter_sig_20_\\.lereg)
1928 (PORT sclr (1852:1852:1852) (1852:1852:1852))
1929 (PORT aclr (5079:5079:5079) (5079:5079:5079))
1930 (PORT clk (2336:2336:2336) (2336:2336:2336))
1931 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
1932 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
1936 (SETUP datain (posedge clk) (10:10:10))
1937 (SETUP sclr (posedge clk) (10:10:10))
1938 (HOLD datain (posedge clk) (100:100:100))
1939 (HOLD sclr (posedge clk) (100:100:100))
1943 (CELLTYPE "stratix_asynch_lcell")
1944 (INSTANCE \\vga_control_unit\|BLINKER_next_un1_toggle_counter_siglt6\\.lecomb)
1947 (PORT datab (581:581:581) (581:581:581))
1948 (PORT datad (599:599:599) (599:599:599))
1949 (IOPATH datab combout (332:332:332) (332:332:332))
1950 (IOPATH datad combout (87:87:87) (87:87:87))
1955 (CELLTYPE "stratix_asynch_lcell")
1956 (INSTANCE \\vga_control_unit\|BLINKER_next_un1_toggle_counter_siglto9\\.lecomb)
1959 (PORT dataa (605:605:605) (605:605:605))
1960 (PORT datab (578:578:578) (578:578:578))
1961 (PORT datac (595:595:595) (595:595:595))
1962 (PORT datad (363:363:363) (363:363:363))
1963 (IOPATH dataa combout (459:459:459) (459:459:459))
1964 (IOPATH datab combout (332:332:332) (332:332:332))
1965 (IOPATH datac combout (213:213:213) (213:213:213))
1966 (IOPATH datad combout (87:87:87) (87:87:87))
1971 (CELLTYPE "stratix_asynch_lcell")
1972 (INSTANCE \\vga_control_unit\|BLINKER_next_un1_toggle_counter_siglto12\\.lecomb)
1975 (PORT dataa (651:651:651) (651:651:651))
1976 (PORT datab (1098:1098:1098) (1098:1098:1098))
1977 (PORT datac (1137:1137:1137) (1137:1137:1137))
1978 (PORT datad (139:139:139) (139:139:139))
1979 (IOPATH dataa combout (459:459:459) (459:459:459))
1980 (IOPATH datab combout (332:332:332) (332:332:332))
1981 (IOPATH datac combout (213:213:213) (213:213:213))
1982 (IOPATH datad combout (87:87:87) (87:87:87))
1987 (CELLTYPE "stratix_asynch_lcell")
1988 (INSTANCE \\vga_control_unit\|BLINKER_next_un1_toggle_counter_siglto15\\.lecomb)
1991 (PORT dataa (1111:1111:1111) (1111:1111:1111))
1992 (PORT datab (622:622:622) (622:622:622))
1993 (PORT datac (679:679:679) (679:679:679))
1994 (PORT datad (139:139:139) (139:139:139))
1995 (IOPATH dataa combout (459:459:459) (459:459:459))
1996 (IOPATH datab combout (332:332:332) (332:332:332))
1997 (IOPATH datac combout (213:213:213) (213:213:213))
1998 (IOPATH datad combout (87:87:87) (87:87:87))
2003 (CELLTYPE "stratix_asynch_lcell")
2004 (INSTANCE \\vga_control_unit\|BLINKER_next_un1_toggle_counter_siglto18\\.lecomb)
2007 (PORT dataa (1201:1201:1201) (1201:1201:1201))
2008 (PORT datab (623:623:623) (623:623:623))
2009 (PORT datac (1397:1397:1397) (1397:1397:1397))
2010 (PORT datad (139:139:139) (139:139:139))
2011 (IOPATH dataa combout (459:459:459) (459:459:459))
2012 (IOPATH datab combout (332:332:332) (332:332:332))
2013 (IOPATH datac combout (213:213:213) (213:213:213))
2014 (IOPATH datad combout (87:87:87) (87:87:87))
2019 (CELLTYPE "stratix_asynch_lcell")
2020 (INSTANCE \\vga_control_unit\|toggle_sig_0_0_0_g1_cZ\\.lecomb)
2023 (PORT dataa (1137:1137:1137) (1137:1137:1137))
2024 (PORT datab (635:635:635) (635:635:635))
2025 (PORT datad (139:139:139) (139:139:139))
2026 (IOPATH dataa combout (459:459:459) (459:459:459))
2027 (IOPATH datab combout (332:332:332) (332:332:332))
2028 (IOPATH datad combout (87:87:87) (87:87:87))
2033 (CELLTYPE "stratix_asynch_lcell")
2034 (INSTANCE \\vga_control_unit\|toggle_sig_Z\\.lecomb)
2037 (PORT datab (438:438:438) (438:438:438))
2038 (PORT datad (348:348:348) (348:348:348))
2039 (IOPATH datab regin (489:489:489) (489:489:489))
2040 (IOPATH datad regin (235:235:235) (235:235:235))
2045 (CELLTYPE "stratix_lcell_register")
2046 (INSTANCE \\vga_control_unit\|toggle_sig_Z\\.lereg)
2049 (PORT aclr (5095:5095:5095) (5095:5095:5095))
2050 (PORT clk (2323:2323:2323) (2323:2323:2323))
2051 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2052 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2056 (SETUP datain (posedge clk) (10:10:10))
2057 (HOLD datain (posedge clk) (100:100:100))
2061 (CELLTYPE "stratix_asynch_lcell")
2062 (INSTANCE \\vga_driver_unit\|vsync_counter_0_\\.lecomb)
2065 (PORT dataa (657:657:657) (657:657:657))
2066 (PORT datab (1630:1630:1630) (1630:1630:1630))
2067 (PORT datac (692:692:692) (692:692:692))
2068 (IOPATH dataa regin (583:583:583) (583:583:583))
2069 (IOPATH datab regin (489:489:489) (489:489:489))
2070 (IOPATH dataa cout0 (443:443:443) (443:443:443))
2071 (IOPATH datab cout0 (344:344:344) (344:344:344))
2072 (IOPATH dataa cout1 (451:451:451) (451:451:451))
2073 (IOPATH datab cout1 (341:341:341) (341:341:341))
2078 (CELLTYPE "stratix_lcell_register")
2079 (INSTANCE \\vga_driver_unit\|vsync_counter_0_\\.lereg)
2082 (PORT sload (1434:1434:1434) (1434:1434:1434))
2083 (PORT datac (782:782:782) (782:782:782))
2084 (PORT sclr (1316:1316:1316) (1316:1316:1316))
2085 (PORT aclr (668:668:668) (668:668:668))
2086 (PORT clk (2379:2379:2379) (2379:2379:2379))
2087 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2088 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2092 (SETUP datac (posedge clk) (10:10:10))
2093 (SETUP datain (posedge clk) (10:10:10))
2094 (SETUP sclr (posedge clk) (10:10:10))
2095 (SETUP sload (posedge clk) (10:10:10))
2096 (HOLD datac (posedge clk) (100:100:100))
2097 (HOLD datain (posedge clk) (100:100:100))
2098 (HOLD sclr (posedge clk) (100:100:100))
2099 (HOLD sload (posedge clk) (100:100:100))
2103 (CELLTYPE "stratix_asynch_lcell")
2104 (INSTANCE \\vga_driver_unit\|vsync_counter_1_\\.lecomb)
2107 (PORT datab (419:419:419) (419:419:419))
2108 (PORT datac (696:696:696) (696:696:696))
2109 (IOPATH datab regin (489:489:489) (489:489:489))
2110 (IOPATH cin0 regin (571:571:571) (571:571:571))
2111 (IOPATH cin1 regin (587:587:587) (587:587:587))
2112 (IOPATH datab cout0 (344:344:344) (344:344:344))
2113 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
2114 (IOPATH datab cout1 (341:341:341) (341:341:341))
2115 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
2120 (CELLTYPE "stratix_lcell_register")
2121 (INSTANCE \\vga_driver_unit\|vsync_counter_1_\\.lereg)
2124 (PORT sload (1434:1434:1434) (1434:1434:1434))
2125 (PORT datac (786:786:786) (786:786:786))
2126 (PORT sclr (1316:1316:1316) (1316:1316:1316))
2127 (PORT aclr (668:668:668) (668:668:668))
2128 (PORT clk (2379:2379:2379) (2379:2379:2379))
2129 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2130 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2134 (SETUP datac (posedge clk) (10:10:10))
2135 (SETUP datain (posedge clk) (10:10:10))
2136 (SETUP sclr (posedge clk) (10:10:10))
2137 (SETUP sload (posedge clk) (10:10:10))
2138 (HOLD datac (posedge clk) (100:100:100))
2139 (HOLD datain (posedge clk) (100:100:100))
2140 (HOLD sclr (posedge clk) (100:100:100))
2141 (HOLD sload (posedge clk) (100:100:100))
2145 (CELLTYPE "stratix_asynch_lcell")
2146 (INSTANCE \\vga_driver_unit\|vsync_counter_2_\\.lecomb)
2149 (PORT dataa (444:444:444) (444:444:444))
2150 (PORT datac (699:699:699) (699:699:699))
2151 (IOPATH dataa regin (583:583:583) (583:583:583))
2152 (IOPATH cin0 regin (571:571:571) (571:571:571))
2153 (IOPATH cin1 regin (587:587:587) (587:587:587))
2154 (IOPATH dataa cout0 (443:443:443) (443:443:443))
2155 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
2156 (IOPATH dataa cout1 (451:451:451) (451:451:451))
2157 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
2162 (CELLTYPE "stratix_lcell_register")
2163 (INSTANCE \\vga_driver_unit\|vsync_counter_2_\\.lereg)
2166 (PORT sload (1434:1434:1434) (1434:1434:1434))
2167 (PORT datac (789:789:789) (789:789:789))
2168 (PORT sclr (1316:1316:1316) (1316:1316:1316))
2169 (PORT aclr (668:668:668) (668:668:668))
2170 (PORT clk (2379:2379:2379) (2379:2379:2379))
2171 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2172 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2176 (SETUP datac (posedge clk) (10:10:10))
2177 (SETUP datain (posedge clk) (10:10:10))
2178 (SETUP sclr (posedge clk) (10:10:10))
2179 (SETUP sload (posedge clk) (10:10:10))
2180 (HOLD datac (posedge clk) (100:100:100))
2181 (HOLD datain (posedge clk) (100:100:100))
2182 (HOLD sclr (posedge clk) (100:100:100))
2183 (HOLD sload (posedge clk) (100:100:100))
2187 (CELLTYPE "stratix_asynch_lcell")
2188 (INSTANCE \\vga_driver_unit\|vsync_counter_3_\\.lecomb)
2191 (PORT dataa (437:437:437) (437:437:437))
2192 (PORT datac (702:702:702) (702:702:702))
2193 (IOPATH dataa regin (583:583:583) (583:583:583))
2194 (IOPATH cin0 regin (571:571:571) (571:571:571))
2195 (IOPATH cin1 regin (587:587:587) (587:587:587))
2196 (IOPATH dataa cout0 (443:443:443) (443:443:443))
2197 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
2198 (IOPATH dataa cout1 (451:451:451) (451:451:451))
2199 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
2204 (CELLTYPE "stratix_lcell_register")
2205 (INSTANCE \\vga_driver_unit\|vsync_counter_3_\\.lereg)
2208 (PORT sload (1434:1434:1434) (1434:1434:1434))
2209 (PORT datac (792:792:792) (792:792:792))
2210 (PORT sclr (1316:1316:1316) (1316:1316:1316))
2211 (PORT aclr (668:668:668) (668:668:668))
2212 (PORT clk (2379:2379:2379) (2379:2379:2379))
2213 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2214 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2218 (SETUP datac (posedge clk) (10:10:10))
2219 (SETUP datain (posedge clk) (10:10:10))
2220 (SETUP sclr (posedge clk) (10:10:10))
2221 (SETUP sload (posedge clk) (10:10:10))
2222 (HOLD datac (posedge clk) (100:100:100))
2223 (HOLD datain (posedge clk) (100:100:100))
2224 (HOLD sclr (posedge clk) (100:100:100))
2225 (HOLD sload (posedge clk) (100:100:100))
2229 (CELLTYPE "stratix_asynch_lcell")
2230 (INSTANCE \\vga_driver_unit\|vsync_counter_4_\\.lecomb)
2233 (PORT dataa (445:445:445) (445:445:445))
2234 (PORT datac (704:704:704) (704:704:704))
2235 (IOPATH dataa regin (583:583:583) (583:583:583))
2236 (IOPATH cin0 regin (571:571:571) (571:571:571))
2237 (IOPATH cin1 regin (587:587:587) (587:587:587))
2238 (IOPATH dataa cout (551:551:551) (551:551:551))
2239 (IOPATH cin0 cout (135:135:135) (135:135:135))
2240 (IOPATH cin1 cout (123:123:123) (123:123:123))
2245 (CELLTYPE "stratix_lcell_register")
2246 (INSTANCE \\vga_driver_unit\|vsync_counter_4_\\.lereg)
2249 (PORT sload (1434:1434:1434) (1434:1434:1434))
2250 (PORT datac (794:794:794) (794:794:794))
2251 (PORT sclr (1316:1316:1316) (1316:1316:1316))
2252 (PORT aclr (668:668:668) (668:668:668))
2253 (PORT clk (2379:2379:2379) (2379:2379:2379))
2254 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2255 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2259 (SETUP datac (posedge clk) (10:10:10))
2260 (SETUP datain (posedge clk) (10:10:10))
2261 (SETUP sclr (posedge clk) (10:10:10))
2262 (SETUP sload (posedge clk) (10:10:10))
2263 (HOLD datac (posedge clk) (100:100:100))
2264 (HOLD datain (posedge clk) (100:100:100))
2265 (HOLD sclr (posedge clk) (100:100:100))
2266 (HOLD sload (posedge clk) (100:100:100))
2270 (CELLTYPE "stratix_asynch_lcell")
2271 (INSTANCE \\vga_driver_unit\|vsync_counter_5_\\.lecomb)
2274 (PORT datab (420:420:420) (420:420:420))
2275 (PORT datac (709:709:709) (709:709:709))
2276 (IOPATH datab regin (489:489:489) (489:489:489))
2277 (IOPATH cin regin (607:607:607) (607:607:607))
2278 (IOPATH datab cout0 (344:344:344) (344:344:344))
2279 (IOPATH datab cout1 (341:341:341) (341:341:341))
2284 (CELLTYPE "stratix_lcell_register")
2285 (INSTANCE \\vga_driver_unit\|vsync_counter_5_\\.lereg)
2288 (PORT sload (1434:1434:1434) (1434:1434:1434))
2289 (PORT datac (799:799:799) (799:799:799))
2290 (PORT sclr (1316:1316:1316) (1316:1316:1316))
2291 (PORT aclr (668:668:668) (668:668:668))
2292 (PORT clk (2379:2379:2379) (2379:2379:2379))
2293 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2294 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2298 (SETUP datac (posedge clk) (10:10:10))
2299 (SETUP datain (posedge clk) (10:10:10))
2300 (SETUP sclr (posedge clk) (10:10:10))
2301 (SETUP sload (posedge clk) (10:10:10))
2302 (HOLD datac (posedge clk) (100:100:100))
2303 (HOLD datain (posedge clk) (100:100:100))
2304 (HOLD sclr (posedge clk) (100:100:100))
2305 (HOLD sload (posedge clk) (100:100:100))
2309 (CELLTYPE "stratix_asynch_lcell")
2310 (INSTANCE \\vga_driver_unit\|VSYNC_COUNT_next_un9_vsync_counterlt9_6\\.lecomb)
2313 (PORT dataa (628:628:628) (628:628:628))
2314 (PORT datab (611:611:611) (611:611:611))
2315 (PORT datac (623:623:623) (623:623:623))
2316 (PORT datad (937:937:937) (937:937:937))
2317 (IOPATH dataa combout (459:459:459) (459:459:459))
2318 (IOPATH datab combout (332:332:332) (332:332:332))
2319 (IOPATH datac combout (213:213:213) (213:213:213))
2320 (IOPATH datad combout (87:87:87) (87:87:87))
2325 (CELLTYPE "stratix_asynch_lcell")
2326 (INSTANCE \\vga_driver_unit\|vsync_counter_6_\\.lecomb)
2329 (PORT datab (416:416:416) (416:416:416))
2330 (PORT datac (709:709:709) (709:709:709))
2331 (IOPATH datab regin (489:489:489) (489:489:489))
2332 (IOPATH cin regin (607:607:607) (607:607:607))
2333 (IOPATH cin0 regin (571:571:571) (571:571:571))
2334 (IOPATH cin1 regin (587:587:587) (587:587:587))
2335 (IOPATH datab cout0 (344:344:344) (344:344:344))
2336 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
2337 (IOPATH datab cout1 (341:341:341) (341:341:341))
2338 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
2343 (CELLTYPE "stratix_lcell_register")
2344 (INSTANCE \\vga_driver_unit\|vsync_counter_6_\\.lereg)
2347 (PORT sload (1434:1434:1434) (1434:1434:1434))
2348 (PORT datac (799:799:799) (799:799:799))
2349 (PORT sclr (1316:1316:1316) (1316:1316:1316))
2350 (PORT aclr (668:668:668) (668:668:668))
2351 (PORT clk (2379:2379:2379) (2379:2379:2379))
2352 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2353 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2357 (SETUP datac (posedge clk) (10:10:10))
2358 (SETUP datain (posedge clk) (10:10:10))
2359 (SETUP sclr (posedge clk) (10:10:10))
2360 (SETUP sload (posedge clk) (10:10:10))
2361 (HOLD datac (posedge clk) (100:100:100))
2362 (HOLD datain (posedge clk) (100:100:100))
2363 (HOLD sclr (posedge clk) (100:100:100))
2364 (HOLD sload (posedge clk) (100:100:100))
2368 (CELLTYPE "stratix_asynch_lcell")
2369 (INSTANCE \\vga_driver_unit\|vsync_counter_7_\\.lecomb)
2372 (PORT dataa (436:436:436) (436:436:436))
2373 (PORT datac (708:708:708) (708:708:708))
2374 (IOPATH dataa regin (583:583:583) (583:583:583))
2375 (IOPATH cin regin (607:607:607) (607:607:607))
2376 (IOPATH cin0 regin (571:571:571) (571:571:571))
2377 (IOPATH cin1 regin (587:587:587) (587:587:587))
2378 (IOPATH dataa cout0 (443:443:443) (443:443:443))
2379 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
2380 (IOPATH dataa cout1 (451:451:451) (451:451:451))
2381 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
2386 (CELLTYPE "stratix_lcell_register")
2387 (INSTANCE \\vga_driver_unit\|vsync_counter_7_\\.lereg)
2390 (PORT sload (1434:1434:1434) (1434:1434:1434))
2391 (PORT datac (798:798:798) (798:798:798))
2392 (PORT sclr (1316:1316:1316) (1316:1316:1316))
2393 (PORT aclr (668:668:668) (668:668:668))
2394 (PORT clk (2379:2379:2379) (2379:2379:2379))
2395 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2396 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2400 (SETUP datac (posedge clk) (10:10:10))
2401 (SETUP datain (posedge clk) (10:10:10))
2402 (SETUP sclr (posedge clk) (10:10:10))
2403 (SETUP sload (posedge clk) (10:10:10))
2404 (HOLD datac (posedge clk) (100:100:100))
2405 (HOLD datain (posedge clk) (100:100:100))
2406 (HOLD sclr (posedge clk) (100:100:100))
2407 (HOLD sload (posedge clk) (100:100:100))
2411 (CELLTYPE "stratix_asynch_lcell")
2412 (INSTANCE \\vga_driver_unit\|vsync_counter_8_\\.lecomb)
2415 (PORT dataa (445:445:445) (445:445:445))
2416 (PORT datac (708:708:708) (708:708:708))
2417 (IOPATH dataa regin (583:583:583) (583:583:583))
2418 (IOPATH cin regin (607:607:607) (607:607:607))
2419 (IOPATH cin0 regin (571:571:571) (571:571:571))
2420 (IOPATH cin1 regin (587:587:587) (587:587:587))
2421 (IOPATH dataa cout0 (443:443:443) (443:443:443))
2422 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
2423 (IOPATH dataa cout1 (451:451:451) (451:451:451))
2424 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
2429 (CELLTYPE "stratix_lcell_register")
2430 (INSTANCE \\vga_driver_unit\|vsync_counter_8_\\.lereg)
2433 (PORT sload (1434:1434:1434) (1434:1434:1434))
2434 (PORT datac (798:798:798) (798:798:798))
2435 (PORT sclr (1316:1316:1316) (1316:1316:1316))
2436 (PORT aclr (668:668:668) (668:668:668))
2437 (PORT clk (2379:2379:2379) (2379:2379:2379))
2438 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2439 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2443 (SETUP datac (posedge clk) (10:10:10))
2444 (SETUP datain (posedge clk) (10:10:10))
2445 (SETUP sclr (posedge clk) (10:10:10))
2446 (SETUP sload (posedge clk) (10:10:10))
2447 (HOLD datac (posedge clk) (100:100:100))
2448 (HOLD datain (posedge clk) (100:100:100))
2449 (HOLD sclr (posedge clk) (100:100:100))
2450 (HOLD sload (posedge clk) (100:100:100))
2454 (CELLTYPE "stratix_asynch_lcell")
2455 (INSTANCE \\vga_driver_unit\|vsync_counter_9_\\.lecomb)
2458 (PORT datac (706:706:706) (706:706:706))
2459 (PORT datad (426:426:426) (426:426:426))
2460 (IOPATH datad regin (235:235:235) (235:235:235))
2461 (IOPATH cin regin (607:607:607) (607:607:607))
2462 (IOPATH cin0 regin (571:571:571) (571:571:571))
2463 (IOPATH cin1 regin (587:587:587) (587:587:587))
2468 (CELLTYPE "stratix_lcell_register")
2469 (INSTANCE \\vga_driver_unit\|vsync_counter_9_\\.lereg)
2472 (PORT sload (1434:1434:1434) (1434:1434:1434))
2473 (PORT datac (796:796:796) (796:796:796))
2474 (PORT sclr (1316:1316:1316) (1316:1316:1316))
2475 (PORT aclr (668:668:668) (668:668:668))
2476 (PORT clk (2379:2379:2379) (2379:2379:2379))
2477 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2478 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2482 (SETUP datac (posedge clk) (10:10:10))
2483 (SETUP datain (posedge clk) (10:10:10))
2484 (SETUP sclr (posedge clk) (10:10:10))
2485 (SETUP sload (posedge clk) (10:10:10))
2486 (HOLD datac (posedge clk) (100:100:100))
2487 (HOLD datain (posedge clk) (100:100:100))
2488 (HOLD sclr (posedge clk) (100:100:100))
2489 (HOLD sload (posedge clk) (100:100:100))
2493 (CELLTYPE "stratix_asynch_lcell")
2494 (INSTANCE \\vga_driver_unit\|VSYNC_COUNT_next_un9_vsync_counterlt9_5\\.lecomb)
2497 (PORT dataa (616:616:616) (616:616:616))
2498 (PORT datab (607:607:607) (607:607:607))
2499 (PORT datac (925:925:925) (925:925:925))
2500 (PORT datad (958:958:958) (958:958:958))
2501 (IOPATH dataa combout (459:459:459) (459:459:459))
2502 (IOPATH datab combout (332:332:332) (332:332:332))
2503 (IOPATH datac combout (213:213:213) (213:213:213))
2504 (IOPATH datad combout (87:87:87) (87:87:87))
2509 (CELLTYPE "stratix_asynch_lcell")
2510 (INSTANCE \\vga_driver_unit\|VSYNC_COUNT_next_un9_vsync_counterlt9\\.lecomb)
2513 (PORT dataa (630:630:630) (630:630:630))
2514 (PORT datab (348:348:348) (348:348:348))
2515 (PORT datac (934:934:934) (934:934:934))
2516 (PORT datad (352:352:352) (352:352:352))
2517 (IOPATH dataa combout (459:459:459) (459:459:459))
2518 (IOPATH datab combout (332:332:332) (332:332:332))
2519 (IOPATH datac combout (213:213:213) (213:213:213))
2520 (IOPATH datad combout (87:87:87) (87:87:87))
2525 (CELLTYPE "stratix_asynch_lcell")
2526 (INSTANCE \\vga_driver_unit\|G_16\\.lecomb)
2529 (PORT dataa (994:994:994) (994:994:994))
2530 (PORT datab (945:945:945) (945:945:945))
2531 (PORT datac (1070:1070:1070) (1070:1070:1070))
2532 (PORT datad (353:353:353) (353:353:353))
2533 (IOPATH dataa combout (459:459:459) (459:459:459))
2534 (IOPATH datab combout (332:332:332) (332:332:332))
2535 (IOPATH datac combout (213:213:213) (213:213:213))
2536 (IOPATH datad combout (87:87:87) (87:87:87))
2541 (CELLTYPE "stratix_asynch_lcell")
2542 (INSTANCE \\vga_driver_unit\|vsync_state_5_\\.lecomb)
2545 (PORT datac (673:673:673) (673:673:673))
2546 (PORT datad (438:438:438) (438:438:438))
2547 (IOPATH datac regin (364:364:364) (364:364:364))
2548 (IOPATH datad regin (235:235:235) (235:235:235))
2553 (CELLTYPE "stratix_lcell_register")
2554 (INSTANCE \\vga_driver_unit\|vsync_state_5_\\.lereg)
2557 (PORT sclr (1153:1153:1153) (1153:1153:1153))
2558 (PORT aclr (668:668:668) (668:668:668))
2559 (PORT clk (2379:2379:2379) (2379:2379:2379))
2560 (PORT ena (1287:1287:1287) (1287:1287:1287))
2561 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2562 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2566 (SETUP datain (posedge clk) (10:10:10))
2567 (SETUP sclr (posedge clk) (10:10:10))
2568 (SETUP ena (posedge clk) (10:10:10))
2569 (HOLD datain (posedge clk) (100:100:100))
2570 (HOLD sclr (posedge clk) (100:100:100))
2571 (HOLD ena (posedge clk) (100:100:100))
2575 (CELLTYPE "stratix_asynch_lcell")
2576 (INSTANCE \\vga_driver_unit\|VSYNC_FSM_next_un12_vsync_counter_6\\.lecomb)
2579 (PORT dataa (634:634:634) (634:634:634))
2580 (PORT datab (601:601:601) (601:601:601))
2581 (PORT datac (932:932:932) (932:932:932))
2582 (PORT datad (643:643:643) (643:643:643))
2583 (IOPATH dataa combout (459:459:459) (459:459:459))
2584 (IOPATH datab combout (332:332:332) (332:332:332))
2585 (IOPATH datac combout (213:213:213) (213:213:213))
2586 (IOPATH datad combout (87:87:87) (87:87:87))
2591 (CELLTYPE "stratix_asynch_lcell")
2592 (INSTANCE \\vga_driver_unit\|VSYNC_FSM_next_un14_vsync_counter_8\\.lecomb)
2595 (PORT datac (377:377:377) (377:377:377))
2596 (PORT datad (360:360:360) (360:360:360))
2597 (IOPATH datac combout (213:213:213) (213:213:213))
2598 (IOPATH datad combout (87:87:87) (87:87:87))
2603 (CELLTYPE "stratix_asynch_lcell")
2604 (INSTANCE \\vga_driver_unit\|vsync_state_next_1_sqmuxa_1_cZ\\.lecomb)
2607 (PORT dataa (687:687:687) (687:687:687))
2608 (PORT datab (662:662:662) (662:662:662))
2609 (PORT datac (993:993:993) (993:993:993))
2610 (PORT datad (361:361:361) (361:361:361))
2611 (IOPATH dataa combout (459:459:459) (459:459:459))
2612 (IOPATH datab combout (332:332:332) (332:332:332))
2613 (IOPATH datac combout (213:213:213) (213:213:213))
2614 (IOPATH datad combout (87:87:87) (87:87:87))
2619 (CELLTYPE "stratix_asynch_lcell")
2620 (INSTANCE \\vga_driver_unit\|vsync_state_3_\\.lecomb)
2623 (PORT dataa (688:688:688) (688:688:688))
2624 (PORT datab (662:662:662) (662:662:662))
2625 (PORT datac (1270:1270:1270) (1270:1270:1270))
2626 (PORT datad (361:361:361) (361:361:361))
2627 (IOPATH dataa combout (459:459:459) (459:459:459))
2628 (IOPATH datab combout (332:332:332) (332:332:332))
2629 (IOPATH datad combout (87:87:87) (87:87:87))
2630 (IOPATH qfbkin combout (291:291:291) (291:291:291))
2635 (CELLTYPE "stratix_lcell_register")
2636 (INSTANCE \\vga_driver_unit\|vsync_state_3_\\.lereg)
2639 (PORT datac (1360:1360:1360) (1360:1360:1360))
2640 (PORT sclr (1885:1885:1885) (1885:1885:1885))
2641 (PORT aclr (668:668:668) (668:668:668))
2642 (PORT clk (2379:2379:2379) (2379:2379:2379))
2643 (PORT ena (1091:1091:1091) (1091:1091:1091))
2644 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2645 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2646 (IOPATH (posedge clk) qfbkout (176:176:176) (176:176:176))
2647 (IOPATH (posedge aclr) qfbkout (212:212:212) (212:212:212))
2651 (SETUP datac (posedge clk) (10:10:10))
2652 (SETUP datain (posedge clk) (10:10:10))
2653 (SETUP sclr (posedge clk) (10:10:10))
2654 (SETUP ena (posedge clk) (10:10:10))
2655 (HOLD datac (posedge clk) (100:100:100))
2656 (HOLD datain (posedge clk) (100:100:100))
2657 (HOLD sclr (posedge clk) (100:100:100))
2658 (HOLD ena (posedge clk) (100:100:100))
2662 (CELLTYPE "stratix_asynch_lcell")
2663 (INSTANCE \\vga_driver_unit\|vsync_state_2_\\.lecomb)
2666 (PORT dataa (976:976:976) (976:976:976))
2667 (PORT datab (990:990:990) (990:990:990))
2668 (PORT datac (1023:1023:1023) (1023:1023:1023))
2669 (PORT datad (576:576:576) (576:576:576))
2670 (IOPATH dataa regin (583:583:583) (583:583:583))
2671 (IOPATH datab regin (489:489:489) (489:489:489))
2672 (IOPATH datac regin (364:364:364) (364:364:364))
2673 (IOPATH datad regin (235:235:235) (235:235:235))
2678 (CELLTYPE "stratix_lcell_register")
2679 (INSTANCE \\vga_driver_unit\|vsync_state_2_\\.lereg)
2682 (PORT sclr (1153:1153:1153) (1153:1153:1153))
2683 (PORT aclr (668:668:668) (668:668:668))
2684 (PORT clk (2379:2379:2379) (2379:2379:2379))
2685 (PORT ena (1287:1287:1287) (1287:1287:1287))
2686 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2687 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2691 (SETUP datain (posedge clk) (10:10:10))
2692 (SETUP sclr (posedge clk) (10:10:10))
2693 (SETUP ena (posedge clk) (10:10:10))
2694 (HOLD datain (posedge clk) (100:100:100))
2695 (HOLD sclr (posedge clk) (100:100:100))
2696 (HOLD ena (posedge clk) (100:100:100))
2700 (CELLTYPE "stratix_asynch_lcell")
2701 (INSTANCE \\vga_driver_unit\|VSYNC_FSM_next_un15_vsync_counter_3\\.lecomb)
2704 (PORT dataa (630:630:630) (630:630:630))
2705 (PORT datab (621:621:621) (621:621:621))
2706 (PORT datac (624:624:624) (624:624:624))
2707 (PORT datad (622:622:622) (622:622:622))
2708 (IOPATH dataa combout (459:459:459) (459:459:459))
2709 (IOPATH datab combout (332:332:332) (332:332:332))
2710 (IOPATH datac combout (213:213:213) (213:213:213))
2711 (IOPATH datad combout (87:87:87) (87:87:87))
2716 (CELLTYPE "stratix_asynch_lcell")
2717 (INSTANCE \\vga_driver_unit\|VSYNC_FSM_next_un15_vsync_counter_4\\.lecomb)
2720 (PORT datab (930:930:930) (930:930:930))
2721 (PORT datac (608:608:608) (608:608:608))
2722 (PORT datad (139:139:139) (139:139:139))
2723 (IOPATH datab combout (332:332:332) (332:332:332))
2724 (IOPATH datac combout (213:213:213) (213:213:213))
2725 (IOPATH datad combout (87:87:87) (87:87:87))
2730 (CELLTYPE "stratix_asynch_lcell")
2731 (INSTANCE \\vga_driver_unit\|vsync_state_4_\\.lecomb)
2734 (PORT dataa (1037:1037:1037) (1037:1037:1037))
2735 (PORT datab (987:987:987) (987:987:987))
2736 (PORT datac (1025:1025:1025) (1025:1025:1025))
2737 (PORT datad (575:575:575) (575:575:575))
2738 (IOPATH dataa regin (583:583:583) (583:583:583))
2739 (IOPATH datab regin (489:489:489) (489:489:489))
2740 (IOPATH datac regin (364:364:364) (364:364:364))
2741 (IOPATH datad regin (235:235:235) (235:235:235))
2746 (CELLTYPE "stratix_lcell_register")
2747 (INSTANCE \\vga_driver_unit\|vsync_state_4_\\.lereg)
2750 (PORT sclr (1153:1153:1153) (1153:1153:1153))
2751 (PORT aclr (668:668:668) (668:668:668))
2752 (PORT clk (2379:2379:2379) (2379:2379:2379))
2753 (PORT ena (1287:1287:1287) (1287:1287:1287))
2754 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2755 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2759 (SETUP datain (posedge clk) (10:10:10))
2760 (SETUP sclr (posedge clk) (10:10:10))
2761 (SETUP ena (posedge clk) (10:10:10))
2762 (HOLD datain (posedge clk) (100:100:100))
2763 (HOLD sclr (posedge clk) (100:100:100))
2764 (HOLD ena (posedge clk) (100:100:100))
2768 (CELLTYPE "stratix_asynch_lcell")
2769 (INSTANCE \\vga_driver_unit\|VSYNC_FSM_next_un13_vsync_counter_3\\.lecomb)
2772 (PORT dataa (657:657:657) (657:657:657))
2773 (PORT datab (604:604:604) (604:604:604))
2774 (PORT datac (683:683:683) (683:683:683))
2775 (PORT datad (633:633:633) (633:633:633))
2776 (IOPATH dataa combout (459:459:459) (459:459:459))
2777 (IOPATH datab combout (332:332:332) (332:332:332))
2778 (IOPATH datac combout (213:213:213) (213:213:213))
2779 (IOPATH datad combout (87:87:87) (87:87:87))
2784 (CELLTYPE "stratix_asynch_lcell")
2785 (INSTANCE \\vga_driver_unit\|VSYNC_FSM_next_un13_vsync_counter_4\\.lecomb)
2788 (PORT dataa (639:639:639) (639:639:639))
2789 (PORT datac (995:995:995) (995:995:995))
2790 (PORT datad (139:139:139) (139:139:139))
2791 (IOPATH dataa combout (459:459:459) (459:459:459))
2792 (IOPATH datac combout (213:213:213) (213:213:213))
2793 (IOPATH datad combout (87:87:87) (87:87:87))
2798 (CELLTYPE "stratix_asynch_lcell")
2799 (INSTANCE \\vga_driver_unit\|vsync_state_next_1_sqmuxa_2_cZ\\.lecomb)
2802 (PORT dataa (708:708:708) (708:708:708))
2803 (PORT datac (370:370:370) (370:370:370))
2804 (PORT datad (360:360:360) (360:360:360))
2805 (IOPATH dataa combout (459:459:459) (459:459:459))
2806 (IOPATH datac combout (213:213:213) (213:213:213))
2807 (IOPATH datad combout (87:87:87) (87:87:87))
2812 (CELLTYPE "stratix_asynch_lcell")
2813 (INSTANCE \\vga_driver_unit\|un1_vsync_state_next_1_sqmuxa_0_cZ\\.lecomb)
2816 (PORT dataa (369:369:369) (369:369:369))
2817 (PORT datab (934:934:934) (934:934:934))
2818 (PORT datac (874:874:874) (874:874:874))
2819 (PORT datad (348:348:348) (348:348:348))
2820 (IOPATH dataa combout (459:459:459) (459:459:459))
2821 (IOPATH datab combout (332:332:332) (332:332:332))
2822 (IOPATH datac combout (213:213:213) (213:213:213))
2823 (IOPATH datad combout (87:87:87) (87:87:87))
2828 (CELLTYPE "stratix_asynch_lcell")
2829 (INSTANCE \\vga_driver_unit\|vsync_state_next_2_sqmuxa_cZ\\.lecomb)
2832 (PORT dataa (1116:1116:1116) (1116:1116:1116))
2833 (PORT datab (341:341:341) (341:341:341))
2834 (PORT datac (371:371:371) (371:371:371))
2835 (PORT datad (139:139:139) (139:139:139))
2836 (IOPATH dataa combout (459:459:459) (459:459:459))
2837 (IOPATH datab combout (332:332:332) (332:332:332))
2838 (IOPATH datac combout (213:213:213) (213:213:213))
2839 (IOPATH datad combout (87:87:87) (87:87:87))
2844 (CELLTYPE "stratix_asynch_lcell")
2845 (INSTANCE \\vga_driver_unit\|vsync_state_3_iv_0_0__g0_0_a3_0_cZ\\.lecomb)
2848 (PORT datab (432:432:432) (432:432:432))
2849 (PORT datac (877:877:877) (877:877:877))
2850 (PORT datad (555:555:555) (555:555:555))
2851 (IOPATH datab combout (332:332:332) (332:332:332))
2852 (IOPATH datac combout (213:213:213) (213:213:213))
2853 (IOPATH datad combout (87:87:87) (87:87:87))
2858 (CELLTYPE "stratix_asynch_lcell")
2859 (INSTANCE \\vga_driver_unit\|vsync_state_0_\\.lecomb)
2862 (PORT dataa (366:366:366) (366:366:366))
2863 (PORT datab (430:430:430) (430:430:430))
2864 (PORT datac (571:571:571) (571:571:571))
2865 (PORT datad (846:846:846) (846:846:846))
2866 (IOPATH dataa regin (583:583:583) (583:583:583))
2867 (IOPATH datab regin (489:489:489) (489:489:489))
2868 (IOPATH datac regin (364:364:364) (364:364:364))
2869 (IOPATH datad regin (235:235:235) (235:235:235))
2874 (CELLTYPE "stratix_lcell_register")
2875 (INSTANCE \\vga_driver_unit\|vsync_state_0_\\.lereg)
2878 (PORT aclr (668:668:668) (668:668:668))
2879 (PORT clk (2379:2379:2379) (2379:2379:2379))
2880 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2881 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2885 (SETUP datain (posedge clk) (10:10:10))
2886 (HOLD datain (posedge clk) (100:100:100))
2890 (CELLTYPE "stratix_asynch_lcell")
2891 (INSTANCE \\vga_driver_unit\|d_set_vsync_counter_cZ\\.lecomb)
2894 (PORT datab (944:944:944) (944:944:944))
2895 (PORT datad (983:983:983) (983:983:983))
2896 (IOPATH datab combout (332:332:332) (332:332:332))
2897 (IOPATH datad combout (87:87:87) (87:87:87))
2902 (CELLTYPE "stratix_asynch_lcell")
2903 (INSTANCE \\vga_driver_unit\|vsync_counter_next_1_sqmuxa_cZ\\.lecomb)
2906 (PORT dataa (363:363:363) (363:363:363))
2907 (PORT datab (2412:2412:2412) (2412:2412:2412))
2908 (PORT datac (5264:5264:5264) (5264:5264:5264))
2909 (PORT datad (451:451:451) (451:451:451))
2910 (IOPATH dataa combout (459:459:459) (459:459:459))
2911 (IOPATH datab combout (332:332:332) (332:332:332))
2912 (IOPATH datac combout (213:213:213) (213:213:213))
2913 (IOPATH datad combout (87:87:87) (87:87:87))
2918 (CELLTYPE "stratix_asynch_lcell")
2919 (INSTANCE \\vga_driver_unit\|VSYNC_FSM_next_un12_vsync_counter_7\\.lecomb)
2922 (PORT dataa (613:613:613) (613:613:613))
2923 (PORT datab (626:626:626) (626:626:626))
2924 (PORT datac (623:623:623) (623:623:623))
2925 (PORT datad (644:644:644) (644:644:644))
2926 (IOPATH dataa combout (459:459:459) (459:459:459))
2927 (IOPATH datab combout (332:332:332) (332:332:332))
2928 (IOPATH datac combout (213:213:213) (213:213:213))
2929 (IOPATH datad combout (87:87:87) (87:87:87))
2934 (CELLTYPE "stratix_asynch_lcell")
2935 (INSTANCE \\vga_driver_unit\|vsync_state_1_\\.lecomb)
2938 (PORT dataa (1202:1202:1202) (1202:1202:1202))
2939 (PORT datab (1172:1172:1172) (1172:1172:1172))
2940 (PORT datac (2469:2469:2469) (2469:2469:2469))
2941 (PORT datad (2008:2008:2008) (2008:2008:2008))
2942 (IOPATH dataa regin (583:583:583) (583:583:583))
2943 (IOPATH datab regin (489:489:489) (489:489:489))
2944 (IOPATH datac regin (364:364:364) (364:364:364))
2945 (IOPATH datad regin (235:235:235) (235:235:235))
2950 (CELLTYPE "stratix_lcell_register")
2951 (INSTANCE \\vga_driver_unit\|vsync_state_1_\\.lereg)
2954 (PORT aclr (668:668:668) (668:668:668))
2955 (PORT clk (2323:2323:2323) (2323:2323:2323))
2956 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
2957 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
2961 (SETUP datain (posedge clk) (10:10:10))
2962 (HOLD datain (posedge clk) (100:100:100))
2966 (CELLTYPE "stratix_asynch_lcell")
2967 (INSTANCE \\vga_driver_unit\|line_counter_next_0_sqmuxa_1_1_cZ\\.lecomb)
2970 (PORT dataa (5244:5244:5244) (5244:5244:5244))
2971 (PORT datab (1216:1216:1216) (1216:1216:1216))
2972 (PORT datac (1151:1151:1151) (1151:1151:1151))
2973 (PORT datad (1419:1419:1419) (1419:1419:1419))
2974 (IOPATH dataa combout (459:459:459) (459:459:459))
2975 (IOPATH datab combout (332:332:332) (332:332:332))
2976 (IOPATH datac combout (213:213:213) (213:213:213))
2977 (IOPATH datad combout (87:87:87) (87:87:87))
2982 (CELLTYPE "stratix_asynch_lcell")
2983 (INSTANCE \\vga_driver_unit\|un1_line_counter_sig_1_\\.lecomb)
2986 (PORT dataa (1160:1160:1160) (1160:1160:1160))
2987 (PORT datab (935:935:935) (935:935:935))
2988 (IOPATH dataa combout (459:459:459) (459:459:459))
2989 (IOPATH datab combout (332:332:332) (332:332:332))
2990 (IOPATH dataa cout0 (443:443:443) (443:443:443))
2991 (IOPATH datab cout0 (344:344:344) (344:344:344))
2992 (IOPATH dataa cout1 (451:451:451) (451:451:451))
2993 (IOPATH datab cout1 (341:341:341) (341:341:341))
2998 (CELLTYPE "stratix_asynch_lcell")
2999 (INSTANCE \\vga_driver_unit\|line_counter_sig_0_\\.lecomb)
3002 (PORT datac (608:608:608) (608:608:608))
3003 (PORT datad (851:851:851) (851:851:851))
3004 (IOPATH datac regin (364:364:364) (364:364:364))
3005 (IOPATH datad regin (235:235:235) (235:235:235))
3010 (CELLTYPE "stratix_lcell_register")
3011 (INSTANCE \\vga_driver_unit\|line_counter_sig_0_\\.lereg)
3014 (PORT sclr (1996:1996:1996) (1996:1996:1996))
3015 (PORT aclr (668:668:668) (668:668:668))
3016 (PORT clk (2369:2369:2369) (2369:2369:2369))
3017 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
3018 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
3022 (SETUP datain (posedge clk) (10:10:10))
3023 (SETUP sclr (posedge clk) (10:10:10))
3024 (HOLD datain (posedge clk) (100:100:100))
3025 (HOLD sclr (posedge clk) (100:100:100))
3029 (CELLTYPE "stratix_asynch_lcell")
3030 (INSTANCE \\vga_driver_unit\|un1_line_counter_sig_a_1_\\.lecomb)
3033 (PORT dataa (658:658:658) (658:658:658))
3034 (PORT datab (951:951:951) (951:951:951))
3035 (IOPATH dataa cout0 (443:443:443) (443:443:443))
3036 (IOPATH datab cout0 (344:344:344) (344:344:344))
3037 (IOPATH dataa cout1 (451:451:451) (451:451:451))
3038 (IOPATH datab cout1 (341:341:341) (341:341:341))
3043 (CELLTYPE "stratix_asynch_lcell")
3044 (INSTANCE \\vga_driver_unit\|un1_line_counter_sig_2_\\.lecomb)
3047 (PORT dataa (692:692:692) (692:692:692))
3048 (PORT datab (685:685:685) (685:685:685))
3049 (IOPATH dataa combout (459:459:459) (459:459:459))
3050 (IOPATH datab combout (332:332:332) (332:332:332))
3051 (IOPATH cin0 combout (432:432:432) (432:432:432))
3052 (IOPATH cin1 combout (449:449:449) (449:449:449))
3053 (IOPATH dataa cout0 (443:443:443) (443:443:443))
3054 (IOPATH datab cout0 (344:344:344) (344:344:344))
3055 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
3056 (IOPATH dataa cout1 (451:451:451) (451:451:451))
3057 (IOPATH datab cout1 (341:341:341) (341:341:341))
3058 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
3063 (CELLTYPE "stratix_asynch_lcell")
3064 (INSTANCE \\vga_driver_unit\|line_counter_sig_1_\\.lecomb)
3067 (PORT datab (519:519:519) (519:519:519))
3068 (PORT datac (601:601:601) (601:601:601))
3069 (IOPATH datab regin (489:489:489) (489:489:489))
3070 (IOPATH datac regin (364:364:364) (364:364:364))
3075 (CELLTYPE "stratix_lcell_register")
3076 (INSTANCE \\vga_driver_unit\|line_counter_sig_1_\\.lereg)
3079 (PORT sclr (1996:1996:1996) (1996:1996:1996))
3080 (PORT aclr (668:668:668) (668:668:668))
3081 (PORT clk (2369:2369:2369) (2369:2369:2369))
3082 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
3083 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
3087 (SETUP datain (posedge clk) (10:10:10))
3088 (SETUP sclr (posedge clk) (10:10:10))
3089 (HOLD datain (posedge clk) (100:100:100))
3090 (HOLD sclr (posedge clk) (100:100:100))
3094 (CELLTYPE "stratix_asynch_lcell")
3095 (INSTANCE \\vga_driver_unit\|un1_line_counter_sig_3_\\.lecomb)
3098 (PORT dataa (990:990:990) (990:990:990))
3099 (PORT datab (999:999:999) (999:999:999))
3100 (IOPATH dataa combout (459:459:459) (459:459:459))
3101 (IOPATH datab combout (332:332:332) (332:332:332))
3102 (IOPATH cin0 combout (432:432:432) (432:432:432))
3103 (IOPATH cin1 combout (449:449:449) (449:449:449))
3104 (IOPATH dataa cout0 (443:443:443) (443:443:443))
3105 (IOPATH datab cout0 (344:344:344) (344:344:344))
3106 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
3107 (IOPATH dataa cout1 (451:451:451) (451:451:451))
3108 (IOPATH datab cout1 (341:341:341) (341:341:341))
3109 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
3114 (CELLTYPE "stratix_asynch_lcell")
3115 (INSTANCE \\vga_driver_unit\|line_counter_sig_2_\\.lecomb)
3118 (PORT datac (602:602:602) (602:602:602))
3119 (PORT datad (846:846:846) (846:846:846))
3120 (IOPATH datac regin (364:364:364) (364:364:364))
3121 (IOPATH datad regin (235:235:235) (235:235:235))
3126 (CELLTYPE "stratix_lcell_register")
3127 (INSTANCE \\vga_driver_unit\|line_counter_sig_2_\\.lereg)
3130 (PORT sclr (1996:1996:1996) (1996:1996:1996))
3131 (PORT aclr (668:668:668) (668:668:668))
3132 (PORT clk (2369:2369:2369) (2369:2369:2369))
3133 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
3134 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
3138 (SETUP datain (posedge clk) (10:10:10))
3139 (SETUP sclr (posedge clk) (10:10:10))
3140 (HOLD datain (posedge clk) (100:100:100))
3141 (HOLD sclr (posedge clk) (100:100:100))
3145 (CELLTYPE "stratix_asynch_lcell")
3146 (INSTANCE \\vga_driver_unit\|un1_line_counter_sig_4_\\.lecomb)
3149 (PORT dataa (663:663:663) (663:663:663))
3150 (PORT datab (645:645:645) (645:645:645))
3151 (IOPATH dataa combout (459:459:459) (459:459:459))
3152 (IOPATH datab combout (332:332:332) (332:332:332))
3153 (IOPATH cin0 combout (432:432:432) (432:432:432))
3154 (IOPATH cin1 combout (449:449:449) (449:449:449))
3155 (IOPATH dataa cout0 (443:443:443) (443:443:443))
3156 (IOPATH datab cout0 (344:344:344) (344:344:344))
3157 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
3158 (IOPATH dataa cout1 (451:451:451) (451:451:451))
3159 (IOPATH datab cout1 (341:341:341) (341:341:341))
3160 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
3165 (CELLTYPE "stratix_asynch_lcell")
3166 (INSTANCE \\vga_driver_unit\|line_counter_sig_3_\\.lecomb)
3169 (PORT dataa (611:611:611) (611:611:611))
3170 (PORT datac (540:540:540) (540:540:540))
3171 (IOPATH dataa regin (583:583:583) (583:583:583))
3172 (IOPATH datac regin (364:364:364) (364:364:364))
3177 (CELLTYPE "stratix_lcell_register")
3178 (INSTANCE \\vga_driver_unit\|line_counter_sig_3_\\.lereg)
3181 (PORT sclr (1996:1996:1996) (1996:1996:1996))
3182 (PORT aclr (668:668:668) (668:668:668))
3183 (PORT clk (2369:2369:2369) (2369:2369:2369))
3184 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
3185 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
3189 (SETUP datain (posedge clk) (10:10:10))
3190 (SETUP sclr (posedge clk) (10:10:10))
3191 (HOLD datain (posedge clk) (100:100:100))
3192 (HOLD sclr (posedge clk) (100:100:100))
3196 (CELLTYPE "stratix_asynch_lcell")
3197 (INSTANCE \\vga_driver_unit\|un1_line_counter_sig_5_\\.lecomb)
3200 (PORT dataa (947:947:947) (947:947:947))
3201 (PORT datab (875:875:875) (875:875:875))
3202 (IOPATH dataa combout (459:459:459) (459:459:459))
3203 (IOPATH datab combout (332:332:332) (332:332:332))
3204 (IOPATH cin0 combout (432:432:432) (432:432:432))
3205 (IOPATH cin1 combout (449:449:449) (449:449:449))
3206 (IOPATH dataa cout0 (443:443:443) (443:443:443))
3207 (IOPATH datab cout0 (344:344:344) (344:344:344))
3208 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
3209 (IOPATH dataa cout1 (451:451:451) (451:451:451))
3210 (IOPATH datab cout1 (341:341:341) (341:341:341))
3211 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
3216 (CELLTYPE "stratix_asynch_lcell")
3217 (INSTANCE \\vga_driver_unit\|line_counter_sig_4_\\.lecomb)
3220 (PORT datab (601:601:601) (601:601:601))
3221 (PORT datad (341:341:341) (341:341:341))
3222 (IOPATH datab regin (489:489:489) (489:489:489))
3223 (IOPATH datad regin (235:235:235) (235:235:235))
3228 (CELLTYPE "stratix_lcell_register")
3229 (INSTANCE \\vga_driver_unit\|line_counter_sig_4_\\.lereg)
3232 (PORT sclr (1703:1703:1703) (1703:1703:1703))
3233 (PORT aclr (668:668:668) (668:668:668))
3234 (PORT clk (2369:2369:2369) (2369:2369:2369))
3235 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
3236 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
3240 (SETUP datain (posedge clk) (10:10:10))
3241 (SETUP sclr (posedge clk) (10:10:10))
3242 (HOLD datain (posedge clk) (100:100:100))
3243 (HOLD sclr (posedge clk) (100:100:100))
3247 (CELLTYPE "stratix_asynch_lcell")
3248 (INSTANCE \\vga_driver_unit\|un1_line_counter_sig_6_\\.lecomb)
3251 (PORT dataa (1042:1042:1042) (1042:1042:1042))
3252 (PORT datab (666:666:666) (666:666:666))
3253 (IOPATH dataa combout (459:459:459) (459:459:459))
3254 (IOPATH datab combout (332:332:332) (332:332:332))
3255 (IOPATH cin0 combout (432:432:432) (432:432:432))
3256 (IOPATH cin1 combout (449:449:449) (449:449:449))
3257 (IOPATH dataa cout0 (443:443:443) (443:443:443))
3258 (IOPATH datab cout0 (344:344:344) (344:344:344))
3259 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
3260 (IOPATH dataa cout1 (451:451:451) (451:451:451))
3261 (IOPATH datab cout1 (341:341:341) (341:341:341))
3262 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
3267 (CELLTYPE "stratix_asynch_lcell")
3268 (INSTANCE \\vga_driver_unit\|line_counter_sig_5_\\.lecomb)
3271 (PORT dataa (354:354:354) (354:354:354))
3272 (PORT datac (1110:1110:1110) (1110:1110:1110))
3273 (PORT datad (1100:1100:1100) (1100:1100:1100))
3274 (IOPATH dataa regin (583:583:583) (583:583:583))
3275 (IOPATH datac regin (364:364:364) (364:364:364))
3276 (IOPATH datad regin (235:235:235) (235:235:235))
3281 (CELLTYPE "stratix_lcell_register")
3282 (INSTANCE \\vga_driver_unit\|line_counter_sig_5_\\.lereg)
3285 (PORT aclr (668:668:668) (668:668:668))
3286 (PORT clk (2369:2369:2369) (2369:2369:2369))
3287 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
3288 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
3292 (SETUP datain (posedge clk) (10:10:10))
3293 (HOLD datain (posedge clk) (100:100:100))
3297 (CELLTYPE "stratix_asynch_lcell")
3298 (INSTANCE \\vga_driver_unit\|un1_line_counter_sig_7_\\.lecomb)
3301 (PORT dataa (1036:1036:1036) (1036:1036:1036))
3302 (PORT datab (593:593:593) (593:593:593))
3303 (IOPATH dataa combout (459:459:459) (459:459:459))
3304 (IOPATH datab combout (332:332:332) (332:332:332))
3305 (IOPATH cin0 combout (432:432:432) (432:432:432))
3306 (IOPATH cin1 combout (449:449:449) (449:449:449))
3307 (IOPATH dataa cout0 (443:443:443) (443:443:443))
3308 (IOPATH datab cout0 (344:344:344) (344:344:344))
3309 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
3310 (IOPATH dataa cout1 (451:451:451) (451:451:451))
3311 (IOPATH datab cout1 (341:341:341) (341:341:341))
3312 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
3317 (CELLTYPE "stratix_asynch_lcell")
3318 (INSTANCE \\vga_driver_unit\|line_counter_sig_6_\\.lecomb)
3321 (PORT datac (360:360:360) (360:360:360))
3322 (PORT datad (609:609:609) (609:609:609))
3323 (IOPATH datac regin (364:364:364) (364:364:364))
3324 (IOPATH datad regin (235:235:235) (235:235:235))
3329 (CELLTYPE "stratix_lcell_register")
3330 (INSTANCE \\vga_driver_unit\|line_counter_sig_6_\\.lereg)
3333 (PORT sclr (1703:1703:1703) (1703:1703:1703))
3334 (PORT aclr (668:668:668) (668:668:668))
3335 (PORT clk (2369:2369:2369) (2369:2369:2369))
3336 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
3337 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
3341 (SETUP datain (posedge clk) (10:10:10))
3342 (SETUP sclr (posedge clk) (10:10:10))
3343 (HOLD datain (posedge clk) (100:100:100))
3344 (HOLD sclr (posedge clk) (100:100:100))
3348 (CELLTYPE "stratix_asynch_lcell")
3349 (INSTANCE \\vga_driver_unit\|un1_line_counter_sig_8_\\.lecomb)
3352 (PORT datab (718:718:718) (718:718:718))
3353 (IOPATH datab combout (332:332:332) (332:332:332))
3354 (IOPATH cin0 combout (432:432:432) (432:432:432))
3355 (IOPATH cin1 combout (449:449:449) (449:449:449))
3360 (CELLTYPE "stratix_asynch_lcell")
3361 (INSTANCE \\vga_driver_unit\|line_counter_sig_7_\\.lecomb)
3364 (PORT datac (553:553:553) (553:553:553))
3365 (PORT datad (610:610:610) (610:610:610))
3366 (IOPATH datac regin (364:364:364) (364:364:364))
3367 (IOPATH datad regin (235:235:235) (235:235:235))
3372 (CELLTYPE "stratix_lcell_register")
3373 (INSTANCE \\vga_driver_unit\|line_counter_sig_7_\\.lereg)
3376 (PORT sclr (1703:1703:1703) (1703:1703:1703))
3377 (PORT aclr (668:668:668) (668:668:668))
3378 (PORT clk (2369:2369:2369) (2369:2369:2369))
3379 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
3380 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
3384 (SETUP datain (posedge clk) (10:10:10))
3385 (SETUP sclr (posedge clk) (10:10:10))
3386 (HOLD datain (posedge clk) (100:100:100))
3387 (HOLD sclr (posedge clk) (100:100:100))
3391 (CELLTYPE "stratix_asynch_lcell")
3392 (INSTANCE \\vga_driver_unit\|LINE_COUNT_next_un10_line_counter_siglt4_2\\.lecomb)
3395 (PORT dataa (433:433:433) (433:433:433))
3396 (PORT datac (444:444:444) (444:444:444))
3397 (PORT datad (971:971:971) (971:971:971))
3398 (IOPATH dataa combout (459:459:459) (459:459:459))
3399 (IOPATH datac combout (213:213:213) (213:213:213))
3400 (IOPATH datad combout (87:87:87) (87:87:87))
3405 (CELLTYPE "stratix_asynch_lcell")
3406 (INSTANCE \\vga_driver_unit\|LINE_COUNT_next_un10_line_counter_siglto5\\.lecomb)
3409 (PORT dataa (989:989:989) (989:989:989))
3410 (PORT datab (999:999:999) (999:999:999))
3411 (PORT datac (868:868:868) (868:868:868))
3412 (PORT datad (1026:1026:1026) (1026:1026:1026))
3413 (IOPATH dataa combout (459:459:459) (459:459:459))
3414 (IOPATH datab combout (332:332:332) (332:332:332))
3415 (IOPATH datac combout (213:213:213) (213:213:213))
3416 (IOPATH datad combout (87:87:87) (87:87:87))
3421 (CELLTYPE "stratix_asynch_lcell")
3422 (INSTANCE \\vga_driver_unit\|LINE_COUNT_next_un10_line_counter_siglto8\\.lecomb)
3425 (PORT dataa (625:625:625) (625:625:625))
3426 (PORT datab (670:670:670) (670:670:670))
3427 (PORT datac (735:735:735) (735:735:735))
3428 (PORT datad (555:555:555) (555:555:555))
3429 (IOPATH dataa combout (459:459:459) (459:459:459))
3430 (IOPATH datab combout (332:332:332) (332:332:332))
3431 (IOPATH datac combout (213:213:213) (213:213:213))
3432 (IOPATH datad combout (87:87:87) (87:87:87))
3437 (CELLTYPE "stratix_asynch_lcell")
3438 (INSTANCE \\vga_driver_unit\|un1_line_counter_sig_9_\\.lecomb)
3441 (PORT datab (416:416:416) (416:416:416))
3442 (PORT datad (420:420:420) (420:420:420))
3443 (IOPATH datab combout (332:332:332) (332:332:332))
3444 (IOPATH datad combout (87:87:87) (87:87:87))
3445 (IOPATH cin0 combout (432:432:432) (432:432:432))
3446 (IOPATH cin1 combout (449:449:449) (449:449:449))
3451 (CELLTYPE "stratix_asynch_lcell")
3452 (INSTANCE \\vga_driver_unit\|line_counter_sig_8_\\.lecomb)
3455 (PORT datab (602:602:602) (602:602:602))
3456 (PORT datad (253:253:253) (253:253:253))
3457 (IOPATH datab regin (489:489:489) (489:489:489))
3458 (IOPATH datad regin (235:235:235) (235:235:235))
3463 (CELLTYPE "stratix_lcell_register")
3464 (INSTANCE \\vga_driver_unit\|line_counter_sig_8_\\.lereg)
3467 (PORT sclr (1703:1703:1703) (1703:1703:1703))
3468 (PORT aclr (668:668:668) (668:668:668))
3469 (PORT clk (2369:2369:2369) (2369:2369:2369))
3470 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
3471 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
3475 (SETUP datain (posedge clk) (10:10:10))
3476 (SETUP sclr (posedge clk) (10:10:10))
3477 (HOLD datain (posedge clk) (100:100:100))
3478 (HOLD sclr (posedge clk) (100:100:100))
3482 (CELLTYPE "stratix_asynch_lcell")
3483 (INSTANCE \\vga_control_unit\|DRAW_SQUARE_next_un17_v_enablelto3\\.lecomb)
3486 (PORT dataa (662:662:662) (662:662:662))
3487 (PORT datab (685:685:685) (685:685:685))
3488 (PORT datac (944:944:944) (944:944:944))
3489 (PORT datad (675:675:675) (675:675:675))
3490 (IOPATH dataa combout (459:459:459) (459:459:459))
3491 (IOPATH datab combout (332:332:332) (332:332:332))
3492 (IOPATH datac combout (213:213:213) (213:213:213))
3493 (IOPATH datad combout (87:87:87) (87:87:87))
3498 (CELLTYPE "stratix_asynch_lcell")
3499 (INSTANCE \\vga_control_unit\|b_next_0_sqmuxa_7_4_a_cZ\\.lecomb)
3502 (PORT dataa (667:667:667) (667:667:667))
3503 (PORT datab (671:671:671) (671:671:671))
3504 (PORT datac (364:364:364) (364:364:364))
3505 (PORT datad (1028:1028:1028) (1028:1028:1028))
3506 (IOPATH dataa combout (459:459:459) (459:459:459))
3507 (IOPATH datab combout (332:332:332) (332:332:332))
3508 (IOPATH datac combout (213:213:213) (213:213:213))
3509 (IOPATH datad combout (87:87:87) (87:87:87))
3514 (CELLTYPE "stratix_asynch_lcell")
3515 (INSTANCE \\vga_control_unit\|DRAW_SQUARE_next_un13_v_enablelto4_0\\.lecomb)
3518 (PORT datab (417:417:417) (417:417:417))
3519 (PORT datad (970:970:970) (970:970:970))
3520 (IOPATH datab combout (332:332:332) (332:332:332))
3521 (IOPATH datad combout (87:87:87) (87:87:87))
3526 (CELLTYPE "stratix_asynch_lcell")
3527 (INSTANCE \\vga_control_unit\|DRAW_SQUARE_next_un13_v_enablelto6\\.lecomb)
3530 (PORT dataa (1038:1038:1038) (1038:1038:1038))
3531 (PORT datab (651:651:651) (651:651:651))
3532 (PORT datac (689:689:689) (689:689:689))
3533 (PORT datad (558:558:558) (558:558:558))
3534 (IOPATH dataa combout (459:459:459) (459:459:459))
3535 (IOPATH datab combout (332:332:332) (332:332:332))
3536 (IOPATH datac combout (213:213:213) (213:213:213))
3537 (IOPATH datad combout (87:87:87) (87:87:87))
3542 (CELLTYPE "stratix_asynch_lcell")
3543 (INSTANCE \\vga_control_unit\|b_next_0_sqmuxa_7_4_cZ\\.lecomb)
3546 (PORT dataa (626:626:626) (626:626:626))
3547 (PORT datab (721:721:721) (721:721:721))
3548 (PORT datac (359:359:359) (359:359:359))
3549 (PORT datad (340:340:340) (340:340:340))
3550 (IOPATH dataa combout (459:459:459) (459:459:459))
3551 (IOPATH datab combout (332:332:332) (332:332:332))
3552 (IOPATH datac combout (213:213:213) (213:213:213))
3553 (IOPATH datad combout (87:87:87) (87:87:87))
3558 (CELLTYPE "stratix_asynch_lcell")
3559 (INSTANCE \\vga_driver_unit\|column_counter_next_0_sqmuxa_1_1_cZ\\.lecomb)
3562 (PORT dataa (1383:1383:1383) (1383:1383:1383))
3563 (PORT datab (1010:1010:1010) (1010:1010:1010))
3564 (PORT datac (5258:5258:5258) (5258:5258:5258))
3565 (PORT datad (455:455:455) (455:455:455))
3566 (IOPATH dataa combout (459:459:459) (459:459:459))
3567 (IOPATH datab combout (332:332:332) (332:332:332))
3568 (IOPATH datac combout (213:213:213) (213:213:213))
3569 (IOPATH datad combout (87:87:87) (87:87:87))
3574 (CELLTYPE "stratix_asynch_lcell")
3575 (INSTANCE \\vga_driver_unit\|column_counter_sig_0_\\.lecomb)
3578 (PORT datac (441:441:441) (441:441:441))
3579 (PORT datad (1121:1121:1121) (1121:1121:1121))
3580 (IOPATH datac regin (364:364:364) (364:364:364))
3581 (IOPATH datad regin (235:235:235) (235:235:235))
3586 (CELLTYPE "stratix_lcell_register")
3587 (INSTANCE \\vga_driver_unit\|column_counter_sig_0_\\.lereg)
3590 (PORT sclr (2276:2276:2276) (2276:2276:2276))
3591 (PORT aclr (668:668:668) (668:668:668))
3592 (PORT clk (2311:2311:2311) (2311:2311:2311))
3593 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
3594 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
3598 (SETUP datain (posedge clk) (10:10:10))
3599 (SETUP sclr (posedge clk) (10:10:10))
3600 (HOLD datain (posedge clk) (100:100:100))
3601 (HOLD sclr (posedge clk) (100:100:100))
3605 (CELLTYPE "stratix_asynch_lcell")
3606 (INSTANCE \\vga_driver_unit\|un2_column_counter_next_1_\\.lecomb)
3609 (PORT dataa (1142:1142:1142) (1142:1142:1142))
3610 (PORT datab (1099:1099:1099) (1099:1099:1099))
3611 (IOPATH dataa combout (459:459:459) (459:459:459))
3612 (IOPATH datab combout (332:332:332) (332:332:332))
3613 (IOPATH dataa cout0 (443:443:443) (443:443:443))
3614 (IOPATH datab cout0 (344:344:344) (344:344:344))
3615 (IOPATH dataa cout1 (451:451:451) (451:451:451))
3616 (IOPATH datab cout1 (341:341:341) (341:341:341))
3621 (CELLTYPE "stratix_asynch_lcell")
3622 (INSTANCE \\vga_driver_unit\|column_counter_sig_1_\\.lecomb)
3625 (PORT datac (1088:1088:1088) (1088:1088:1088))
3626 (PORT datad (1118:1118:1118) (1118:1118:1118))
3627 (IOPATH datac regin (364:364:364) (364:364:364))
3628 (IOPATH datad regin (235:235:235) (235:235:235))
3633 (CELLTYPE "stratix_lcell_register")
3634 (INSTANCE \\vga_driver_unit\|column_counter_sig_1_\\.lereg)
3637 (PORT sclr (2276:2276:2276) (2276:2276:2276))
3638 (PORT aclr (668:668:668) (668:668:668))
3639 (PORT clk (2311:2311:2311) (2311:2311:2311))
3640 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
3641 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
3645 (SETUP datain (posedge clk) (10:10:10))
3646 (SETUP sclr (posedge clk) (10:10:10))
3647 (HOLD datain (posedge clk) (100:100:100))
3648 (HOLD sclr (posedge clk) (100:100:100))
3652 (CELLTYPE "stratix_asynch_lcell")
3653 (INSTANCE \\vga_driver_unit\|un2_column_counter_next_3_\\.lecomb)
3656 (PORT dataa (1183:1183:1183) (1183:1183:1183))
3657 (PORT datab (1161:1161:1161) (1161:1161:1161))
3658 (IOPATH dataa combout (459:459:459) (459:459:459))
3659 (IOPATH datab combout (332:332:332) (332:332:332))
3660 (IOPATH cin0 combout (432:432:432) (432:432:432))
3661 (IOPATH cin1 combout (449:449:449) (449:449:449))
3662 (IOPATH dataa cout0 (443:443:443) (443:443:443))
3663 (IOPATH datab cout0 (344:344:344) (344:344:344))
3664 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
3665 (IOPATH dataa cout1 (451:451:451) (451:451:451))
3666 (IOPATH datab cout1 (341:341:341) (341:341:341))
3667 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
3672 (CELLTYPE "stratix_asynch_lcell")
3673 (INSTANCE \\vga_driver_unit\|column_counter_sig_3_\\.lecomb)
3676 (PORT datac (1068:1068:1068) (1068:1068:1068))
3677 (PORT datad (1153:1153:1153) (1153:1153:1153))
3678 (IOPATH datac regin (364:364:364) (364:364:364))
3679 (IOPATH datad regin (235:235:235) (235:235:235))
3684 (CELLTYPE "stratix_lcell_register")
3685 (INSTANCE \\vga_driver_unit\|column_counter_sig_3_\\.lereg)
3688 (PORT sclr (2266:2266:2266) (2266:2266:2266))
3689 (PORT aclr (668:668:668) (668:668:668))
3690 (PORT clk (2311:2311:2311) (2311:2311:2311))
3691 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
3692 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
3696 (SETUP datain (posedge clk) (10:10:10))
3697 (SETUP sclr (posedge clk) (10:10:10))
3698 (HOLD datain (posedge clk) (100:100:100))
3699 (HOLD sclr (posedge clk) (100:100:100))
3703 (CELLTYPE "stratix_asynch_lcell")
3704 (INSTANCE \\vga_driver_unit\|un2_column_counter_next_0_\\.lecomb)
3707 (PORT dataa (651:651:651) (651:651:651))
3708 (PORT datab (626:626:626) (626:626:626))
3709 (IOPATH dataa cout0 (443:443:443) (443:443:443))
3710 (IOPATH datab cout0 (344:344:344) (344:344:344))
3711 (IOPATH dataa cout1 (451:451:451) (451:451:451))
3712 (IOPATH datab cout1 (341:341:341) (341:341:341))
3717 (CELLTYPE "stratix_asynch_lcell")
3718 (INSTANCE \\vga_driver_unit\|un2_column_counter_next_2_\\.lecomb)
3721 (PORT dataa (450:450:450) (450:450:450))
3722 (PORT datab (989:989:989) (989:989:989))
3723 (IOPATH dataa combout (459:459:459) (459:459:459))
3724 (IOPATH datab combout (332:332:332) (332:332:332))
3725 (IOPATH cin0 combout (432:432:432) (432:432:432))
3726 (IOPATH cin1 combout (449:449:449) (449:449:449))
3727 (IOPATH dataa cout0 (443:443:443) (443:443:443))
3728 (IOPATH datab cout0 (344:344:344) (344:344:344))
3729 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
3730 (IOPATH dataa cout1 (451:451:451) (451:451:451))
3731 (IOPATH datab cout1 (341:341:341) (341:341:341))
3732 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
3737 (CELLTYPE "stratix_asynch_lcell")
3738 (INSTANCE \\vga_driver_unit\|column_counter_sig_2_\\.lecomb)
3741 (PORT datab (336:336:336) (336:336:336))
3742 (PORT datad (1150:1150:1150) (1150:1150:1150))
3743 (IOPATH datab regin (489:489:489) (489:489:489))
3744 (IOPATH datad regin (235:235:235) (235:235:235))
3749 (CELLTYPE "stratix_lcell_register")
3750 (INSTANCE \\vga_driver_unit\|column_counter_sig_2_\\.lereg)
3753 (PORT sclr (2266:2266:2266) (2266:2266:2266))
3754 (PORT aclr (668:668:668) (668:668:668))
3755 (PORT clk (2311:2311:2311) (2311:2311:2311))
3756 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
3757 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
3761 (SETUP datain (posedge clk) (10:10:10))
3762 (SETUP sclr (posedge clk) (10:10:10))
3763 (HOLD datain (posedge clk) (100:100:100))
3764 (HOLD sclr (posedge clk) (100:100:100))
3768 (CELLTYPE "stratix_asynch_lcell")
3769 (INSTANCE \\vga_driver_unit\|un2_column_counter_next_5_\\.lecomb)
3772 (PORT dataa (448:448:448) (448:448:448))
3773 (PORT datab (1111:1111:1111) (1111:1111:1111))
3774 (IOPATH dataa combout (459:459:459) (459:459:459))
3775 (IOPATH datab combout (332:332:332) (332:332:332))
3776 (IOPATH cin0 combout (432:432:432) (432:432:432))
3777 (IOPATH cin1 combout (449:449:449) (449:449:449))
3778 (IOPATH dataa cout0 (443:443:443) (443:443:443))
3779 (IOPATH datab cout0 (344:344:344) (344:344:344))
3780 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
3781 (IOPATH dataa cout1 (451:451:451) (451:451:451))
3782 (IOPATH datab cout1 (341:341:341) (341:341:341))
3783 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
3788 (CELLTYPE "stratix_asynch_lcell")
3789 (INSTANCE \\vga_driver_unit\|column_counter_sig_5_\\.lecomb)
3792 (PORT dataa (351:351:351) (351:351:351))
3793 (PORT datac (1102:1102:1102) (1102:1102:1102))
3794 (IOPATH dataa regin (583:583:583) (583:583:583))
3795 (IOPATH datac regin (364:364:364) (364:364:364))
3800 (CELLTYPE "stratix_lcell_register")
3801 (INSTANCE \\vga_driver_unit\|column_counter_sig_5_\\.lereg)
3804 (PORT sclr (2252:2252:2252) (2252:2252:2252))
3805 (PORT aclr (668:668:668) (668:668:668))
3806 (PORT clk (2319:2319:2319) (2319:2319:2319))
3807 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
3808 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
3812 (SETUP datain (posedge clk) (10:10:10))
3813 (SETUP sclr (posedge clk) (10:10:10))
3814 (HOLD datain (posedge clk) (100:100:100))
3815 (HOLD sclr (posedge clk) (100:100:100))
3819 (CELLTYPE "stratix_asynch_lcell")
3820 (INSTANCE \\vga_driver_unit\|un2_column_counter_next_4_\\.lecomb)
3823 (PORT dataa (720:720:720) (720:720:720))
3824 (PORT datab (1119:1119:1119) (1119:1119:1119))
3825 (IOPATH dataa combout (459:459:459) (459:459:459))
3826 (IOPATH datab combout (332:332:332) (332:332:332))
3827 (IOPATH cin0 combout (432:432:432) (432:432:432))
3828 (IOPATH cin1 combout (449:449:449) (449:449:449))
3829 (IOPATH dataa cout0 (443:443:443) (443:443:443))
3830 (IOPATH datab cout0 (344:344:344) (344:344:344))
3831 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
3832 (IOPATH dataa cout1 (451:451:451) (451:451:451))
3833 (IOPATH datab cout1 (341:341:341) (341:341:341))
3834 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
3839 (CELLTYPE "stratix_asynch_lcell")
3840 (INSTANCE \\vga_driver_unit\|column_counter_sig_4_\\.lecomb)
3843 (PORT datac (362:362:362) (362:362:362))
3844 (PORT datad (1154:1154:1154) (1154:1154:1154))
3845 (IOPATH datac regin (364:364:364) (364:364:364))
3846 (IOPATH datad regin (235:235:235) (235:235:235))
3851 (CELLTYPE "stratix_lcell_register")
3852 (INSTANCE \\vga_driver_unit\|column_counter_sig_4_\\.lereg)
3855 (PORT sclr (2266:2266:2266) (2266:2266:2266))
3856 (PORT aclr (668:668:668) (668:668:668))
3857 (PORT clk (2311:2311:2311) (2311:2311:2311))
3858 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
3859 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
3863 (SETUP datain (posedge clk) (10:10:10))
3864 (SETUP sclr (posedge clk) (10:10:10))
3865 (HOLD datain (posedge clk) (100:100:100))
3866 (HOLD sclr (posedge clk) (100:100:100))
3870 (CELLTYPE "stratix_asynch_lcell")
3871 (INSTANCE \\vga_driver_unit\|un2_column_counter_next_6_\\.lecomb)
3874 (PORT dataa (639:639:639) (639:639:639))
3875 (PORT datab (1135:1135:1135) (1135:1135:1135))
3876 (IOPATH dataa combout (459:459:459) (459:459:459))
3877 (IOPATH datab combout (332:332:332) (332:332:332))
3878 (IOPATH cin0 combout (432:432:432) (432:432:432))
3879 (IOPATH cin1 combout (449:449:449) (449:449:449))
3880 (IOPATH dataa cout0 (443:443:443) (443:443:443))
3881 (IOPATH datab cout0 (344:344:344) (344:344:344))
3882 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
3883 (IOPATH dataa cout1 (451:451:451) (451:451:451))
3884 (IOPATH datab cout1 (341:341:341) (341:341:341))
3885 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
3890 (CELLTYPE "stratix_asynch_lcell")
3891 (INSTANCE \\vga_driver_unit\|un2_column_counter_next_8_\\.lecomb)
3894 (PORT datad (585:585:585) (585:585:585))
3895 (IOPATH datad combout (87:87:87) (87:87:87))
3896 (IOPATH cin0 combout (432:432:432) (432:432:432))
3897 (IOPATH cin1 combout (449:449:449) (449:449:449))
3902 (CELLTYPE "stratix_asynch_lcell")
3903 (INSTANCE \\vga_driver_unit\|column_counter_sig_8_\\.lecomb)
3906 (PORT dataa (1513:1513:1513) (1513:1513:1513))
3907 (PORT datac (549:549:549) (549:549:549))
3908 (PORT datad (1118:1118:1118) (1118:1118:1118))
3909 (IOPATH dataa regin (583:583:583) (583:583:583))
3910 (IOPATH datac regin (364:364:364) (364:364:364))
3911 (IOPATH datad regin (235:235:235) (235:235:235))
3916 (CELLTYPE "stratix_lcell_register")
3917 (INSTANCE \\vga_driver_unit\|column_counter_sig_8_\\.lereg)
3920 (PORT aclr (668:668:668) (668:668:668))
3921 (PORT clk (2311:2311:2311) (2311:2311:2311))
3922 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
3923 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
3927 (SETUP datain (posedge clk) (10:10:10))
3928 (HOLD datain (posedge clk) (100:100:100))
3932 (CELLTYPE "stratix_asynch_lcell")
3933 (INSTANCE \\vga_driver_unit\|COLUMN_COUNT_next_un10_column_counter_siglt6_4\\.lecomb)
3936 (PORT dataa (1173:1173:1173) (1173:1173:1173))
3937 (PORT datab (1101:1101:1101) (1101:1101:1101))
3938 (PORT datac (1118:1118:1118) (1118:1118:1118))
3939 (PORT datad (1129:1129:1129) (1129:1129:1129))
3940 (IOPATH dataa combout (459:459:459) (459:459:459))
3941 (IOPATH datab combout (332:332:332) (332:332:332))
3942 (IOPATH datac combout (213:213:213) (213:213:213))
3943 (IOPATH datad combout (87:87:87) (87:87:87))
3948 (CELLTYPE "stratix_asynch_lcell")
3949 (INSTANCE \\vga_driver_unit\|COLUMN_COUNT_next_un10_column_counter_siglt6\\.lecomb)
3952 (PORT dataa (448:448:448) (448:448:448))
3953 (PORT datab (1108:1108:1108) (1108:1108:1108))
3954 (PORT datac (1146:1146:1146) (1146:1146:1146))
3955 (PORT datad (139:139:139) (139:139:139))
3956 (IOPATH dataa combout (459:459:459) (459:459:459))
3957 (IOPATH datab combout (332:332:332) (332:332:332))
3958 (IOPATH datac combout (213:213:213) (213:213:213))
3959 (IOPATH datad combout (87:87:87) (87:87:87))
3964 (CELLTYPE "stratix_asynch_lcell")
3965 (INSTANCE \\vga_driver_unit\|un2_column_counter_next_7_\\.lecomb)
3968 (PORT dataa (1153:1153:1153) (1153:1153:1153))
3969 (PORT datab (417:417:417) (417:417:417))
3970 (IOPATH dataa combout (459:459:459) (459:459:459))
3971 (IOPATH datab combout (332:332:332) (332:332:332))
3972 (IOPATH cin0 combout (432:432:432) (432:432:432))
3973 (IOPATH cin1 combout (449:449:449) (449:449:449))
3974 (IOPATH dataa cout0 (443:443:443) (443:443:443))
3975 (IOPATH datab cout0 (344:344:344) (344:344:344))
3976 (IOPATH cin0 cout0 (60:60:60) (60:60:60))
3977 (IOPATH dataa cout1 (451:451:451) (451:451:451))
3978 (IOPATH datab cout1 (341:341:341) (341:341:341))
3979 (IOPATH cin1 cout1 (62:62:62) (62:62:62))
3984 (CELLTYPE "stratix_asynch_lcell")
3985 (INSTANCE \\vga_driver_unit\|un2_column_counter_next_9_\\.lecomb)
3988 (PORT dataa (1224:1224:1224) (1224:1224:1224))
3989 (PORT datab (422:422:422) (422:422:422))
3990 (IOPATH dataa combout (459:459:459) (459:459:459))
3991 (IOPATH datab combout (332:332:332) (332:332:332))
3992 (IOPATH cin0 combout (432:432:432) (432:432:432))
3993 (IOPATH cin1 combout (449:449:449) (449:449:449))
3998 (CELLTYPE "stratix_asynch_lcell")
3999 (INSTANCE \\vga_driver_unit\|column_counter_sig_9_\\.lecomb)
4002 (PORT datab (343:343:343) (343:343:343))
4003 (PORT datac (1106:1106:1106) (1106:1106:1106))
4004 (IOPATH datab regin (489:489:489) (489:489:489))
4005 (IOPATH datac regin (364:364:364) (364:364:364))
4010 (CELLTYPE "stratix_lcell_register")
4011 (INSTANCE \\vga_driver_unit\|column_counter_sig_9_\\.lereg)
4014 (PORT sclr (2252:2252:2252) (2252:2252:2252))
4015 (PORT aclr (668:668:668) (668:668:668))
4016 (PORT clk (2319:2319:2319) (2319:2319:2319))
4017 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
4018 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
4022 (SETUP datain (posedge clk) (10:10:10))
4023 (SETUP sclr (posedge clk) (10:10:10))
4024 (HOLD datain (posedge clk) (100:100:100))
4025 (HOLD sclr (posedge clk) (100:100:100))
4029 (CELLTYPE "stratix_asynch_lcell")
4030 (INSTANCE \\vga_driver_unit\|COLUMN_COUNT_next_un10_column_counter_siglto9\\.lecomb)
4033 (PORT dataa (2428:2428:2428) (2428:2428:2428))
4034 (PORT datab (1196:1196:1196) (1196:1196:1196))
4035 (PORT datac (1094:1094:1094) (1094:1094:1094))
4036 (PORT datad (1196:1196:1196) (1196:1196:1196))
4037 (IOPATH dataa combout (459:459:459) (459:459:459))
4038 (IOPATH datab combout (332:332:332) (332:332:332))
4039 (IOPATH datac combout (213:213:213) (213:213:213))
4040 (IOPATH datad combout (87:87:87) (87:87:87))
4045 (CELLTYPE "stratix_asynch_lcell")
4046 (INSTANCE \\vga_driver_unit\|column_counter_sig_7_\\.lecomb)
4049 (PORT datab (1469:1469:1469) (1469:1469:1469))
4050 (PORT datac (1105:1105:1105) (1105:1105:1105))
4051 (PORT datad (354:354:354) (354:354:354))
4052 (IOPATH datab regin (489:489:489) (489:489:489))
4053 (IOPATH datac regin (364:364:364) (364:364:364))
4054 (IOPATH datad regin (235:235:235) (235:235:235))
4059 (CELLTYPE "stratix_lcell_register")
4060 (INSTANCE \\vga_driver_unit\|column_counter_sig_7_\\.lereg)
4063 (PORT aclr (668:668:668) (668:668:668))
4064 (PORT clk (2319:2319:2319) (2319:2319:2319))
4065 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
4066 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
4070 (SETUP datain (posedge clk) (10:10:10))
4071 (HOLD datain (posedge clk) (100:100:100))
4075 (CELLTYPE "stratix_asynch_lcell")
4076 (INSTANCE \\vga_driver_unit\|column_counter_sig_6_\\.lecomb)
4079 (PORT dataa (367:367:367) (367:367:367))
4080 (PORT datad (1154:1154:1154) (1154:1154:1154))
4081 (IOPATH dataa regin (583:583:583) (583:583:583))
4082 (IOPATH datad regin (235:235:235) (235:235:235))
4087 (CELLTYPE "stratix_lcell_register")
4088 (INSTANCE \\vga_driver_unit\|column_counter_sig_6_\\.lereg)
4091 (PORT sclr (2266:2266:2266) (2266:2266:2266))
4092 (PORT aclr (668:668:668) (668:668:668))
4093 (PORT clk (2311:2311:2311) (2311:2311:2311))
4094 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
4095 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
4099 (SETUP datain (posedge clk) (10:10:10))
4100 (SETUP sclr (posedge clk) (10:10:10))
4101 (HOLD datain (posedge clk) (100:100:100))
4102 (HOLD sclr (posedge clk) (100:100:100))
4106 (CELLTYPE "stratix_asynch_lcell")
4107 (INSTANCE \\vga_control_unit\|DRAW_SQUARE_next_un5_v_enablelt2\\.lecomb)
4110 (PORT dataa (450:450:450) (450:450:450))
4111 (PORT datab (630:630:630) (630:630:630))
4112 (PORT datad (639:639:639) (639:639:639))
4113 (IOPATH dataa combout (459:459:459) (459:459:459))
4114 (IOPATH datab combout (332:332:332) (332:332:332))
4115 (IOPATH datad combout (87:87:87) (87:87:87))
4120 (CELLTYPE "stratix_asynch_lcell")
4121 (INSTANCE \\vga_control_unit\|DRAW_SQUARE_next_un5_v_enablelto5\\.lecomb)
4124 (PORT dataa (1075:1075:1075) (1075:1075:1075))
4125 (PORT datab (1222:1222:1222) (1222:1222:1222))
4126 (PORT datac (1189:1189:1189) (1189:1189:1189))
4127 (PORT datad (1403:1403:1403) (1403:1403:1403))
4128 (IOPATH dataa combout (459:459:459) (459:459:459))
4129 (IOPATH datab combout (332:332:332) (332:332:332))
4130 (IOPATH datac combout (213:213:213) (213:213:213))
4131 (IOPATH datad combout (87:87:87) (87:87:87))
4136 (CELLTYPE "stratix_asynch_lcell")
4137 (INSTANCE \\vga_driver_unit\|h_enable_sig_1_0_0_0_g0_i_o4_cZ\\.lecomb)
4140 (PORT datab (1917:1917:1917) (1917:1917:1917))
4141 (PORT datac (1598:1598:1598) (1598:1598:1598))
4142 (PORT datad (1966:1966:1966) (1966:1966:1966))
4143 (IOPATH datab combout (332:332:332) (332:332:332))
4144 (IOPATH datac combout (213:213:213) (213:213:213))
4145 (IOPATH datad combout (87:87:87) (87:87:87))
4150 (CELLTYPE "stratix_asynch_lcell")
4151 (INSTANCE \\vga_driver_unit\|h_enable_sig_Z\\.lecomb)
4154 (PORT datac (443:443:443) (443:443:443))
4155 (PORT datad (1589:1589:1589) (1589:1589:1589))
4156 (IOPATH datac regin (364:364:364) (364:364:364))
4157 (IOPATH datad regin (235:235:235) (235:235:235))
4162 (CELLTYPE "stratix_lcell_register")
4163 (INSTANCE \\vga_driver_unit\|h_enable_sig_Z\\.lereg)
4166 (PORT sclr (2747:2747:2747) (2747:2747:2747))
4167 (PORT aclr (668:668:668) (668:668:668))
4168 (PORT clk (2323:2323:2323) (2323:2323:2323))
4169 (PORT ena (1082:1082:1082) (1082:1082:1082))
4170 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
4171 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
4175 (SETUP datain (posedge clk) (10:10:10))
4176 (SETUP sclr (posedge clk) (10:10:10))
4177 (SETUP ena (posedge clk) (10:10:10))
4178 (HOLD datain (posedge clk) (100:100:100))
4179 (HOLD sclr (posedge clk) (100:100:100))
4180 (HOLD ena (posedge clk) (100:100:100))
4184 (CELLTYPE "stratix_asynch_lcell")
4185 (INSTANCE \\vga_control_unit\|b_next_0_sqmuxa_7_2_cZ\\.lecomb)
4188 (PORT dataa (1512:1512:1512) (1512:1512:1512))
4189 (PORT datab (424:424:424) (424:424:424))
4190 (PORT datac (1409:1409:1409) (1409:1409:1409))
4191 (PORT datad (1197:1197:1197) (1197:1197:1197))
4192 (IOPATH dataa combout (459:459:459) (459:459:459))
4193 (IOPATH datab combout (332:332:332) (332:332:332))
4194 (IOPATH datac combout (213:213:213) (213:213:213))
4195 (IOPATH datad combout (87:87:87) (87:87:87))
4200 (CELLTYPE "stratix_asynch_lcell")
4201 (INSTANCE \\vga_control_unit\|DRAW_SQUARE_next_un9_v_enablelto4\\.lecomb)
4204 (PORT dataa (1178:1178:1178) (1178:1178:1178))
4205 (PORT datac (1169:1169:1169) (1169:1169:1169))
4206 (PORT datad (1226:1226:1226) (1226:1226:1226))
4207 (IOPATH dataa combout (459:459:459) (459:459:459))
4208 (IOPATH datac combout (213:213:213) (213:213:213))
4209 (IOPATH datad combout (87:87:87) (87:87:87))
4214 (CELLTYPE "stratix_asynch_lcell")
4215 (INSTANCE \\vga_control_unit\|DRAW_SQUARE_next_un9_v_enablelto6\\.lecomb)
4218 (PORT dataa (1141:1141:1141) (1141:1141:1141))
4219 (PORT datab (1168:1168:1168) (1168:1168:1168))
4220 (PORT datad (354:354:354) (354:354:354))
4221 (IOPATH dataa combout (459:459:459) (459:459:459))
4222 (IOPATH datab combout (332:332:332) (332:332:332))
4223 (IOPATH datad combout (87:87:87) (87:87:87))
4228 (CELLTYPE "stratix_asynch_lcell")
4229 (INSTANCE \\vga_control_unit\|b_next_0_sqmuxa_7_3_cZ\\.lecomb)
4232 (PORT dataa (1206:1206:1206) (1206:1206:1206))
4233 (PORT datab (347:347:347) (347:347:347))
4234 (PORT datac (1216:1216:1216) (1216:1216:1216))
4235 (PORT datad (139:139:139) (139:139:139))
4236 (IOPATH dataa combout (459:459:459) (459:459:459))
4237 (IOPATH datab combout (332:332:332) (332:332:332))
4238 (IOPATH datac combout (213:213:213) (213:213:213))
4239 (IOPATH datad combout (87:87:87) (87:87:87))
4244 (CELLTYPE "stratix_asynch_lcell")
4245 (INSTANCE \\vga_control_unit\|b_next_0_sqmuxa_7_5_cZ\\.lecomb)
4248 (PORT dataa (1143:1143:1143) (1143:1143:1143))
4249 (PORT datab (1204:1204:1204) (1204:1204:1204))
4250 (PORT datac (359:359:359) (359:359:359))
4251 (PORT datad (253:253:253) (253:253:253))
4252 (IOPATH dataa combout (459:459:459) (459:459:459))
4253 (IOPATH datab combout (332:332:332) (332:332:332))
4254 (IOPATH datac combout (213:213:213) (213:213:213))
4255 (IOPATH datad combout (87:87:87) (87:87:87))
4260 (CELLTYPE "stratix_asynch_lcell")
4261 (INSTANCE \\vga_control_unit\|r_Z\\.lecomb)
4264 (PORT dataa (1451:1451:1451) (1451:1451:1451))
4265 (PORT datab (438:438:438) (438:438:438))
4266 (PORT datac (1358:1358:1358) (1358:1358:1358))
4267 (PORT datad (925:925:925) (925:925:925))
4268 (IOPATH dataa regin (583:583:583) (583:583:583))
4269 (IOPATH datab regin (489:489:489) (489:489:489))
4270 (IOPATH datac regin (364:364:364) (364:364:364))
4271 (IOPATH datad regin (235:235:235) (235:235:235))
4276 (CELLTYPE "stratix_lcell_register")
4277 (INSTANCE \\vga_control_unit\|r_Z\\.lereg)
4280 (PORT aclr (5095:5095:5095) (5095:5095:5095))
4281 (PORT clk (2323:2323:2323) (2323:2323:2323))
4282 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
4283 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
4287 (SETUP datain (posedge clk) (10:10:10))
4288 (HOLD datain (posedge clk) (100:100:100))
4292 (CELLTYPE "stratix_asynch_lcell")
4293 (INSTANCE \\vga_control_unit\|b_Z\\.lecomb)
4296 (PORT dataa (1450:1450:1450) (1450:1450:1450))
4297 (PORT datab (438:438:438) (438:438:438))
4298 (PORT datac (1359:1359:1359) (1359:1359:1359))
4299 (PORT datad (927:927:927) (927:927:927))
4300 (IOPATH dataa regin (583:583:583) (583:583:583))
4301 (IOPATH datab regin (489:489:489) (489:489:489))
4302 (IOPATH datac regin (364:364:364) (364:364:364))
4303 (IOPATH datad regin (235:235:235) (235:235:235))
4308 (CELLTYPE "stratix_lcell_register")
4309 (INSTANCE \\vga_control_unit\|b_Z\\.lereg)
4312 (PORT aclr (5095:5095:5095) (5095:5095:5095))
4313 (PORT clk (2323:2323:2323) (2323:2323:2323))
4314 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
4315 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
4319 (SETUP datain (posedge clk) (10:10:10))
4320 (HOLD datain (posedge clk) (100:100:100))
4324 (CELLTYPE "stratix_asynch_lcell")
4325 (INSTANCE \\vga_driver_unit\|un1_hsync_state_3_0_cZ\\.lecomb)
4328 (PORT datab (954:954:954) (954:954:954))
4329 (PORT datac (447:447:447) (447:447:447))
4330 (IOPATH datab combout (332:332:332) (332:332:332))
4331 (IOPATH datac combout (213:213:213) (213:213:213))
4336 (CELLTYPE "stratix_asynch_lcell")
4337 (INSTANCE \\vga_driver_unit\|h_sync_1_0_0_0_g1_cZ\\.lecomb)
4340 (PORT dataa (443:443:443) (443:443:443))
4341 (PORT datab (435:435:435) (435:435:435))
4342 (PORT datac (865:865:865) (865:865:865))
4343 (PORT datad (432:432:432) (432:432:432))
4344 (IOPATH dataa combout (459:459:459) (459:459:459))
4345 (IOPATH datab combout (332:332:332) (332:332:332))
4346 (IOPATH datac combout (213:213:213) (213:213:213))
4347 (IOPATH datad combout (87:87:87) (87:87:87))
4352 (CELLTYPE "stratix_asynch_lcell")
4353 (INSTANCE \\vga_driver_unit\|h_sync_Z\\.lecomb)
4356 (PORT dataa (1463:1463:1463) (1463:1463:1463))
4357 (PORT datab (4923:4923:4923) (4923:4923:4923))
4358 (PORT datac (1265:1265:1265) (1265:1265:1265))
4359 (PORT datad (352:352:352) (352:352:352))
4360 (IOPATH dataa regin (583:583:583) (583:583:583))
4361 (IOPATH datab regin (489:489:489) (489:489:489))
4362 (IOPATH datac regin (364:364:364) (364:364:364))
4363 (IOPATH datad regin (235:235:235) (235:235:235))
4368 (CELLTYPE "stratix_lcell_register")
4369 (INSTANCE \\vga_driver_unit\|h_sync_Z\\.lereg)
4372 (PORT aclr (668:668:668) (668:668:668))
4373 (PORT clk (2394:2394:2394) (2394:2394:2394))
4374 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
4375 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
4379 (SETUP datain (posedge clk) (10:10:10))
4380 (HOLD datain (posedge clk) (100:100:100))
4384 (CELLTYPE "stratix_asynch_lcell")
4385 (INSTANCE \\vga_driver_unit\|un1_vsync_state_2_0_cZ\\.lecomb)
4388 (PORT dataa (620:620:620) (620:620:620))
4389 (PORT datad (1246:1246:1246) (1246:1246:1246))
4390 (IOPATH dataa combout (459:459:459) (459:459:459))
4391 (IOPATH datad combout (87:87:87) (87:87:87))
4396 (CELLTYPE "stratix_asynch_lcell")
4397 (INSTANCE \\vga_driver_unit\|v_sync_1_0_0_0_g1_cZ\\.lecomb)
4400 (PORT dataa (1374:1374:1374) (1374:1374:1374))
4401 (PORT datab (430:430:430) (430:430:430))
4402 (PORT datac (378:378:378) (378:378:378))
4403 (PORT datad (430:430:430) (430:430:430))
4404 (IOPATH dataa combout (459:459:459) (459:459:459))
4405 (IOPATH datab combout (332:332:332) (332:332:332))
4406 (IOPATH datac combout (213:213:213) (213:213:213))
4407 (IOPATH datad combout (87:87:87) (87:87:87))
4412 (CELLTYPE "stratix_asynch_lcell")
4413 (INSTANCE \\vga_driver_unit\|v_sync_Z\\.lecomb)
4416 (PORT dataa (1106:1106:1106) (1106:1106:1106))
4417 (PORT datab (550:550:550) (550:550:550))
4418 (PORT datac (5013:5013:5013) (5013:5013:5013))
4419 (PORT datad (2733:2733:2733) (2733:2733:2733))
4420 (IOPATH dataa regin (583:583:583) (583:583:583))
4421 (IOPATH datab regin (489:489:489) (489:489:489))
4422 (IOPATH datac regin (364:364:364) (364:364:364))
4423 (IOPATH datad regin (235:235:235) (235:235:235))
4428 (CELLTYPE "stratix_lcell_register")
4429 (INSTANCE \\vga_driver_unit\|v_sync_Z\\.lereg)
4432 (PORT aclr (668:668:668) (668:668:668))
4433 (PORT clk (2379:2379:2379) (2379:2379:2379))
4434 (IOPATH (posedge clk) regout (176:176:176) (176:176:176))
4435 (IOPATH (posedge aclr) regout (212:212:212) (212:212:212))
4439 (SETUP datain (posedge clk) (10:10:10))
4440 (HOLD datain (posedge clk) (100:100:100))
4444 (CELLTYPE "stratix_asynch_io")
4445 (INSTANCE r0_pin_out.inst1)
4448 (PORT datain (2578:2578:2578) (2578:2578:2578))
4449 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4454 (CELLTYPE "stratix_asynch_io")
4455 (INSTANCE r1_pin_out.inst1)
4458 (PORT datain (2886:2886:2886) (2886:2886:2886))
4459 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4464 (CELLTYPE "stratix_asynch_io")
4465 (INSTANCE r2_pin_out.inst1)
4468 (PORT datain (2578:2578:2578) (2578:2578:2578))
4469 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4474 (CELLTYPE "stratix_asynch_io")
4475 (INSTANCE g0_pin_out.inst1)
4478 (PORT datain (1963:1963:1963) (1963:1963:1963))
4479 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4484 (CELLTYPE "stratix_asynch_io")
4485 (INSTANCE g1_pin_out.inst1)
4488 (PORT datain (2024:2024:2024) (2024:2024:2024))
4489 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4494 (CELLTYPE "stratix_asynch_io")
4495 (INSTANCE g2_pin_out.inst1)
4498 (PORT datain (2680:2680:2680) (2680:2680:2680))
4499 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4504 (CELLTYPE "stratix_asynch_io")
4505 (INSTANCE b0_pin_out.inst1)
4508 (PORT datain (3590:3590:3590) (3590:3590:3590))
4509 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4514 (CELLTYPE "stratix_asynch_io")
4515 (INSTANCE b1_pin_out.inst1)
4518 (PORT datain (3525:3525:3525) (3525:3525:3525))
4519 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4524 (CELLTYPE "stratix_asynch_io")
4525 (INSTANCE hsync_pin_out.inst1)
4528 (PORT datain (2183:2183:2183) (2183:2183:2183))
4529 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4534 (CELLTYPE "stratix_asynch_io")
4535 (INSTANCE vsync_pin_out.inst1)
4538 (PORT datain (2772:2772:2772) (2772:2772:2772))
4539 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4544 (CELLTYPE "stratix_asynch_io")
4545 (INSTANCE \\seven_seg_pin_tri_0_\\.inst1)
4548 (PORT datain (2024:2024:2024) (2024:2024:2024))
4549 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4554 (CELLTYPE "stratix_asynch_io")
4555 (INSTANCE \\seven_seg_pin_out_1_\\.inst1)
4558 (PORT datain (3263:3263:3263) (3263:3263:3263))
4559 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4564 (CELLTYPE "stratix_asynch_io")
4565 (INSTANCE \\seven_seg_pin_out_2_\\.inst1)
4568 (PORT datain (2952:2952:2952) (2952:2952:2952))
4569 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4574 (CELLTYPE "stratix_asynch_io")
4575 (INSTANCE \\seven_seg_pin_tri_3_\\.inst1)
4578 (PORT datain (1963:1963:1963) (1963:1963:1963))
4579 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4584 (CELLTYPE "stratix_asynch_io")
4585 (INSTANCE \\seven_seg_pin_tri_4_\\.inst1)
4588 (PORT datain (2024:2024:2024) (2024:2024:2024))
4589 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4594 (CELLTYPE "stratix_asynch_io")
4595 (INSTANCE \\seven_seg_pin_tri_5_\\.inst1)
4598 (PORT datain (2412:2412:2412) (2412:2412:2412))
4599 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4604 (CELLTYPE "stratix_asynch_io")
4605 (INSTANCE \\seven_seg_pin_tri_6_\\.inst1)
4608 (PORT datain (1963:1963:1963) (1963:1963:1963))
4609 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4614 (CELLTYPE "stratix_asynch_io")
4615 (INSTANCE \\seven_seg_pin_out_7_\\.inst1)
4618 (PORT datain (3263:3263:3263) (3263:3263:3263))
4619 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4624 (CELLTYPE "stratix_asynch_io")
4625 (INSTANCE \\seven_seg_pin_out_8_\\.inst1)
4628 (PORT datain (2952:2952:2952) (2952:2952:2952))
4629 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4634 (CELLTYPE "stratix_asynch_io")
4635 (INSTANCE \\seven_seg_pin_out_9_\\.inst1)
4638 (PORT datain (3263:3263:3263) (3263:3263:3263))
4639 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4644 (CELLTYPE "stratix_asynch_io")
4645 (INSTANCE \\seven_seg_pin_out_10_\\.inst1)
4648 (PORT datain (3227:3227:3227) (3227:3227:3227))
4649 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4654 (CELLTYPE "stratix_asynch_io")
4655 (INSTANCE \\seven_seg_pin_out_11_\\.inst1)
4658 (PORT datain (3099:3099:3099) (3099:3099:3099))
4659 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4664 (CELLTYPE "stratix_asynch_io")
4665 (INSTANCE \\seven_seg_pin_out_12_\\.inst1)
4668 (PORT datain (3260:3260:3260) (3260:3260:3260))
4669 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4674 (CELLTYPE "stratix_asynch_io")
4675 (INSTANCE \\seven_seg_pin_tri_13_\\.inst1)
4678 (PORT datain (2412:2412:2412) (2412:2412:2412))
4679 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4684 (CELLTYPE "stratix_asynch_io")
4685 (INSTANCE d_hsync_out.inst1)
4688 (PORT datain (2183:2183:2183) (2183:2183:2183))
4689 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4694 (CELLTYPE "stratix_asynch_io")
4695 (INSTANCE d_vsync_out.inst1)
4698 (PORT datain (2772:2772:2772) (2772:2772:2772))
4699 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4704 (CELLTYPE "stratix_asynch_io")
4705 (INSTANCE \\d_column_counter_out_0_\\.inst1)
4708 (PORT datain (2437:2437:2437) (2437:2437:2437))
4709 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4714 (CELLTYPE "stratix_asynch_io")
4715 (INSTANCE \\d_column_counter_out_1_\\.inst1)
4718 (PORT datain (2426:2426:2426) (2426:2426:2426))
4719 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4724 (CELLTYPE "stratix_asynch_io")
4725 (INSTANCE \\d_column_counter_out_2_\\.inst1)
4728 (PORT datain (2127:2127:2127) (2127:2127:2127))
4729 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4734 (CELLTYPE "stratix_asynch_io")
4735 (INSTANCE \\d_column_counter_out_3_\\.inst1)
4738 (PORT datain (2378:2378:2378) (2378:2378:2378))
4739 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4744 (CELLTYPE "stratix_asynch_io")
4745 (INSTANCE \\d_column_counter_out_4_\\.inst1)
4748 (PORT datain (1826:1826:1826) (1826:1826:1826))
4749 (IOPATH datain padio (2801:2801:2801) (2801:2801:2801))
4754 (CELLTYPE "stratix_asynch_io")
4755 (INSTANCE \\d_column_counter_out_5_\\.inst1)
4758 (PORT datain (3015:3015:3015) (3015:3015:3015))
4759 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4764 (CELLTYPE "stratix_asynch_io")
4765 (INSTANCE \\d_column_counter_out_6_\\.inst1)
4768 (PORT datain (2573:2573:2573) (2573:2573:2573))
4769 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4774 (CELLTYPE "stratix_asynch_io")
4775 (INSTANCE \\d_column_counter_out_7_\\.inst1)
4778 (PORT datain (2118:2118:2118) (2118:2118:2118))
4779 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4784 (CELLTYPE "stratix_asynch_io")
4785 (INSTANCE \\d_column_counter_out_8_\\.inst1)
4788 (PORT datain (2545:2545:2545) (2545:2545:2545))
4789 (IOPATH datain padio (2801:2801:2801) (2801:2801:2801))
4794 (CELLTYPE "stratix_asynch_io")
4795 (INSTANCE \\d_column_counter_out_9_\\.inst1)
4798 (PORT datain (2104:2104:2104) (2104:2104:2104))
4799 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4804 (CELLTYPE "stratix_asynch_io")
4805 (INSTANCE \\d_line_counter_out_0_\\.inst1)
4808 (PORT datain (1897:1897:1897) (1897:1897:1897))
4809 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4814 (CELLTYPE "stratix_asynch_io")
4815 (INSTANCE \\d_line_counter_out_1_\\.inst1)
4818 (PORT datain (1941:1941:1941) (1941:1941:1941))
4819 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4824 (CELLTYPE "stratix_asynch_io")
4825 (INSTANCE \\d_line_counter_out_2_\\.inst1)
4828 (PORT datain (2564:2564:2564) (2564:2564:2564))
4829 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4834 (CELLTYPE "stratix_asynch_io")
4835 (INSTANCE \\d_line_counter_out_3_\\.inst1)
4838 (PORT datain (1937:1937:1937) (1937:1937:1937))
4839 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4844 (CELLTYPE "stratix_asynch_io")
4845 (INSTANCE \\d_line_counter_out_4_\\.inst1)
4848 (PORT datain (2373:2373:2373) (2373:2373:2373))
4849 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4854 (CELLTYPE "stratix_asynch_io")
4855 (INSTANCE \\d_line_counter_out_5_\\.inst1)
4858 (PORT datain (2612:2612:2612) (2612:2612:2612))
4859 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4864 (CELLTYPE "stratix_asynch_io")
4865 (INSTANCE \\d_line_counter_out_6_\\.inst1)
4868 (PORT datain (2307:2307:2307) (2307:2307:2307))
4869 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4874 (CELLTYPE "stratix_asynch_io")
4875 (INSTANCE \\d_line_counter_out_7_\\.inst1)
4878 (PORT datain (2234:2234:2234) (2234:2234:2234))
4879 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4884 (CELLTYPE "stratix_asynch_io")
4885 (INSTANCE \\d_line_counter_out_8_\\.inst1)
4888 (PORT datain (2444:2444:2444) (2444:2444:2444))
4889 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4894 (CELLTYPE "stratix_asynch_io")
4895 (INSTANCE d_set_column_counter_out.inst1)
4898 (PORT datain (3234:3234:3234) (3234:3234:3234))
4899 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4904 (CELLTYPE "stratix_asynch_io")
4905 (INSTANCE d_set_line_counter_out.inst1)
4908 (PORT datain (3161:3161:3161) (3161:3161:3161))
4909 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4914 (CELLTYPE "stratix_asynch_io")
4915 (INSTANCE \\d_hsync_counter_out_0_\\.inst1)
4918 (PORT datain (2393:2393:2393) (2393:2393:2393))
4919 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4924 (CELLTYPE "stratix_asynch_io")
4925 (INSTANCE \\d_hsync_counter_out_1_\\.inst1)
4928 (PORT datain (3712:3712:3712) (3712:3712:3712))
4929 (IOPATH datain padio (2801:2801:2801) (2801:2801:2801))
4934 (CELLTYPE "stratix_asynch_io")
4935 (INSTANCE \\d_hsync_counter_out_2_\\.inst1)
4938 (PORT datain (1994:1994:1994) (1994:1994:1994))
4939 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4944 (CELLTYPE "stratix_asynch_io")
4945 (INSTANCE \\d_hsync_counter_out_3_\\.inst1)
4948 (PORT datain (2855:2855:2855) (2855:2855:2855))
4949 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4954 (CELLTYPE "stratix_asynch_io")
4955 (INSTANCE \\d_hsync_counter_out_4_\\.inst1)
4958 (PORT datain (3074:3074:3074) (3074:3074:3074))
4959 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4964 (CELLTYPE "stratix_asynch_io")
4965 (INSTANCE \\d_hsync_counter_out_5_\\.inst1)
4968 (PORT datain (2173:2173:2173) (2173:2173:2173))
4969 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
4974 (CELLTYPE "stratix_asynch_io")
4975 (INSTANCE \\d_hsync_counter_out_6_\\.inst1)
4978 (PORT datain (3292:3292:3292) (3292:3292:3292))
4979 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4984 (CELLTYPE "stratix_asynch_io")
4985 (INSTANCE \\d_hsync_counter_out_7_\\.inst1)
4988 (PORT datain (2319:2319:2319) (2319:2319:2319))
4989 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
4994 (CELLTYPE "stratix_asynch_io")
4995 (INSTANCE \\d_hsync_counter_out_8_\\.inst1)
4998 (PORT datain (3000:3000:3000) (3000:3000:3000))
4999 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5004 (CELLTYPE "stratix_asynch_io")
5005 (INSTANCE \\d_hsync_counter_out_9_\\.inst1)
5008 (PORT datain (3135:3135:3135) (3135:3135:3135))
5009 (IOPATH datain padio (2801:2801:2801) (2801:2801:2801))
5014 (CELLTYPE "stratix_asynch_io")
5015 (INSTANCE \\d_vsync_counter_out_0_\\.inst1)
5018 (PORT datain (1986:1986:1986) (1986:1986:1986))
5019 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
5024 (CELLTYPE "stratix_asynch_io")
5025 (INSTANCE \\d_vsync_counter_out_1_\\.inst1)
5028 (PORT datain (2411:2411:2411) (2411:2411:2411))
5029 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5034 (CELLTYPE "stratix_asynch_io")
5035 (INSTANCE \\d_vsync_counter_out_2_\\.inst1)
5038 (PORT datain (2518:2518:2518) (2518:2518:2518))
5039 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5044 (CELLTYPE "stratix_asynch_io")
5045 (INSTANCE \\d_vsync_counter_out_3_\\.inst1)
5048 (PORT datain (2074:2074:2074) (2074:2074:2074))
5049 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
5054 (CELLTYPE "stratix_asynch_io")
5055 (INSTANCE \\d_vsync_counter_out_4_\\.inst1)
5058 (PORT datain (2588:2588:2588) (2588:2588:2588))
5059 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
5064 (CELLTYPE "stratix_asynch_io")
5065 (INSTANCE \\d_vsync_counter_out_5_\\.inst1)
5068 (PORT datain (2923:2923:2923) (2923:2923:2923))
5069 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
5074 (CELLTYPE "stratix_asynch_io")
5075 (INSTANCE \\d_vsync_counter_out_6_\\.inst1)
5078 (PORT datain (2434:2434:2434) (2434:2434:2434))
5079 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5084 (CELLTYPE "stratix_asynch_io")
5085 (INSTANCE \\d_vsync_counter_out_7_\\.inst1)
5088 (PORT datain (2473:2473:2473) (2473:2473:2473))
5089 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
5094 (CELLTYPE "stratix_asynch_io")
5095 (INSTANCE \\d_vsync_counter_out_8_\\.inst1)
5098 (PORT datain (2581:2581:2581) (2581:2581:2581))
5099 (IOPATH datain padio (2801:2801:2801) (2801:2801:2801))
5104 (CELLTYPE "stratix_asynch_io")
5105 (INSTANCE \\d_vsync_counter_out_9_\\.inst1)
5108 (PORT datain (1951:1951:1951) (1951:1951:1951))
5109 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
5114 (CELLTYPE "stratix_asynch_io")
5115 (INSTANCE d_set_hsync_counter_out.inst1)
5118 (PORT datain (2415:2415:2415) (2415:2415:2415))
5119 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
5124 (CELLTYPE "stratix_asynch_io")
5125 (INSTANCE d_set_vsync_counter_out.inst1)
5128 (PORT datain (3291:3291:3291) (3291:3291:3291))
5129 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5134 (CELLTYPE "stratix_asynch_io")
5135 (INSTANCE d_h_enable_out.inst1)
5138 (PORT datain (2923:2923:2923) (2923:2923:2923))
5139 (IOPATH datain padio (2801:2801:2801) (2801:2801:2801))
5144 (CELLTYPE "stratix_asynch_io")
5145 (INSTANCE d_v_enable_out.inst1)
5148 (PORT datain (2505:2505:2505) (2505:2505:2505))
5149 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5154 (CELLTYPE "stratix_asynch_io")
5155 (INSTANCE d_r_out.inst1)
5158 (PORT datain (2886:2886:2886) (2886:2886:2886))
5159 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5164 (CELLTYPE "stratix_asynch_io")
5165 (INSTANCE d_g_out.inst1)
5168 (PORT datain (2412:2412:2412) (2412:2412:2412))
5169 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
5174 (CELLTYPE "stratix_asynch_io")
5175 (INSTANCE d_b_out.inst1)
5178 (PORT datain (3590:3590:3590) (3590:3590:3590))
5179 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5184 (CELLTYPE "stratix_asynch_io")
5185 (INSTANCE \\d_hsync_state_out_6_\\.inst1)
5188 (PORT datain (2928:2928:2928) (2928:2928:2928))
5189 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5194 (CELLTYPE "stratix_asynch_io")
5195 (INSTANCE \\d_hsync_state_out_5_\\.inst1)
5198 (PORT datain (2651:2651:2651) (2651:2651:2651))
5199 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5204 (CELLTYPE "stratix_asynch_io")
5205 (INSTANCE \\d_hsync_state_out_4_\\.inst1)
5208 (PORT datain (2862:2862:2862) (2862:2862:2862))
5209 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
5214 (CELLTYPE "stratix_asynch_io")
5215 (INSTANCE \\d_hsync_state_out_3_\\.inst1)
5218 (PORT datain (2213:2213:2213) (2213:2213:2213))
5219 (IOPATH datain padio (2801:2801:2801) (2801:2801:2801))
5224 (CELLTYPE "stratix_asynch_io")
5225 (INSTANCE \\d_hsync_state_out_2_\\.inst1)
5228 (PORT datain (2164:2164:2164) (2164:2164:2164))
5229 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5234 (CELLTYPE "stratix_asynch_io")
5235 (INSTANCE \\d_hsync_state_out_1_\\.inst1)
5238 (PORT datain (3234:3234:3234) (3234:3234:3234))
5239 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5244 (CELLTYPE "stratix_asynch_io")
5245 (INSTANCE \\d_hsync_state_out_0_\\.inst1)
5248 (PORT datain (1944:1944:1944) (1944:1944:1944))
5249 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
5254 (CELLTYPE "stratix_asynch_io")
5255 (INSTANCE \\d_vsync_state_out_6_\\.inst1)
5258 (PORT datain (2658:2658:2658) (2658:2658:2658))
5259 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5264 (CELLTYPE "stratix_asynch_io")
5265 (INSTANCE \\d_vsync_state_out_5_\\.inst1)
5268 (PORT datain (2697:2697:2697) (2697:2697:2697))
5269 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5274 (CELLTYPE "stratix_asynch_io")
5275 (INSTANCE \\d_vsync_state_out_4_\\.inst1)
5278 (PORT datain (3588:3588:3588) (3588:3588:3588))
5279 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5284 (CELLTYPE "stratix_asynch_io")
5285 (INSTANCE \\d_vsync_state_out_3_\\.inst1)
5288 (PORT datain (2596:2596:2596) (2596:2596:2596))
5289 (IOPATH datain padio (2801:2801:2801) (2801:2801:2801))
5294 (CELLTYPE "stratix_asynch_io")
5295 (INSTANCE \\d_vsync_state_out_2_\\.inst1)
5298 (PORT datain (3079:3079:3079) (3079:3079:3079))
5299 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5304 (CELLTYPE "stratix_asynch_io")
5305 (INSTANCE \\d_vsync_state_out_1_\\.inst1)
5308 (PORT datain (3161:3161:3161) (3161:3161:3161))
5309 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5314 (CELLTYPE "stratix_asynch_io")
5315 (INSTANCE \\d_vsync_state_out_0_\\.inst1)
5318 (PORT datain (2936:2936:2936) (2936:2936:2936))
5319 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5324 (CELLTYPE "stratix_asynch_io")
5325 (INSTANCE d_state_clk_out.inst1)
5328 (PORT datain (2635:2635:2635) (2635:2635:2635))
5329 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
5334 (CELLTYPE "stratix_asynch_io")
5335 (INSTANCE d_toggle_out.inst1)
5338 (PORT datain (2984:2984:2984) (2984:2984:2984))
5339 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
5344 (CELLTYPE "stratix_asynch_io")
5345 (INSTANCE \\d_toggle_counter_out_0_\\.inst1)
5348 (PORT datain (1954:1954:1954) (1954:1954:1954))
5349 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
5354 (CELLTYPE "stratix_asynch_io")
5355 (INSTANCE \\d_toggle_counter_out_1_\\.inst1)
5358 (PORT datain (2344:2344:2344) (2344:2344:2344))
5359 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
5364 (CELLTYPE "stratix_asynch_io")
5365 (INSTANCE \\d_toggle_counter_out_2_\\.inst1)
5368 (PORT datain (2071:2071:2071) (2071:2071:2071))
5369 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5374 (CELLTYPE "stratix_asynch_io")
5375 (INSTANCE \\d_toggle_counter_out_3_\\.inst1)
5378 (PORT datain (3103:3103:3103) (3103:3103:3103))
5379 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5384 (CELLTYPE "stratix_asynch_io")
5385 (INSTANCE \\d_toggle_counter_out_4_\\.inst1)
5388 (PORT datain (2140:2140:2140) (2140:2140:2140))
5389 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
5394 (CELLTYPE "stratix_asynch_io")
5395 (INSTANCE \\d_toggle_counter_out_5_\\.inst1)
5398 (PORT datain (2117:2117:2117) (2117:2117:2117))
5399 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5404 (CELLTYPE "stratix_asynch_io")
5405 (INSTANCE \\d_toggle_counter_out_6_\\.inst1)
5408 (PORT datain (2137:2137:2137) (2137:2137:2137))
5409 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5414 (CELLTYPE "stratix_asynch_io")
5415 (INSTANCE \\d_toggle_counter_out_7_\\.inst1)
5418 (PORT datain (2366:2366:2366) (2366:2366:2366))
5419 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
5424 (CELLTYPE "stratix_asynch_io")
5425 (INSTANCE \\d_toggle_counter_out_8_\\.inst1)
5428 (PORT datain (2395:2395:2395) (2395:2395:2395))
5429 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
5434 (CELLTYPE "stratix_asynch_io")
5435 (INSTANCE \\d_toggle_counter_out_9_\\.inst1)
5438 (PORT datain (2410:2410:2410) (2410:2410:2410))
5439 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5444 (CELLTYPE "stratix_asynch_io")
5445 (INSTANCE \\d_toggle_counter_out_10_\\.inst1)
5448 (PORT datain (2098:2098:2098) (2098:2098:2098))
5449 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5454 (CELLTYPE "stratix_asynch_io")
5455 (INSTANCE \\d_toggle_counter_out_11_\\.inst1)
5458 (PORT datain (3664:3664:3664) (3664:3664:3664))
5459 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5464 (CELLTYPE "stratix_asynch_io")
5465 (INSTANCE \\d_toggle_counter_out_12_\\.inst1)
5468 (PORT datain (2134:2134:2134) (2134:2134:2134))
5469 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
5474 (CELLTYPE "stratix_asynch_io")
5475 (INSTANCE \\d_toggle_counter_out_13_\\.inst1)
5478 (PORT datain (2805:2805:2805) (2805:2805:2805))
5479 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
5484 (CELLTYPE "stratix_asynch_io")
5485 (INSTANCE \\d_toggle_counter_out_14_\\.inst1)
5488 (PORT datain (2158:2158:2158) (2158:2158:2158))
5489 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5494 (CELLTYPE "stratix_asynch_io")
5495 (INSTANCE \\d_toggle_counter_out_15_\\.inst1)
5498 (PORT datain (1677:1677:1677) (1677:1677:1677))
5499 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5504 (CELLTYPE "stratix_asynch_io")
5505 (INSTANCE \\d_toggle_counter_out_16_\\.inst1)
5508 (PORT datain (2162:2162:2162) (2162:2162:2162))
5509 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5514 (CELLTYPE "stratix_asynch_io")
5515 (INSTANCE \\d_toggle_counter_out_17_\\.inst1)
5518 (PORT datain (2526:2526:2526) (2526:2526:2526))
5519 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
5524 (CELLTYPE "stratix_asynch_io")
5525 (INSTANCE \\d_toggle_counter_out_18_\\.inst1)
5528 (PORT datain (2189:2189:2189) (2189:2189:2189))
5529 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5534 (CELLTYPE "stratix_asynch_io")
5535 (INSTANCE \\d_toggle_counter_out_19_\\.inst1)
5538 (PORT datain (2650:2650:2650) (2650:2650:2650))
5539 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5544 (CELLTYPE "stratix_asynch_io")
5545 (INSTANCE \\d_toggle_counter_out_20_\\.inst1)
5548 (PORT datain (2503:2503:2503) (2503:2503:2503))
5549 (IOPATH datain padio (2504:2504:2504) (2504:2504:2504))
5554 (CELLTYPE "stratix_asynch_io")
5555 (INSTANCE \\d_toggle_counter_out_21_\\.inst1)
5558 (PORT datain (2412:2412:2412) (2412:2412:2412))
5559 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
5564 (CELLTYPE "stratix_asynch_io")
5565 (INSTANCE \\d_toggle_counter_out_22_\\.inst1)
5568 (PORT datain (1963:1963:1963) (1963:1963:1963))
5569 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
5574 (CELLTYPE "stratix_asynch_io")
5575 (INSTANCE \\d_toggle_counter_out_23_\\.inst1)
5578 (PORT datain (2680:2680:2680) (2680:2680:2680))
5579 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))
5584 (CELLTYPE "stratix_asynch_io")
5585 (INSTANCE \\d_toggle_counter_out_24_\\.inst1)
5588 (PORT datain (2024:2024:2024) (2024:2024:2024))
5589 (IOPATH datain padio (2495:2495:2495) (2495:2495:2495))