bsp2/Designflow/ppr/download/simulation/modelsim/vga_pll.vo

   1 // Copyright (C) 1991-2009 Altera Corporation
   2 // Your use of Altera Corporation's design tools, logic functions
   3 // and other software and tools, and its AMPP partner logic
   4 // functions, and any output files from any of the foregoing
   5 // (including device programming or simulation files), and any
   6 // associated documentation or information are expressly subject
   7 // to the terms and conditions of the Altera Program License
   8 // Subscription Agreement, Altera MegaCore Function License
   9 // Agreement, or other applicable license agreement, including,
  10 // without limitation, that your use is for the sole purpose of
  11 // programming logic devices manufactured by Altera and sold by
  12 // Altera or its authorized distributors.  Please refer to the
  13 // applicable agreement for further details.
  14
  15 // VENDOR "Altera"
  16 // PROGRAM "Quartus II"
  17 // VERSION "Version 9.0 Build 132 02/25/2009 SJ Full Version"
  18
  19 // DATE "10/28/2009 14:55:41"
  20
  21 //
  22 // Device: Altera EP1S25F672C6 Package FBGA672
  23 //
  24
  25 //
  26 // This Verilog file should be used for ModelSim-Altera (Verilog) only
  27 //
  28
  29 `timescale 1 ps/ 1 ps
  30
  31 module vga_pll (
  32         d_hsync,
  33         board_clk,
  34         reset,
  35         d_vsync,
  36         d_set_column_counter,
  37         d_set_line_counter,
  38         d_set_hsync_counter,
  39         d_set_vsync_counter,
  40         d_r,
  41         d_g,
  42         d_b,
  43         d_h_enable,
  44         d_v_enable,
  45         d_state_clk,
  46         d_toggle,
  47         r0_pin,
  48         r1_pin,
  49         r2_pin,
  50         g0_pin,
  51         g1_pin,
  52         g2_pin,
  53         b0_pin,
  54         b1_pin,
  55         hsync_pin,
  56         vsync_pin,
  57         d_column_counter,
  58         d_hsync_counter,
  59         d_hsync_state,
  60         d_line_counter,
  61         d_toggle_counter,
  62         d_vsync_counter,
  63         d_vsync_state,
  64         seven_seg_pin);
  65 output  d_hsync;
  66 input   board_clk;
  67 input   reset;
  68 output  d_vsync;
  69 output  d_set_column_counter;
  70 output  d_set_line_counter;
  71 output  d_set_hsync_counter;
  72 output  d_set_vsync_counter;
  73 output  d_r;
  74 output  d_g;
  75 output  d_b;
  76 output  d_h_enable;
  77 output  d_v_enable;
  78 output  d_state_clk;
  79 output  d_toggle;
  80 output  r0_pin;
  81 output  r1_pin;
  82 output  r2_pin;
  83 output  g0_pin;
  84 output  g1_pin;
  85 output  g2_pin;
  86 output  b0_pin;
  87 output  b1_pin;
  88 output  hsync_pin;
  89 output  vsync_pin;
  90 output  [9:0] d_column_counter;
  91 output  [9:0] d_hsync_counter;
  92 output  [0:6] d_hsync_state;
  93 output  [8:0] d_line_counter;
  94 output  [24:0] d_toggle_counter;
  95 output  [9:0] d_vsync_counter;
  96 output  [0:6] d_vsync_state;
  97 output  [13:0] seven_seg_pin;
  98
  99 wire gnd = 1'b0;
 100 wire vcc = 1'b1;
 101
 102 tri1 devclrn;
 103 tri1 devpor;
 104 tri1 devoe;
 105 // synopsys translate_off
 106 initial $sdf_annotate("vga_pll_v.sdo");
 107 // synopsys translate_on
 108
 109 wire \inst1|altpll_component|pll~CLK1 ;
 110 wire \inst1|altpll_component|pll~CLK2 ;
 111 wire \inst1|altpll_component|pll~CLK3 ;
 112 wire \inst1|altpll_component|pll~CLK4 ;
 113 wire \inst1|altpll_component|pll~CLK5 ;
 114 wire \inst|vga_control_unit|un2_toggle_counter_next_0_~COMBOUT ;
 115 wire \inst|vga_driver_unit|un2_column_counter_next_0_~COMBOUT ;
 116 wire \inst|vga_driver_unit|un1_line_counter_sig_a_1_~COMBOUT ;
 117 wire \board_clk~combout ;
 118 wire \inst1|altpll_component|_clk0 ;
 119 wire \reset~combout ;
 120 wire \inst|vga_driver_unit|un6_dly_counter_0_x ;
 121 wire \inst|vga_driver_unit|hsync_state_6 ;
 122 wire \inst|vga_driver_unit|hsync_counter_cout[0]~COUT1_10 ;
 123 wire \inst|vga_driver_unit|hsync_counter_cout[1]~COUT1_12 ;
 124 wire \inst|vga_driver_unit|hsync_counter_2 ;
 125 wire \inst|vga_driver_unit|hsync_counter_cout[2]~COUT1_14 ;
 126 wire \inst|vga_driver_unit|hsync_counter_3 ;
 127 wire \inst|vga_driver_unit|hsync_counter_cout[3]~COUT1_16 ;
 128 wire \inst|vga_driver_unit|hsync_counter_4 ;
 129 wire \inst|vga_driver_unit|hsync_counter_5 ;
 130 wire \inst|vga_driver_unit|hsync_counter_cout[5]~COUT1_18 ;
 131 wire \inst|vga_driver_unit|hsync_counter_6 ;
 132 wire \inst|vga_driver_unit|hsync_counter_cout[6]~COUT1_20 ;
 133 wire \inst|vga_driver_unit|hsync_counter_7 ;
 134 wire \inst|vga_driver_unit|hsync_counter_cout[7]~COUT1_22 ;
 135 wire \inst|vga_driver_unit|hsync_counter_8 ;
 136 wire \inst|vga_driver_unit|hsync_counter_cout[8]~COUT1_24 ;
 137 wire \inst|vga_driver_unit|hsync_counter_9 ;
 138 wire \inst|vga_driver_unit|un9_hsync_counterlt9_3 ;
 139 wire \inst|vga_driver_unit|un13_hsync_counter_7 ;
 140 wire \inst|vga_driver_unit|un9_hsync_counterlt9 ;
 141 wire \inst|vga_driver_unit|G_2_i ;
 142 wire \inst|vga_driver_unit|hsync_counter_0 ;
 143 wire \inst|vga_driver_unit|un12_hsync_counter_4 ;
 144 wire \inst|vga_driver_unit|un12_hsync_counter_3 ;
 145 wire \inst|vga_driver_unit|un12_hsync_counter ;
 146 wire \inst|vga_driver_unit|un10_hsync_counter_1 ;
 147 wire \inst|vga_driver_unit|un11_hsync_counter_2 ;
 148 wire \inst|vga_driver_unit|un11_hsync_counter_3 ;
 149 wire \inst|vga_driver_unit|un10_hsync_counter_3 ;
 150 wire \inst|vga_driver_unit|hsync_state_5 ;
 151 wire \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1 ;
 152 wire \inst|vga_driver_unit|un13_hsync_counter_2 ;
 153 wire \inst|vga_driver_unit|un13_hsync_counter ;
 154 wire \inst|vga_driver_unit|un1_hsync_state_next_1_sqmuxa_0 ;
 155 wire \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2 ;
 156 wire \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 ;
 157 wire \inst|vga_driver_unit|hsync_state_1 ;
 158 wire \inst|vga_driver_unit|hsync_state_3 ;
 159 wire \inst|vga_driver_unit|hsync_state_2 ;
 160 wire \inst|vga_driver_unit|hsync_state_0 ;
 161 wire \inst|vga_driver_unit|d_set_hsync_counter ;
 162 wire \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ;
 163 wire \inst|vga_driver_unit|hsync_counter_1 ;
 164 wire \inst|vga_driver_unit|un10_hsync_counter_4 ;
 165 wire \inst|vga_driver_unit|hsync_state_4 ;
 166 wire \inst|vga_driver_unit|un1_hsync_state_3_0 ;
 167 wire \inst|vga_driver_unit|h_sync_1_0_0_0_g1 ;
 168 wire \inst|vga_driver_unit|h_sync ;
 169 wire \inst|vga_driver_unit|vsync_state_6 ;
 170 wire \inst|vga_driver_unit|vsync_counter_0 ;
 171 wire \inst|vga_driver_unit|vsync_counter_cout[0]~COUT1_10 ;
 172 wire \inst|vga_driver_unit|vsync_counter_1 ;
 173 wire \inst|vga_driver_unit|vsync_counter_cout[1]~COUT1_12 ;
 174 wire \inst|vga_driver_unit|vsync_counter_2 ;
 175 wire \inst|vga_driver_unit|vsync_counter_cout[2]~COUT1_14 ;
 176 wire \inst|vga_driver_unit|vsync_counter_cout[3]~COUT1_16 ;
 177 wire \inst|vga_driver_unit|vsync_counter_4 ;
 178 wire \inst|vga_driver_unit|vsync_counter_5 ;
 179 wire \inst|vga_driver_unit|un9_vsync_counterlt9_6 ;
 180 wire \inst|vga_driver_unit|vsync_counter_cout[5]~COUT1_18 ;
 181 wire \inst|vga_driver_unit|vsync_counter_cout[6]~COUT1_20 ;
 182 wire \inst|vga_driver_unit|vsync_counter_7 ;
 183 wire \inst|vga_driver_unit|vsync_counter_cout[7]~COUT1_22 ;
 184 wire \inst|vga_driver_unit|vsync_counter_8 ;
 185 wire \inst|vga_driver_unit|vsync_counter_cout[8]~COUT1_24 ;
 186 wire \inst|vga_driver_unit|vsync_counter_9 ;
 187 wire \inst|vga_driver_unit|un9_vsync_counterlt9_5 ;
 188 wire \inst|vga_driver_unit|un9_vsync_counterlt9 ;
 189 wire \inst|vga_driver_unit|G_16_i ;
 190 wire \inst|vga_driver_unit|vsync_counter_3 ;
 191 wire \inst|vga_driver_unit|un15_vsync_counter_3 ;
 192 wire \inst|vga_driver_unit|un15_vsync_counter_4 ;
 193 wire \inst|vga_driver_unit|un13_vsync_counter_3 ;
 194 wire \inst|vga_driver_unit|un13_vsync_counter_4 ;
 195 wire \inst|vga_driver_unit|un12_vsync_counter_7 ;
 196 wire \inst|vga_driver_unit|vsync_state_1 ;
 197 wire \inst|vga_driver_unit|vsync_state_5 ;
 198 wire \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1 ;
 199 wire \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_3 ;
 200 wire \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2 ;
 201 wire \inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0 ;
 202 wire \inst|vga_driver_unit|vsync_state_next_2_sqmuxa ;
 203 wire \inst|vga_driver_unit|vsync_state_3 ;
 204 wire \inst|vga_driver_unit|vsync_state_2 ;
 205 wire \inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0 ;
 206 wire \inst|vga_driver_unit|vsync_state_0 ;
 207 wire \inst|vga_driver_unit|d_set_vsync_counter ;
 208 wire \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ;
 209 wire \inst|vga_driver_unit|vsync_counter_6 ;
 210 wire \inst|vga_driver_unit|un12_vsync_counter_6 ;
 211 wire \inst|vga_driver_unit|un14_vsync_counter_8 ;
 212 wire \inst|vga_driver_unit|vsync_state_4 ;
 213 wire \inst|vga_driver_unit|un1_vsync_state_2_0 ;
 214 wire \inst|vga_driver_unit|v_sync_1_0_0_0_g1 ;
 215 wire \inst|vga_driver_unit|v_sync ;
 216 wire \inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ;
 217 wire \inst|vga_driver_unit|column_counter_sig_0 ;
 218 wire \inst|vga_driver_unit|column_counter_sig_1 ;
 219 wire \inst|vga_driver_unit|un2_column_counter_next_cout[1]~COUT1_10 ;
 220 wire \inst|vga_driver_unit|column_counter_sig_3 ;
 221 wire \inst|vga_driver_unit|un2_column_counter_next_cout[0]~COUT1_18 ;
 222 wire \inst|vga_driver_unit|column_counter_sig_2 ;
 223 wire \inst|vga_driver_unit|un2_column_counter_next_cout[2]~COUT1_20 ;
 224 wire \inst|vga_driver_unit|column_counter_sig_4 ;
 225 wire \inst|vga_driver_unit|un2_column_counter_next_cout[3]~COUT1_12 ;
 226 wire \inst|vga_driver_unit|column_counter_sig_5 ;
 227 wire \inst|vga_driver_unit|un2_column_counter_next_cout[4]~COUT1_22 ;
 228 wire \inst|vga_driver_unit|un2_column_counter_next_cout[6]~COUT1_24 ;
 229 wire \inst|vga_driver_unit|column_counter_sig_8 ;
 230 wire \inst|vga_driver_unit|un10_column_counter_siglt6_4 ;
 231 wire \inst|vga_driver_unit|un10_column_counter_siglt6 ;
 232 wire \inst|vga_driver_unit|un2_column_counter_next_cout[5]~COUT1_14 ;
 233 wire \inst|vga_driver_unit|un2_column_counter_next_cout[7]~COUT1_16 ;
 234 wire \inst|vga_driver_unit|column_counter_sig_9 ;
 235 wire \inst|vga_driver_unit|un10_column_counter_siglto9 ;
 236 wire \inst|vga_driver_unit|column_counter_sig_7 ;
 237 wire \inst|vga_driver_unit|column_counter_sig_6 ;
 238 wire \inst|vga_control_unit|un5_v_enablelt2 ;
 239 wire \inst|vga_control_unit|un5_v_enablelto5 ;
 240 wire \inst|vga_control_unit|un9_v_enablelto4 ;
 241 wire \inst|vga_control_unit|un9_v_enablelto6 ;
 242 wire \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ;
 243 wire \inst|vga_driver_unit|line_counter_sig_0 ;
 244 wire \inst|vga_driver_unit|un1_line_counter_sig_cout[1]~COUT1_9 ;
 245 wire \inst|vga_driver_unit|line_counter_sig_2 ;
 246 wire \inst|vga_driver_unit|un1_line_counter_sig_a_cout[1]~COUT1_3 ;
 247 wire \inst|vga_driver_unit|line_counter_sig_1 ;
 248 wire \inst|vga_driver_unit|un1_line_counter_sig_cout[3]~COUT1_11 ;
 249 wire \inst|vga_driver_unit|line_counter_sig_4 ;
 250 wire \inst|vga_driver_unit|un1_line_counter_sig_cout[2]~COUT1_17 ;
 251 wire \inst|vga_driver_unit|line_counter_sig_3 ;
 252 wire \inst|vga_driver_unit|un1_line_counter_sig_cout[5]~COUT1_13 ;
 253 wire \inst|vga_driver_unit|line_counter_sig_6 ;
 254 wire \inst|vga_driver_unit|un1_line_counter_sig_cout[4]~COUT1_19 ;
 255 wire \inst|vga_driver_unit|line_counter_sig_5 ;
 256 wire \inst|vga_driver_unit|un1_line_counter_sig_cout[6]~COUT1_21 ;
 257 wire \inst|vga_driver_unit|line_counter_sig_7 ;
 258 wire \inst|vga_driver_unit|un10_line_counter_siglt4_2 ;
 259 wire \inst|vga_driver_unit|un10_line_counter_siglto5 ;
 260 wire \inst|vga_driver_unit|un10_line_counter_siglto8 ;
 261 wire \inst|vga_driver_unit|un1_line_counter_sig_cout[7]~COUT1_15 ;
 262 wire \inst|vga_driver_unit|line_counter_sig_8 ;
 263 wire \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4 ;
 264 wire \inst|vga_driver_unit|h_enable_sig ;
 265 wire \inst|vga_control_unit|b_next_0_sqmuxa_7_2 ;
 266 wire \inst|vga_control_unit|b_next_0_sqmuxa_7_3 ;
 267 wire \inst|vga_control_unit|b_next_0_sqmuxa_7_5 ;
 268 wire \inst|vga_control_unit|un13_v_enablelto4_0 ;
 269 wire \inst|vga_control_unit|un13_v_enablelto6 ;
 270 wire \inst|vga_control_unit|un17_v_enablelto3 ;
 271 wire \inst|vga_control_unit|b_next_0_sqmuxa_7_4_a ;
 272 wire \inst|vga_control_unit|b_next_0_sqmuxa_7_4 ;
 273 wire \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4 ;
 274 wire \inst|vga_driver_unit|v_enable_sig ;
 275 wire \inst|vga_control_unit|toggle_counter_sig_0 ;
 276 wire \inst|vga_control_unit|toggle_counter_sig_1 ;
 277 wire \inst|vga_control_unit|toggle_counter_sig_cout[1]~COUT1_17 ;
 278 wire \inst|vga_control_unit|toggle_counter_sig_3 ;
 279 wire \inst|vga_control_unit|un2_toggle_counter_next_cout[0]~COUT1_3 ;
 280 wire \inst|vga_control_unit|toggle_counter_sig_2 ;
 281 wire \inst|vga_control_unit|toggle_counter_sig_cout[3]~COUT1_19 ;
 282 wire \inst|vga_control_unit|toggle_counter_sig_5 ;
 283 wire \inst|vga_control_unit|toggle_counter_sig_cout[2]~COUT1_33 ;
 284 wire \inst|vga_control_unit|toggle_counter_sig_4 ;
 285 wire \inst|vga_control_unit|toggle_counter_sig_cout[4]~COUT1_35 ;
 286 wire \inst|vga_control_unit|toggle_counter_sig_6 ;
 287 wire \inst|vga_control_unit|toggle_counter_sig_cout[5]~COUT1_21 ;
 288 wire \inst|vga_control_unit|toggle_counter_sig_7 ;
 289 wire \inst|vga_control_unit|toggle_counter_sig_cout[6]~COUT1_37 ;
 290 wire \inst|vga_control_unit|toggle_counter_sig_8 ;
 291 wire \inst|vga_control_unit|toggle_counter_sig_cout[7]~COUT1_23 ;
 292 wire \inst|vga_control_unit|toggle_counter_sig_9 ;
 293 wire \inst|vga_control_unit|toggle_counter_sig_11 ;
 294 wire \inst|vga_control_unit|toggle_counter_sig_10 ;
 295 wire \inst|vga_control_unit|toggle_counter_sig_cout[11]~COUT1_25 ;
 296 wire \inst|vga_control_unit|toggle_counter_sig_13 ;
 297 wire \inst|vga_control_unit|toggle_counter_sig_cout[10]~COUT1_39 ;
 298 wire \inst|vga_control_unit|toggle_counter_sig_12 ;
 299 wire \inst|vga_control_unit|toggle_counter_sig_cout[13]~COUT1_27 ;
 300 wire \inst|vga_control_unit|toggle_counter_sig_15 ;
 301 wire \inst|vga_control_unit|toggle_counter_sig_cout[12]~COUT1_41 ;
 302 wire \inst|vga_control_unit|toggle_counter_sig_14 ;
 303 wire \inst|vga_control_unit|un1_toggle_counter_siglt6 ;
 304 wire \inst|vga_control_unit|un1_toggle_counter_siglto9 ;
 305 wire \inst|vga_control_unit|un1_toggle_counter_siglto12 ;
 306 wire \inst|vga_control_unit|un1_toggle_counter_siglto15 ;
 307 wire \inst|vga_control_unit|toggle_counter_sig_cout[14]~COUT1_43 ;
 308 wire \inst|vga_control_unit|toggle_counter_sig_16 ;
 309 wire \inst|vga_control_unit|toggle_counter_sig_cout[15]~COUT1_29 ;
 310 wire \inst|vga_control_unit|toggle_counter_sig_17 ;
 311 wire \inst|vga_control_unit|toggle_counter_sig_cout[17]~COUT1_31 ;
 312 wire \inst|vga_control_unit|toggle_counter_sig_19 ;
 313 wire \inst|vga_control_unit|toggle_counter_sig_cout[16]~COUT1_45 ;
 314 wire \inst|vga_control_unit|toggle_counter_sig_18 ;
 315 wire \inst|vga_control_unit|un1_toggle_counter_siglto18 ;
 316 wire \inst|vga_control_unit|toggle_counter_sig_20 ;
 317 wire \inst|vga_control_unit|toggle_sig_0_0_0_g1 ;
 318 wire \inst|vga_control_unit|toggle_sig ;
 319 wire \inst|vga_control_unit|r ;
 320 wire \~STRATIX_FITTER_CREATED_GND~I_combout ;
 321 wire \inst|vga_control_unit|b ;
 322 wire [18:1] \inst|vga_control_unit|toggle_counter_sig_cout ;
 323 wire [0:0] \inst|vga_control_unit|un2_toggle_counter_next_cout ;
 324 wire [8:0] \inst|vga_driver_unit|hsync_counter_cout ;
 325 wire [1:1] \inst|vga_driver_unit|un1_line_counter_sig_a_cout ;
 326 wire [9:1] \inst|vga_driver_unit|un1_line_counter_sig_combout ;
 327 wire [7:1] \inst|vga_driver_unit|un1_line_counter_sig_cout ;
 328 wire [9:1] \inst|vga_driver_unit|un2_column_counter_next_combout ;
 329 wire [7:0] \inst|vga_driver_unit|un2_column_counter_next_cout ;
 330 wire [8:0] \inst|vga_driver_unit|vsync_counter_cout ;
 331 wire [1:0] \inst|dly_counter ;
 332
 333 wire [5:0] \inst1|altpll_component|pll_CLK_bus ;
 334
 335 assign \inst1|altpll_component|_clk0  = \inst1|altpll_component|pll_CLK_bus [0];
 336 assign \inst1|altpll_component|pll~CLK1  = \inst1|altpll_component|pll_CLK_bus [1];
 337 assign \inst1|altpll_component|pll~CLK2  = \inst1|altpll_component|pll_CLK_bus [2];
 338 assign \inst1|altpll_component|pll~CLK3  = \inst1|altpll_component|pll_CLK_bus [3];
 339 assign \inst1|altpll_component|pll~CLK4  = \inst1|altpll_component|pll_CLK_bus [4];
 340 assign \inst1|altpll_component|pll~CLK5  = \inst1|altpll_component|pll_CLK_bus [5];
 341
 342 // atom is at PIN_N3
 343 stratix_io \board_clk~I (
 344         .datain(gnd),
 345         .ddiodatain(gnd),
 346         .oe(gnd),
 347         .outclk(gnd),
 348         .outclkena(vcc),
 349         .inclk(gnd),
 350         .inclkena(vcc),
 351         .areset(gnd),
 352         .sreset(gnd),
 353         .delayctrlin(gnd),
 354         .devclrn(devclrn),
 355         .devpor(devpor),
 356         .devoe(devoe),
 357         .combout(\board_clk~combout ),
 358         .regout(),
 359         .ddioregout(),
 360         .padio(board_clk),
 361         .dqsundelayedout());
 362 // synopsys translate_off
 363 defparam \board_clk~I .ddio_mode = "none";
 364 defparam \board_clk~I .input_async_reset = "none";
 365 defparam \board_clk~I .input_power_up = "low";
 366 defparam \board_clk~I .input_register_mode = "none";
 367 defparam \board_clk~I .input_sync_reset = "none";
 368 defparam \board_clk~I .oe_async_reset = "none";
 369 defparam \board_clk~I .oe_power_up = "low";
 370 defparam \board_clk~I .oe_register_mode = "none";
 371 defparam \board_clk~I .oe_sync_reset = "none";
 372 defparam \board_clk~I .operation_mode = "input";
 373 defparam \board_clk~I .output_async_reset = "none";
 374 defparam \board_clk~I .output_power_up = "low";
 375 defparam \board_clk~I .output_register_mode = "none";
 376 defparam \board_clk~I .output_sync_reset = "none";
 377 // synopsys translate_on
 378
 379 // atom is at PLL_1
 380 stratix_pll \inst1|altpll_component|pll (
 381         .fbin(vcc),
 382         .ena(vcc),
 383         .clkswitch(gnd),
 384         .areset(gnd),
 385         .pfdena(vcc),
 386         .scanclk(gnd),
 387         .scanaclr(gnd),
 388         .scandata(gnd),
 389         .comparator(gnd),
 390         .inclk({gnd,\board_clk~combout }),
 391         .clkena(6'b111111),
 392         .extclkena(4'b1111),
 393         .activeclock(),
 394         .clkloss(),
 395         .locked(),
 396         .scandataout(),
 397         .enable0(),
 398         .enable1(),
 399         .clk(\inst1|altpll_component|pll_CLK_bus ),
 400         .extclk(),
 401         .clkbad());
 402 // synopsys translate_off
 403 defparam \inst1|altpll_component|pll .clk0_counter = "g0";
 404 defparam \inst1|altpll_component|pll .clk0_divide_by = 38;
 405 defparam \inst1|altpll_component|pll .clk0_duty_cycle = 50;
 406 defparam \inst1|altpll_component|pll .clk0_multiply_by = 31;
 407 defparam \inst1|altpll_component|pll .clk0_phase_shift = "-725";
 408 defparam \inst1|altpll_component|pll .clk1_divide_by = 1;
 409 defparam \inst1|altpll_component|pll .clk1_duty_cycle = 50;
 410 defparam \inst1|altpll_component|pll .clk1_multiply_by = 1;
 411 defparam \inst1|altpll_component|pll .clk1_phase_shift = "0";
 412 defparam \inst1|altpll_component|pll .clk2_divide_by = 1;
 413 defparam \inst1|altpll_component|pll .clk2_duty_cycle = 50;
 414 defparam \inst1|altpll_component|pll .clk2_multiply_by = 1;
 415 defparam \inst1|altpll_component|pll .clk2_phase_shift = "0";
 416 defparam \inst1|altpll_component|pll .compensate_clock = "clk0";
 417 defparam \inst1|altpll_component|pll .enable_switch_over_counter = "off";
 418 defparam \inst1|altpll_component|pll .g0_high = 10;
 419 defparam \inst1|altpll_component|pll .g0_initial = 1;
 420 defparam \inst1|altpll_component|pll .g0_low = 9;
 421 defparam \inst1|altpll_component|pll .g0_mode = "odd";
 422 defparam \inst1|altpll_component|pll .g0_ph = 0;
 423 defparam \inst1|altpll_component|pll .gate_lock_counter = 0;
 424 defparam \inst1|altpll_component|pll .gate_lock_signal = "no";
 425 defparam \inst1|altpll_component|pll .inclk0_input_frequency = 30003;
 426 defparam \inst1|altpll_component|pll .inclk1_input_frequency = 30003;
 427 defparam \inst1|altpll_component|pll .invalid_lock_multiplier = 5;
 428 defparam \inst1|altpll_component|pll .l0_high = 13;
 429 defparam \inst1|altpll_component|pll .l0_initial = 1;
 430 defparam \inst1|altpll_component|pll .l0_low = 13;
 431 defparam \inst1|altpll_component|pll .l0_mode = "even";
 432 defparam \inst1|altpll_component|pll .l0_ph = 0;
 433 defparam \inst1|altpll_component|pll .l1_mode = "bypass";
 434 defparam \inst1|altpll_component|pll .l1_ph = 0;
 435 defparam \inst1|altpll_component|pll .m = 31;
 436 defparam \inst1|altpll_component|pll .m_initial = 1;
 437 defparam \inst1|altpll_component|pll .m_ph = 3;
 438 defparam \inst1|altpll_component|pll .n = 2;
 439 defparam \inst1|altpll_component|pll .operation_mode = "normal";
 440 defparam \inst1|altpll_component|pll .pfd_max = 100000;
 441 defparam \inst1|altpll_component|pll .pfd_min = 2000;
 442 defparam \inst1|altpll_component|pll .pll_compensation_delay = 1713;
 443 defparam \inst1|altpll_component|pll .pll_type = "fast";
 444 defparam \inst1|altpll_component|pll .primary_clock = "inclk0";
 445 defparam \inst1|altpll_component|pll .qualify_conf_done = "off";
 446 defparam \inst1|altpll_component|pll .simulation_type = "timing";
 447 defparam \inst1|altpll_component|pll .skip_vco = "off";
 448 defparam \inst1|altpll_component|pll .switch_over_counter = 1;
 449 defparam \inst1|altpll_component|pll .switch_over_on_gated_lock = "off";
 450 defparam \inst1|altpll_component|pll .switch_over_on_lossclk = "off";
 451 defparam \inst1|altpll_component|pll .valid_lock_multiplier = 1;
 452 defparam \inst1|altpll_component|pll .vco_center = 1250;
 453 defparam \inst1|altpll_component|pll .vco_max = 3334;
 454 defparam \inst1|altpll_component|pll .vco_min = 1000;
 455 // synopsys translate_on
 456
 457 // atom is at PIN_A5
 458 stratix_io \inst|reset_pin_in~I (
 459         .datain(gnd),
 460         .ddiodatain(gnd),
 461         .oe(gnd),
 462         .outclk(gnd),
 463         .outclkena(vcc),
 464         .inclk(gnd),
 465         .inclkena(vcc),
 466         .areset(gnd),
 467         .sreset(gnd),
 468         .delayctrlin(gnd),
 469         .devclrn(devclrn),
 470         .devpor(devpor),
 471         .devoe(devoe),
 472         .combout(\reset~combout ),
 473         .regout(),
 474         .ddioregout(),
 475         .padio(reset),
 476         .dqsundelayedout());
 477 // synopsys translate_off
 478 defparam \inst|reset_pin_in~I .ddio_mode = "none";
 479 defparam \inst|reset_pin_in~I .input_async_reset = "none";
 480 defparam \inst|reset_pin_in~I .input_power_up = "low";
 481 defparam \inst|reset_pin_in~I .input_register_mode = "none";
 482 defparam \inst|reset_pin_in~I .input_sync_reset = "none";
 483 defparam \inst|reset_pin_in~I .oe_async_reset = "none";
 484 defparam \inst|reset_pin_in~I .oe_power_up = "low";
 485 defparam \inst|reset_pin_in~I .oe_register_mode = "none";
 486 defparam \inst|reset_pin_in~I .oe_sync_reset = "none";
 487 defparam \inst|reset_pin_in~I .operation_mode = "input";
 488 defparam \inst|reset_pin_in~I .output_async_reset = "none";
 489 defparam \inst|reset_pin_in~I .output_power_up = "low";
 490 defparam \inst|reset_pin_in~I .output_register_mode = "none";
 491 defparam \inst|reset_pin_in~I .output_sync_reset = "none";
 492 // synopsys translate_on
 493
 494 // atom is at LC_X30_Y39_N4
 495 stratix_lcell \inst|dly_counter_0_ (
 496 // Equation(s):
 497 // \inst|dly_counter [0] = DFFEAS(\reset~combout  & (\inst|dly_counter [1] # !\inst|dly_counter [0]), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , , , )
 498
 499         .clk(\inst1|altpll_component|_clk0 ),
 500         .dataa(\inst|dly_counter [1]),
 501         .datab(vcc),
 502         .datac(\reset~combout ),
 503         .datad(\inst|dly_counter [0]),
 504         .aclr(gnd),
 505         .aload(gnd),
 506         .sclr(gnd),
 507         .sload(gnd),
 508         .ena(vcc),
 509         .cin(gnd),
 510         .cin0(gnd),
 511         .cin1(vcc),
 512         .inverta(gnd),
 513         .regcascin(gnd),
 514         .devclrn(devclrn),
 515         .devpor(devpor),
 516         .combout(),
 517         .regout(\inst|dly_counter [0]),
 518         .cout(),
 519         .cout0(),
 520         .cout1());
 521 // synopsys translate_off
 522 defparam \inst|dly_counter_0_ .lut_mask = "a0f0";
 523 defparam \inst|dly_counter_0_ .operation_mode = "normal";
 524 defparam \inst|dly_counter_0_ .output_mode = "reg_only";
 525 defparam \inst|dly_counter_0_ .register_cascade_mode = "off";
 526 defparam \inst|dly_counter_0_ .sum_lutc_input = "datac";
 527 defparam \inst|dly_counter_0_ .synch_mode = "off";
 528 // synopsys translate_on
 529
 530 // atom is at LC_X30_Y38_N0
 531 stratix_lcell \inst|dly_counter_1_ (
 532 // Equation(s):
 533 // \inst|dly_counter [1] = DFFEAS(\reset~combout  & (\inst|dly_counter [1] # \inst|dly_counter [0]), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , , , )
 534
 535         .clk(\inst1|altpll_component|_clk0 ),
 536         .dataa(vcc),
 537         .datab(\inst|dly_counter [1]),
 538         .datac(\reset~combout ),
 539         .datad(\inst|dly_counter [0]),
 540         .aclr(gnd),
 541         .aload(gnd),
 542         .sclr(gnd),
 543         .sload(gnd),
 544         .ena(vcc),
 545         .cin(gnd),
 546         .cin0(gnd),
 547         .cin1(vcc),
 548         .inverta(gnd),
 549         .regcascin(gnd),
 550         .devclrn(devclrn),
 551         .devpor(devpor),
 552         .combout(),
 553         .regout(\inst|dly_counter [1]),
 554         .cout(),
 555         .cout0(),
 556         .cout1());
 557 // synopsys translate_off
 558 defparam \inst|dly_counter_1_ .lut_mask = "f0c0";
 559 defparam \inst|dly_counter_1_ .operation_mode = "normal";
 560 defparam \inst|dly_counter_1_ .output_mode = "reg_only";
 561 defparam \inst|dly_counter_1_ .register_cascade_mode = "off";
 562 defparam \inst|dly_counter_1_ .sum_lutc_input = "datac";
 563 defparam \inst|dly_counter_1_ .synch_mode = "off";
 564 // synopsys translate_on
 565
 566 // atom is at LC_X30_Y38_N3
 567 stratix_lcell \inst|vga_driver_unit|vsync_state_6_ (
 568 // Equation(s):
 569 // \inst|vga_driver_unit|un6_dly_counter_0_x  = !\inst|dly_counter [0] # !\reset~combout  # !\inst|dly_counter [1]
 570 // \inst|vga_driver_unit|vsync_state_6  = DFFEAS(\inst|vga_driver_unit|un6_dly_counter_0_x , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , , , )
 571
 572         .clk(\inst1|altpll_component|_clk0 ),
 573         .dataa(vcc),
 574         .datab(\inst|dly_counter [1]),
 575         .datac(\reset~combout ),
 576         .datad(\inst|dly_counter [0]),
 577         .aclr(gnd),
 578         .aload(gnd),
 579         .sclr(gnd),
 580         .sload(gnd),
 581         .ena(vcc),
 582         .cin(gnd),
 583         .cin0(gnd),
 584         .cin1(vcc),
 585         .inverta(gnd),
 586         .regcascin(gnd),
 587         .devclrn(devclrn),
 588         .devpor(devpor),
 589         .combout(\inst|vga_driver_unit|un6_dly_counter_0_x ),
 590         .regout(\inst|vga_driver_unit|vsync_state_6 ),
 591         .cout(),
 592         .cout0(),
 593         .cout1());
 594 // synopsys translate_off
 595 defparam \inst|vga_driver_unit|vsync_state_6_ .lut_mask = "3fff";
 596 defparam \inst|vga_driver_unit|vsync_state_6_ .operation_mode = "normal";
 597 defparam \inst|vga_driver_unit|vsync_state_6_ .output_mode = "reg_and_comb";
 598 defparam \inst|vga_driver_unit|vsync_state_6_ .register_cascade_mode = "off";
 599 defparam \inst|vga_driver_unit|vsync_state_6_ .sum_lutc_input = "datac";
 600 defparam \inst|vga_driver_unit|vsync_state_6_ .synch_mode = "off";
 601 // synopsys translate_on
 602
 603 // atom is at LC_X27_Y42_N7
 604 stratix_lcell \inst|vga_driver_unit|hsync_state_6_ (
 605 // Equation(s):
 606 // \inst|vga_driver_unit|d_set_hsync_counter  = \inst|vga_driver_unit|hsync_state_0  # E1_hsync_state_6
 607 // \inst|vga_driver_unit|hsync_state_6  = DFFEAS(\inst|vga_driver_unit|d_set_hsync_counter , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|un6_dly_counter_0_x , , , VCC)
 608
 609         .clk(\inst1|altpll_component|_clk0 ),
 610         .dataa(\inst|vga_driver_unit|hsync_state_0 ),
 611         .datab(vcc),
 612         .datac(\inst|vga_driver_unit|un6_dly_counter_0_x ),
 613         .datad(vcc),
 614         .aclr(gnd),
 615         .aload(gnd),
 616         .sclr(gnd),
 617         .sload(vcc),
 618         .ena(vcc),
 619         .cin(gnd),
 620         .cin0(gnd),
 621         .cin1(vcc),
 622         .inverta(gnd),
 623         .regcascin(gnd),
 624         .devclrn(devclrn),
 625         .devpor(devpor),
 626         .combout(\inst|vga_driver_unit|d_set_hsync_counter ),
 627         .regout(\inst|vga_driver_unit|hsync_state_6 ),
 628         .cout(),
 629         .cout0(),
 630         .cout1());
 631 // synopsys translate_off
 632 defparam \inst|vga_driver_unit|hsync_state_6_ .lut_mask = "fafa";
 633 defparam \inst|vga_driver_unit|hsync_state_6_ .operation_mode = "normal";
 634 defparam \inst|vga_driver_unit|hsync_state_6_ .output_mode = "reg_and_comb";
 635 defparam \inst|vga_driver_unit|hsync_state_6_ .register_cascade_mode = "off";
 636 defparam \inst|vga_driver_unit|hsync_state_6_ .sum_lutc_input = "qfbk";
 637 defparam \inst|vga_driver_unit|hsync_state_6_ .synch_mode = "on";
 638 // synopsys translate_on
 639
 640 // atom is at LC_X51_Y42_N0
 641 stratix_lcell \inst|vga_driver_unit|hsync_counter_0_ (
 642 // Equation(s):
 643 // \inst|vga_driver_unit|hsync_counter_0  = DFFEAS(!\inst|vga_driver_unit|hsync_counter_0 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , , !\inst|vga_driver_unit|G_2_i ,
 644 // !\inst|vga_driver_unit|un9_hsync_counterlt9 )
 645 // \inst|vga_driver_unit|hsync_counter_cout [0] = CARRY(\inst|vga_driver_unit|hsync_counter_0 )
 646 // \inst|vga_driver_unit|hsync_counter_cout[0]~COUT1_10  = CARRY(\inst|vga_driver_unit|hsync_counter_0 )
 647
 648         .clk(\inst1|altpll_component|_clk0 ),
 649         .dataa(vcc),
 650         .datab(\inst|vga_driver_unit|hsync_counter_0 ),
 651         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
 652         .datad(vcc),
 653         .aclr(gnd),
 654         .aload(gnd),
 655         .sclr(!\inst|vga_driver_unit|G_2_i ),
 656         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
 657         .ena(vcc),
 658         .cin(gnd),
 659         .cin0(gnd),
 660         .cin1(vcc),
 661         .inverta(gnd),
 662         .regcascin(gnd),
 663         .devclrn(devclrn),
 664         .devpor(devpor),
 665         .combout(),
 666         .regout(\inst|vga_driver_unit|hsync_counter_0 ),
 667         .cout(),
 668         .cout0(\inst|vga_driver_unit|hsync_counter_cout [0]),
 669         .cout1(\inst|vga_driver_unit|hsync_counter_cout[0]~COUT1_10 ));
 670 // synopsys translate_off
 671 defparam \inst|vga_driver_unit|hsync_counter_0_ .lut_mask = "33cc";
 672 defparam \inst|vga_driver_unit|hsync_counter_0_ .operation_mode = "arithmetic";
 673 defparam \inst|vga_driver_unit|hsync_counter_0_ .output_mode = "reg_only";
 674 defparam \inst|vga_driver_unit|hsync_counter_0_ .register_cascade_mode = "off";
 675 defparam \inst|vga_driver_unit|hsync_counter_0_ .sum_lutc_input = "datac";
 676 defparam \inst|vga_driver_unit|hsync_counter_0_ .synch_mode = "on";
 677 // synopsys translate_on
 678
 679 // atom is at LC_X51_Y42_N1
 680 stratix_lcell \inst|vga_driver_unit|hsync_counter_1_ (
 681 // Equation(s):
 682 // \inst|vga_driver_unit|hsync_counter_1  = DFFEAS(\inst|vga_driver_unit|hsync_counter_1  $ \inst|vga_driver_unit|hsync_counter_cout [0], GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , ,
 683 // !\inst|vga_driver_unit|G_2_i , !\inst|vga_driver_unit|un9_hsync_counterlt9 )
 684 // \inst|vga_driver_unit|hsync_counter_cout [1] = CARRY(!\inst|vga_driver_unit|hsync_counter_cout [0] # !\inst|vga_driver_unit|hsync_counter_1 )
 685 // \inst|vga_driver_unit|hsync_counter_cout[1]~COUT1_12  = CARRY(!\inst|vga_driver_unit|hsync_counter_cout[0]~COUT1_10  # !\inst|vga_driver_unit|hsync_counter_1 )
 686
 687         .clk(\inst1|altpll_component|_clk0 ),
 688         .dataa(vcc),
 689         .datab(\inst|vga_driver_unit|hsync_counter_1 ),
 690         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
 691         .datad(vcc),
 692         .aclr(gnd),
 693         .aload(gnd),
 694         .sclr(!\inst|vga_driver_unit|G_2_i ),
 695         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
 696         .ena(vcc),
 697         .cin(gnd),
 698         .cin0(\inst|vga_driver_unit|hsync_counter_cout [0]),
 699         .cin1(\inst|vga_driver_unit|hsync_counter_cout[0]~COUT1_10 ),
 700         .inverta(gnd),
 701         .regcascin(gnd),
 702         .devclrn(devclrn),
 703         .devpor(devpor),
 704         .combout(),
 705         .regout(\inst|vga_driver_unit|hsync_counter_1 ),
 706         .cout(),
 707         .cout0(\inst|vga_driver_unit|hsync_counter_cout [1]),
 708         .cout1(\inst|vga_driver_unit|hsync_counter_cout[1]~COUT1_12 ));
 709 // synopsys translate_off
 710 defparam \inst|vga_driver_unit|hsync_counter_1_ .cin0_used = "true";
 711 defparam \inst|vga_driver_unit|hsync_counter_1_ .cin1_used = "true";
 712 defparam \inst|vga_driver_unit|hsync_counter_1_ .lut_mask = "3c3f";
 713 defparam \inst|vga_driver_unit|hsync_counter_1_ .operation_mode = "arithmetic";
 714 defparam \inst|vga_driver_unit|hsync_counter_1_ .output_mode = "reg_only";
 715 defparam \inst|vga_driver_unit|hsync_counter_1_ .register_cascade_mode = "off";
 716 defparam \inst|vga_driver_unit|hsync_counter_1_ .sum_lutc_input = "cin";
 717 defparam \inst|vga_driver_unit|hsync_counter_1_ .synch_mode = "on";
 718 // synopsys translate_on
 719
 720 // atom is at LC_X51_Y42_N2
 721 stratix_lcell \inst|vga_driver_unit|hsync_counter_2_ (
 722 // Equation(s):
 723 // \inst|vga_driver_unit|hsync_counter_2  = DFFEAS(\inst|vga_driver_unit|hsync_counter_2  $ (!\inst|vga_driver_unit|hsync_counter_cout [1]), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , ,
 724 // !\inst|vga_driver_unit|G_2_i , !\inst|vga_driver_unit|un9_hsync_counterlt9 )
 725 // \inst|vga_driver_unit|hsync_counter_cout [2] = CARRY(\inst|vga_driver_unit|hsync_counter_2  & (!\inst|vga_driver_unit|hsync_counter_cout [1]))
 726 // \inst|vga_driver_unit|hsync_counter_cout[2]~COUT1_14  = CARRY(\inst|vga_driver_unit|hsync_counter_2  & (!\inst|vga_driver_unit|hsync_counter_cout[1]~COUT1_12 ))
 727
 728         .clk(\inst1|altpll_component|_clk0 ),
 729         .dataa(\inst|vga_driver_unit|hsync_counter_2 ),
 730         .datab(vcc),
 731         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
 732         .datad(vcc),
 733         .aclr(gnd),
 734         .aload(gnd),
 735         .sclr(!\inst|vga_driver_unit|G_2_i ),
 736         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
 737         .ena(vcc),
 738         .cin(gnd),
 739         .cin0(\inst|vga_driver_unit|hsync_counter_cout [1]),
 740         .cin1(\inst|vga_driver_unit|hsync_counter_cout[1]~COUT1_12 ),
 741         .inverta(gnd),
 742         .regcascin(gnd),
 743         .devclrn(devclrn),
 744         .devpor(devpor),
 745         .combout(),
 746         .regout(\inst|vga_driver_unit|hsync_counter_2 ),
 747         .cout(),
 748         .cout0(\inst|vga_driver_unit|hsync_counter_cout [2]),
 749         .cout1(\inst|vga_driver_unit|hsync_counter_cout[2]~COUT1_14 ));
 750 // synopsys translate_off
 751 defparam \inst|vga_driver_unit|hsync_counter_2_ .cin0_used = "true";
 752 defparam \inst|vga_driver_unit|hsync_counter_2_ .cin1_used = "true";
 753 defparam \inst|vga_driver_unit|hsync_counter_2_ .lut_mask = "a50a";
 754 defparam \inst|vga_driver_unit|hsync_counter_2_ .operation_mode = "arithmetic";
 755 defparam \inst|vga_driver_unit|hsync_counter_2_ .output_mode = "reg_only";
 756 defparam \inst|vga_driver_unit|hsync_counter_2_ .register_cascade_mode = "off";
 757 defparam \inst|vga_driver_unit|hsync_counter_2_ .sum_lutc_input = "cin";
 758 defparam \inst|vga_driver_unit|hsync_counter_2_ .synch_mode = "on";
 759 // synopsys translate_on
 760
 761 // atom is at LC_X51_Y42_N3
 762 stratix_lcell \inst|vga_driver_unit|hsync_counter_3_ (
 763 // Equation(s):
 764 // \inst|vga_driver_unit|hsync_counter_3  = DFFEAS(\inst|vga_driver_unit|hsync_counter_3  $ (\inst|vga_driver_unit|hsync_counter_cout [2]), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , ,
 765 // !\inst|vga_driver_unit|G_2_i , !\inst|vga_driver_unit|un9_hsync_counterlt9 )
 766 // \inst|vga_driver_unit|hsync_counter_cout [3] = CARRY(!\inst|vga_driver_unit|hsync_counter_cout [2] # !\inst|vga_driver_unit|hsync_counter_3 )
 767 // \inst|vga_driver_unit|hsync_counter_cout[3]~COUT1_16  = CARRY(!\inst|vga_driver_unit|hsync_counter_cout[2]~COUT1_14  # !\inst|vga_driver_unit|hsync_counter_3 )
 768
 769         .clk(\inst1|altpll_component|_clk0 ),
 770         .dataa(\inst|vga_driver_unit|hsync_counter_3 ),
 771         .datab(vcc),
 772         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
 773         .datad(vcc),
 774         .aclr(gnd),
 775         .aload(gnd),
 776         .sclr(!\inst|vga_driver_unit|G_2_i ),
 777         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
 778         .ena(vcc),
 779         .cin(gnd),
 780         .cin0(\inst|vga_driver_unit|hsync_counter_cout [2]),
 781         .cin1(\inst|vga_driver_unit|hsync_counter_cout[2]~COUT1_14 ),
 782         .inverta(gnd),
 783         .regcascin(gnd),
 784         .devclrn(devclrn),
 785         .devpor(devpor),
 786         .combout(),
 787         .regout(\inst|vga_driver_unit|hsync_counter_3 ),
 788         .cout(),
 789         .cout0(\inst|vga_driver_unit|hsync_counter_cout [3]),
 790         .cout1(\inst|vga_driver_unit|hsync_counter_cout[3]~COUT1_16 ));
 791 // synopsys translate_off
 792 defparam \inst|vga_driver_unit|hsync_counter_3_ .cin0_used = "true";
 793 defparam \inst|vga_driver_unit|hsync_counter_3_ .cin1_used = "true";
 794 defparam \inst|vga_driver_unit|hsync_counter_3_ .lut_mask = "5a5f";
 795 defparam \inst|vga_driver_unit|hsync_counter_3_ .operation_mode = "arithmetic";
 796 defparam \inst|vga_driver_unit|hsync_counter_3_ .output_mode = "reg_only";
 797 defparam \inst|vga_driver_unit|hsync_counter_3_ .register_cascade_mode = "off";
 798 defparam \inst|vga_driver_unit|hsync_counter_3_ .sum_lutc_input = "cin";
 799 defparam \inst|vga_driver_unit|hsync_counter_3_ .synch_mode = "on";
 800 // synopsys translate_on
 801
 802 // atom is at LC_X51_Y42_N4
 803 stratix_lcell \inst|vga_driver_unit|hsync_counter_4_ (
 804 // Equation(s):
 805 // \inst|vga_driver_unit|hsync_counter_4  = DFFEAS(\inst|vga_driver_unit|hsync_counter_4  $ (!\inst|vga_driver_unit|hsync_counter_cout [3]), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , ,
 806 // !\inst|vga_driver_unit|G_2_i , !\inst|vga_driver_unit|un9_hsync_counterlt9 )
 807 // \inst|vga_driver_unit|hsync_counter_cout [4] = CARRY(\inst|vga_driver_unit|hsync_counter_4  & (!\inst|vga_driver_unit|hsync_counter_cout[3]~COUT1_16 ))
 808
 809         .clk(\inst1|altpll_component|_clk0 ),
 810         .dataa(\inst|vga_driver_unit|hsync_counter_4 ),
 811         .datab(vcc),
 812         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
 813         .datad(vcc),
 814         .aclr(gnd),
 815         .aload(gnd),
 816         .sclr(!\inst|vga_driver_unit|G_2_i ),
 817         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
 818         .ena(vcc),
 819         .cin(gnd),
 820         .cin0(\inst|vga_driver_unit|hsync_counter_cout [3]),
 821         .cin1(\inst|vga_driver_unit|hsync_counter_cout[3]~COUT1_16 ),
 822         .inverta(gnd),
 823         .regcascin(gnd),
 824         .devclrn(devclrn),
 825         .devpor(devpor),
 826         .combout(),
 827         .regout(\inst|vga_driver_unit|hsync_counter_4 ),
 828         .cout(\inst|vga_driver_unit|hsync_counter_cout [4]),
 829         .cout0(),
 830         .cout1());
 831 // synopsys translate_off
 832 defparam \inst|vga_driver_unit|hsync_counter_4_ .cin0_used = "true";
 833 defparam \inst|vga_driver_unit|hsync_counter_4_ .cin1_used = "true";
 834 defparam \inst|vga_driver_unit|hsync_counter_4_ .lut_mask = "a50a";
 835 defparam \inst|vga_driver_unit|hsync_counter_4_ .operation_mode = "arithmetic";
 836 defparam \inst|vga_driver_unit|hsync_counter_4_ .output_mode = "reg_only";
 837 defparam \inst|vga_driver_unit|hsync_counter_4_ .register_cascade_mode = "off";
 838 defparam \inst|vga_driver_unit|hsync_counter_4_ .sum_lutc_input = "cin";
 839 defparam \inst|vga_driver_unit|hsync_counter_4_ .synch_mode = "on";
 840 // synopsys translate_on
 841
 842 // atom is at LC_X51_Y42_N5
 843 stratix_lcell \inst|vga_driver_unit|hsync_counter_5_ (
 844 // Equation(s):
 845 // \inst|vga_driver_unit|hsync_counter_5  = DFFEAS(\inst|vga_driver_unit|hsync_counter_5  $ \inst|vga_driver_unit|hsync_counter_cout [4], GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , ,
 846 // !\inst|vga_driver_unit|G_2_i , !\inst|vga_driver_unit|un9_hsync_counterlt9 )
 847 // \inst|vga_driver_unit|hsync_counter_cout [5] = CARRY(!\inst|vga_driver_unit|hsync_counter_cout [4] # !\inst|vga_driver_unit|hsync_counter_5 )
 848 // \inst|vga_driver_unit|hsync_counter_cout[5]~COUT1_18  = CARRY(!\inst|vga_driver_unit|hsync_counter_cout [4] # !\inst|vga_driver_unit|hsync_counter_5 )
 849
 850         .clk(\inst1|altpll_component|_clk0 ),
 851         .dataa(vcc),
 852         .datab(\inst|vga_driver_unit|hsync_counter_5 ),
 853         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
 854         .datad(vcc),
 855         .aclr(gnd),
 856         .aload(gnd),
 857         .sclr(!\inst|vga_driver_unit|G_2_i ),
 858         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
 859         .ena(vcc),
 860         .cin(\inst|vga_driver_unit|hsync_counter_cout [4]),
 861         .cin0(gnd),
 862         .cin1(vcc),
 863         .inverta(gnd),
 864         .regcascin(gnd),
 865         .devclrn(devclrn),
 866         .devpor(devpor),
 867         .combout(),
 868         .regout(\inst|vga_driver_unit|hsync_counter_5 ),
 869         .cout(),
 870         .cout0(\inst|vga_driver_unit|hsync_counter_cout [5]),
 871         .cout1(\inst|vga_driver_unit|hsync_counter_cout[5]~COUT1_18 ));
 872 // synopsys translate_off
 873 defparam \inst|vga_driver_unit|hsync_counter_5_ .cin_used = "true";
 874 defparam \inst|vga_driver_unit|hsync_counter_5_ .lut_mask = "3c3f";
 875 defparam \inst|vga_driver_unit|hsync_counter_5_ .operation_mode = "arithmetic";
 876 defparam \inst|vga_driver_unit|hsync_counter_5_ .output_mode = "reg_only";
 877 defparam \inst|vga_driver_unit|hsync_counter_5_ .register_cascade_mode = "off";
 878 defparam \inst|vga_driver_unit|hsync_counter_5_ .sum_lutc_input = "cin";
 879 defparam \inst|vga_driver_unit|hsync_counter_5_ .synch_mode = "on";
 880 // synopsys translate_on
 881
 882 // atom is at LC_X51_Y42_N6
 883 stratix_lcell \inst|vga_driver_unit|hsync_counter_6_ (
 884 // Equation(s):
 885 // \inst|vga_driver_unit|hsync_counter_6  = DFFEAS(\inst|vga_driver_unit|hsync_counter_6  $ !(!\inst|vga_driver_unit|hsync_counter_cout [4] & \inst|vga_driver_unit|hsync_counter_cout [5]) # (\inst|vga_driver_unit|hsync_counter_cout [4] &
 886 // \inst|vga_driver_unit|hsync_counter_cout[5]~COUT1_18 ), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , , !\inst|vga_driver_unit|G_2_i , !\inst|vga_driver_unit|un9_hsync_counterlt9 )
 887 // \inst|vga_driver_unit|hsync_counter_cout [6] = CARRY(\inst|vga_driver_unit|hsync_counter_6  & !\inst|vga_driver_unit|hsync_counter_cout [5])
 888 // \inst|vga_driver_unit|hsync_counter_cout[6]~COUT1_20  = CARRY(\inst|vga_driver_unit|hsync_counter_6  & !\inst|vga_driver_unit|hsync_counter_cout[5]~COUT1_18 )
 889
 890         .clk(\inst1|altpll_component|_clk0 ),
 891         .dataa(vcc),
 892         .datab(\inst|vga_driver_unit|hsync_counter_6 ),
 893         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
 894         .datad(vcc),
 895         .aclr(gnd),
 896         .aload(gnd),
 897         .sclr(!\inst|vga_driver_unit|G_2_i ),
 898         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
 899         .ena(vcc),
 900         .cin(\inst|vga_driver_unit|hsync_counter_cout [4]),
 901         .cin0(\inst|vga_driver_unit|hsync_counter_cout [5]),
 902         .cin1(\inst|vga_driver_unit|hsync_counter_cout[5]~COUT1_18 ),
 903         .inverta(gnd),
 904         .regcascin(gnd),
 905         .devclrn(devclrn),
 906         .devpor(devpor),
 907         .combout(),
 908         .regout(\inst|vga_driver_unit|hsync_counter_6 ),
 909         .cout(),
 910         .cout0(\inst|vga_driver_unit|hsync_counter_cout [6]),
 911         .cout1(\inst|vga_driver_unit|hsync_counter_cout[6]~COUT1_20 ));
 912 // synopsys translate_off
 913 defparam \inst|vga_driver_unit|hsync_counter_6_ .cin0_used = "true";
 914 defparam \inst|vga_driver_unit|hsync_counter_6_ .cin1_used = "true";
 915 defparam \inst|vga_driver_unit|hsync_counter_6_ .cin_used = "true";
 916 defparam \inst|vga_driver_unit|hsync_counter_6_ .lut_mask = "c30c";
 917 defparam \inst|vga_driver_unit|hsync_counter_6_ .operation_mode = "arithmetic";
 918 defparam \inst|vga_driver_unit|hsync_counter_6_ .output_mode = "reg_only";
 919 defparam \inst|vga_driver_unit|hsync_counter_6_ .register_cascade_mode = "off";
 920 defparam \inst|vga_driver_unit|hsync_counter_6_ .sum_lutc_input = "cin";
 921 defparam \inst|vga_driver_unit|hsync_counter_6_ .synch_mode = "on";
 922 // synopsys translate_on
 923
 924 // atom is at LC_X51_Y42_N7
 925 stratix_lcell \inst|vga_driver_unit|hsync_counter_7_ (
 926 // Equation(s):
 927 // \inst|vga_driver_unit|hsync_counter_7  = DFFEAS(\inst|vga_driver_unit|hsync_counter_7  $ ((!\inst|vga_driver_unit|hsync_counter_cout [4] & \inst|vga_driver_unit|hsync_counter_cout [6]) # (\inst|vga_driver_unit|hsync_counter_cout [4] &
 928 // \inst|vga_driver_unit|hsync_counter_cout[6]~COUT1_20 )), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , , !\inst|vga_driver_unit|G_2_i , !\inst|vga_driver_unit|un9_hsync_counterlt9 )
 929 // \inst|vga_driver_unit|hsync_counter_cout [7] = CARRY(!\inst|vga_driver_unit|hsync_counter_cout [6] # !\inst|vga_driver_unit|hsync_counter_7 )
 930 // \inst|vga_driver_unit|hsync_counter_cout[7]~COUT1_22  = CARRY(!\inst|vga_driver_unit|hsync_counter_cout[6]~COUT1_20  # !\inst|vga_driver_unit|hsync_counter_7 )
 931
 932         .clk(\inst1|altpll_component|_clk0 ),
 933         .dataa(\inst|vga_driver_unit|hsync_counter_7 ),
 934         .datab(vcc),
 935         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
 936         .datad(vcc),
 937         .aclr(gnd),
 938         .aload(gnd),
 939         .sclr(!\inst|vga_driver_unit|G_2_i ),
 940         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
 941         .ena(vcc),
 942         .cin(\inst|vga_driver_unit|hsync_counter_cout [4]),
 943         .cin0(\inst|vga_driver_unit|hsync_counter_cout [6]),
 944         .cin1(\inst|vga_driver_unit|hsync_counter_cout[6]~COUT1_20 ),
 945         .inverta(gnd),
 946         .regcascin(gnd),
 947         .devclrn(devclrn),
 948         .devpor(devpor),
 949         .combout(),
 950         .regout(\inst|vga_driver_unit|hsync_counter_7 ),
 951         .cout(),
 952         .cout0(\inst|vga_driver_unit|hsync_counter_cout [7]),
 953         .cout1(\inst|vga_driver_unit|hsync_counter_cout[7]~COUT1_22 ));
 954 // synopsys translate_off
 955 defparam \inst|vga_driver_unit|hsync_counter_7_ .cin0_used = "true";
 956 defparam \inst|vga_driver_unit|hsync_counter_7_ .cin1_used = "true";
 957 defparam \inst|vga_driver_unit|hsync_counter_7_ .cin_used = "true";
 958 defparam \inst|vga_driver_unit|hsync_counter_7_ .lut_mask = "5a5f";
 959 defparam \inst|vga_driver_unit|hsync_counter_7_ .operation_mode = "arithmetic";
 960 defparam \inst|vga_driver_unit|hsync_counter_7_ .output_mode = "reg_only";
 961 defparam \inst|vga_driver_unit|hsync_counter_7_ .register_cascade_mode = "off";
 962 defparam \inst|vga_driver_unit|hsync_counter_7_ .sum_lutc_input = "cin";
 963 defparam \inst|vga_driver_unit|hsync_counter_7_ .synch_mode = "on";
 964 // synopsys translate_on
 965
 966 // atom is at LC_X51_Y42_N8
 967 stratix_lcell \inst|vga_driver_unit|hsync_counter_8_ (
 968 // Equation(s):
 969 // \inst|vga_driver_unit|hsync_counter_8  = DFFEAS(\inst|vga_driver_unit|hsync_counter_8  $ (!(!\inst|vga_driver_unit|hsync_counter_cout [4] & \inst|vga_driver_unit|hsync_counter_cout [7]) # (\inst|vga_driver_unit|hsync_counter_cout [4] &
 970 // \inst|vga_driver_unit|hsync_counter_cout[7]~COUT1_22 )), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , , !\inst|vga_driver_unit|G_2_i , !\inst|vga_driver_unit|un9_hsync_counterlt9 )
 971 // \inst|vga_driver_unit|hsync_counter_cout [8] = CARRY(\inst|vga_driver_unit|hsync_counter_8  & (!\inst|vga_driver_unit|hsync_counter_cout [7]))
 972 // \inst|vga_driver_unit|hsync_counter_cout[8]~COUT1_24  = CARRY(\inst|vga_driver_unit|hsync_counter_8  & (!\inst|vga_driver_unit|hsync_counter_cout[7]~COUT1_22 ))
 973
 974         .clk(\inst1|altpll_component|_clk0 ),
 975         .dataa(\inst|vga_driver_unit|hsync_counter_8 ),
 976         .datab(vcc),
 977         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
 978         .datad(vcc),
 979         .aclr(gnd),
 980         .aload(gnd),
 981         .sclr(!\inst|vga_driver_unit|G_2_i ),
 982         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
 983         .ena(vcc),
 984         .cin(\inst|vga_driver_unit|hsync_counter_cout [4]),
 985         .cin0(\inst|vga_driver_unit|hsync_counter_cout [7]),
 986         .cin1(\inst|vga_driver_unit|hsync_counter_cout[7]~COUT1_22 ),
 987         .inverta(gnd),
 988         .regcascin(gnd),
 989         .devclrn(devclrn),
 990         .devpor(devpor),
 991         .combout(),
 992         .regout(\inst|vga_driver_unit|hsync_counter_8 ),
 993         .cout(),
 994         .cout0(\inst|vga_driver_unit|hsync_counter_cout [8]),
 995         .cout1(\inst|vga_driver_unit|hsync_counter_cout[8]~COUT1_24 ));
 996 // synopsys translate_off
 997 defparam \inst|vga_driver_unit|hsync_counter_8_ .cin0_used = "true";
 998 defparam \inst|vga_driver_unit|hsync_counter_8_ .cin1_used = "true";
 999 defparam \inst|vga_driver_unit|hsync_counter_8_ .cin_used = "true";
1000 defparam \inst|vga_driver_unit|hsync_counter_8_ .lut_mask = "a50a";
1001 defparam \inst|vga_driver_unit|hsync_counter_8_ .operation_mode = "arithmetic";
1002 defparam \inst|vga_driver_unit|hsync_counter_8_ .output_mode = "reg_only";
1003 defparam \inst|vga_driver_unit|hsync_counter_8_ .register_cascade_mode = "off";
1004 defparam \inst|vga_driver_unit|hsync_counter_8_ .sum_lutc_input = "cin";
1005 defparam \inst|vga_driver_unit|hsync_counter_8_ .synch_mode = "on";
1006 // synopsys translate_on
1007
1008 // atom is at LC_X51_Y42_N9
1009 stratix_lcell \inst|vga_driver_unit|hsync_counter_9_ (
1010 // Equation(s):
1011 // \inst|vga_driver_unit|hsync_counter_9  = DFFEAS((!\inst|vga_driver_unit|hsync_counter_cout [4] & \inst|vga_driver_unit|hsync_counter_cout [8]) # (\inst|vga_driver_unit|hsync_counter_cout [4] & \inst|vga_driver_unit|hsync_counter_cout[8]~COUT1_24 ) $
1012 // \inst|vga_driver_unit|hsync_counter_9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa , , !\inst|vga_driver_unit|G_2_i , !\inst|vga_driver_unit|un9_hsync_counterlt9 )
1013
1014         .clk(\inst1|altpll_component|_clk0 ),
1015         .dataa(vcc),
1016         .datab(vcc),
1017         .datac(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
1018         .datad(\inst|vga_driver_unit|hsync_counter_9 ),
1019         .aclr(gnd),
1020         .aload(gnd),
1021         .sclr(!\inst|vga_driver_unit|G_2_i ),
1022         .sload(!\inst|vga_driver_unit|un9_hsync_counterlt9 ),
1023         .ena(vcc),
1024         .cin(\inst|vga_driver_unit|hsync_counter_cout [4]),
1025         .cin0(\inst|vga_driver_unit|hsync_counter_cout [8]),
1026         .cin1(\inst|vga_driver_unit|hsync_counter_cout[8]~COUT1_24 ),
1027         .inverta(gnd),
1028         .regcascin(gnd),
1029         .devclrn(devclrn),
1030         .devpor(devpor),
1031         .combout(),
1032         .regout(\inst|vga_driver_unit|hsync_counter_9 ),
1033         .cout(),
1034         .cout0(),
1035         .cout1());
1036 // synopsys translate_off
1037 defparam \inst|vga_driver_unit|hsync_counter_9_ .cin0_used = "true";
1038 defparam \inst|vga_driver_unit|hsync_counter_9_ .cin1_used = "true";
1039 defparam \inst|vga_driver_unit|hsync_counter_9_ .cin_used = "true";
1040 defparam \inst|vga_driver_unit|hsync_counter_9_ .lut_mask = "0ff0";
1041 defparam \inst|vga_driver_unit|hsync_counter_9_ .operation_mode = "normal";
1042 defparam \inst|vga_driver_unit|hsync_counter_9_ .output_mode = "reg_only";
1043 defparam \inst|vga_driver_unit|hsync_counter_9_ .register_cascade_mode = "off";
1044 defparam \inst|vga_driver_unit|hsync_counter_9_ .sum_lutc_input = "cin";
1045 defparam \inst|vga_driver_unit|hsync_counter_9_ .synch_mode = "on";
1046 // synopsys translate_on
1047
1048 // atom is at LC_X52_Y41_N5
1049 stratix_lcell \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9_3 (
1050 // Equation(s):
1051 // \inst|vga_driver_unit|un9_hsync_counterlt9_3  = !\inst|vga_driver_unit|hsync_counter_4  # !\inst|vga_driver_unit|hsync_counter_6  # !\inst|vga_driver_unit|hsync_counter_7  # !\inst|vga_driver_unit|hsync_counter_5
1052
1053         .clk(gnd),
1054         .dataa(\inst|vga_driver_unit|hsync_counter_5 ),
1055         .datab(\inst|vga_driver_unit|hsync_counter_7 ),
1056         .datac(\inst|vga_driver_unit|hsync_counter_6 ),
1057         .datad(\inst|vga_driver_unit|hsync_counter_4 ),
1058         .aclr(gnd),
1059         .aload(gnd),
1060         .sclr(gnd),
1061         .sload(gnd),
1062         .ena(vcc),
1063         .cin(gnd),
1064         .cin0(gnd),
1065         .cin1(vcc),
1066         .inverta(gnd),
1067         .regcascin(gnd),
1068         .devclrn(devclrn),
1069         .devpor(devpor),
1070         .combout(\inst|vga_driver_unit|un9_hsync_counterlt9_3 ),
1071         .regout(),
1072         .cout(),
1073         .cout0(),
1074         .cout1());
1075 // synopsys translate_off
1076 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9_3 .lut_mask = "7fff";
1077 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9_3 .operation_mode = "normal";
1078 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9_3 .output_mode = "comb_only";
1079 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9_3 .register_cascade_mode = "off";
1080 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9_3 .sum_lutc_input = "datac";
1081 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9_3 .synch_mode = "off";
1082 // synopsys translate_on
1083
1084 // atom is at LC_X52_Y41_N6
1085 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_7 (
1086 // Equation(s):
1087 // \inst|vga_driver_unit|un13_hsync_counter_7  = \inst|vga_driver_unit|hsync_counter_0  & \inst|vga_driver_unit|hsync_counter_3  & \inst|vga_driver_unit|hsync_counter_2  & \inst|vga_driver_unit|hsync_counter_1
1088
1089         .clk(gnd),
1090         .dataa(\inst|vga_driver_unit|hsync_counter_0 ),
1091         .datab(\inst|vga_driver_unit|hsync_counter_3 ),
1092         .datac(\inst|vga_driver_unit|hsync_counter_2 ),
1093         .datad(\inst|vga_driver_unit|hsync_counter_1 ),
1094         .aclr(gnd),
1095         .aload(gnd),
1096         .sclr(gnd),
1097         .sload(gnd),
1098         .ena(vcc),
1099         .cin(gnd),
1100         .cin0(gnd),
1101         .cin1(vcc),
1102         .inverta(gnd),
1103         .regcascin(gnd),
1104         .devclrn(devclrn),
1105         .devpor(devpor),
1106         .combout(\inst|vga_driver_unit|un13_hsync_counter_7 ),
1107         .regout(),
1108         .cout(),
1109         .cout0(),
1110         .cout1());
1111 // synopsys translate_off
1112 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_7 .lut_mask = "8000";
1113 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_7 .operation_mode = "normal";
1114 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_7 .output_mode = "comb_only";
1115 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_7 .register_cascade_mode = "off";
1116 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_7 .sum_lutc_input = "datac";
1117 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_7 .synch_mode = "off";
1118 // synopsys translate_on
1119
1120 // atom is at LC_X52_Y41_N2
1121 stratix_lcell \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9 (
1122 // Equation(s):
1123 // \inst|vga_driver_unit|un9_hsync_counterlt9  = \inst|vga_driver_unit|un9_hsync_counterlt9_3  # !\inst|vga_driver_unit|un13_hsync_counter_7  # !\inst|vga_driver_unit|hsync_counter_9  # !\inst|vga_driver_unit|hsync_counter_8
1124
1125         .clk(gnd),
1126         .dataa(\inst|vga_driver_unit|hsync_counter_8 ),
1127         .datab(\inst|vga_driver_unit|hsync_counter_9 ),
1128         .datac(\inst|vga_driver_unit|un9_hsync_counterlt9_3 ),
1129         .datad(\inst|vga_driver_unit|un13_hsync_counter_7 ),
1130         .aclr(gnd),
1131         .aload(gnd),
1132         .sclr(gnd),
1133         .sload(gnd),
1134         .ena(vcc),
1135         .cin(gnd),
1136         .cin0(gnd),
1137         .cin1(vcc),
1138         .inverta(gnd),
1139         .regcascin(gnd),
1140         .devclrn(devclrn),
1141         .devpor(devpor),
1142         .combout(\inst|vga_driver_unit|un9_hsync_counterlt9 ),
1143         .regout(),
1144         .cout(),
1145         .cout0(),
1146         .cout1());
1147 // synopsys translate_off
1148 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9 .lut_mask = "f7ff";
1149 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9 .operation_mode = "normal";
1150 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9 .output_mode = "comb_only";
1151 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9 .register_cascade_mode = "off";
1152 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9 .sum_lutc_input = "datac";
1153 defparam \inst|vga_driver_unit|HSYNC_COUNT_next_un9_hsync_counterlt9 .synch_mode = "off";
1154 // synopsys translate_on
1155
1156 // atom is at LC_X52_Y41_N3
1157 stratix_lcell \inst|vga_driver_unit|G_2 (
1158 // Equation(s):
1159 // \inst|vga_driver_unit|G_2_i  = !\inst|vga_driver_unit|hsync_state_6  & !\inst|vga_driver_unit|un6_dly_counter_0_x  & !\inst|vga_driver_unit|hsync_state_0  # !\inst|vga_driver_unit|un9_hsync_counterlt9
1160
1161         .clk(gnd),
1162         .dataa(\inst|vga_driver_unit|hsync_state_6 ),
1163         .datab(\inst|vga_driver_unit|un6_dly_counter_0_x ),
1164         .datac(\inst|vga_driver_unit|hsync_state_0 ),
1165         .datad(\inst|vga_driver_unit|un9_hsync_counterlt9 ),
1166         .aclr(gnd),
1167         .aload(gnd),
1168         .sclr(gnd),
1169         .sload(gnd),
1170         .ena(vcc),
1171         .cin(gnd),
1172         .cin0(gnd),
1173         .cin1(vcc),
1174         .inverta(gnd),
1175         .regcascin(gnd),
1176         .devclrn(devclrn),
1177         .devpor(devpor),
1178         .combout(\inst|vga_driver_unit|G_2_i ),
1179         .regout(),
1180         .cout(),
1181         .cout0(),
1182         .cout1());
1183 // synopsys translate_off
1184 defparam \inst|vga_driver_unit|G_2 .lut_mask = "01ff";
1185 defparam \inst|vga_driver_unit|G_2 .operation_mode = "normal";
1186 defparam \inst|vga_driver_unit|G_2 .output_mode = "comb_only";
1187 defparam \inst|vga_driver_unit|G_2 .register_cascade_mode = "off";
1188 defparam \inst|vga_driver_unit|G_2 .sum_lutc_input = "datac";
1189 defparam \inst|vga_driver_unit|G_2 .synch_mode = "off";
1190 // synopsys translate_on
1191
1192 // atom is at LC_X52_Y42_N5
1193 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_4 (
1194 // Equation(s):
1195 // \inst|vga_driver_unit|un12_hsync_counter_4  = !\inst|vga_driver_unit|hsync_counter_7  & !\inst|vga_driver_unit|hsync_counter_3  & \inst|vga_driver_unit|hsync_counter_9  & !\inst|vga_driver_unit|hsync_counter_6
1196
1197         .clk(gnd),
1198         .dataa(\inst|vga_driver_unit|hsync_counter_7 ),
1199         .datab(\inst|vga_driver_unit|hsync_counter_3 ),
1200         .datac(\inst|vga_driver_unit|hsync_counter_9 ),
1201         .datad(\inst|vga_driver_unit|hsync_counter_6 ),
1202         .aclr(gnd),
1203         .aload(gnd),
1204         .sclr(gnd),
1205         .sload(gnd),
1206         .ena(vcc),
1207         .cin(gnd),
1208         .cin0(gnd),
1209         .cin1(vcc),
1210         .inverta(gnd),
1211         .regcascin(gnd),
1212         .devclrn(devclrn),
1213         .devpor(devpor),
1214         .combout(\inst|vga_driver_unit|un12_hsync_counter_4 ),
1215         .regout(),
1216         .cout(),
1217         .cout0(),
1218         .cout1());
1219 // synopsys translate_off
1220 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_4 .lut_mask = "0010";
1221 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_4 .operation_mode = "normal";
1222 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_4 .output_mode = "comb_only";
1223 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_4 .register_cascade_mode = "off";
1224 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_4 .sum_lutc_input = "datac";
1225 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_4 .synch_mode = "off";
1226 // synopsys translate_on
1227
1228 // atom is at LC_X52_Y42_N6
1229 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_3 (
1230 // Equation(s):
1231 // \inst|vga_driver_unit|un12_hsync_counter_3  = !\inst|vga_driver_unit|hsync_counter_5  & !\inst|vga_driver_unit|hsync_counter_4  & \inst|vga_driver_unit|hsync_counter_2  & \inst|vga_driver_unit|hsync_counter_8
1232
1233         .clk(gnd),
1234         .dataa(\inst|vga_driver_unit|hsync_counter_5 ),
1235         .datab(\inst|vga_driver_unit|hsync_counter_4 ),
1236         .datac(\inst|vga_driver_unit|hsync_counter_2 ),
1237         .datad(\inst|vga_driver_unit|hsync_counter_8 ),
1238         .aclr(gnd),
1239         .aload(gnd),
1240         .sclr(gnd),
1241         .sload(gnd),
1242         .ena(vcc),
1243         .cin(gnd),
1244         .cin0(gnd),
1245         .cin1(vcc),
1246         .inverta(gnd),
1247         .regcascin(gnd),
1248         .devclrn(devclrn),
1249         .devpor(devpor),
1250         .combout(\inst|vga_driver_unit|un12_hsync_counter_3 ),
1251         .regout(),
1252         .cout(),
1253         .cout0(),
1254         .cout1());
1255 // synopsys translate_off
1256 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_3 .lut_mask = "1000";
1257 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_3 .operation_mode = "normal";
1258 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_3 .output_mode = "comb_only";
1259 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_3 .register_cascade_mode = "off";
1260 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_3 .sum_lutc_input = "datac";
1261 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter_3 .synch_mode = "off";
1262 // synopsys translate_on
1263
1264 // atom is at LC_X52_Y41_N1
1265 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter (
1266 // Equation(s):
1267 // \inst|vga_driver_unit|un12_hsync_counter  = \inst|vga_driver_unit|hsync_counter_0  & \inst|vga_driver_unit|hsync_counter_1  & \inst|vga_driver_unit|un12_hsync_counter_4  & \inst|vga_driver_unit|un12_hsync_counter_3
1268
1269         .clk(gnd),
1270         .dataa(\inst|vga_driver_unit|hsync_counter_0 ),
1271         .datab(\inst|vga_driver_unit|hsync_counter_1 ),
1272         .datac(\inst|vga_driver_unit|un12_hsync_counter_4 ),
1273         .datad(\inst|vga_driver_unit|un12_hsync_counter_3 ),
1274         .aclr(gnd),
1275         .aload(gnd),
1276         .sclr(gnd),
1277         .sload(gnd),
1278         .ena(vcc),
1279         .cin(gnd),
1280         .cin0(gnd),
1281         .cin1(vcc),
1282         .inverta(gnd),
1283         .regcascin(gnd),
1284         .devclrn(devclrn),
1285         .devpor(devpor),
1286         .combout(\inst|vga_driver_unit|un12_hsync_counter ),
1287         .regout(),
1288         .cout(),
1289         .cout0(),
1290         .cout1());
1291 // synopsys translate_off
1292 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter .lut_mask = "8000";
1293 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter .operation_mode = "normal";
1294 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter .output_mode = "comb_only";
1295 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter .register_cascade_mode = "off";
1296 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter .sum_lutc_input = "datac";
1297 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un12_hsync_counter .synch_mode = "off";
1298 // synopsys translate_on
1299
1300 // atom is at LC_X52_Y42_N2
1301 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_1 (
1302 // Equation(s):
1303 // \inst|vga_driver_unit|un10_hsync_counter_1  = !\inst|vga_driver_unit|hsync_counter_5  & (!\inst|vga_driver_unit|hsync_counter_9  & !\inst|vga_driver_unit|hsync_counter_8 )
1304
1305         .clk(gnd),
1306         .dataa(\inst|vga_driver_unit|hsync_counter_5 ),
1307         .datab(vcc),
1308         .datac(\inst|vga_driver_unit|hsync_counter_9 ),
1309         .datad(\inst|vga_driver_unit|hsync_counter_8 ),
1310         .aclr(gnd),
1311         .aload(gnd),
1312         .sclr(gnd),
1313         .sload(gnd),
1314         .ena(vcc),
1315         .cin(gnd),
1316         .cin0(gnd),
1317         .cin1(vcc),
1318         .inverta(gnd),
1319         .regcascin(gnd),
1320         .devclrn(devclrn),
1321         .devpor(devpor),
1322         .combout(\inst|vga_driver_unit|un10_hsync_counter_1 ),
1323         .regout(),
1324         .cout(),
1325         .cout0(),
1326         .cout1());
1327 // synopsys translate_off
1328 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_1 .lut_mask = "0005";
1329 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_1 .operation_mode = "normal";
1330 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_1 .output_mode = "comb_only";
1331 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_1 .register_cascade_mode = "off";
1332 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_1 .sum_lutc_input = "datac";
1333 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_1 .synch_mode = "off";
1334 // synopsys translate_on
1335
1336 // atom is at LC_X52_Y42_N0
1337 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_2 (
1338 // Equation(s):
1339 // \inst|vga_driver_unit|un11_hsync_counter_2  = \inst|vga_driver_unit|hsync_counter_7  & \inst|vga_driver_unit|hsync_counter_2  & (!\inst|vga_driver_unit|hsync_counter_6 )
1340
1341         .clk(gnd),
1342         .dataa(\inst|vga_driver_unit|hsync_counter_7 ),
1343         .datab(\inst|vga_driver_unit|hsync_counter_2 ),
1344         .datac(vcc),
1345         .datad(\inst|vga_driver_unit|hsync_counter_6 ),
1346         .aclr(gnd),
1347         .aload(gnd),
1348         .sclr(gnd),
1349         .sload(gnd),
1350         .ena(vcc),
1351         .cin(gnd),
1352         .cin0(gnd),
1353         .cin1(vcc),
1354         .inverta(gnd),
1355         .regcascin(gnd),
1356         .devclrn(devclrn),
1357         .devpor(devpor),
1358         .combout(\inst|vga_driver_unit|un11_hsync_counter_2 ),
1359         .regout(),
1360         .cout(),
1361         .cout0(),
1362         .cout1());
1363 // synopsys translate_off
1364 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_2 .lut_mask = "0088";
1365 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_2 .operation_mode = "normal";
1366 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_2 .output_mode = "comb_only";
1367 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_2 .register_cascade_mode = "off";
1368 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_2 .sum_lutc_input = "datac";
1369 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_2 .synch_mode = "off";
1370 // synopsys translate_on
1371
1372 // atom is at LC_X52_Y42_N4
1373 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_3 (
1374 // Equation(s):
1375 // \inst|vga_driver_unit|un11_hsync_counter_3  = \inst|vga_driver_unit|hsync_counter_0  & !\inst|vga_driver_unit|hsync_counter_4  & !\inst|vga_driver_unit|hsync_counter_3  & \inst|vga_driver_unit|hsync_counter_1
1376
1377         .clk(gnd),
1378         .dataa(\inst|vga_driver_unit|hsync_counter_0 ),
1379         .datab(\inst|vga_driver_unit|hsync_counter_4 ),
1380         .datac(\inst|vga_driver_unit|hsync_counter_3 ),
1381         .datad(\inst|vga_driver_unit|hsync_counter_1 ),
1382         .aclr(gnd),
1383         .aload(gnd),
1384         .sclr(gnd),
1385         .sload(gnd),
1386         .ena(vcc),
1387         .cin(gnd),
1388         .cin0(gnd),
1389         .cin1(vcc),
1390         .inverta(gnd),
1391         .regcascin(gnd),
1392         .devclrn(devclrn),
1393         .devpor(devpor),
1394         .combout(\inst|vga_driver_unit|un11_hsync_counter_3 ),
1395         .regout(),
1396         .cout(),
1397         .cout0(),
1398         .cout1());
1399 // synopsys translate_off
1400 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_3 .lut_mask = "0200";
1401 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_3 .operation_mode = "normal";
1402 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_3 .output_mode = "comb_only";
1403 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_3 .register_cascade_mode = "off";
1404 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_3 .sum_lutc_input = "datac";
1405 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un11_hsync_counter_3 .synch_mode = "off";
1406 // synopsys translate_on
1407
1408 // atom is at LC_X52_Y42_N1
1409 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_3 (
1410 // Equation(s):
1411 // \inst|vga_driver_unit|un10_hsync_counter_3  = !\inst|vga_driver_unit|hsync_counter_7  & !\inst|vga_driver_unit|hsync_counter_2  & (!\inst|vga_driver_unit|hsync_counter_0 )
1412
1413         .clk(gnd),
1414         .dataa(\inst|vga_driver_unit|hsync_counter_7 ),
1415         .datab(\inst|vga_driver_unit|hsync_counter_2 ),
1416         .datac(vcc),
1417         .datad(\inst|vga_driver_unit|hsync_counter_0 ),
1418         .aclr(gnd),
1419         .aload(gnd),
1420         .sclr(gnd),
1421         .sload(gnd),
1422         .ena(vcc),
1423         .cin(gnd),
1424         .cin0(gnd),
1425         .cin1(vcc),
1426         .inverta(gnd),
1427         .regcascin(gnd),
1428         .devclrn(devclrn),
1429         .devpor(devpor),
1430         .combout(\inst|vga_driver_unit|un10_hsync_counter_3 ),
1431         .regout(),
1432         .cout(),
1433         .cout0(),
1434         .cout1());
1435 // synopsys translate_off
1436 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_3 .lut_mask = "0011";
1437 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_3 .operation_mode = "normal";
1438 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_3 .output_mode = "comb_only";
1439 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_3 .register_cascade_mode = "off";
1440 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_3 .sum_lutc_input = "datac";
1441 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_3 .synch_mode = "off";
1442 // synopsys translate_on
1443
1444 // atom is at LC_X42_Y42_N2
1445 stratix_lcell \inst|vga_driver_unit|hsync_state_5_ (
1446 // Equation(s):
1447 // \inst|vga_driver_unit|hsync_state_5  = DFFEAS(\inst|vga_driver_unit|hsync_state_6  # \inst|vga_driver_unit|hsync_state_0 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 , , ,
1448 // \inst|vga_driver_unit|un6_dly_counter_0_x , )
1449
1450         .clk(\inst1|altpll_component|_clk0 ),
1451         .dataa(\inst|vga_driver_unit|hsync_state_6 ),
1452         .datab(vcc),
1453         .datac(vcc),
1454         .datad(\inst|vga_driver_unit|hsync_state_0 ),
1455         .aclr(gnd),
1456         .aload(gnd),
1457         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
1458         .sload(gnd),
1459         .ena(\inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 ),
1460         .cin(gnd),
1461         .cin0(gnd),
1462         .cin1(vcc),
1463         .inverta(gnd),
1464         .regcascin(gnd),
1465         .devclrn(devclrn),
1466         .devpor(devpor),
1467         .combout(),
1468         .regout(\inst|vga_driver_unit|hsync_state_5 ),
1469         .cout(),
1470         .cout0(),
1471         .cout1());
1472 // synopsys translate_off
1473 defparam \inst|vga_driver_unit|hsync_state_5_ .lut_mask = "ffaa";
1474 defparam \inst|vga_driver_unit|hsync_state_5_ .operation_mode = "normal";
1475 defparam \inst|vga_driver_unit|hsync_state_5_ .output_mode = "reg_only";
1476 defparam \inst|vga_driver_unit|hsync_state_5_ .register_cascade_mode = "off";
1477 defparam \inst|vga_driver_unit|hsync_state_5_ .sum_lutc_input = "datac";
1478 defparam \inst|vga_driver_unit|hsync_state_5_ .synch_mode = "on";
1479 // synopsys translate_on
1480
1481 // atom is at LC_X52_Y41_N8
1482 stratix_lcell \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1_cZ (
1483 // Equation(s):
1484 // \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1  = \inst|vga_driver_unit|hsync_state_5  & (!\inst|vga_driver_unit|un10_hsync_counter_1  # !\inst|vga_driver_unit|un10_hsync_counter_3  # !\inst|vga_driver_unit|un10_hsync_counter_4 )
1485
1486         .clk(gnd),
1487         .dataa(\inst|vga_driver_unit|un10_hsync_counter_4 ),
1488         .datab(\inst|vga_driver_unit|un10_hsync_counter_3 ),
1489         .datac(\inst|vga_driver_unit|hsync_state_5 ),
1490         .datad(\inst|vga_driver_unit|un10_hsync_counter_1 ),
1491         .aclr(gnd),
1492         .aload(gnd),
1493         .sclr(gnd),
1494         .sload(gnd),
1495         .ena(vcc),
1496         .cin(gnd),
1497         .cin0(gnd),
1498         .cin1(vcc),
1499         .inverta(gnd),
1500         .regcascin(gnd),
1501         .devclrn(devclrn),
1502         .devpor(devpor),
1503         .combout(\inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1 ),
1504         .regout(),
1505         .cout(),
1506         .cout0(),
1507         .cout1());
1508 // synopsys translate_off
1509 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1_cZ .lut_mask = "70f0";
1510 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1_cZ .operation_mode = "normal";
1511 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1_cZ .output_mode = "comb_only";
1512 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1_cZ .register_cascade_mode = "off";
1513 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1_cZ .sum_lutc_input = "datac";
1514 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1_cZ .synch_mode = "off";
1515 // synopsys translate_on
1516
1517 // atom is at LC_X52_Y41_N7
1518 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_2 (
1519 // Equation(s):
1520 // \inst|vga_driver_unit|un13_hsync_counter_2  = \inst|vga_driver_unit|hsync_counter_4  & \inst|vga_driver_unit|hsync_counter_8  & !\inst|vga_driver_unit|hsync_counter_5  & \inst|vga_driver_unit|hsync_counter_9
1521
1522         .clk(gnd),
1523         .dataa(\inst|vga_driver_unit|hsync_counter_4 ),
1524         .datab(\inst|vga_driver_unit|hsync_counter_8 ),
1525         .datac(\inst|vga_driver_unit|hsync_counter_5 ),
1526         .datad(\inst|vga_driver_unit|hsync_counter_9 ),
1527         .aclr(gnd),
1528         .aload(gnd),
1529         .sclr(gnd),
1530         .sload(gnd),
1531         .ena(vcc),
1532         .cin(gnd),
1533         .cin0(gnd),
1534         .cin1(vcc),
1535         .inverta(gnd),
1536         .regcascin(gnd),
1537         .devclrn(devclrn),
1538         .devpor(devpor),
1539         .combout(\inst|vga_driver_unit|un13_hsync_counter_2 ),
1540         .regout(),
1541         .cout(),
1542         .cout0(),
1543         .cout1());
1544 // synopsys translate_off
1545 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_2 .lut_mask = "0800";
1546 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_2 .operation_mode = "normal";
1547 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_2 .output_mode = "comb_only";
1548 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_2 .register_cascade_mode = "off";
1549 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_2 .sum_lutc_input = "datac";
1550 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter_2 .synch_mode = "off";
1551 // synopsys translate_on
1552
1553 // atom is at LC_X52_Y41_N4
1554 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter (
1555 // Equation(s):
1556 // \inst|vga_driver_unit|un13_hsync_counter  = \inst|vga_driver_unit|un13_hsync_counter_2  & \inst|vga_driver_unit|un13_hsync_counter_7  & !\inst|vga_driver_unit|hsync_counter_6  & !\inst|vga_driver_unit|hsync_counter_7
1557
1558         .clk(gnd),
1559         .dataa(\inst|vga_driver_unit|un13_hsync_counter_2 ),
1560         .datab(\inst|vga_driver_unit|un13_hsync_counter_7 ),
1561         .datac(\inst|vga_driver_unit|hsync_counter_6 ),
1562         .datad(\inst|vga_driver_unit|hsync_counter_7 ),
1563         .aclr(gnd),
1564         .aload(gnd),
1565         .sclr(gnd),
1566         .sload(gnd),
1567         .ena(vcc),
1568         .cin(gnd),
1569         .cin0(gnd),
1570         .cin1(vcc),
1571         .inverta(gnd),
1572         .regcascin(gnd),
1573         .devclrn(devclrn),
1574         .devpor(devpor),
1575         .combout(\inst|vga_driver_unit|un13_hsync_counter ),
1576         .regout(),
1577         .cout(),
1578         .cout0(),
1579         .cout1());
1580 // synopsys translate_off
1581 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter .lut_mask = "0008";
1582 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter .operation_mode = "normal";
1583 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter .output_mode = "comb_only";
1584 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter .register_cascade_mode = "off";
1585 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter .sum_lutc_input = "datac";
1586 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un13_hsync_counter .synch_mode = "off";
1587 // synopsys translate_on
1588
1589 // atom is at LC_X52_Y41_N0
1590 stratix_lcell \inst|vga_driver_unit|hsync_state_3_ (
1591 // Equation(s):
1592 // \inst|vga_driver_unit|un1_hsync_state_next_1_sqmuxa_0  = \inst|vga_driver_unit|hsync_state_2  & (!\inst|vga_driver_unit|un12_hsync_counter  & E1_hsync_state_3 # !\inst|vga_driver_unit|un13_hsync_counter ) # !\inst|vga_driver_unit|hsync_state_2  &
1593 // !\inst|vga_driver_unit|un12_hsync_counter  & E1_hsync_state_3
1594 // \inst|vga_driver_unit|hsync_state_3  = DFFEAS(\inst|vga_driver_unit|un1_hsync_state_next_1_sqmuxa_0 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 , \inst|vga_driver_unit|hsync_state_1 , ,
1595 // \inst|vga_driver_unit|un6_dly_counter_0_x , VCC)
1596
1597         .clk(\inst1|altpll_component|_clk0 ),
1598         .dataa(\inst|vga_driver_unit|hsync_state_2 ),
1599         .datab(\inst|vga_driver_unit|un12_hsync_counter ),
1600         .datac(\inst|vga_driver_unit|hsync_state_1 ),
1601         .datad(\inst|vga_driver_unit|un13_hsync_counter ),
1602         .aclr(gnd),
1603         .aload(gnd),
1604         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
1605         .sload(vcc),
1606         .ena(\inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 ),
1607         .cin(gnd),
1608         .cin0(gnd),
1609         .cin1(vcc),
1610         .inverta(gnd),
1611         .regcascin(gnd),
1612         .devclrn(devclrn),
1613         .devpor(devpor),
1614         .combout(\inst|vga_driver_unit|un1_hsync_state_next_1_sqmuxa_0 ),
1615         .regout(\inst|vga_driver_unit|hsync_state_3 ),
1616         .cout(),
1617         .cout0(),
1618         .cout1());
1619 // synopsys translate_off
1620 defparam \inst|vga_driver_unit|hsync_state_3_ .lut_mask = "30ba";
1621 defparam \inst|vga_driver_unit|hsync_state_3_ .operation_mode = "normal";
1622 defparam \inst|vga_driver_unit|hsync_state_3_ .output_mode = "reg_and_comb";
1623 defparam \inst|vga_driver_unit|hsync_state_3_ .register_cascade_mode = "off";
1624 defparam \inst|vga_driver_unit|hsync_state_3_ .sum_lutc_input = "qfbk";
1625 defparam \inst|vga_driver_unit|hsync_state_3_ .synch_mode = "on";
1626 // synopsys translate_on
1627
1628 // atom is at LC_X52_Y42_N3
1629 stratix_lcell \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2_cZ (
1630 // Equation(s):
1631 // \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2  = \inst|vga_driver_unit|hsync_state_4  & (!\inst|vga_driver_unit|un11_hsync_counter_3  # !\inst|vga_driver_unit|un11_hsync_counter_2  # !\inst|vga_driver_unit|un10_hsync_counter_1 )
1632
1633         .clk(gnd),
1634         .dataa(\inst|vga_driver_unit|un10_hsync_counter_1 ),
1635         .datab(\inst|vga_driver_unit|un11_hsync_counter_2 ),
1636         .datac(\inst|vga_driver_unit|un11_hsync_counter_3 ),
1637         .datad(\inst|vga_driver_unit|hsync_state_4 ),
1638         .aclr(gnd),
1639         .aload(gnd),
1640         .sclr(gnd),
1641         .sload(gnd),
1642         .ena(vcc),
1643         .cin(gnd),
1644         .cin0(gnd),
1645         .cin1(vcc),
1646         .inverta(gnd),
1647         .regcascin(gnd),
1648         .devclrn(devclrn),
1649         .devpor(devpor),
1650         .combout(\inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2 ),
1651         .regout(),
1652         .cout(),
1653         .cout0(),
1654         .cout1());
1655 // synopsys translate_off
1656 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2_cZ .lut_mask = "7f00";
1657 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2_cZ .operation_mode = "normal";
1658 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2_cZ .output_mode = "comb_only";
1659 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2_cZ .register_cascade_mode = "off";
1660 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2_cZ .sum_lutc_input = "datac";
1661 defparam \inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2_cZ .synch_mode = "off";
1662 // synopsys translate_on
1663
1664 // atom is at LC_X52_Y41_N9
1665 stratix_lcell \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0_cZ (
1666 // Equation(s):
1667 // \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0  = \inst|vga_driver_unit|un6_dly_counter_0_x  # !\inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1  & !\inst|vga_driver_unit|un1_hsync_state_next_1_sqmuxa_0  &
1668 // !\inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2
1669
1670         .clk(gnd),
1671         .dataa(\inst|vga_driver_unit|hsync_state_next_1_sqmuxa_1 ),
1672         .datab(\inst|vga_driver_unit|un1_hsync_state_next_1_sqmuxa_0 ),
1673         .datac(\inst|vga_driver_unit|un6_dly_counter_0_x ),
1674         .datad(\inst|vga_driver_unit|hsync_state_next_1_sqmuxa_2 ),
1675         .aclr(gnd),
1676         .aload(gnd),
1677         .sclr(gnd),
1678         .sload(gnd),
1679         .ena(vcc),
1680         .cin(gnd),
1681         .cin0(gnd),
1682         .cin1(vcc),
1683         .inverta(gnd),
1684         .regcascin(gnd),
1685         .devclrn(devclrn),
1686         .devpor(devpor),
1687         .combout(\inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 ),
1688         .regout(),
1689         .cout(),
1690         .cout0(),
1691         .cout1());
1692 // synopsys translate_off
1693 defparam \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0_cZ .lut_mask = "f0f1";
1694 defparam \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0_cZ .operation_mode = "normal";
1695 defparam \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0_cZ .output_mode = "comb_only";
1696 defparam \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0_cZ .register_cascade_mode = "off";
1697 defparam \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0_cZ .sum_lutc_input = "datac";
1698 defparam \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0_cZ .synch_mode = "off";
1699 // synopsys translate_on
1700
1701 // atom is at LC_X52_Y42_N9
1702 stratix_lcell \inst|vga_driver_unit|hsync_state_1_ (
1703 // Equation(s):
1704 // \inst|vga_driver_unit|hsync_state_1  = DFFEAS(\inst|vga_driver_unit|un10_hsync_counter_1  & \inst|vga_driver_unit|un11_hsync_counter_2  & \inst|vga_driver_unit|un11_hsync_counter_3  & \inst|vga_driver_unit|hsync_state_4 ,
1705 // GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 , , , \inst|vga_driver_unit|un6_dly_counter_0_x , )
1706
1707         .clk(\inst1|altpll_component|_clk0 ),
1708         .dataa(\inst|vga_driver_unit|un10_hsync_counter_1 ),
1709         .datab(\inst|vga_driver_unit|un11_hsync_counter_2 ),
1710         .datac(\inst|vga_driver_unit|un11_hsync_counter_3 ),
1711         .datad(\inst|vga_driver_unit|hsync_state_4 ),
1712         .aclr(gnd),
1713         .aload(gnd),
1714         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
1715         .sload(gnd),
1716         .ena(\inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 ),
1717         .cin(gnd),
1718         .cin0(gnd),
1719         .cin1(vcc),
1720         .inverta(gnd),
1721         .regcascin(gnd),
1722         .devclrn(devclrn),
1723         .devpor(devpor),
1724         .combout(),
1725         .regout(\inst|vga_driver_unit|hsync_state_1 ),
1726         .cout(),
1727         .cout0(),
1728         .cout1());
1729 // synopsys translate_off
1730 defparam \inst|vga_driver_unit|hsync_state_1_ .lut_mask = "8000";
1731 defparam \inst|vga_driver_unit|hsync_state_1_ .operation_mode = "normal";
1732 defparam \inst|vga_driver_unit|hsync_state_1_ .output_mode = "reg_only";
1733 defparam \inst|vga_driver_unit|hsync_state_1_ .register_cascade_mode = "off";
1734 defparam \inst|vga_driver_unit|hsync_state_1_ .sum_lutc_input = "datac";
1735 defparam \inst|vga_driver_unit|hsync_state_1_ .synch_mode = "on";
1736 // synopsys translate_on
1737
1738 // atom is at LC_X42_Y42_N5
1739 stratix_lcell \inst|vga_driver_unit|hsync_state_2_ (
1740 // Equation(s):
1741 // \inst|vga_driver_unit|hsync_state_2  = DFFEAS(\inst|vga_driver_unit|un12_hsync_counter  & (\inst|vga_driver_unit|hsync_state_3 ), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 , , ,
1742 // \inst|vga_driver_unit|un6_dly_counter_0_x , )
1743
1744         .clk(\inst1|altpll_component|_clk0 ),
1745         .dataa(\inst|vga_driver_unit|un12_hsync_counter ),
1746         .datab(vcc),
1747         .datac(vcc),
1748         .datad(\inst|vga_driver_unit|hsync_state_3 ),
1749         .aclr(gnd),
1750         .aload(gnd),
1751         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
1752         .sload(gnd),
1753         .ena(\inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 ),
1754         .cin(gnd),
1755         .cin0(gnd),
1756         .cin1(vcc),
1757         .inverta(gnd),
1758         .regcascin(gnd),
1759         .devclrn(devclrn),
1760         .devpor(devpor),
1761         .combout(),
1762         .regout(\inst|vga_driver_unit|hsync_state_2 ),
1763         .cout(),
1764         .cout0(),
1765         .cout1());
1766 // synopsys translate_off
1767 defparam \inst|vga_driver_unit|hsync_state_2_ .lut_mask = "aa00";
1768 defparam \inst|vga_driver_unit|hsync_state_2_ .operation_mode = "normal";
1769 defparam \inst|vga_driver_unit|hsync_state_2_ .output_mode = "reg_only";
1770 defparam \inst|vga_driver_unit|hsync_state_2_ .register_cascade_mode = "off";
1771 defparam \inst|vga_driver_unit|hsync_state_2_ .sum_lutc_input = "datac";
1772 defparam \inst|vga_driver_unit|hsync_state_2_ .synch_mode = "on";
1773 // synopsys translate_on
1774
1775 // atom is at LC_X42_Y42_N9
1776 stratix_lcell \inst|vga_driver_unit|hsync_state_0_ (
1777 // Equation(s):
1778 // \inst|vga_driver_unit|hsync_state_0  = DFFEAS(\inst|vga_driver_unit|hsync_state_2  & \inst|vga_driver_unit|un13_hsync_counter , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 , , ,
1779 // \inst|vga_driver_unit|un6_dly_counter_0_x , )
1780
1781         .clk(\inst1|altpll_component|_clk0 ),
1782         .dataa(vcc),
1783         .datab(vcc),
1784         .datac(\inst|vga_driver_unit|hsync_state_2 ),
1785         .datad(\inst|vga_driver_unit|un13_hsync_counter ),
1786         .aclr(gnd),
1787         .aload(gnd),
1788         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
1789         .sload(gnd),
1790         .ena(\inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 ),
1791         .cin(gnd),
1792         .cin0(gnd),
1793         .cin1(vcc),
1794         .inverta(gnd),
1795         .regcascin(gnd),
1796         .devclrn(devclrn),
1797         .devpor(devpor),
1798         .combout(),
1799         .regout(\inst|vga_driver_unit|hsync_state_0 ),
1800         .cout(),
1801         .cout0(),
1802         .cout1());
1803 // synopsys translate_off
1804 defparam \inst|vga_driver_unit|hsync_state_0_ .lut_mask = "f000";
1805 defparam \inst|vga_driver_unit|hsync_state_0_ .operation_mode = "normal";
1806 defparam \inst|vga_driver_unit|hsync_state_0_ .output_mode = "reg_only";
1807 defparam \inst|vga_driver_unit|hsync_state_0_ .register_cascade_mode = "off";
1808 defparam \inst|vga_driver_unit|hsync_state_0_ .sum_lutc_input = "datac";
1809 defparam \inst|vga_driver_unit|hsync_state_0_ .synch_mode = "on";
1810 // synopsys translate_on
1811
1812 // atom is at LC_X42_Y42_N8
1813 stratix_lcell \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa_cZ (
1814 // Equation(s):
1815 // \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa  = !\inst|vga_driver_unit|d_set_hsync_counter  & \inst|dly_counter [1] & \reset~combout  & \inst|dly_counter [0]
1816
1817         .clk(gnd),
1818         .dataa(\inst|vga_driver_unit|d_set_hsync_counter ),
1819         .datab(\inst|dly_counter [1]),
1820         .datac(\reset~combout ),
1821         .datad(\inst|dly_counter [0]),
1822         .aclr(gnd),
1823         .aload(gnd),
1824         .sclr(gnd),
1825         .sload(gnd),
1826         .ena(vcc),
1827         .cin(gnd),
1828         .cin0(gnd),
1829         .cin1(vcc),
1830         .inverta(gnd),
1831         .regcascin(gnd),
1832         .devclrn(devclrn),
1833         .devpor(devpor),
1834         .combout(\inst|vga_driver_unit|hsync_counter_next_1_sqmuxa ),
1835         .regout(),
1836         .cout(),
1837         .cout0(),
1838         .cout1());
1839 // synopsys translate_off
1840 defparam \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa_cZ .lut_mask = "4000";
1841 defparam \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa_cZ .operation_mode = "normal";
1842 defparam \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa_cZ .output_mode = "comb_only";
1843 defparam \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa_cZ .register_cascade_mode = "off";
1844 defparam \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa_cZ .sum_lutc_input = "datac";
1845 defparam \inst|vga_driver_unit|hsync_counter_next_1_sqmuxa_cZ .synch_mode = "off";
1846 // synopsys translate_on
1847
1848 // atom is at LC_X52_Y42_N7
1849 stratix_lcell \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_4 (
1850 // Equation(s):
1851 // \inst|vga_driver_unit|un10_hsync_counter_4  = \inst|vga_driver_unit|hsync_counter_1  & \inst|vga_driver_unit|hsync_counter_4  & \inst|vga_driver_unit|hsync_counter_3  & \inst|vga_driver_unit|hsync_counter_6
1852
1853         .clk(gnd),
1854         .dataa(\inst|vga_driver_unit|hsync_counter_1 ),
1855         .datab(\inst|vga_driver_unit|hsync_counter_4 ),
1856         .datac(\inst|vga_driver_unit|hsync_counter_3 ),
1857         .datad(\inst|vga_driver_unit|hsync_counter_6 ),
1858         .aclr(gnd),
1859         .aload(gnd),
1860         .sclr(gnd),
1861         .sload(gnd),
1862         .ena(vcc),
1863         .cin(gnd),
1864         .cin0(gnd),
1865         .cin1(vcc),
1866         .inverta(gnd),
1867         .regcascin(gnd),
1868         .devclrn(devclrn),
1869         .devpor(devpor),
1870         .combout(\inst|vga_driver_unit|un10_hsync_counter_4 ),
1871         .regout(),
1872         .cout(),
1873         .cout0(),
1874         .cout1());
1875 // synopsys translate_off
1876 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_4 .lut_mask = "8000";
1877 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_4 .operation_mode = "normal";
1878 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_4 .output_mode = "comb_only";
1879 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_4 .register_cascade_mode = "off";
1880 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_4 .sum_lutc_input = "datac";
1881 defparam \inst|vga_driver_unit|HSYNC_FSM_next_un10_hsync_counter_4 .synch_mode = "off";
1882 // synopsys translate_on
1883
1884 // atom is at LC_X52_Y42_N8
1885 stratix_lcell \inst|vga_driver_unit|hsync_state_4_ (
1886 // Equation(s):
1887 // \inst|vga_driver_unit|hsync_state_4  = DFFEAS(\inst|vga_driver_unit|un10_hsync_counter_4  & \inst|vga_driver_unit|hsync_state_5  & \inst|vga_driver_unit|un10_hsync_counter_3  & \inst|vga_driver_unit|un10_hsync_counter_1 ,
1888 // GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 , , , \inst|vga_driver_unit|un6_dly_counter_0_x , )
1889
1890         .clk(\inst1|altpll_component|_clk0 ),
1891         .dataa(\inst|vga_driver_unit|un10_hsync_counter_4 ),
1892         .datab(\inst|vga_driver_unit|hsync_state_5 ),
1893         .datac(\inst|vga_driver_unit|un10_hsync_counter_3 ),
1894         .datad(\inst|vga_driver_unit|un10_hsync_counter_1 ),
1895         .aclr(gnd),
1896         .aload(gnd),
1897         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
1898         .sload(gnd),
1899         .ena(\inst|vga_driver_unit|hsync_state_3_0_0_0__g0_0 ),
1900         .cin(gnd),
1901         .cin0(gnd),
1902         .cin1(vcc),
1903         .inverta(gnd),
1904         .regcascin(gnd),
1905         .devclrn(devclrn),
1906         .devpor(devpor),
1907         .combout(),
1908         .regout(\inst|vga_driver_unit|hsync_state_4 ),
1909         .cout(),
1910         .cout0(),
1911         .cout1());
1912 // synopsys translate_off
1913 defparam \inst|vga_driver_unit|hsync_state_4_ .lut_mask = "8000";
1914 defparam \inst|vga_driver_unit|hsync_state_4_ .operation_mode = "normal";
1915 defparam \inst|vga_driver_unit|hsync_state_4_ .output_mode = "reg_only";
1916 defparam \inst|vga_driver_unit|hsync_state_4_ .register_cascade_mode = "off";
1917 defparam \inst|vga_driver_unit|hsync_state_4_ .sum_lutc_input = "datac";
1918 defparam \inst|vga_driver_unit|hsync_state_4_ .synch_mode = "on";
1919 // synopsys translate_on
1920
1921 // atom is at LC_X42_Y42_N3
1922 stratix_lcell \inst|vga_driver_unit|un1_hsync_state_3_0_cZ (
1923 // Equation(s):
1924 // \inst|vga_driver_unit|un1_hsync_state_3_0  = \inst|vga_driver_unit|hsync_state_1  # \inst|vga_driver_unit|hsync_state_3
1925
1926         .clk(gnd),
1927         .dataa(vcc),
1928         .datab(vcc),
1929         .datac(\inst|vga_driver_unit|hsync_state_1 ),
1930         .datad(\inst|vga_driver_unit|hsync_state_3 ),
1931         .aclr(gnd),
1932         .aload(gnd),
1933         .sclr(gnd),
1934         .sload(gnd),
1935         .ena(vcc),
1936         .cin(gnd),
1937         .cin0(gnd),
1938         .cin1(vcc),
1939         .inverta(gnd),
1940         .regcascin(gnd),
1941         .devclrn(devclrn),
1942         .devpor(devpor),
1943         .combout(\inst|vga_driver_unit|un1_hsync_state_3_0 ),
1944         .regout(),
1945         .cout(),
1946         .cout0(),
1947         .cout1());
1948 // synopsys translate_off
1949 defparam \inst|vga_driver_unit|un1_hsync_state_3_0_cZ .lut_mask = "fff0";
1950 defparam \inst|vga_driver_unit|un1_hsync_state_3_0_cZ .operation_mode = "normal";
1951 defparam \inst|vga_driver_unit|un1_hsync_state_3_0_cZ .output_mode = "comb_only";
1952 defparam \inst|vga_driver_unit|un1_hsync_state_3_0_cZ .register_cascade_mode = "off";
1953 defparam \inst|vga_driver_unit|un1_hsync_state_3_0_cZ .sum_lutc_input = "datac";
1954 defparam \inst|vga_driver_unit|un1_hsync_state_3_0_cZ .synch_mode = "off";
1955 // synopsys translate_on
1956
1957 // atom is at LC_X42_Y42_N4
1958 stratix_lcell \inst|vga_driver_unit|h_sync_1_0_0_0_g1_cZ (
1959 // Equation(s):
1960 // \inst|vga_driver_unit|h_sync_1_0_0_0_g1  = \inst|vga_driver_unit|hsync_state_2  & \inst|vga_driver_unit|h_sync  # !\inst|vga_driver_unit|hsync_state_2  & (\inst|vga_driver_unit|un1_hsync_state_3_0  & \inst|vga_driver_unit|h_sync  #
1961 // !\inst|vga_driver_unit|un1_hsync_state_3_0  & (\inst|vga_driver_unit|hsync_state_4 ))
1962
1963         .clk(gnd),
1964         .dataa(\inst|vga_driver_unit|h_sync ),
1965         .datab(\inst|vga_driver_unit|hsync_state_4 ),
1966         .datac(\inst|vga_driver_unit|hsync_state_2 ),
1967         .datad(\inst|vga_driver_unit|un1_hsync_state_3_0 ),
1968         .aclr(gnd),
1969         .aload(gnd),
1970         .sclr(gnd),
1971         .sload(gnd),
1972         .ena(vcc),
1973         .cin(gnd),
1974         .cin0(gnd),
1975         .cin1(vcc),
1976         .inverta(gnd),
1977         .regcascin(gnd),
1978         .devclrn(devclrn),
1979         .devpor(devpor),
1980         .combout(\inst|vga_driver_unit|h_sync_1_0_0_0_g1 ),
1981         .regout(),
1982         .cout(),
1983         .cout0(),
1984         .cout1());
1985 // synopsys translate_off
1986 defparam \inst|vga_driver_unit|h_sync_1_0_0_0_g1_cZ .lut_mask = "aaac";
1987 defparam \inst|vga_driver_unit|h_sync_1_0_0_0_g1_cZ .operation_mode = "normal";
1988 defparam \inst|vga_driver_unit|h_sync_1_0_0_0_g1_cZ .output_mode = "comb_only";
1989 defparam \inst|vga_driver_unit|h_sync_1_0_0_0_g1_cZ .register_cascade_mode = "off";
1990 defparam \inst|vga_driver_unit|h_sync_1_0_0_0_g1_cZ .sum_lutc_input = "datac";
1991 defparam \inst|vga_driver_unit|h_sync_1_0_0_0_g1_cZ .synch_mode = "off";
1992 // synopsys translate_on
1993
1994 // atom is at LC_X42_Y42_N6
1995 stratix_lcell \inst|vga_driver_unit|h_sync_Z (
1996 // Equation(s):
1997 // \inst|vga_driver_unit|h_sync  = DFFEAS(\inst|vga_driver_unit|h_sync_1_0_0_0_g1  # !\inst|dly_counter [0] # !\reset~combout  # !\inst|dly_counter [1], GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , , , )
1998
1999         .clk(\inst1|altpll_component|_clk0 ),
2000         .dataa(\inst|vga_driver_unit|h_sync_1_0_0_0_g1 ),
2001         .datab(\inst|dly_counter [1]),
2002         .datac(\reset~combout ),
2003         .datad(\inst|dly_counter [0]),
2004         .aclr(gnd),
2005         .aload(gnd),
2006         .sclr(gnd),
2007         .sload(gnd),
2008         .ena(vcc),
2009         .cin(gnd),
2010         .cin0(gnd),
2011         .cin1(vcc),
2012         .inverta(gnd),
2013         .regcascin(gnd),
2014         .devclrn(devclrn),
2015         .devpor(devpor),
2016         .combout(),
2017         .regout(\inst|vga_driver_unit|h_sync ),
2018         .cout(),
2019         .cout0(),
2020         .cout1());
2021 // synopsys translate_off
2022 defparam \inst|vga_driver_unit|h_sync_Z .lut_mask = "bfff";
2023 defparam \inst|vga_driver_unit|h_sync_Z .operation_mode = "normal";
2024 defparam \inst|vga_driver_unit|h_sync_Z .output_mode = "reg_only";
2025 defparam \inst|vga_driver_unit|h_sync_Z .register_cascade_mode = "off";
2026 defparam \inst|vga_driver_unit|h_sync_Z .sum_lutc_input = "datac";
2027 defparam \inst|vga_driver_unit|h_sync_Z .synch_mode = "off";
2028 // synopsys translate_on
2029
2030 // atom is at LC_X29_Y38_N0
2031 stratix_lcell \inst|vga_driver_unit|vsync_counter_0_ (
2032 // Equation(s):
2033 // \inst|vga_driver_unit|vsync_counter_0  = DFFEAS(\inst|vga_driver_unit|d_set_hsync_counter  $ \inst|vga_driver_unit|vsync_counter_0 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , ,
2034 // !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
2035 // \inst|vga_driver_unit|vsync_counter_cout [0] = CARRY(\inst|vga_driver_unit|d_set_hsync_counter  & \inst|vga_driver_unit|vsync_counter_0 )
2036 // \inst|vga_driver_unit|vsync_counter_cout[0]~COUT1_10  = CARRY(\inst|vga_driver_unit|d_set_hsync_counter  & \inst|vga_driver_unit|vsync_counter_0 )
2037
2038         .clk(\inst1|altpll_component|_clk0 ),
2039         .dataa(\inst|vga_driver_unit|d_set_hsync_counter ),
2040         .datab(\inst|vga_driver_unit|vsync_counter_0 ),
2041         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
2042         .datad(vcc),
2043         .aclr(gnd),
2044         .aload(gnd),
2045         .sclr(!\inst|vga_driver_unit|G_16_i ),
2046         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2047         .ena(vcc),
2048         .cin(gnd),
2049         .cin0(gnd),
2050         .cin1(vcc),
2051         .inverta(gnd),
2052         .regcascin(gnd),
2053         .devclrn(devclrn),
2054         .devpor(devpor),
2055         .combout(),
2056         .regout(\inst|vga_driver_unit|vsync_counter_0 ),
2057         .cout(),
2058         .cout0(\inst|vga_driver_unit|vsync_counter_cout [0]),
2059         .cout1(\inst|vga_driver_unit|vsync_counter_cout[0]~COUT1_10 ));
2060 // synopsys translate_off
2061 defparam \inst|vga_driver_unit|vsync_counter_0_ .lut_mask = "6688";
2062 defparam \inst|vga_driver_unit|vsync_counter_0_ .operation_mode = "arithmetic";
2063 defparam \inst|vga_driver_unit|vsync_counter_0_ .output_mode = "reg_only";
2064 defparam \inst|vga_driver_unit|vsync_counter_0_ .register_cascade_mode = "off";
2065 defparam \inst|vga_driver_unit|vsync_counter_0_ .sum_lutc_input = "datac";
2066 defparam \inst|vga_driver_unit|vsync_counter_0_ .synch_mode = "on";
2067 // synopsys translate_on
2068
2069 // atom is at LC_X29_Y38_N1
2070 stratix_lcell \inst|vga_driver_unit|vsync_counter_1_ (
2071 // Equation(s):
2072 // \inst|vga_driver_unit|vsync_counter_1  = DFFEAS(\inst|vga_driver_unit|vsync_counter_1  $ \inst|vga_driver_unit|vsync_counter_cout [0], GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , ,
2073 // !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
2074 // \inst|vga_driver_unit|vsync_counter_cout [1] = CARRY(!\inst|vga_driver_unit|vsync_counter_cout [0] # !\inst|vga_driver_unit|vsync_counter_1 )
2075 // \inst|vga_driver_unit|vsync_counter_cout[1]~COUT1_12  = CARRY(!\inst|vga_driver_unit|vsync_counter_cout[0]~COUT1_10  # !\inst|vga_driver_unit|vsync_counter_1 )
2076
2077         .clk(\inst1|altpll_component|_clk0 ),
2078         .dataa(vcc),
2079         .datab(\inst|vga_driver_unit|vsync_counter_1 ),
2080         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
2081         .datad(vcc),
2082         .aclr(gnd),
2083         .aload(gnd),
2084         .sclr(!\inst|vga_driver_unit|G_16_i ),
2085         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2086         .ena(vcc),
2087         .cin(gnd),
2088         .cin0(\inst|vga_driver_unit|vsync_counter_cout [0]),
2089         .cin1(\inst|vga_driver_unit|vsync_counter_cout[0]~COUT1_10 ),
2090         .inverta(gnd),
2091         .regcascin(gnd),
2092         .devclrn(devclrn),
2093         .devpor(devpor),
2094         .combout(),
2095         .regout(\inst|vga_driver_unit|vsync_counter_1 ),
2096         .cout(),
2097         .cout0(\inst|vga_driver_unit|vsync_counter_cout [1]),
2098         .cout1(\inst|vga_driver_unit|vsync_counter_cout[1]~COUT1_12 ));
2099 // synopsys translate_off
2100 defparam \inst|vga_driver_unit|vsync_counter_1_ .cin0_used = "true";
2101 defparam \inst|vga_driver_unit|vsync_counter_1_ .cin1_used = "true";
2102 defparam \inst|vga_driver_unit|vsync_counter_1_ .lut_mask = "3c3f";
2103 defparam \inst|vga_driver_unit|vsync_counter_1_ .operation_mode = "arithmetic";
2104 defparam \inst|vga_driver_unit|vsync_counter_1_ .output_mode = "reg_only";
2105 defparam \inst|vga_driver_unit|vsync_counter_1_ .register_cascade_mode = "off";
2106 defparam \inst|vga_driver_unit|vsync_counter_1_ .sum_lutc_input = "cin";
2107 defparam \inst|vga_driver_unit|vsync_counter_1_ .synch_mode = "on";
2108 // synopsys translate_on
2109
2110 // atom is at LC_X29_Y38_N2
2111 stratix_lcell \inst|vga_driver_unit|vsync_counter_2_ (
2112 // Equation(s):
2113 // \inst|vga_driver_unit|vsync_counter_2  = DFFEAS(\inst|vga_driver_unit|vsync_counter_2  $ (!\inst|vga_driver_unit|vsync_counter_cout [1]), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , ,
2114 // !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
2115 // \inst|vga_driver_unit|vsync_counter_cout [2] = CARRY(\inst|vga_driver_unit|vsync_counter_2  & (!\inst|vga_driver_unit|vsync_counter_cout [1]))
2116 // \inst|vga_driver_unit|vsync_counter_cout[2]~COUT1_14  = CARRY(\inst|vga_driver_unit|vsync_counter_2  & (!\inst|vga_driver_unit|vsync_counter_cout[1]~COUT1_12 ))
2117
2118         .clk(\inst1|altpll_component|_clk0 ),
2119         .dataa(\inst|vga_driver_unit|vsync_counter_2 ),
2120         .datab(vcc),
2121         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
2122         .datad(vcc),
2123         .aclr(gnd),
2124         .aload(gnd),
2125         .sclr(!\inst|vga_driver_unit|G_16_i ),
2126         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2127         .ena(vcc),
2128         .cin(gnd),
2129         .cin0(\inst|vga_driver_unit|vsync_counter_cout [1]),
2130         .cin1(\inst|vga_driver_unit|vsync_counter_cout[1]~COUT1_12 ),
2131         .inverta(gnd),
2132         .regcascin(gnd),
2133         .devclrn(devclrn),
2134         .devpor(devpor),
2135         .combout(),
2136         .regout(\inst|vga_driver_unit|vsync_counter_2 ),
2137         .cout(),
2138         .cout0(\inst|vga_driver_unit|vsync_counter_cout [2]),
2139         .cout1(\inst|vga_driver_unit|vsync_counter_cout[2]~COUT1_14 ));
2140 // synopsys translate_off
2141 defparam \inst|vga_driver_unit|vsync_counter_2_ .cin0_used = "true";
2142 defparam \inst|vga_driver_unit|vsync_counter_2_ .cin1_used = "true";
2143 defparam \inst|vga_driver_unit|vsync_counter_2_ .lut_mask = "a50a";
2144 defparam \inst|vga_driver_unit|vsync_counter_2_ .operation_mode = "arithmetic";
2145 defparam \inst|vga_driver_unit|vsync_counter_2_ .output_mode = "reg_only";
2146 defparam \inst|vga_driver_unit|vsync_counter_2_ .register_cascade_mode = "off";
2147 defparam \inst|vga_driver_unit|vsync_counter_2_ .sum_lutc_input = "cin";
2148 defparam \inst|vga_driver_unit|vsync_counter_2_ .synch_mode = "on";
2149 // synopsys translate_on
2150
2151 // atom is at LC_X29_Y38_N3
2152 stratix_lcell \inst|vga_driver_unit|vsync_counter_3_ (
2153 // Equation(s):
2154 // \inst|vga_driver_unit|vsync_counter_3  = DFFEAS(\inst|vga_driver_unit|vsync_counter_3  $ (\inst|vga_driver_unit|vsync_counter_cout [2]), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , ,
2155 // !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
2156 // \inst|vga_driver_unit|vsync_counter_cout [3] = CARRY(!\inst|vga_driver_unit|vsync_counter_cout [2] # !\inst|vga_driver_unit|vsync_counter_3 )
2157 // \inst|vga_driver_unit|vsync_counter_cout[3]~COUT1_16  = CARRY(!\inst|vga_driver_unit|vsync_counter_cout[2]~COUT1_14  # !\inst|vga_driver_unit|vsync_counter_3 )
2158
2159         .clk(\inst1|altpll_component|_clk0 ),
2160         .dataa(\inst|vga_driver_unit|vsync_counter_3 ),
2161         .datab(vcc),
2162         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
2163         .datad(vcc),
2164         .aclr(gnd),
2165         .aload(gnd),
2166         .sclr(!\inst|vga_driver_unit|G_16_i ),
2167         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2168         .ena(vcc),
2169         .cin(gnd),
2170         .cin0(\inst|vga_driver_unit|vsync_counter_cout [2]),
2171         .cin1(\inst|vga_driver_unit|vsync_counter_cout[2]~COUT1_14 ),
2172         .inverta(gnd),
2173         .regcascin(gnd),
2174         .devclrn(devclrn),
2175         .devpor(devpor),
2176         .combout(),
2177         .regout(\inst|vga_driver_unit|vsync_counter_3 ),
2178         .cout(),
2179         .cout0(\inst|vga_driver_unit|vsync_counter_cout [3]),
2180         .cout1(\inst|vga_driver_unit|vsync_counter_cout[3]~COUT1_16 ));
2181 // synopsys translate_off
2182 defparam \inst|vga_driver_unit|vsync_counter_3_ .cin0_used = "true";
2183 defparam \inst|vga_driver_unit|vsync_counter_3_ .cin1_used = "true";
2184 defparam \inst|vga_driver_unit|vsync_counter_3_ .lut_mask = "5a5f";
2185 defparam \inst|vga_driver_unit|vsync_counter_3_ .operation_mode = "arithmetic";
2186 defparam \inst|vga_driver_unit|vsync_counter_3_ .output_mode = "reg_only";
2187 defparam \inst|vga_driver_unit|vsync_counter_3_ .register_cascade_mode = "off";
2188 defparam \inst|vga_driver_unit|vsync_counter_3_ .sum_lutc_input = "cin";
2189 defparam \inst|vga_driver_unit|vsync_counter_3_ .synch_mode = "on";
2190 // synopsys translate_on
2191
2192 // atom is at LC_X29_Y38_N4
2193 stratix_lcell \inst|vga_driver_unit|vsync_counter_4_ (
2194 // Equation(s):
2195 // \inst|vga_driver_unit|vsync_counter_4  = DFFEAS(\inst|vga_driver_unit|vsync_counter_4  $ (!\inst|vga_driver_unit|vsync_counter_cout [3]), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , ,
2196 // !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
2197 // \inst|vga_driver_unit|vsync_counter_cout [4] = CARRY(\inst|vga_driver_unit|vsync_counter_4  & (!\inst|vga_driver_unit|vsync_counter_cout[3]~COUT1_16 ))
2198
2199         .clk(\inst1|altpll_component|_clk0 ),
2200         .dataa(\inst|vga_driver_unit|vsync_counter_4 ),
2201         .datab(vcc),
2202         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
2203         .datad(vcc),
2204         .aclr(gnd),
2205         .aload(gnd),
2206         .sclr(!\inst|vga_driver_unit|G_16_i ),
2207         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2208         .ena(vcc),
2209         .cin(gnd),
2210         .cin0(\inst|vga_driver_unit|vsync_counter_cout [3]),
2211         .cin1(\inst|vga_driver_unit|vsync_counter_cout[3]~COUT1_16 ),
2212         .inverta(gnd),
2213         .regcascin(gnd),
2214         .devclrn(devclrn),
2215         .devpor(devpor),
2216         .combout(),
2217         .regout(\inst|vga_driver_unit|vsync_counter_4 ),
2218         .cout(\inst|vga_driver_unit|vsync_counter_cout [4]),
2219         .cout0(),
2220         .cout1());
2221 // synopsys translate_off
2222 defparam \inst|vga_driver_unit|vsync_counter_4_ .cin0_used = "true";
2223 defparam \inst|vga_driver_unit|vsync_counter_4_ .cin1_used = "true";
2224 defparam \inst|vga_driver_unit|vsync_counter_4_ .lut_mask = "a50a";
2225 defparam \inst|vga_driver_unit|vsync_counter_4_ .operation_mode = "arithmetic";
2226 defparam \inst|vga_driver_unit|vsync_counter_4_ .output_mode = "reg_only";
2227 defparam \inst|vga_driver_unit|vsync_counter_4_ .register_cascade_mode = "off";
2228 defparam \inst|vga_driver_unit|vsync_counter_4_ .sum_lutc_input = "cin";
2229 defparam \inst|vga_driver_unit|vsync_counter_4_ .synch_mode = "on";
2230 // synopsys translate_on
2231
2232 // atom is at LC_X29_Y38_N5
2233 stratix_lcell \inst|vga_driver_unit|vsync_counter_5_ (
2234 // Equation(s):
2235 // \inst|vga_driver_unit|vsync_counter_5  = DFFEAS(\inst|vga_driver_unit|vsync_counter_5  $ \inst|vga_driver_unit|vsync_counter_cout [4], GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , ,
2236 // !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
2237 // \inst|vga_driver_unit|vsync_counter_cout [5] = CARRY(!\inst|vga_driver_unit|vsync_counter_cout [4] # !\inst|vga_driver_unit|vsync_counter_5 )
2238 // \inst|vga_driver_unit|vsync_counter_cout[5]~COUT1_18  = CARRY(!\inst|vga_driver_unit|vsync_counter_cout [4] # !\inst|vga_driver_unit|vsync_counter_5 )
2239
2240         .clk(\inst1|altpll_component|_clk0 ),
2241         .dataa(vcc),
2242         .datab(\inst|vga_driver_unit|vsync_counter_5 ),
2243         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
2244         .datad(vcc),
2245         .aclr(gnd),
2246         .aload(gnd),
2247         .sclr(!\inst|vga_driver_unit|G_16_i ),
2248         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2249         .ena(vcc),
2250         .cin(\inst|vga_driver_unit|vsync_counter_cout [4]),
2251         .cin0(gnd),
2252         .cin1(vcc),
2253         .inverta(gnd),
2254         .regcascin(gnd),
2255         .devclrn(devclrn),
2256         .devpor(devpor),
2257         .combout(),
2258         .regout(\inst|vga_driver_unit|vsync_counter_5 ),
2259         .cout(),
2260         .cout0(\inst|vga_driver_unit|vsync_counter_cout [5]),
2261         .cout1(\inst|vga_driver_unit|vsync_counter_cout[5]~COUT1_18 ));
2262 // synopsys translate_off
2263 defparam \inst|vga_driver_unit|vsync_counter_5_ .cin_used = "true";
2264 defparam \inst|vga_driver_unit|vsync_counter_5_ .lut_mask = "3c3f";
2265 defparam \inst|vga_driver_unit|vsync_counter_5_ .operation_mode = "arithmetic";
2266 defparam \inst|vga_driver_unit|vsync_counter_5_ .output_mode = "reg_only";
2267 defparam \inst|vga_driver_unit|vsync_counter_5_ .register_cascade_mode = "off";
2268 defparam \inst|vga_driver_unit|vsync_counter_5_ .sum_lutc_input = "cin";
2269 defparam \inst|vga_driver_unit|vsync_counter_5_ .synch_mode = "on";
2270 // synopsys translate_on
2271
2272 // atom is at LC_X30_Y38_N5
2273 stratix_lcell \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_6 (
2274 // Equation(s):
2275 // \inst|vga_driver_unit|un9_vsync_counterlt9_6  = !\inst|vga_driver_unit|vsync_counter_2  # !\inst|vga_driver_unit|vsync_counter_3  # !\inst|vga_driver_unit|vsync_counter_1  # !\inst|vga_driver_unit|vsync_counter_0
2276
2277         .clk(gnd),
2278         .dataa(\inst|vga_driver_unit|vsync_counter_0 ),
2279         .datab(\inst|vga_driver_unit|vsync_counter_1 ),
2280         .datac(\inst|vga_driver_unit|vsync_counter_3 ),
2281         .datad(\inst|vga_driver_unit|vsync_counter_2 ),
2282         .aclr(gnd),
2283         .aload(gnd),
2284         .sclr(gnd),
2285         .sload(gnd),
2286         .ena(vcc),
2287         .cin(gnd),
2288         .cin0(gnd),
2289         .cin1(vcc),
2290         .inverta(gnd),
2291         .regcascin(gnd),
2292         .devclrn(devclrn),
2293         .devpor(devpor),
2294         .combout(\inst|vga_driver_unit|un9_vsync_counterlt9_6 ),
2295         .regout(),
2296         .cout(),
2297         .cout0(),
2298         .cout1());
2299 // synopsys translate_off
2300 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_6 .lut_mask = "7fff";
2301 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_6 .operation_mode = "normal";
2302 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_6 .output_mode = "comb_only";
2303 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_6 .register_cascade_mode = "off";
2304 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_6 .sum_lutc_input = "datac";
2305 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_6 .synch_mode = "off";
2306 // synopsys translate_on
2307
2308 // atom is at LC_X29_Y38_N6
2309 stratix_lcell \inst|vga_driver_unit|vsync_counter_6_ (
2310 // Equation(s):
2311 // \inst|vga_driver_unit|vsync_counter_6  = DFFEAS(\inst|vga_driver_unit|vsync_counter_6  $ !(!\inst|vga_driver_unit|vsync_counter_cout [4] & \inst|vga_driver_unit|vsync_counter_cout [5]) # (\inst|vga_driver_unit|vsync_counter_cout [4] &
2312 // \inst|vga_driver_unit|vsync_counter_cout[5]~COUT1_18 ), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , , !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
2313 // \inst|vga_driver_unit|vsync_counter_cout [6] = CARRY(\inst|vga_driver_unit|vsync_counter_6  & !\inst|vga_driver_unit|vsync_counter_cout [5])
2314 // \inst|vga_driver_unit|vsync_counter_cout[6]~COUT1_20  = CARRY(\inst|vga_driver_unit|vsync_counter_6  & !\inst|vga_driver_unit|vsync_counter_cout[5]~COUT1_18 )
2315
2316         .clk(\inst1|altpll_component|_clk0 ),
2317         .dataa(vcc),
2318         .datab(\inst|vga_driver_unit|vsync_counter_6 ),
2319         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
2320         .datad(vcc),
2321         .aclr(gnd),
2322         .aload(gnd),
2323         .sclr(!\inst|vga_driver_unit|G_16_i ),
2324         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2325         .ena(vcc),
2326         .cin(\inst|vga_driver_unit|vsync_counter_cout [4]),
2327         .cin0(\inst|vga_driver_unit|vsync_counter_cout [5]),
2328         .cin1(\inst|vga_driver_unit|vsync_counter_cout[5]~COUT1_18 ),
2329         .inverta(gnd),
2330         .regcascin(gnd),
2331         .devclrn(devclrn),
2332         .devpor(devpor),
2333         .combout(),
2334         .regout(\inst|vga_driver_unit|vsync_counter_6 ),
2335         .cout(),
2336         .cout0(\inst|vga_driver_unit|vsync_counter_cout [6]),
2337         .cout1(\inst|vga_driver_unit|vsync_counter_cout[6]~COUT1_20 ));
2338 // synopsys translate_off
2339 defparam \inst|vga_driver_unit|vsync_counter_6_ .cin0_used = "true";
2340 defparam \inst|vga_driver_unit|vsync_counter_6_ .cin1_used = "true";
2341 defparam \inst|vga_driver_unit|vsync_counter_6_ .cin_used = "true";
2342 defparam \inst|vga_driver_unit|vsync_counter_6_ .lut_mask = "c30c";
2343 defparam \inst|vga_driver_unit|vsync_counter_6_ .operation_mode = "arithmetic";
2344 defparam \inst|vga_driver_unit|vsync_counter_6_ .output_mode = "reg_only";
2345 defparam \inst|vga_driver_unit|vsync_counter_6_ .register_cascade_mode = "off";
2346 defparam \inst|vga_driver_unit|vsync_counter_6_ .sum_lutc_input = "cin";
2347 defparam \inst|vga_driver_unit|vsync_counter_6_ .synch_mode = "on";
2348 // synopsys translate_on
2349
2350 // atom is at LC_X29_Y38_N7
2351 stratix_lcell \inst|vga_driver_unit|vsync_counter_7_ (
2352 // Equation(s):
2353 // \inst|vga_driver_unit|vsync_counter_7  = DFFEAS(\inst|vga_driver_unit|vsync_counter_7  $ ((!\inst|vga_driver_unit|vsync_counter_cout [4] & \inst|vga_driver_unit|vsync_counter_cout [6]) # (\inst|vga_driver_unit|vsync_counter_cout [4] &
2354 // \inst|vga_driver_unit|vsync_counter_cout[6]~COUT1_20 )), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , , !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
2355 // \inst|vga_driver_unit|vsync_counter_cout [7] = CARRY(!\inst|vga_driver_unit|vsync_counter_cout [6] # !\inst|vga_driver_unit|vsync_counter_7 )
2356 // \inst|vga_driver_unit|vsync_counter_cout[7]~COUT1_22  = CARRY(!\inst|vga_driver_unit|vsync_counter_cout[6]~COUT1_20  # !\inst|vga_driver_unit|vsync_counter_7 )
2357
2358         .clk(\inst1|altpll_component|_clk0 ),
2359         .dataa(\inst|vga_driver_unit|vsync_counter_7 ),
2360         .datab(vcc),
2361         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
2362         .datad(vcc),
2363         .aclr(gnd),
2364         .aload(gnd),
2365         .sclr(!\inst|vga_driver_unit|G_16_i ),
2366         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2367         .ena(vcc),
2368         .cin(\inst|vga_driver_unit|vsync_counter_cout [4]),
2369         .cin0(\inst|vga_driver_unit|vsync_counter_cout [6]),
2370         .cin1(\inst|vga_driver_unit|vsync_counter_cout[6]~COUT1_20 ),
2371         .inverta(gnd),
2372         .regcascin(gnd),
2373         .devclrn(devclrn),
2374         .devpor(devpor),
2375         .combout(),
2376         .regout(\inst|vga_driver_unit|vsync_counter_7 ),
2377         .cout(),
2378         .cout0(\inst|vga_driver_unit|vsync_counter_cout [7]),
2379         .cout1(\inst|vga_driver_unit|vsync_counter_cout[7]~COUT1_22 ));
2380 // synopsys translate_off
2381 defparam \inst|vga_driver_unit|vsync_counter_7_ .cin0_used = "true";
2382 defparam \inst|vga_driver_unit|vsync_counter_7_ .cin1_used = "true";
2383 defparam \inst|vga_driver_unit|vsync_counter_7_ .cin_used = "true";
2384 defparam \inst|vga_driver_unit|vsync_counter_7_ .lut_mask = "5a5f";
2385 defparam \inst|vga_driver_unit|vsync_counter_7_ .operation_mode = "arithmetic";
2386 defparam \inst|vga_driver_unit|vsync_counter_7_ .output_mode = "reg_only";
2387 defparam \inst|vga_driver_unit|vsync_counter_7_ .register_cascade_mode = "off";
2388 defparam \inst|vga_driver_unit|vsync_counter_7_ .sum_lutc_input = "cin";
2389 defparam \inst|vga_driver_unit|vsync_counter_7_ .synch_mode = "on";
2390 // synopsys translate_on
2391
2392 // atom is at LC_X29_Y38_N8
2393 stratix_lcell \inst|vga_driver_unit|vsync_counter_8_ (
2394 // Equation(s):
2395 // \inst|vga_driver_unit|vsync_counter_8  = DFFEAS(\inst|vga_driver_unit|vsync_counter_8  $ (!(!\inst|vga_driver_unit|vsync_counter_cout [4] & \inst|vga_driver_unit|vsync_counter_cout [7]) # (\inst|vga_driver_unit|vsync_counter_cout [4] &
2396 // \inst|vga_driver_unit|vsync_counter_cout[7]~COUT1_22 )), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , , !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
2397 // \inst|vga_driver_unit|vsync_counter_cout [8] = CARRY(\inst|vga_driver_unit|vsync_counter_8  & (!\inst|vga_driver_unit|vsync_counter_cout [7]))
2398 // \inst|vga_driver_unit|vsync_counter_cout[8]~COUT1_24  = CARRY(\inst|vga_driver_unit|vsync_counter_8  & (!\inst|vga_driver_unit|vsync_counter_cout[7]~COUT1_22 ))
2399
2400         .clk(\inst1|altpll_component|_clk0 ),
2401         .dataa(\inst|vga_driver_unit|vsync_counter_8 ),
2402         .datab(vcc),
2403         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
2404         .datad(vcc),
2405         .aclr(gnd),
2406         .aload(gnd),
2407         .sclr(!\inst|vga_driver_unit|G_16_i ),
2408         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2409         .ena(vcc),
2410         .cin(\inst|vga_driver_unit|vsync_counter_cout [4]),
2411         .cin0(\inst|vga_driver_unit|vsync_counter_cout [7]),
2412         .cin1(\inst|vga_driver_unit|vsync_counter_cout[7]~COUT1_22 ),
2413         .inverta(gnd),
2414         .regcascin(gnd),
2415         .devclrn(devclrn),
2416         .devpor(devpor),
2417         .combout(),
2418         .regout(\inst|vga_driver_unit|vsync_counter_8 ),
2419         .cout(),
2420         .cout0(\inst|vga_driver_unit|vsync_counter_cout [8]),
2421         .cout1(\inst|vga_driver_unit|vsync_counter_cout[8]~COUT1_24 ));
2422 // synopsys translate_off
2423 defparam \inst|vga_driver_unit|vsync_counter_8_ .cin0_used = "true";
2424 defparam \inst|vga_driver_unit|vsync_counter_8_ .cin1_used = "true";
2425 defparam \inst|vga_driver_unit|vsync_counter_8_ .cin_used = "true";
2426 defparam \inst|vga_driver_unit|vsync_counter_8_ .lut_mask = "a50a";
2427 defparam \inst|vga_driver_unit|vsync_counter_8_ .operation_mode = "arithmetic";
2428 defparam \inst|vga_driver_unit|vsync_counter_8_ .output_mode = "reg_only";
2429 defparam \inst|vga_driver_unit|vsync_counter_8_ .register_cascade_mode = "off";
2430 defparam \inst|vga_driver_unit|vsync_counter_8_ .sum_lutc_input = "cin";
2431 defparam \inst|vga_driver_unit|vsync_counter_8_ .synch_mode = "on";
2432 // synopsys translate_on
2433
2434 // atom is at LC_X29_Y38_N9
2435 stratix_lcell \inst|vga_driver_unit|vsync_counter_9_ (
2436 // Equation(s):
2437 // \inst|vga_driver_unit|vsync_counter_9  = DFFEAS((!\inst|vga_driver_unit|vsync_counter_cout [4] & \inst|vga_driver_unit|vsync_counter_cout [8]) # (\inst|vga_driver_unit|vsync_counter_cout [4] & \inst|vga_driver_unit|vsync_counter_cout[8]~COUT1_24 ) $
2438 // \inst|vga_driver_unit|vsync_counter_9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa , , !\inst|vga_driver_unit|G_16_i , !\inst|vga_driver_unit|un9_vsync_counterlt9 )
2439
2440         .clk(\inst1|altpll_component|_clk0 ),
2441         .dataa(vcc),
2442         .datab(vcc),
2443         .datac(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
2444         .datad(\inst|vga_driver_unit|vsync_counter_9 ),
2445         .aclr(gnd),
2446         .aload(gnd),
2447         .sclr(!\inst|vga_driver_unit|G_16_i ),
2448         .sload(!\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2449         .ena(vcc),
2450         .cin(\inst|vga_driver_unit|vsync_counter_cout [4]),
2451         .cin0(\inst|vga_driver_unit|vsync_counter_cout [8]),
2452         .cin1(\inst|vga_driver_unit|vsync_counter_cout[8]~COUT1_24 ),
2453         .inverta(gnd),
2454         .regcascin(gnd),
2455         .devclrn(devclrn),
2456         .devpor(devpor),
2457         .combout(),
2458         .regout(\inst|vga_driver_unit|vsync_counter_9 ),
2459         .cout(),
2460         .cout0(),
2461         .cout1());
2462 // synopsys translate_off
2463 defparam \inst|vga_driver_unit|vsync_counter_9_ .cin0_used = "true";
2464 defparam \inst|vga_driver_unit|vsync_counter_9_ .cin1_used = "true";
2465 defparam \inst|vga_driver_unit|vsync_counter_9_ .cin_used = "true";
2466 defparam \inst|vga_driver_unit|vsync_counter_9_ .lut_mask = "0ff0";
2467 defparam \inst|vga_driver_unit|vsync_counter_9_ .operation_mode = "normal";
2468 defparam \inst|vga_driver_unit|vsync_counter_9_ .output_mode = "reg_only";
2469 defparam \inst|vga_driver_unit|vsync_counter_9_ .register_cascade_mode = "off";
2470 defparam \inst|vga_driver_unit|vsync_counter_9_ .sum_lutc_input = "cin";
2471 defparam \inst|vga_driver_unit|vsync_counter_9_ .synch_mode = "on";
2472 // synopsys translate_on
2473
2474 // atom is at LC_X30_Y38_N4
2475 stratix_lcell \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_5 (
2476 // Equation(s):
2477 // \inst|vga_driver_unit|un9_vsync_counterlt9_5  = !\inst|vga_driver_unit|vsync_counter_8  # !\inst|vga_driver_unit|vsync_counter_9  # !\inst|vga_driver_unit|vsync_counter_6  # !\inst|vga_driver_unit|vsync_counter_7
2478
2479         .clk(gnd),
2480         .dataa(\inst|vga_driver_unit|vsync_counter_7 ),
2481         .datab(\inst|vga_driver_unit|vsync_counter_6 ),
2482         .datac(\inst|vga_driver_unit|vsync_counter_9 ),
2483         .datad(\inst|vga_driver_unit|vsync_counter_8 ),
2484         .aclr(gnd),
2485         .aload(gnd),
2486         .sclr(gnd),
2487         .sload(gnd),
2488         .ena(vcc),
2489         .cin(gnd),
2490         .cin0(gnd),
2491         .cin1(vcc),
2492         .inverta(gnd),
2493         .regcascin(gnd),
2494         .devclrn(devclrn),
2495         .devpor(devpor),
2496         .combout(\inst|vga_driver_unit|un9_vsync_counterlt9_5 ),
2497         .regout(),
2498         .cout(),
2499         .cout0(),
2500         .cout1());
2501 // synopsys translate_off
2502 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_5 .lut_mask = "7fff";
2503 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_5 .operation_mode = "normal";
2504 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_5 .output_mode = "comb_only";
2505 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_5 .register_cascade_mode = "off";
2506 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_5 .sum_lutc_input = "datac";
2507 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9_5 .synch_mode = "off";
2508 // synopsys translate_on
2509
2510 // atom is at LC_X30_Y38_N8
2511 stratix_lcell \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9 (
2512 // Equation(s):
2513 // \inst|vga_driver_unit|un9_vsync_counterlt9  = \inst|vga_driver_unit|un9_vsync_counterlt9_6  # \inst|vga_driver_unit|un9_vsync_counterlt9_5  # !\inst|vga_driver_unit|vsync_counter_4  # !\inst|vga_driver_unit|vsync_counter_5
2514
2515         .clk(gnd),
2516         .dataa(\inst|vga_driver_unit|vsync_counter_5 ),
2517         .datab(\inst|vga_driver_unit|vsync_counter_4 ),
2518         .datac(\inst|vga_driver_unit|un9_vsync_counterlt9_6 ),
2519         .datad(\inst|vga_driver_unit|un9_vsync_counterlt9_5 ),
2520         .aclr(gnd),
2521         .aload(gnd),
2522         .sclr(gnd),
2523         .sload(gnd),
2524         .ena(vcc),
2525         .cin(gnd),
2526         .cin0(gnd),
2527         .cin1(vcc),
2528         .inverta(gnd),
2529         .regcascin(gnd),
2530         .devclrn(devclrn),
2531         .devpor(devpor),
2532         .combout(\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2533         .regout(),
2534         .cout(),
2535         .cout0(),
2536         .cout1());
2537 // synopsys translate_off
2538 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9 .lut_mask = "fff7";
2539 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9 .operation_mode = "normal";
2540 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9 .output_mode = "comb_only";
2541 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9 .register_cascade_mode = "off";
2542 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9 .sum_lutc_input = "datac";
2543 defparam \inst|vga_driver_unit|VSYNC_COUNT_next_un9_vsync_counterlt9 .synch_mode = "off";
2544 // synopsys translate_on
2545
2546 // atom is at LC_X30_Y38_N6
2547 stratix_lcell \inst|vga_driver_unit|G_16 (
2548 // Equation(s):
2549 // \inst|vga_driver_unit|G_16_i  = !\inst|vga_driver_unit|vsync_state_6  & !\inst|vga_driver_unit|vsync_state_0  & !\inst|vga_driver_unit|un6_dly_counter_0_x  # !\inst|vga_driver_unit|un9_vsync_counterlt9
2550
2551         .clk(gnd),
2552         .dataa(\inst|vga_driver_unit|vsync_state_6 ),
2553         .datab(\inst|vga_driver_unit|vsync_state_0 ),
2554         .datac(\inst|vga_driver_unit|un6_dly_counter_0_x ),
2555         .datad(\inst|vga_driver_unit|un9_vsync_counterlt9 ),
2556         .aclr(gnd),
2557         .aload(gnd),
2558         .sclr(gnd),
2559         .sload(gnd),
2560         .ena(vcc),
2561         .cin(gnd),
2562         .cin0(gnd),
2563         .cin1(vcc),
2564         .inverta(gnd),
2565         .regcascin(gnd),
2566         .devclrn(devclrn),
2567         .devpor(devpor),
2568         .combout(\inst|vga_driver_unit|G_16_i ),
2569         .regout(),
2570         .cout(),
2571         .cout0(),
2572         .cout1());
2573 // synopsys translate_off
2574 defparam \inst|vga_driver_unit|G_16 .lut_mask = "01ff";
2575 defparam \inst|vga_driver_unit|G_16 .operation_mode = "normal";
2576 defparam \inst|vga_driver_unit|G_16 .output_mode = "comb_only";
2577 defparam \inst|vga_driver_unit|G_16 .register_cascade_mode = "off";
2578 defparam \inst|vga_driver_unit|G_16 .sum_lutc_input = "datac";
2579 defparam \inst|vga_driver_unit|G_16 .synch_mode = "off";
2580 // synopsys translate_on
2581
2582 // atom is at LC_X28_Y38_N5
2583 stratix_lcell \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_3 (
2584 // Equation(s):
2585 // \inst|vga_driver_unit|un15_vsync_counter_3  = \inst|vga_driver_unit|vsync_counter_3  & !\inst|vga_driver_unit|vsync_counter_2  & !\inst|vga_driver_unit|vsync_counter_0  & \inst|vga_driver_unit|vsync_counter_9
2586
2587         .clk(gnd),
2588         .dataa(\inst|vga_driver_unit|vsync_counter_3 ),
2589         .datab(\inst|vga_driver_unit|vsync_counter_2 ),
2590         .datac(\inst|vga_driver_unit|vsync_counter_0 ),
2591         .datad(\inst|vga_driver_unit|vsync_counter_9 ),
2592         .aclr(gnd),
2593         .aload(gnd),
2594         .sclr(gnd),
2595         .sload(gnd),
2596         .ena(vcc),
2597         .cin(gnd),
2598         .cin0(gnd),
2599         .cin1(vcc),
2600         .inverta(gnd),
2601         .regcascin(gnd),
2602         .devclrn(devclrn),
2603         .devpor(devpor),
2604         .combout(\inst|vga_driver_unit|un15_vsync_counter_3 ),
2605         .regout(),
2606         .cout(),
2607         .cout0(),
2608         .cout1());
2609 // synopsys translate_off
2610 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_3 .lut_mask = "0200";
2611 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_3 .operation_mode = "normal";
2612 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_3 .output_mode = "comb_only";
2613 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_3 .register_cascade_mode = "off";
2614 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_3 .sum_lutc_input = "datac";
2615 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_3 .synch_mode = "off";
2616 // synopsys translate_on
2617
2618 // atom is at LC_X28_Y38_N4
2619 stratix_lcell \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_4 (
2620 // Equation(s):
2621 // \inst|vga_driver_unit|un15_vsync_counter_4  = \inst|vga_driver_unit|un15_vsync_counter_3  & !\inst|vga_driver_unit|vsync_counter_4  & !\inst|vga_driver_unit|vsync_counter_1
2622
2623         .clk(gnd),
2624         .dataa(vcc),
2625         .datab(\inst|vga_driver_unit|un15_vsync_counter_3 ),
2626         .datac(\inst|vga_driver_unit|vsync_counter_4 ),
2627         .datad(\inst|vga_driver_unit|vsync_counter_1 ),
2628         .aclr(gnd),
2629         .aload(gnd),
2630         .sclr(gnd),
2631         .sload(gnd),
2632         .ena(vcc),
2633         .cin(gnd),
2634         .cin0(gnd),
2635         .cin1(vcc),
2636         .inverta(gnd),
2637         .regcascin(gnd),
2638         .devclrn(devclrn),
2639         .devpor(devpor),
2640         .combout(\inst|vga_driver_unit|un15_vsync_counter_4 ),
2641         .regout(),
2642         .cout(),
2643         .cout0(),
2644         .cout1());
2645 // synopsys translate_off
2646 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_4 .lut_mask = "000c";
2647 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_4 .operation_mode = "normal";
2648 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_4 .output_mode = "comb_only";
2649 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_4 .register_cascade_mode = "off";
2650 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_4 .sum_lutc_input = "datac";
2651 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un15_vsync_counter_4 .synch_mode = "off";
2652 // synopsys translate_on
2653
2654 // atom is at LC_X30_Y38_N9
2655 stratix_lcell \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_3 (
2656 // Equation(s):
2657 // \inst|vga_driver_unit|un13_vsync_counter_3  = !\inst|vga_driver_unit|vsync_counter_7  & !\inst|vga_driver_unit|vsync_counter_6  & !\inst|vga_driver_unit|vsync_counter_9  & !\inst|vga_driver_unit|vsync_counter_8
2658
2659         .clk(gnd),
2660         .dataa(\inst|vga_driver_unit|vsync_counter_7 ),
2661         .datab(\inst|vga_driver_unit|vsync_counter_6 ),
2662         .datac(\inst|vga_driver_unit|vsync_counter_9 ),
2663         .datad(\inst|vga_driver_unit|vsync_counter_8 ),
2664         .aclr(gnd),
2665         .aload(gnd),
2666         .sclr(gnd),
2667         .sload(gnd),
2668         .ena(vcc),
2669         .cin(gnd),
2670         .cin0(gnd),
2671         .cin1(vcc),
2672         .inverta(gnd),
2673         .regcascin(gnd),
2674         .devclrn(devclrn),
2675         .devpor(devpor),
2676         .combout(\inst|vga_driver_unit|un13_vsync_counter_3 ),
2677         .regout(),
2678         .cout(),
2679         .cout0(),
2680         .cout1());
2681 // synopsys translate_off
2682 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_3 .lut_mask = "0001";
2683 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_3 .operation_mode = "normal";
2684 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_3 .output_mode = "comb_only";
2685 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_3 .register_cascade_mode = "off";
2686 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_3 .sum_lutc_input = "datac";
2687 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_3 .synch_mode = "off";
2688 // synopsys translate_on
2689
2690 // atom is at LC_X28_Y39_N7
2691 stratix_lcell \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_4 (
2692 // Equation(s):
2693 // \inst|vga_driver_unit|un13_vsync_counter_4  = \inst|vga_driver_unit|vsync_counter_5  & \inst|vga_driver_unit|un13_vsync_counter_3  & (\inst|vga_driver_unit|vsync_counter_0 )
2694
2695         .clk(gnd),
2696         .dataa(\inst|vga_driver_unit|vsync_counter_5 ),
2697         .datab(\inst|vga_driver_unit|un13_vsync_counter_3 ),
2698         .datac(vcc),
2699         .datad(\inst|vga_driver_unit|vsync_counter_0 ),
2700         .aclr(gnd),
2701         .aload(gnd),
2702         .sclr(gnd),
2703         .sload(gnd),
2704         .ena(vcc),
2705         .cin(gnd),
2706         .cin0(gnd),
2707         .cin1(vcc),
2708         .inverta(gnd),
2709         .regcascin(gnd),
2710         .devclrn(devclrn),
2711         .devpor(devpor),
2712         .combout(\inst|vga_driver_unit|un13_vsync_counter_4 ),
2713         .regout(),
2714         .cout(),
2715         .cout0(),
2716         .cout1());
2717 // synopsys translate_off
2718 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_4 .lut_mask = "8800";
2719 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_4 .operation_mode = "normal";
2720 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_4 .output_mode = "comb_only";
2721 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_4 .register_cascade_mode = "off";
2722 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_4 .sum_lutc_input = "datac";
2723 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un13_vsync_counter_4 .synch_mode = "off";
2724 // synopsys translate_on
2725
2726 // atom is at LC_X28_Y39_N4
2727 stratix_lcell \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_7 (
2728 // Equation(s):
2729 // \inst|vga_driver_unit|un12_vsync_counter_7  = !\inst|vga_driver_unit|vsync_counter_2  & !\inst|vga_driver_unit|vsync_counter_4  & !\inst|vga_driver_unit|vsync_counter_1  & !\inst|vga_driver_unit|vsync_counter_3
2730
2731         .clk(gnd),
2732         .dataa(\inst|vga_driver_unit|vsync_counter_2 ),
2733         .datab(\inst|vga_driver_unit|vsync_counter_4 ),
2734         .datac(\inst|vga_driver_unit|vsync_counter_1 ),
2735         .datad(\inst|vga_driver_unit|vsync_counter_3 ),
2736         .aclr(gnd),
2737         .aload(gnd),
2738         .sclr(gnd),
2739         .sload(gnd),
2740         .ena(vcc),
2741         .cin(gnd),
2742         .cin0(gnd),
2743         .cin1(vcc),
2744         .inverta(gnd),
2745         .regcascin(gnd),
2746         .devclrn(devclrn),
2747         .devpor(devpor),
2748         .combout(\inst|vga_driver_unit|un12_vsync_counter_7 ),
2749         .regout(),
2750         .cout(),
2751         .cout0(),
2752         .cout1());
2753 // synopsys translate_off
2754 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_7 .lut_mask = "0001";
2755 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_7 .operation_mode = "normal";
2756 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_7 .output_mode = "comb_only";
2757 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_7 .register_cascade_mode = "off";
2758 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_7 .sum_lutc_input = "datac";
2759 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_7 .synch_mode = "off";
2760 // synopsys translate_on
2761
2762 // atom is at LC_X30_Y39_N2
2763 stratix_lcell \inst|vga_driver_unit|vsync_state_1_ (
2764 // Equation(s):
2765 // \inst|vga_driver_unit|vsync_state_1  = DFFEAS(!\inst|vga_driver_unit|un6_dly_counter_0_x  & \inst|vga_driver_unit|un13_vsync_counter_4  & \inst|vga_driver_unit|vsync_state_4  & \inst|vga_driver_unit|un12_vsync_counter_7 ,
2766 // GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , , , )
2767
2768         .clk(\inst1|altpll_component|_clk0 ),
2769         .dataa(\inst|vga_driver_unit|un6_dly_counter_0_x ),
2770         .datab(\inst|vga_driver_unit|un13_vsync_counter_4 ),
2771         .datac(\inst|vga_driver_unit|vsync_state_4 ),
2772         .datad(\inst|vga_driver_unit|un12_vsync_counter_7 ),
2773         .aclr(gnd),
2774         .aload(gnd),
2775         .sclr(gnd),
2776         .sload(gnd),
2777         .ena(vcc),
2778         .cin(gnd),
2779         .cin0(gnd),
2780         .cin1(vcc),
2781         .inverta(gnd),
2782         .regcascin(gnd),
2783         .devclrn(devclrn),
2784         .devpor(devpor),
2785         .combout(),
2786         .regout(\inst|vga_driver_unit|vsync_state_1 ),
2787         .cout(),
2788         .cout0(),
2789         .cout1());
2790 // synopsys translate_off
2791 defparam \inst|vga_driver_unit|vsync_state_1_ .lut_mask = "4000";
2792 defparam \inst|vga_driver_unit|vsync_state_1_ .operation_mode = "normal";
2793 defparam \inst|vga_driver_unit|vsync_state_1_ .output_mode = "reg_only";
2794 defparam \inst|vga_driver_unit|vsync_state_1_ .register_cascade_mode = "off";
2795 defparam \inst|vga_driver_unit|vsync_state_1_ .sum_lutc_input = "datac";
2796 defparam \inst|vga_driver_unit|vsync_state_1_ .synch_mode = "off";
2797 // synopsys translate_on
2798
2799 // atom is at LC_X30_Y39_N3
2800 stratix_lcell \inst|vga_driver_unit|vsync_state_5_ (
2801 // Equation(s):
2802 // \inst|vga_driver_unit|vsync_state_5  = DFFEAS(\inst|vga_driver_unit|vsync_state_0  # \inst|vga_driver_unit|vsync_state_6 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|vsync_state_next_2_sqmuxa , , ,
2803 // \inst|vga_driver_unit|un6_dly_counter_0_x , )
2804
2805         .clk(\inst1|altpll_component|_clk0 ),
2806         .dataa(vcc),
2807         .datab(vcc),
2808         .datac(\inst|vga_driver_unit|vsync_state_0 ),
2809         .datad(\inst|vga_driver_unit|vsync_state_6 ),
2810         .aclr(gnd),
2811         .aload(gnd),
2812         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
2813         .sload(gnd),
2814         .ena(\inst|vga_driver_unit|vsync_state_next_2_sqmuxa ),
2815         .cin(gnd),
2816         .cin0(gnd),
2817         .cin1(vcc),
2818         .inverta(gnd),
2819         .regcascin(gnd),
2820         .devclrn(devclrn),
2821         .devpor(devpor),
2822         .combout(),
2823         .regout(\inst|vga_driver_unit|vsync_state_5 ),
2824         .cout(),
2825         .cout0(),
2826         .cout1());
2827 // synopsys translate_off
2828 defparam \inst|vga_driver_unit|vsync_state_5_ .lut_mask = "fff0";
2829 defparam \inst|vga_driver_unit|vsync_state_5_ .operation_mode = "normal";
2830 defparam \inst|vga_driver_unit|vsync_state_5_ .output_mode = "reg_only";
2831 defparam \inst|vga_driver_unit|vsync_state_5_ .register_cascade_mode = "off";
2832 defparam \inst|vga_driver_unit|vsync_state_5_ .sum_lutc_input = "datac";
2833 defparam \inst|vga_driver_unit|vsync_state_5_ .synch_mode = "on";
2834 // synopsys translate_on
2835
2836 // atom is at LC_X28_Y39_N8
2837 stratix_lcell \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1_cZ (
2838 // Equation(s):
2839 // \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1  = \inst|vga_driver_unit|vsync_state_5  & (\inst|vga_driver_unit|vsync_counter_9  # !\inst|vga_driver_unit|vsync_counter_0  # !\inst|vga_driver_unit|un14_vsync_counter_8 )
2840
2841         .clk(gnd),
2842         .dataa(\inst|vga_driver_unit|un14_vsync_counter_8 ),
2843         .datab(\inst|vga_driver_unit|vsync_counter_9 ),
2844         .datac(\inst|vga_driver_unit|vsync_state_5 ),
2845         .datad(\inst|vga_driver_unit|vsync_counter_0 ),
2846         .aclr(gnd),
2847         .aload(gnd),
2848         .sclr(gnd),
2849         .sload(gnd),
2850         .ena(vcc),
2851         .cin(gnd),
2852         .cin0(gnd),
2853         .cin1(vcc),
2854         .inverta(gnd),
2855         .regcascin(gnd),
2856         .devclrn(devclrn),
2857         .devpor(devpor),
2858         .combout(\inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1 ),
2859         .regout(),
2860         .cout(),
2861         .cout0(),
2862         .cout1());
2863 // synopsys translate_off
2864 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1_cZ .lut_mask = "d0f0";
2865 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1_cZ .operation_mode = "normal";
2866 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1_cZ .output_mode = "comb_only";
2867 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1_cZ .register_cascade_mode = "off";
2868 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1_cZ .sum_lutc_input = "datac";
2869 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1_cZ .synch_mode = "off";
2870 // synopsys translate_on
2871
2872 // atom is at LC_X28_Y39_N9
2873 stratix_lcell \inst|vga_driver_unit|vsync_state_3_ (
2874 // Equation(s):
2875 // \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_3  = E1_vsync_state_3 & (!\inst|vga_driver_unit|vsync_counter_9  # !\inst|vga_driver_unit|vsync_counter_0  # !\inst|vga_driver_unit|un14_vsync_counter_8 )
2876 // \inst|vga_driver_unit|vsync_state_3  = DFFEAS(\inst|vga_driver_unit|vsync_state_next_1_sqmuxa_3 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|vsync_state_next_2_sqmuxa , \inst|vga_driver_unit|vsync_state_1 , ,
2877 // \inst|vga_driver_unit|un6_dly_counter_0_x , VCC)
2878
2879         .clk(\inst1|altpll_component|_clk0 ),
2880         .dataa(\inst|vga_driver_unit|un14_vsync_counter_8 ),
2881         .datab(\inst|vga_driver_unit|vsync_counter_0 ),
2882         .datac(\inst|vga_driver_unit|vsync_state_1 ),
2883         .datad(\inst|vga_driver_unit|vsync_counter_9 ),
2884         .aclr(gnd),
2885         .aload(gnd),
2886         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
2887         .sload(vcc),
2888         .ena(\inst|vga_driver_unit|vsync_state_next_2_sqmuxa ),
2889         .cin(gnd),
2890         .cin0(gnd),
2891         .cin1(vcc),
2892         .inverta(gnd),
2893         .regcascin(gnd),
2894         .devclrn(devclrn),
2895         .devpor(devpor),
2896         .combout(\inst|vga_driver_unit|vsync_state_next_1_sqmuxa_3 ),
2897         .regout(\inst|vga_driver_unit|vsync_state_3 ),
2898         .cout(),
2899         .cout0(),
2900         .cout1());
2901 // synopsys translate_off
2902 defparam \inst|vga_driver_unit|vsync_state_3_ .lut_mask = "70f0";
2903 defparam \inst|vga_driver_unit|vsync_state_3_ .operation_mode = "normal";
2904 defparam \inst|vga_driver_unit|vsync_state_3_ .output_mode = "reg_and_comb";
2905 defparam \inst|vga_driver_unit|vsync_state_3_ .register_cascade_mode = "off";
2906 defparam \inst|vga_driver_unit|vsync_state_3_ .sum_lutc_input = "qfbk";
2907 defparam \inst|vga_driver_unit|vsync_state_3_ .synch_mode = "on";
2908 // synopsys translate_on
2909
2910 // atom is at LC_X28_Y39_N5
2911 stratix_lcell \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2_cZ (
2912 // Equation(s):
2913 // \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2  = \inst|vga_driver_unit|vsync_state_4  & (!\inst|vga_driver_unit|un13_vsync_counter_4  # !\inst|vga_driver_unit|un12_vsync_counter_7 )
2914
2915         .clk(gnd),
2916         .dataa(\inst|vga_driver_unit|un12_vsync_counter_7 ),
2917         .datab(vcc),
2918         .datac(\inst|vga_driver_unit|un13_vsync_counter_4 ),
2919         .datad(\inst|vga_driver_unit|vsync_state_4 ),
2920         .aclr(gnd),
2921         .aload(gnd),
2922         .sclr(gnd),
2923         .sload(gnd),
2924         .ena(vcc),
2925         .cin(gnd),
2926         .cin0(gnd),
2927         .cin1(vcc),
2928         .inverta(gnd),
2929         .regcascin(gnd),
2930         .devclrn(devclrn),
2931         .devpor(devpor),
2932         .combout(\inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2 ),
2933         .regout(),
2934         .cout(),
2935         .cout0(),
2936         .cout1());
2937 // synopsys translate_off
2938 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2_cZ .lut_mask = "5f00";
2939 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2_cZ .operation_mode = "normal";
2940 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2_cZ .output_mode = "comb_only";
2941 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2_cZ .register_cascade_mode = "off";
2942 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2_cZ .sum_lutc_input = "datac";
2943 defparam \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2_cZ .synch_mode = "off";
2944 // synopsys translate_on
2945
2946 // atom is at LC_X28_Y39_N3
2947 stratix_lcell \inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0_cZ (
2948 // Equation(s):
2949 // \inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0  = \inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2  # \inst|vga_driver_unit|vsync_state_2  & (!\inst|vga_driver_unit|un12_vsync_counter_6  # !\inst|vga_driver_unit|un15_vsync_counter_4 )
2950
2951         .clk(gnd),
2952         .dataa(\inst|vga_driver_unit|un15_vsync_counter_4 ),
2953         .datab(\inst|vga_driver_unit|vsync_state_next_1_sqmuxa_2 ),
2954         .datac(\inst|vga_driver_unit|un12_vsync_counter_6 ),
2955         .datad(\inst|vga_driver_unit|vsync_state_2 ),
2956         .aclr(gnd),
2957         .aload(gnd),
2958         .sclr(gnd),
2959         .sload(gnd),
2960         .ena(vcc),
2961         .cin(gnd),
2962         .cin0(gnd),
2963         .cin1(vcc),
2964         .inverta(gnd),
2965         .regcascin(gnd),
2966         .devclrn(devclrn),
2967         .devpor(devpor),
2968         .combout(\inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0 ),
2969         .regout(),
2970         .cout(),
2971         .cout0(),
2972         .cout1());
2973 // synopsys translate_off
2974 defparam \inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0_cZ .lut_mask = "dfcc";
2975 defparam \inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0_cZ .operation_mode = "normal";
2976 defparam \inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0_cZ .output_mode = "comb_only";
2977 defparam \inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0_cZ .register_cascade_mode = "off";
2978 defparam \inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0_cZ .sum_lutc_input = "datac";
2979 defparam \inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0_cZ .synch_mode = "off";
2980 // synopsys translate_on
2981
2982 // atom is at LC_X28_Y39_N6
2983 stratix_lcell \inst|vga_driver_unit|vsync_state_next_2_sqmuxa_cZ (
2984 // Equation(s):
2985 // \inst|vga_driver_unit|vsync_state_next_2_sqmuxa  = \inst|vga_driver_unit|un6_dly_counter_0_x  # !\inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1  & !\inst|vga_driver_unit|vsync_state_next_1_sqmuxa_3  &
2986 // !\inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0
2987
2988         .clk(gnd),
2989         .dataa(\inst|vga_driver_unit|vsync_state_next_1_sqmuxa_1 ),
2990         .datab(\inst|vga_driver_unit|vsync_state_next_1_sqmuxa_3 ),
2991         .datac(\inst|vga_driver_unit|un1_vsync_state_next_1_sqmuxa_0 ),
2992         .datad(\inst|vga_driver_unit|un6_dly_counter_0_x ),
2993         .aclr(gnd),
2994         .aload(gnd),
2995         .sclr(gnd),
2996         .sload(gnd),
2997         .ena(vcc),
2998         .cin(gnd),
2999         .cin0(gnd),
3000         .cin1(vcc),
3001         .inverta(gnd),
3002         .regcascin(gnd),
3003         .devclrn(devclrn),
3004         .devpor(devpor),
3005         .combout(\inst|vga_driver_unit|vsync_state_next_2_sqmuxa ),
3006         .regout(),
3007         .cout(),
3008         .cout0(),
3009         .cout1());
3010 // synopsys translate_off
3011 defparam \inst|vga_driver_unit|vsync_state_next_2_sqmuxa_cZ .lut_mask = "ff01";
3012 defparam \inst|vga_driver_unit|vsync_state_next_2_sqmuxa_cZ .operation_mode = "normal";
3013 defparam \inst|vga_driver_unit|vsync_state_next_2_sqmuxa_cZ .output_mode = "comb_only";
3014 defparam \inst|vga_driver_unit|vsync_state_next_2_sqmuxa_cZ .register_cascade_mode = "off";
3015 defparam \inst|vga_driver_unit|vsync_state_next_2_sqmuxa_cZ .sum_lutc_input = "datac";
3016 defparam \inst|vga_driver_unit|vsync_state_next_2_sqmuxa_cZ .synch_mode = "off";
3017 // synopsys translate_on
3018
3019 // atom is at LC_X30_Y39_N0
3020 stratix_lcell \inst|vga_driver_unit|vsync_state_2_ (
3021 // Equation(s):
3022 // \inst|vga_driver_unit|vsync_state_2  = DFFEAS(\inst|vga_driver_unit|un14_vsync_counter_8  & \inst|vga_driver_unit|vsync_state_3  & \inst|vga_driver_unit|vsync_counter_0  & \inst|vga_driver_unit|vsync_counter_9 , GLOBAL(\inst1|altpll_component|_clk0 ),
3023 // VCC, , \inst|vga_driver_unit|vsync_state_next_2_sqmuxa , , , \inst|vga_driver_unit|un6_dly_counter_0_x , )
3024
3025         .clk(\inst1|altpll_component|_clk0 ),
3026         .dataa(\inst|vga_driver_unit|un14_vsync_counter_8 ),
3027         .datab(\inst|vga_driver_unit|vsync_state_3 ),
3028         .datac(\inst|vga_driver_unit|vsync_counter_0 ),
3029         .datad(\inst|vga_driver_unit|vsync_counter_9 ),
3030         .aclr(gnd),
3031         .aload(gnd),
3032         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
3033         .sload(gnd),
3034         .ena(\inst|vga_driver_unit|vsync_state_next_2_sqmuxa ),
3035         .cin(gnd),
3036         .cin0(gnd),
3037         .cin1(vcc),
3038         .inverta(gnd),
3039         .regcascin(gnd),
3040         .devclrn(devclrn),
3041         .devpor(devpor),
3042         .combout(),
3043         .regout(\inst|vga_driver_unit|vsync_state_2 ),
3044         .cout(),
3045         .cout0(),
3046         .cout1());
3047 // synopsys translate_off
3048 defparam \inst|vga_driver_unit|vsync_state_2_ .lut_mask = "8000";
3049 defparam \inst|vga_driver_unit|vsync_state_2_ .operation_mode = "normal";
3050 defparam \inst|vga_driver_unit|vsync_state_2_ .output_mode = "reg_only";
3051 defparam \inst|vga_driver_unit|vsync_state_2_ .register_cascade_mode = "off";
3052 defparam \inst|vga_driver_unit|vsync_state_2_ .sum_lutc_input = "datac";
3053 defparam \inst|vga_driver_unit|vsync_state_2_ .synch_mode = "on";
3054 // synopsys translate_on
3055
3056 // atom is at LC_X28_Y38_N2
3057 stratix_lcell \inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0_cZ (
3058 // Equation(s):
3059 // \inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0  = \inst|vga_driver_unit|un15_vsync_counter_4  & (\inst|vga_driver_unit|vsync_state_2  & \inst|vga_driver_unit|un12_vsync_counter_6 )
3060
3061         .clk(gnd),
3062         .dataa(\inst|vga_driver_unit|un15_vsync_counter_4 ),
3063         .datab(vcc),
3064         .datac(\inst|vga_driver_unit|vsync_state_2 ),
3065         .datad(\inst|vga_driver_unit|un12_vsync_counter_6 ),
3066         .aclr(gnd),
3067         .aload(gnd),
3068         .sclr(gnd),
3069         .sload(gnd),
3070         .ena(vcc),
3071         .cin(gnd),
3072         .cin0(gnd),
3073         .cin1(vcc),
3074         .inverta(gnd),
3075         .regcascin(gnd),
3076         .devclrn(devclrn),
3077         .devpor(devpor),
3078         .combout(\inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0 ),
3079         .regout(),
3080         .cout(),
3081         .cout0(),
3082         .cout1());
3083 // synopsys translate_off
3084 defparam \inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0_cZ .lut_mask = "a000";
3085 defparam \inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0_cZ .operation_mode = "normal";
3086 defparam \inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0_cZ .output_mode = "comb_only";
3087 defparam \inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0_cZ .register_cascade_mode = "off";
3088 defparam \inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0_cZ .sum_lutc_input = "datac";
3089 defparam \inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0_cZ .synch_mode = "off";
3090 // synopsys translate_on
3091
3092 // atom is at LC_X28_Y39_N0
3093 stratix_lcell \inst|vga_driver_unit|vsync_state_0_ (
3094 // Equation(s):
3095 // \inst|vga_driver_unit|vsync_state_0  = DFFEAS(\inst|vga_driver_unit|vsync_state_0  & (\inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0  & !\inst|vga_driver_unit|un6_dly_counter_0_x  # !\inst|vga_driver_unit|vsync_state_next_2_sqmuxa ) #
3096 // !\inst|vga_driver_unit|vsync_state_0  & \inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0  & (!\inst|vga_driver_unit|un6_dly_counter_0_x ), GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , , , )
3097
3098         .clk(\inst1|altpll_component|_clk0 ),
3099         .dataa(\inst|vga_driver_unit|vsync_state_0 ),
3100         .datab(\inst|vga_driver_unit|vsync_state_3_iv_0_0__g0_0_a3_0 ),
3101         .datac(\inst|vga_driver_unit|vsync_state_next_2_sqmuxa ),
3102         .datad(\inst|vga_driver_unit|un6_dly_counter_0_x ),
3103         .aclr(gnd),
3104         .aload(gnd),
3105         .sclr(gnd),
3106         .sload(gnd),
3107         .ena(vcc),
3108         .cin(gnd),
3109         .cin0(gnd),
3110         .cin1(vcc),
3111         .inverta(gnd),
3112         .regcascin(gnd),
3113         .devclrn(devclrn),
3114         .devpor(devpor),
3115         .combout(),
3116         .regout(\inst|vga_driver_unit|vsync_state_0 ),
3117         .cout(),
3118         .cout0(),
3119         .cout1());
3120 // synopsys translate_off
3121 defparam \inst|vga_driver_unit|vsync_state_0_ .lut_mask = "0ace";
3122 defparam \inst|vga_driver_unit|vsync_state_0_ .operation_mode = "normal";
3123 defparam \inst|vga_driver_unit|vsync_state_0_ .output_mode = "reg_only";
3124 defparam \inst|vga_driver_unit|vsync_state_0_ .register_cascade_mode = "off";
3125 defparam \inst|vga_driver_unit|vsync_state_0_ .sum_lutc_input = "datac";
3126 defparam \inst|vga_driver_unit|vsync_state_0_ .synch_mode = "off";
3127 // synopsys translate_on
3128
3129 // atom is at LC_X30_Y38_N1
3130 stratix_lcell \inst|vga_driver_unit|d_set_vsync_counter_cZ (
3131 // Equation(s):
3132 // \inst|vga_driver_unit|d_set_vsync_counter  = \inst|vga_driver_unit|vsync_state_6  # \inst|vga_driver_unit|vsync_state_0
3133
3134         .clk(gnd),
3135         .dataa(\inst|vga_driver_unit|vsync_state_6 ),
3136         .datab(vcc),
3137         .datac(\inst|vga_driver_unit|vsync_state_0 ),
3138         .datad(vcc),
3139         .aclr(gnd),
3140         .aload(gnd),
3141         .sclr(gnd),
3142         .sload(gnd),
3143         .ena(vcc),
3144         .cin(gnd),
3145         .cin0(gnd),
3146         .cin1(vcc),
3147         .inverta(gnd),
3148         .regcascin(gnd),
3149         .devclrn(devclrn),
3150         .devpor(devpor),
3151         .combout(\inst|vga_driver_unit|d_set_vsync_counter ),
3152         .regout(),
3153         .cout(),
3154         .cout0(),
3155         .cout1());
3156 // synopsys translate_off
3157 defparam \inst|vga_driver_unit|d_set_vsync_counter_cZ .lut_mask = "fafa";
3158 defparam \inst|vga_driver_unit|d_set_vsync_counter_cZ .operation_mode = "normal";
3159 defparam \inst|vga_driver_unit|d_set_vsync_counter_cZ .output_mode = "comb_only";
3160 defparam \inst|vga_driver_unit|d_set_vsync_counter_cZ .register_cascade_mode = "off";
3161 defparam \inst|vga_driver_unit|d_set_vsync_counter_cZ .sum_lutc_input = "datac";
3162 defparam \inst|vga_driver_unit|d_set_vsync_counter_cZ .synch_mode = "off";
3163 // synopsys translate_on
3164
3165 // atom is at LC_X30_Y38_N7
3166 stratix_lcell \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa_cZ (
3167 // Equation(s):
3168 // \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa  = \inst|dly_counter [0] & !\inst|vga_driver_unit|d_set_vsync_counter  & \reset~combout  & \inst|dly_counter [1]
3169
3170         .clk(gnd),
3171         .dataa(\inst|dly_counter [0]),
3172         .datab(\inst|vga_driver_unit|d_set_vsync_counter ),
3173         .datac(\reset~combout ),
3174         .datad(\inst|dly_counter [1]),
3175         .aclr(gnd),
3176         .aload(gnd),
3177         .sclr(gnd),
3178         .sload(gnd),
3179         .ena(vcc),
3180         .cin(gnd),
3181         .cin0(gnd),
3182         .cin1(vcc),
3183         .inverta(gnd),
3184         .regcascin(gnd),
3185         .devclrn(devclrn),
3186         .devpor(devpor),
3187         .combout(\inst|vga_driver_unit|vsync_counter_next_1_sqmuxa ),
3188         .regout(),
3189         .cout(),
3190         .cout0(),
3191         .cout1());
3192 // synopsys translate_off
3193 defparam \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa_cZ .lut_mask = "2000";
3194 defparam \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa_cZ .operation_mode = "normal";
3195 defparam \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa_cZ .output_mode = "comb_only";
3196 defparam \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa_cZ .register_cascade_mode = "off";
3197 defparam \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa_cZ .sum_lutc_input = "datac";
3198 defparam \inst|vga_driver_unit|vsync_counter_next_1_sqmuxa_cZ .synch_mode = "off";
3199 // synopsys translate_on
3200
3201 // atom is at LC_X28_Y39_N1
3202 stratix_lcell \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_6 (
3203 // Equation(s):
3204 // \inst|vga_driver_unit|un12_vsync_counter_6  = !\inst|vga_driver_unit|vsync_counter_6  & !\inst|vga_driver_unit|vsync_counter_7  & !\inst|vga_driver_unit|vsync_counter_5  & !\inst|vga_driver_unit|vsync_counter_8
3205
3206         .clk(gnd),
3207         .dataa(\inst|vga_driver_unit|vsync_counter_6 ),
3208         .datab(\inst|vga_driver_unit|vsync_counter_7 ),
3209         .datac(\inst|vga_driver_unit|vsync_counter_5 ),
3210         .datad(\inst|vga_driver_unit|vsync_counter_8 ),
3211         .aclr(gnd),
3212         .aload(gnd),
3213         .sclr(gnd),
3214         .sload(gnd),
3215         .ena(vcc),
3216         .cin(gnd),
3217         .cin0(gnd),
3218         .cin1(vcc),
3219         .inverta(gnd),
3220         .regcascin(gnd),
3221         .devclrn(devclrn),
3222         .devpor(devpor),
3223         .combout(\inst|vga_driver_unit|un12_vsync_counter_6 ),
3224         .regout(),
3225         .cout(),
3226         .cout0(),
3227         .cout1());
3228 // synopsys translate_off
3229 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_6 .lut_mask = "0001";
3230 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_6 .operation_mode = "normal";
3231 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_6 .output_mode = "comb_only";
3232 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_6 .register_cascade_mode = "off";
3233 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_6 .sum_lutc_input = "datac";
3234 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un12_vsync_counter_6 .synch_mode = "off";
3235 // synopsys translate_on
3236
3237 // atom is at LC_X28_Y39_N2
3238 stratix_lcell \inst|vga_driver_unit|VSYNC_FSM_next_un14_vsync_counter_8 (
3239 // Equation(s):
3240 // \inst|vga_driver_unit|un14_vsync_counter_8  = \inst|vga_driver_unit|un12_vsync_counter_6  & \inst|vga_driver_unit|un12_vsync_counter_7
3241
3242         .clk(gnd),
3243         .dataa(vcc),
3244         .datab(vcc),
3245         .datac(\inst|vga_driver_unit|un12_vsync_counter_6 ),
3246         .datad(\inst|vga_driver_unit|un12_vsync_counter_7 ),
3247         .aclr(gnd),
3248         .aload(gnd),
3249         .sclr(gnd),
3250         .sload(gnd),
3251         .ena(vcc),
3252         .cin(gnd),
3253         .cin0(gnd),
3254         .cin1(vcc),
3255         .inverta(gnd),
3256         .regcascin(gnd),
3257         .devclrn(devclrn),
3258         .devpor(devpor),
3259         .combout(\inst|vga_driver_unit|un14_vsync_counter_8 ),
3260         .regout(),
3261         .cout(),
3262         .cout0(),
3263         .cout1());
3264 // synopsys translate_off
3265 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un14_vsync_counter_8 .lut_mask = "f000";
3266 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un14_vsync_counter_8 .operation_mode = "normal";
3267 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un14_vsync_counter_8 .output_mode = "comb_only";
3268 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un14_vsync_counter_8 .register_cascade_mode = "off";
3269 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un14_vsync_counter_8 .sum_lutc_input = "datac";
3270 defparam \inst|vga_driver_unit|VSYNC_FSM_next_un14_vsync_counter_8 .synch_mode = "off";
3271 // synopsys translate_on
3272
3273 // atom is at LC_X30_Y39_N7
3274 stratix_lcell \inst|vga_driver_unit|vsync_state_4_ (
3275 // Equation(s):
3276 // \inst|vga_driver_unit|vsync_state_4  = DFFEAS(\inst|vga_driver_unit|un14_vsync_counter_8  & \inst|vga_driver_unit|vsync_counter_0  & \inst|vga_driver_unit|vsync_state_5  & !\inst|vga_driver_unit|vsync_counter_9 , GLOBAL(\inst1|altpll_component|_clk0 ),
3277 // VCC, , \inst|vga_driver_unit|vsync_state_next_2_sqmuxa , , , \inst|vga_driver_unit|un6_dly_counter_0_x , )
3278
3279         .clk(\inst1|altpll_component|_clk0 ),
3280         .dataa(\inst|vga_driver_unit|un14_vsync_counter_8 ),
3281         .datab(\inst|vga_driver_unit|vsync_counter_0 ),
3282         .datac(\inst|vga_driver_unit|vsync_state_5 ),
3283         .datad(\inst|vga_driver_unit|vsync_counter_9 ),
3284         .aclr(gnd),
3285         .aload(gnd),
3286         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
3287         .sload(gnd),
3288         .ena(\inst|vga_driver_unit|vsync_state_next_2_sqmuxa ),
3289         .cin(gnd),
3290         .cin0(gnd),
3291         .cin1(vcc),
3292         .inverta(gnd),
3293         .regcascin(gnd),
3294         .devclrn(devclrn),
3295         .devpor(devpor),
3296         .combout(),
3297         .regout(\inst|vga_driver_unit|vsync_state_4 ),
3298         .cout(),
3299         .cout0(),
3300         .cout1());
3301 // synopsys translate_off
3302 defparam \inst|vga_driver_unit|vsync_state_4_ .lut_mask = "0080";
3303 defparam \inst|vga_driver_unit|vsync_state_4_ .operation_mode = "normal";
3304 defparam \inst|vga_driver_unit|vsync_state_4_ .output_mode = "reg_only";
3305 defparam \inst|vga_driver_unit|vsync_state_4_ .register_cascade_mode = "off";
3306 defparam \inst|vga_driver_unit|vsync_state_4_ .sum_lutc_input = "datac";
3307 defparam \inst|vga_driver_unit|vsync_state_4_ .synch_mode = "on";
3308 // synopsys translate_on
3309
3310 // atom is at LC_X30_Y39_N5
3311 stratix_lcell \inst|vga_driver_unit|un1_vsync_state_2_0_cZ (
3312 // Equation(s):
3313 // \inst|vga_driver_unit|un1_vsync_state_2_0  = \inst|vga_driver_unit|vsync_state_3  # \inst|vga_driver_unit|vsync_state_1
3314
3315         .clk(gnd),
3316         .dataa(vcc),
3317         .datab(vcc),
3318         .datac(\inst|vga_driver_unit|vsync_state_3 ),
3319         .datad(\inst|vga_driver_unit|vsync_state_1 ),
3320         .aclr(gnd),
3321         .aload(gnd),
3322         .sclr(gnd),
3323         .sload(gnd),
3324         .ena(vcc),
3325         .cin(gnd),
3326         .cin0(gnd),
3327         .cin1(vcc),
3328         .inverta(gnd),
3329         .regcascin(gnd),
3330         .devclrn(devclrn),
3331         .devpor(devpor),
3332         .combout(\inst|vga_driver_unit|un1_vsync_state_2_0 ),
3333         .regout(),
3334         .cout(),
3335         .cout0(),
3336         .cout1());
3337 // synopsys translate_off
3338 defparam \inst|vga_driver_unit|un1_vsync_state_2_0_cZ .lut_mask = "fff0";
3339 defparam \inst|vga_driver_unit|un1_vsync_state_2_0_cZ .operation_mode = "normal";
3340 defparam \inst|vga_driver_unit|un1_vsync_state_2_0_cZ .output_mode = "comb_only";
3341 defparam \inst|vga_driver_unit|un1_vsync_state_2_0_cZ .register_cascade_mode = "off";
3342 defparam \inst|vga_driver_unit|un1_vsync_state_2_0_cZ .sum_lutc_input = "datac";
3343 defparam \inst|vga_driver_unit|un1_vsync_state_2_0_cZ .synch_mode = "off";
3344 // synopsys translate_on
3345
3346 // atom is at LC_X30_Y39_N6
3347 stratix_lcell \inst|vga_driver_unit|v_sync_1_0_0_0_g1_cZ (
3348 // Equation(s):
3349 // \inst|vga_driver_unit|v_sync_1_0_0_0_g1  = \inst|vga_driver_unit|vsync_state_2  & (\inst|vga_driver_unit|v_sync ) # !\inst|vga_driver_unit|vsync_state_2  & (\inst|vga_driver_unit|un1_vsync_state_2_0  & (\inst|vga_driver_unit|v_sync ) #
3350 // !\inst|vga_driver_unit|un1_vsync_state_2_0  & \inst|vga_driver_unit|vsync_state_4 )
3351
3352         .clk(gnd),
3353         .dataa(\inst|vga_driver_unit|vsync_state_4 ),
3354         .datab(\inst|vga_driver_unit|vsync_state_2 ),
3355         .datac(\inst|vga_driver_unit|v_sync ),
3356         .datad(\inst|vga_driver_unit|un1_vsync_state_2_0 ),
3357         .aclr(gnd),
3358         .aload(gnd),
3359         .sclr(gnd),
3360         .sload(gnd),
3361         .ena(vcc),
3362         .cin(gnd),
3363         .cin0(gnd),
3364         .cin1(vcc),
3365         .inverta(gnd),
3366         .regcascin(gnd),
3367         .devclrn(devclrn),
3368         .devpor(devpor),
3369         .combout(\inst|vga_driver_unit|v_sync_1_0_0_0_g1 ),
3370         .regout(),
3371         .cout(),
3372         .cout0(),
3373         .cout1());
3374 // synopsys translate_off
3375 defparam \inst|vga_driver_unit|v_sync_1_0_0_0_g1_cZ .lut_mask = "f0e2";
3376 defparam \inst|vga_driver_unit|v_sync_1_0_0_0_g1_cZ .operation_mode = "normal";
3377 defparam \inst|vga_driver_unit|v_sync_1_0_0_0_g1_cZ .output_mode = "comb_only";
3378 defparam \inst|vga_driver_unit|v_sync_1_0_0_0_g1_cZ .register_cascade_mode = "off";
3379 defparam \inst|vga_driver_unit|v_sync_1_0_0_0_g1_cZ .sum_lutc_input = "datac";
3380 defparam \inst|vga_driver_unit|v_sync_1_0_0_0_g1_cZ .synch_mode = "off";
3381 // synopsys translate_on
3382
3383 // atom is at LC_X30_Y39_N1
3384 stratix_lcell \inst|vga_driver_unit|v_sync_Z (
3385 // Equation(s):
3386 // \inst|vga_driver_unit|v_sync  = DFFEAS(\inst|vga_driver_unit|v_sync_1_0_0_0_g1  # !\inst|dly_counter [0] # !\reset~combout  # !\inst|dly_counter [1], GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , , , )
3387
3388         .clk(\inst1|altpll_component|_clk0 ),
3389         .dataa(\inst|dly_counter [1]),
3390         .datab(\inst|vga_driver_unit|v_sync_1_0_0_0_g1 ),
3391         .datac(\reset~combout ),
3392         .datad(\inst|dly_counter [0]),
3393         .aclr(gnd),
3394         .aload(gnd),
3395         .sclr(gnd),
3396         .sload(gnd),
3397         .ena(vcc),
3398         .cin(gnd),
3399         .cin0(gnd),
3400         .cin1(vcc),
3401         .inverta(gnd),
3402         .regcascin(gnd),
3403         .devclrn(devclrn),
3404         .devpor(devpor),
3405         .combout(),
3406         .regout(\inst|vga_driver_unit|v_sync ),
3407         .cout(),
3408         .cout0(),
3409         .cout1());
3410 // synopsys translate_off
3411 defparam \inst|vga_driver_unit|v_sync_Z .lut_mask = "dfff";
3412 defparam \inst|vga_driver_unit|v_sync_Z .operation_mode = "normal";
3413 defparam \inst|vga_driver_unit|v_sync_Z .output_mode = "reg_only";
3414 defparam \inst|vga_driver_unit|v_sync_Z .register_cascade_mode = "off";
3415 defparam \inst|vga_driver_unit|v_sync_Z .sum_lutc_input = "datac";
3416 defparam \inst|vga_driver_unit|v_sync_Z .synch_mode = "off";
3417 // synopsys translate_on
3418
3419 // atom is at LC_X30_Y38_N2
3420 stratix_lcell \inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1_cZ (
3421 // Equation(s):
3422 // \inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1  = \inst|dly_counter [0] & \inst|dly_counter [1] & \reset~combout  & !\inst|vga_driver_unit|hsync_state_1
3423
3424         .clk(gnd),
3425         .dataa(\inst|dly_counter [0]),
3426         .datab(\inst|dly_counter [1]),
3427         .datac(\reset~combout ),
3428         .datad(\inst|vga_driver_unit|hsync_state_1 ),
3429         .aclr(gnd),
3430         .aload(gnd),
3431         .sclr(gnd),
3432         .sload(gnd),
3433         .ena(vcc),
3434         .cin(gnd),
3435         .cin0(gnd),
3436         .cin1(vcc),
3437         .inverta(gnd),
3438         .regcascin(gnd),
3439         .devclrn(devclrn),
3440         .devpor(devpor),
3441         .combout(\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
3442         .regout(),
3443         .cout(),
3444         .cout0(),
3445         .cout1());
3446 // synopsys translate_off
3447 defparam \inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1_cZ .lut_mask = "0080";
3448 defparam \inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1_cZ .operation_mode = "normal";
3449 defparam \inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1_cZ .output_mode = "comb_only";
3450 defparam \inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1_cZ .register_cascade_mode = "off";
3451 defparam \inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1_cZ .sum_lutc_input = "datac";
3452 defparam \inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1_cZ .synch_mode = "off";
3453 // synopsys translate_on
3454
3455 // atom is at LC_X21_Y35_N4
3456 stratix_lcell \inst|vga_driver_unit|column_counter_sig_0_ (
3457 // Equation(s):
3458 // \inst|vga_driver_unit|column_counter_sig_0  = DFFEAS(!\inst|vga_driver_unit|un10_column_counter_siglto9  # !\inst|vga_driver_unit|column_counter_sig_0 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
3459 // !\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 , )
3460
3461         .clk(\inst1|altpll_component|_clk0 ),
3462         .dataa(\inst|vga_driver_unit|column_counter_sig_0 ),
3463         .datab(vcc),
3464         .datac(vcc),
3465         .datad(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
3466         .aclr(gnd),
3467         .aload(gnd),
3468         .sclr(!\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
3469         .sload(gnd),
3470         .ena(vcc),
3471         .cin(gnd),
3472         .cin0(gnd),
3473         .cin1(vcc),
3474         .inverta(gnd),
3475         .regcascin(gnd),
3476         .devclrn(devclrn),
3477         .devpor(devpor),
3478         .combout(),
3479         .regout(\inst|vga_driver_unit|column_counter_sig_0 ),
3480         .cout(),
3481         .cout0(),
3482         .cout1());
3483 // synopsys translate_off
3484 defparam \inst|vga_driver_unit|column_counter_sig_0_ .lut_mask = "55ff";
3485 defparam \inst|vga_driver_unit|column_counter_sig_0_ .operation_mode = "normal";
3486 defparam \inst|vga_driver_unit|column_counter_sig_0_ .output_mode = "reg_only";
3487 defparam \inst|vga_driver_unit|column_counter_sig_0_ .register_cascade_mode = "off";
3488 defparam \inst|vga_driver_unit|column_counter_sig_0_ .sum_lutc_input = "datac";
3489 defparam \inst|vga_driver_unit|column_counter_sig_0_ .synch_mode = "on";
3490 // synopsys translate_on
3491
3492 // atom is at LC_X25_Y35_N5
3493 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_1_ (
3494 // Equation(s):
3495 // \inst|vga_driver_unit|un2_column_counter_next_combout [1] = \inst|vga_driver_unit|column_counter_sig_0  $ \inst|vga_driver_unit|column_counter_sig_1
3496 // \inst|vga_driver_unit|un2_column_counter_next_cout [1] = CARRY(\inst|vga_driver_unit|column_counter_sig_0  & \inst|vga_driver_unit|column_counter_sig_1 )
3497 // \inst|vga_driver_unit|un2_column_counter_next_cout[1]~COUT1_10  = CARRY(\inst|vga_driver_unit|column_counter_sig_0  & \inst|vga_driver_unit|column_counter_sig_1 )
3498
3499         .clk(gnd),
3500         .dataa(\inst|vga_driver_unit|column_counter_sig_0 ),
3501         .datab(\inst|vga_driver_unit|column_counter_sig_1 ),
3502         .datac(vcc),
3503         .datad(vcc),
3504         .aclr(gnd),
3505         .aload(gnd),
3506         .sclr(gnd),
3507         .sload(gnd),
3508         .ena(vcc),
3509         .cin(gnd),
3510         .cin0(gnd),
3511         .cin1(vcc),
3512         .inverta(gnd),
3513         .regcascin(gnd),
3514         .devclrn(devclrn),
3515         .devpor(devpor),
3516         .combout(\inst|vga_driver_unit|un2_column_counter_next_combout [1]),
3517         .regout(),
3518         .cout(),
3519         .cout0(\inst|vga_driver_unit|un2_column_counter_next_cout [1]),
3520         .cout1(\inst|vga_driver_unit|un2_column_counter_next_cout[1]~COUT1_10 ));
3521 // synopsys translate_off
3522 defparam \inst|vga_driver_unit|un2_column_counter_next_1_ .lut_mask = "6688";
3523 defparam \inst|vga_driver_unit|un2_column_counter_next_1_ .operation_mode = "arithmetic";
3524 defparam \inst|vga_driver_unit|un2_column_counter_next_1_ .output_mode = "comb_only";
3525 defparam \inst|vga_driver_unit|un2_column_counter_next_1_ .register_cascade_mode = "off";
3526 defparam \inst|vga_driver_unit|un2_column_counter_next_1_ .sum_lutc_input = "datac";
3527 defparam \inst|vga_driver_unit|un2_column_counter_next_1_ .synch_mode = "off";
3528 // synopsys translate_on
3529
3530 // atom is at LC_X21_Y35_N8
3531 stratix_lcell \inst|vga_driver_unit|column_counter_sig_1_ (
3532 // Equation(s):
3533 // \inst|vga_driver_unit|column_counter_sig_1  = DFFEAS(\inst|vga_driver_unit|un2_column_counter_next_combout [1] # !\inst|vga_driver_unit|un10_column_counter_siglto9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
3534 // !\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 , )
3535
3536         .clk(\inst1|altpll_component|_clk0 ),
3537         .dataa(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
3538         .datab(vcc),
3539         .datac(vcc),
3540         .datad(\inst|vga_driver_unit|un2_column_counter_next_combout [1]),
3541         .aclr(gnd),
3542         .aload(gnd),
3543         .sclr(!\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
3544         .sload(gnd),
3545         .ena(vcc),
3546         .cin(gnd),
3547         .cin0(gnd),
3548         .cin1(vcc),
3549         .inverta(gnd),
3550         .regcascin(gnd),
3551         .devclrn(devclrn),
3552         .devpor(devpor),
3553         .combout(),
3554         .regout(\inst|vga_driver_unit|column_counter_sig_1 ),
3555         .cout(),
3556         .cout0(),
3557         .cout1());
3558 // synopsys translate_off
3559 defparam \inst|vga_driver_unit|column_counter_sig_1_ .lut_mask = "ff55";
3560 defparam \inst|vga_driver_unit|column_counter_sig_1_ .operation_mode = "normal";
3561 defparam \inst|vga_driver_unit|column_counter_sig_1_ .output_mode = "reg_only";
3562 defparam \inst|vga_driver_unit|column_counter_sig_1_ .register_cascade_mode = "off";
3563 defparam \inst|vga_driver_unit|column_counter_sig_1_ .sum_lutc_input = "datac";
3564 defparam \inst|vga_driver_unit|column_counter_sig_1_ .synch_mode = "on";
3565 // synopsys translate_on
3566
3567 // atom is at LC_X25_Y35_N6
3568 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_3_ (
3569 // Equation(s):
3570 // \inst|vga_driver_unit|un2_column_counter_next_combout [3] = \inst|vga_driver_unit|column_counter_sig_3  $ (\inst|vga_driver_unit|column_counter_sig_2  & \inst|vga_driver_unit|un2_column_counter_next_cout [1])
3571 // \inst|vga_driver_unit|un2_column_counter_next_cout [3] = CARRY(!\inst|vga_driver_unit|un2_column_counter_next_cout [1] # !\inst|vga_driver_unit|column_counter_sig_3  # !\inst|vga_driver_unit|column_counter_sig_2 )
3572 // \inst|vga_driver_unit|un2_column_counter_next_cout[3]~COUT1_12  = CARRY(!\inst|vga_driver_unit|un2_column_counter_next_cout[1]~COUT1_10  # !\inst|vga_driver_unit|column_counter_sig_3  # !\inst|vga_driver_unit|column_counter_sig_2 )
3573
3574         .clk(gnd),
3575         .dataa(\inst|vga_driver_unit|column_counter_sig_2 ),
3576         .datab(\inst|vga_driver_unit|column_counter_sig_3 ),
3577         .datac(vcc),
3578         .datad(vcc),
3579         .aclr(gnd),
3580         .aload(gnd),
3581         .sclr(gnd),
3582         .sload(gnd),
3583         .ena(vcc),
3584         .cin(gnd),
3585         .cin0(\inst|vga_driver_unit|un2_column_counter_next_cout [1]),
3586         .cin1(\inst|vga_driver_unit|un2_column_counter_next_cout[1]~COUT1_10 ),
3587         .inverta(gnd),
3588         .regcascin(gnd),
3589         .devclrn(devclrn),
3590         .devpor(devpor),
3591         .combout(\inst|vga_driver_unit|un2_column_counter_next_combout [3]),
3592         .regout(),
3593         .cout(),
3594         .cout0(\inst|vga_driver_unit|un2_column_counter_next_cout [3]),
3595         .cout1(\inst|vga_driver_unit|un2_column_counter_next_cout[3]~COUT1_12 ));
3596 // synopsys translate_off
3597 defparam \inst|vga_driver_unit|un2_column_counter_next_3_ .cin0_used = "true";
3598 defparam \inst|vga_driver_unit|un2_column_counter_next_3_ .cin1_used = "true";
3599 defparam \inst|vga_driver_unit|un2_column_counter_next_3_ .lut_mask = "6c7f";
3600 defparam \inst|vga_driver_unit|un2_column_counter_next_3_ .operation_mode = "arithmetic";
3601 defparam \inst|vga_driver_unit|un2_column_counter_next_3_ .output_mode = "comb_only";
3602 defparam \inst|vga_driver_unit|un2_column_counter_next_3_ .register_cascade_mode = "off";
3603 defparam \inst|vga_driver_unit|un2_column_counter_next_3_ .sum_lutc_input = "cin";
3604 defparam \inst|vga_driver_unit|un2_column_counter_next_3_ .synch_mode = "off";
3605 // synopsys translate_on
3606
3607 // atom is at LC_X21_Y35_N1
3608 stratix_lcell \inst|vga_driver_unit|column_counter_sig_3_ (
3609 // Equation(s):
3610 // \inst|vga_driver_unit|column_counter_sig_3  = DFFEAS(\inst|vga_driver_unit|un2_column_counter_next_combout [3] # !\inst|vga_driver_unit|un10_column_counter_siglto9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
3611 // !\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 , )
3612
3613         .clk(\inst1|altpll_component|_clk0 ),
3614         .dataa(vcc),
3615         .datab(vcc),
3616         .datac(\inst|vga_driver_unit|un2_column_counter_next_combout [3]),
3617         .datad(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
3618         .aclr(gnd),
3619         .aload(gnd),
3620         .sclr(!\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
3621         .sload(gnd),
3622         .ena(vcc),
3623         .cin(gnd),
3624         .cin0(gnd),
3625         .cin1(vcc),
3626         .inverta(gnd),
3627         .regcascin(gnd),
3628         .devclrn(devclrn),
3629         .devpor(devpor),
3630         .combout(),
3631         .regout(\inst|vga_driver_unit|column_counter_sig_3 ),
3632         .cout(),
3633         .cout0(),
3634         .cout1());
3635 // synopsys translate_off
3636 defparam \inst|vga_driver_unit|column_counter_sig_3_ .lut_mask = "f0ff";
3637 defparam \inst|vga_driver_unit|column_counter_sig_3_ .operation_mode = "normal";
3638 defparam \inst|vga_driver_unit|column_counter_sig_3_ .output_mode = "reg_only";
3639 defparam \inst|vga_driver_unit|column_counter_sig_3_ .register_cascade_mode = "off";
3640 defparam \inst|vga_driver_unit|column_counter_sig_3_ .sum_lutc_input = "datac";
3641 defparam \inst|vga_driver_unit|column_counter_sig_3_ .synch_mode = "on";
3642 // synopsys translate_on
3643
3644 // atom is at LC_X24_Y35_N0
3645 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_0_ (
3646 // Equation(s):
3647 // \inst|vga_driver_unit|un2_column_counter_next_cout [0] = CARRY(\inst|vga_driver_unit|column_counter_sig_1  & \inst|vga_driver_unit|column_counter_sig_0 )
3648 // \inst|vga_driver_unit|un2_column_counter_next_cout[0]~COUT1_18  = CARRY(\inst|vga_driver_unit|column_counter_sig_1  & \inst|vga_driver_unit|column_counter_sig_0 )
3649
3650         .clk(gnd),
3651         .dataa(\inst|vga_driver_unit|column_counter_sig_1 ),
3652         .datab(\inst|vga_driver_unit|column_counter_sig_0 ),
3653         .datac(vcc),
3654         .datad(vcc),
3655         .aclr(gnd),
3656         .aload(gnd),
3657         .sclr(gnd),
3658         .sload(gnd),
3659         .ena(vcc),
3660         .cin(gnd),
3661         .cin0(gnd),
3662         .cin1(vcc),
3663         .inverta(gnd),
3664         .regcascin(gnd),
3665         .devclrn(devclrn),
3666         .devpor(devpor),
3667         .combout(\inst|vga_driver_unit|un2_column_counter_next_0_~COMBOUT ),
3668         .regout(),
3669         .cout(),
3670         .cout0(\inst|vga_driver_unit|un2_column_counter_next_cout [0]),
3671         .cout1(\inst|vga_driver_unit|un2_column_counter_next_cout[0]~COUT1_18 ));
3672 // synopsys translate_off
3673 defparam \inst|vga_driver_unit|un2_column_counter_next_0_ .lut_mask = "ff88";
3674 defparam \inst|vga_driver_unit|un2_column_counter_next_0_ .operation_mode = "arithmetic";
3675 defparam \inst|vga_driver_unit|un2_column_counter_next_0_ .output_mode = "none";
3676 defparam \inst|vga_driver_unit|un2_column_counter_next_0_ .register_cascade_mode = "off";
3677 defparam \inst|vga_driver_unit|un2_column_counter_next_0_ .sum_lutc_input = "datac";
3678 defparam \inst|vga_driver_unit|un2_column_counter_next_0_ .synch_mode = "off";
3679 // synopsys translate_on
3680
3681 // atom is at LC_X24_Y35_N1
3682 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_2_ (
3683 // Equation(s):
3684 // \inst|vga_driver_unit|un2_column_counter_next_combout [2] = \inst|vga_driver_unit|column_counter_sig_2  $ (\inst|vga_driver_unit|un2_column_counter_next_cout [0])
3685 // \inst|vga_driver_unit|un2_column_counter_next_cout [2] = CARRY(!\inst|vga_driver_unit|un2_column_counter_next_cout [0] # !\inst|vga_driver_unit|column_counter_sig_3  # !\inst|vga_driver_unit|column_counter_sig_2 )
3686 // \inst|vga_driver_unit|un2_column_counter_next_cout[2]~COUT1_20  = CARRY(!\inst|vga_driver_unit|un2_column_counter_next_cout[0]~COUT1_18  # !\inst|vga_driver_unit|column_counter_sig_3  # !\inst|vga_driver_unit|column_counter_sig_2 )
3687
3688         .clk(gnd),
3689         .dataa(\inst|vga_driver_unit|column_counter_sig_2 ),
3690         .datab(\inst|vga_driver_unit|column_counter_sig_3 ),
3691         .datac(vcc),
3692         .datad(vcc),
3693         .aclr(gnd),
3694         .aload(gnd),
3695         .sclr(gnd),
3696         .sload(gnd),
3697         .ena(vcc),
3698         .cin(gnd),
3699         .cin0(\inst|vga_driver_unit|un2_column_counter_next_cout [0]),
3700         .cin1(\inst|vga_driver_unit|un2_column_counter_next_cout[0]~COUT1_18 ),
3701         .inverta(gnd),
3702         .regcascin(gnd),
3703         .devclrn(devclrn),
3704         .devpor(devpor),
3705         .combout(\inst|vga_driver_unit|un2_column_counter_next_combout [2]),
3706         .regout(),
3707         .cout(),
3708         .cout0(\inst|vga_driver_unit|un2_column_counter_next_cout [2]),
3709         .cout1(\inst|vga_driver_unit|un2_column_counter_next_cout[2]~COUT1_20 ));
3710 // synopsys translate_off
3711 defparam \inst|vga_driver_unit|un2_column_counter_next_2_ .cin0_used = "true";
3712 defparam \inst|vga_driver_unit|un2_column_counter_next_2_ .cin1_used = "true";
3713 defparam \inst|vga_driver_unit|un2_column_counter_next_2_ .lut_mask = "5a7f";
3714 defparam \inst|vga_driver_unit|un2_column_counter_next_2_ .operation_mode = "arithmetic";
3715 defparam \inst|vga_driver_unit|un2_column_counter_next_2_ .output_mode = "comb_only";
3716 defparam \inst|vga_driver_unit|un2_column_counter_next_2_ .register_cascade_mode = "off";
3717 defparam \inst|vga_driver_unit|un2_column_counter_next_2_ .sum_lutc_input = "cin";
3718 defparam \inst|vga_driver_unit|un2_column_counter_next_2_ .synch_mode = "off";
3719 // synopsys translate_on
3720
3721 // atom is at LC_X21_Y35_N6
3722 stratix_lcell \inst|vga_driver_unit|column_counter_sig_2_ (
3723 // Equation(s):
3724 // \inst|vga_driver_unit|column_counter_sig_2  = DFFEAS(\inst|vga_driver_unit|un2_column_counter_next_combout [2] # !\inst|vga_driver_unit|un10_column_counter_siglto9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
3725 // !\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 , )
3726
3727         .clk(\inst1|altpll_component|_clk0 ),
3728         .dataa(vcc),
3729         .datab(vcc),
3730         .datac(\inst|vga_driver_unit|un2_column_counter_next_combout [2]),
3731         .datad(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
3732         .aclr(gnd),
3733         .aload(gnd),
3734         .sclr(!\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
3735         .sload(gnd),
3736         .ena(vcc),
3737         .cin(gnd),
3738         .cin0(gnd),
3739         .cin1(vcc),
3740         .inverta(gnd),
3741         .regcascin(gnd),
3742         .devclrn(devclrn),
3743         .devpor(devpor),
3744         .combout(),
3745         .regout(\inst|vga_driver_unit|column_counter_sig_2 ),
3746         .cout(),
3747         .cout0(),
3748         .cout1());
3749 // synopsys translate_off
3750 defparam \inst|vga_driver_unit|column_counter_sig_2_ .lut_mask = "f0ff";
3751 defparam \inst|vga_driver_unit|column_counter_sig_2_ .operation_mode = "normal";
3752 defparam \inst|vga_driver_unit|column_counter_sig_2_ .output_mode = "reg_only";
3753 defparam \inst|vga_driver_unit|column_counter_sig_2_ .register_cascade_mode = "off";
3754 defparam \inst|vga_driver_unit|column_counter_sig_2_ .sum_lutc_input = "datac";
3755 defparam \inst|vga_driver_unit|column_counter_sig_2_ .synch_mode = "on";
3756 // synopsys translate_on
3757
3758 // atom is at LC_X24_Y35_N2
3759 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_4_ (
3760 // Equation(s):
3761 // \inst|vga_driver_unit|un2_column_counter_next_combout [4] = \inst|vga_driver_unit|column_counter_sig_4  $ !\inst|vga_driver_unit|un2_column_counter_next_cout [2]
3762 // \inst|vga_driver_unit|un2_column_counter_next_cout [4] = CARRY(\inst|vga_driver_unit|column_counter_sig_5  & \inst|vga_driver_unit|column_counter_sig_4  & !\inst|vga_driver_unit|un2_column_counter_next_cout [2])
3763 // \inst|vga_driver_unit|un2_column_counter_next_cout[4]~COUT1_22  = CARRY(\inst|vga_driver_unit|column_counter_sig_5  & \inst|vga_driver_unit|column_counter_sig_4  & !\inst|vga_driver_unit|un2_column_counter_next_cout[2]~COUT1_20 )
3764
3765         .clk(gnd),
3766         .dataa(\inst|vga_driver_unit|column_counter_sig_5 ),
3767         .datab(\inst|vga_driver_unit|column_counter_sig_4 ),
3768         .datac(vcc),
3769         .datad(vcc),
3770         .aclr(gnd),
3771         .aload(gnd),
3772         .sclr(gnd),
3773         .sload(gnd),
3774         .ena(vcc),
3775         .cin(gnd),
3776         .cin0(\inst|vga_driver_unit|un2_column_counter_next_cout [2]),
3777         .cin1(\inst|vga_driver_unit|un2_column_counter_next_cout[2]~COUT1_20 ),
3778         .inverta(gnd),
3779         .regcascin(gnd),
3780         .devclrn(devclrn),
3781         .devpor(devpor),
3782         .combout(\inst|vga_driver_unit|un2_column_counter_next_combout [4]),
3783         .regout(),
3784         .cout(),
3785         .cout0(\inst|vga_driver_unit|un2_column_counter_next_cout [4]),
3786         .cout1(\inst|vga_driver_unit|un2_column_counter_next_cout[4]~COUT1_22 ));
3787 // synopsys translate_off
3788 defparam \inst|vga_driver_unit|un2_column_counter_next_4_ .cin0_used = "true";
3789 defparam \inst|vga_driver_unit|un2_column_counter_next_4_ .cin1_used = "true";
3790 defparam \inst|vga_driver_unit|un2_column_counter_next_4_ .lut_mask = "c308";
3791 defparam \inst|vga_driver_unit|un2_column_counter_next_4_ .operation_mode = "arithmetic";
3792 defparam \inst|vga_driver_unit|un2_column_counter_next_4_ .output_mode = "comb_only";
3793 defparam \inst|vga_driver_unit|un2_column_counter_next_4_ .register_cascade_mode = "off";
3794 defparam \inst|vga_driver_unit|un2_column_counter_next_4_ .sum_lutc_input = "cin";
3795 defparam \inst|vga_driver_unit|un2_column_counter_next_4_ .synch_mode = "off";
3796 // synopsys translate_on
3797
3798 // atom is at LC_X21_Y35_N7
3799 stratix_lcell \inst|vga_driver_unit|column_counter_sig_4_ (
3800 // Equation(s):
3801 // \inst|vga_driver_unit|column_counter_sig_4  = DFFEAS(\inst|vga_driver_unit|un2_column_counter_next_combout [4] # !\inst|vga_driver_unit|un10_column_counter_siglto9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
3802 // !\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 , )
3803
3804         .clk(\inst1|altpll_component|_clk0 ),
3805         .dataa(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
3806         .datab(vcc),
3807         .datac(vcc),
3808         .datad(\inst|vga_driver_unit|un2_column_counter_next_combout [4]),
3809         .aclr(gnd),
3810         .aload(gnd),
3811         .sclr(!\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
3812         .sload(gnd),
3813         .ena(vcc),
3814         .cin(gnd),
3815         .cin0(gnd),
3816         .cin1(vcc),
3817         .inverta(gnd),
3818         .regcascin(gnd),
3819         .devclrn(devclrn),
3820         .devpor(devpor),
3821         .combout(),
3822         .regout(\inst|vga_driver_unit|column_counter_sig_4 ),
3823         .cout(),
3824         .cout0(),
3825         .cout1());
3826 // synopsys translate_off
3827 defparam \inst|vga_driver_unit|column_counter_sig_4_ .lut_mask = "ff55";
3828 defparam \inst|vga_driver_unit|column_counter_sig_4_ .operation_mode = "normal";
3829 defparam \inst|vga_driver_unit|column_counter_sig_4_ .output_mode = "reg_only";
3830 defparam \inst|vga_driver_unit|column_counter_sig_4_ .register_cascade_mode = "off";
3831 defparam \inst|vga_driver_unit|column_counter_sig_4_ .sum_lutc_input = "datac";
3832 defparam \inst|vga_driver_unit|column_counter_sig_4_ .synch_mode = "on";
3833 // synopsys translate_on
3834
3835 // atom is at LC_X25_Y35_N7
3836 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_5_ (
3837 // Equation(s):
3838 // \inst|vga_driver_unit|un2_column_counter_next_combout [5] = \inst|vga_driver_unit|column_counter_sig_5  $ (\inst|vga_driver_unit|column_counter_sig_4  & !\inst|vga_driver_unit|un2_column_counter_next_cout [3])
3839 // \inst|vga_driver_unit|un2_column_counter_next_cout [5] = CARRY(\inst|vga_driver_unit|column_counter_sig_5  & \inst|vga_driver_unit|column_counter_sig_4  & !\inst|vga_driver_unit|un2_column_counter_next_cout [3])
3840 // \inst|vga_driver_unit|un2_column_counter_next_cout[5]~COUT1_14  = CARRY(\inst|vga_driver_unit|column_counter_sig_5  & \inst|vga_driver_unit|column_counter_sig_4  & !\inst|vga_driver_unit|un2_column_counter_next_cout[3]~COUT1_12 )
3841
3842         .clk(gnd),
3843         .dataa(\inst|vga_driver_unit|column_counter_sig_5 ),
3844         .datab(\inst|vga_driver_unit|column_counter_sig_4 ),
3845         .datac(vcc),
3846         .datad(vcc),
3847         .aclr(gnd),
3848         .aload(gnd),
3849         .sclr(gnd),
3850         .sload(gnd),
3851         .ena(vcc),
3852         .cin(gnd),
3853         .cin0(\inst|vga_driver_unit|un2_column_counter_next_cout [3]),
3854         .cin1(\inst|vga_driver_unit|un2_column_counter_next_cout[3]~COUT1_12 ),
3855         .inverta(gnd),
3856         .regcascin(gnd),
3857         .devclrn(devclrn),
3858         .devpor(devpor),
3859         .combout(\inst|vga_driver_unit|un2_column_counter_next_combout [5]),
3860         .regout(),
3861         .cout(),
3862         .cout0(\inst|vga_driver_unit|un2_column_counter_next_cout [5]),
3863         .cout1(\inst|vga_driver_unit|un2_column_counter_next_cout[5]~COUT1_14 ));
3864 // synopsys translate_off
3865 defparam \inst|vga_driver_unit|un2_column_counter_next_5_ .cin0_used = "true";
3866 defparam \inst|vga_driver_unit|un2_column_counter_next_5_ .cin1_used = "true";
3867 defparam \inst|vga_driver_unit|un2_column_counter_next_5_ .lut_mask = "a608";
3868 defparam \inst|vga_driver_unit|un2_column_counter_next_5_ .operation_mode = "arithmetic";
3869 defparam \inst|vga_driver_unit|un2_column_counter_next_5_ .output_mode = "comb_only";
3870 defparam \inst|vga_driver_unit|un2_column_counter_next_5_ .register_cascade_mode = "off";
3871 defparam \inst|vga_driver_unit|un2_column_counter_next_5_ .sum_lutc_input = "cin";
3872 defparam \inst|vga_driver_unit|un2_column_counter_next_5_ .synch_mode = "off";
3873 // synopsys translate_on
3874
3875 // atom is at LC_X21_Y35_N0
3876 stratix_lcell \inst|vga_driver_unit|column_counter_sig_5_ (
3877 // Equation(s):
3878 // \inst|vga_driver_unit|column_counter_sig_5  = DFFEAS(\inst|vga_driver_unit|un2_column_counter_next_combout [5] # !\inst|vga_driver_unit|un10_column_counter_siglto9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
3879 // !\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 , )
3880
3881         .clk(\inst1|altpll_component|_clk0 ),
3882         .dataa(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
3883         .datab(vcc),
3884         .datac(vcc),
3885         .datad(\inst|vga_driver_unit|un2_column_counter_next_combout [5]),
3886         .aclr(gnd),
3887         .aload(gnd),
3888         .sclr(!\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
3889         .sload(gnd),
3890         .ena(vcc),
3891         .cin(gnd),
3892         .cin0(gnd),
3893         .cin1(vcc),
3894         .inverta(gnd),
3895         .regcascin(gnd),
3896         .devclrn(devclrn),
3897         .devpor(devpor),
3898         .combout(),
3899         .regout(\inst|vga_driver_unit|column_counter_sig_5 ),
3900         .cout(),
3901         .cout0(),
3902         .cout1());
3903 // synopsys translate_off
3904 defparam \inst|vga_driver_unit|column_counter_sig_5_ .lut_mask = "ff55";
3905 defparam \inst|vga_driver_unit|column_counter_sig_5_ .operation_mode = "normal";
3906 defparam \inst|vga_driver_unit|column_counter_sig_5_ .output_mode = "reg_only";
3907 defparam \inst|vga_driver_unit|column_counter_sig_5_ .register_cascade_mode = "off";
3908 defparam \inst|vga_driver_unit|column_counter_sig_5_ .sum_lutc_input = "datac";
3909 defparam \inst|vga_driver_unit|column_counter_sig_5_ .synch_mode = "on";
3910 // synopsys translate_on
3911
3912 // atom is at LC_X24_Y35_N3
3913 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_6_ (
3914 // Equation(s):
3915 // \inst|vga_driver_unit|un2_column_counter_next_combout [6] = \inst|vga_driver_unit|column_counter_sig_6  $ (\inst|vga_driver_unit|un2_column_counter_next_cout [4])
3916 // \inst|vga_driver_unit|un2_column_counter_next_cout [6] = CARRY(!\inst|vga_driver_unit|un2_column_counter_next_cout [4] # !\inst|vga_driver_unit|column_counter_sig_7  # !\inst|vga_driver_unit|column_counter_sig_6 )
3917 // \inst|vga_driver_unit|un2_column_counter_next_cout[6]~COUT1_24  = CARRY(!\inst|vga_driver_unit|un2_column_counter_next_cout[4]~COUT1_22  # !\inst|vga_driver_unit|column_counter_sig_7  # !\inst|vga_driver_unit|column_counter_sig_6 )
3918
3919         .clk(gnd),
3920         .dataa(\inst|vga_driver_unit|column_counter_sig_6 ),
3921         .datab(\inst|vga_driver_unit|column_counter_sig_7 ),
3922         .datac(vcc),
3923         .datad(vcc),
3924         .aclr(gnd),
3925         .aload(gnd),
3926         .sclr(gnd),
3927         .sload(gnd),
3928         .ena(vcc),
3929         .cin(gnd),
3930         .cin0(\inst|vga_driver_unit|un2_column_counter_next_cout [4]),
3931         .cin1(\inst|vga_driver_unit|un2_column_counter_next_cout[4]~COUT1_22 ),
3932         .inverta(gnd),
3933         .regcascin(gnd),
3934         .devclrn(devclrn),
3935         .devpor(devpor),
3936         .combout(\inst|vga_driver_unit|un2_column_counter_next_combout [6]),
3937         .regout(),
3938         .cout(),
3939         .cout0(\inst|vga_driver_unit|un2_column_counter_next_cout [6]),
3940         .cout1(\inst|vga_driver_unit|un2_column_counter_next_cout[6]~COUT1_24 ));
3941 // synopsys translate_off
3942 defparam \inst|vga_driver_unit|un2_column_counter_next_6_ .cin0_used = "true";
3943 defparam \inst|vga_driver_unit|un2_column_counter_next_6_ .cin1_used = "true";
3944 defparam \inst|vga_driver_unit|un2_column_counter_next_6_ .lut_mask = "5a7f";
3945 defparam \inst|vga_driver_unit|un2_column_counter_next_6_ .operation_mode = "arithmetic";
3946 defparam \inst|vga_driver_unit|un2_column_counter_next_6_ .output_mode = "comb_only";
3947 defparam \inst|vga_driver_unit|un2_column_counter_next_6_ .register_cascade_mode = "off";
3948 defparam \inst|vga_driver_unit|un2_column_counter_next_6_ .sum_lutc_input = "cin";
3949 defparam \inst|vga_driver_unit|un2_column_counter_next_6_ .synch_mode = "off";
3950 // synopsys translate_on
3951
3952 // atom is at LC_X24_Y35_N4
3953 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_8_ (
3954 // Equation(s):
3955 // \inst|vga_driver_unit|un2_column_counter_next_combout [8] = \inst|vga_driver_unit|un2_column_counter_next_cout [6] $ !\inst|vga_driver_unit|column_counter_sig_8
3956
3957         .clk(gnd),
3958         .dataa(vcc),
3959         .datab(vcc),
3960         .datac(vcc),
3961         .datad(\inst|vga_driver_unit|column_counter_sig_8 ),
3962         .aclr(gnd),
3963         .aload(gnd),
3964         .sclr(gnd),
3965         .sload(gnd),
3966         .ena(vcc),
3967         .cin(gnd),
3968         .cin0(\inst|vga_driver_unit|un2_column_counter_next_cout [6]),
3969         .cin1(\inst|vga_driver_unit|un2_column_counter_next_cout[6]~COUT1_24 ),
3970         .inverta(gnd),
3971         .regcascin(gnd),
3972         .devclrn(devclrn),
3973         .devpor(devpor),
3974         .combout(\inst|vga_driver_unit|un2_column_counter_next_combout [8]),
3975         .regout(),
3976         .cout(),
3977         .cout0(),
3978         .cout1());
3979 // synopsys translate_off
3980 defparam \inst|vga_driver_unit|un2_column_counter_next_8_ .cin0_used = "true";
3981 defparam \inst|vga_driver_unit|un2_column_counter_next_8_ .cin1_used = "true";
3982 defparam \inst|vga_driver_unit|un2_column_counter_next_8_ .lut_mask = "f00f";
3983 defparam \inst|vga_driver_unit|un2_column_counter_next_8_ .operation_mode = "normal";
3984 defparam \inst|vga_driver_unit|un2_column_counter_next_8_ .output_mode = "comb_only";
3985 defparam \inst|vga_driver_unit|un2_column_counter_next_8_ .register_cascade_mode = "off";
3986 defparam \inst|vga_driver_unit|un2_column_counter_next_8_ .sum_lutc_input = "cin";
3987 defparam \inst|vga_driver_unit|un2_column_counter_next_8_ .synch_mode = "off";
3988 // synopsys translate_on
3989
3990 // atom is at LC_X25_Y35_N3
3991 stratix_lcell \inst|vga_driver_unit|column_counter_sig_8_ (
3992 // Equation(s):
3993 // \inst|vga_driver_unit|column_counter_sig_8  = DFFEAS(\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1  & \inst|vga_driver_unit|un10_column_counter_siglto9  & (\inst|vga_driver_unit|un2_column_counter_next_combout [8]),
3994 // GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , , , )
3995
3996         .clk(\inst1|altpll_component|_clk0 ),
3997         .dataa(\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
3998         .datab(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
3999         .datac(vcc),
4000         .datad(\inst|vga_driver_unit|un2_column_counter_next_combout [8]),
4001         .aclr(gnd),
4002         .aload(gnd),
4003         .sclr(gnd),
4004         .sload(gnd),
4005         .ena(vcc),
4006         .cin(gnd),
4007         .cin0(gnd),
4008         .cin1(vcc),
4009         .inverta(gnd),
4010         .regcascin(gnd),
4011         .devclrn(devclrn),
4012         .devpor(devpor),
4013         .combout(),
4014         .regout(\inst|vga_driver_unit|column_counter_sig_8 ),
4015         .cout(),
4016         .cout0(),
4017         .cout1());
4018 // synopsys translate_off
4019 defparam \inst|vga_driver_unit|column_counter_sig_8_ .lut_mask = "8800";
4020 defparam \inst|vga_driver_unit|column_counter_sig_8_ .operation_mode = "normal";
4021 defparam \inst|vga_driver_unit|column_counter_sig_8_ .output_mode = "reg_only";
4022 defparam \inst|vga_driver_unit|column_counter_sig_8_ .register_cascade_mode = "off";
4023 defparam \inst|vga_driver_unit|column_counter_sig_8_ .sum_lutc_input = "datac";
4024 defparam \inst|vga_driver_unit|column_counter_sig_8_ .synch_mode = "off";
4025 // synopsys translate_on
4026
4027 // atom is at LC_X21_Y35_N5
4028 stratix_lcell \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_4 (
4029 // Equation(s):
4030 // \inst|vga_driver_unit|un10_column_counter_siglt6_4  = !\inst|vga_driver_unit|column_counter_sig_1  # !\inst|vga_driver_unit|column_counter_sig_3  # !\inst|vga_driver_unit|column_counter_sig_2  # !\inst|vga_driver_unit|column_counter_sig_0
4031
4032         .clk(gnd),
4033         .dataa(\inst|vga_driver_unit|column_counter_sig_0 ),
4034         .datab(\inst|vga_driver_unit|column_counter_sig_2 ),
4035         .datac(\inst|vga_driver_unit|column_counter_sig_3 ),
4036         .datad(\inst|vga_driver_unit|column_counter_sig_1 ),
4037         .aclr(gnd),
4038         .aload(gnd),
4039         .sclr(gnd),
4040         .sload(gnd),
4041         .ena(vcc),
4042         .cin(gnd),
4043         .cin0(gnd),
4044         .cin1(vcc),
4045         .inverta(gnd),
4046         .regcascin(gnd),
4047         .devclrn(devclrn),
4048         .devpor(devpor),
4049         .combout(\inst|vga_driver_unit|un10_column_counter_siglt6_4 ),
4050         .regout(),
4051         .cout(),
4052         .cout0(),
4053         .cout1());
4054 // synopsys translate_off
4055 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_4 .lut_mask = "7fff";
4056 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_4 .operation_mode = "normal";
4057 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_4 .output_mode = "comb_only";
4058 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_4 .register_cascade_mode = "off";
4059 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_4 .sum_lutc_input = "datac";
4060 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6_4 .synch_mode = "off";
4061 // synopsys translate_on
4062
4063 // atom is at LC_X21_Y35_N3
4064 stratix_lcell \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6 (
4065 // Equation(s):
4066 // \inst|vga_driver_unit|un10_column_counter_siglt6  = \inst|vga_driver_unit|un10_column_counter_siglt6_4  # !\inst|vga_driver_unit|column_counter_sig_5  # !\inst|vga_driver_unit|column_counter_sig_4  # !\inst|vga_driver_unit|column_counter_sig_6
4067
4068         .clk(gnd),
4069         .dataa(\inst|vga_driver_unit|un10_column_counter_siglt6_4 ),
4070         .datab(\inst|vga_driver_unit|column_counter_sig_6 ),
4071         .datac(\inst|vga_driver_unit|column_counter_sig_4 ),
4072         .datad(\inst|vga_driver_unit|column_counter_sig_5 ),
4073         .aclr(gnd),
4074         .aload(gnd),
4075         .sclr(gnd),
4076         .sload(gnd),
4077         .ena(vcc),
4078         .cin(gnd),
4079         .cin0(gnd),
4080         .cin1(vcc),
4081         .inverta(gnd),
4082         .regcascin(gnd),
4083         .devclrn(devclrn),
4084         .devpor(devpor),
4085         .combout(\inst|vga_driver_unit|un10_column_counter_siglt6 ),
4086         .regout(),
4087         .cout(),
4088         .cout0(),
4089         .cout1());
4090 // synopsys translate_off
4091 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6 .lut_mask = "bfff";
4092 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6 .operation_mode = "normal";
4093 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6 .output_mode = "comb_only";
4094 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6 .register_cascade_mode = "off";
4095 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6 .sum_lutc_input = "datac";
4096 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglt6 .synch_mode = "off";
4097 // synopsys translate_on
4098
4099 // atom is at LC_X25_Y35_N8
4100 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_7_ (
4101 // Equation(s):
4102 // \inst|vga_driver_unit|un2_column_counter_next_combout [7] = \inst|vga_driver_unit|column_counter_sig_7  $ (\inst|vga_driver_unit|column_counter_sig_6  & \inst|vga_driver_unit|un2_column_counter_next_cout [5])
4103 // \inst|vga_driver_unit|un2_column_counter_next_cout [7] = CARRY(!\inst|vga_driver_unit|un2_column_counter_next_cout [5] # !\inst|vga_driver_unit|column_counter_sig_6  # !\inst|vga_driver_unit|column_counter_sig_7 )
4104 // \inst|vga_driver_unit|un2_column_counter_next_cout[7]~COUT1_16  = CARRY(!\inst|vga_driver_unit|un2_column_counter_next_cout[5]~COUT1_14  # !\inst|vga_driver_unit|column_counter_sig_6  # !\inst|vga_driver_unit|column_counter_sig_7 )
4105
4106         .clk(gnd),
4107         .dataa(\inst|vga_driver_unit|column_counter_sig_7 ),
4108         .datab(\inst|vga_driver_unit|column_counter_sig_6 ),
4109         .datac(vcc),
4110         .datad(vcc),
4111         .aclr(gnd),
4112         .aload(gnd),
4113         .sclr(gnd),
4114         .sload(gnd),
4115         .ena(vcc),
4116         .cin(gnd),
4117         .cin0(\inst|vga_driver_unit|un2_column_counter_next_cout [5]),
4118         .cin1(\inst|vga_driver_unit|un2_column_counter_next_cout[5]~COUT1_14 ),
4119         .inverta(gnd),
4120         .regcascin(gnd),
4121         .devclrn(devclrn),
4122         .devpor(devpor),
4123         .combout(\inst|vga_driver_unit|un2_column_counter_next_combout [7]),
4124         .regout(),
4125         .cout(),
4126         .cout0(\inst|vga_driver_unit|un2_column_counter_next_cout [7]),
4127         .cout1(\inst|vga_driver_unit|un2_column_counter_next_cout[7]~COUT1_16 ));
4128 // synopsys translate_off
4129 defparam \inst|vga_driver_unit|un2_column_counter_next_7_ .cin0_used = "true";
4130 defparam \inst|vga_driver_unit|un2_column_counter_next_7_ .cin1_used = "true";
4131 defparam \inst|vga_driver_unit|un2_column_counter_next_7_ .lut_mask = "6a7f";
4132 defparam \inst|vga_driver_unit|un2_column_counter_next_7_ .operation_mode = "arithmetic";
4133 defparam \inst|vga_driver_unit|un2_column_counter_next_7_ .output_mode = "comb_only";
4134 defparam \inst|vga_driver_unit|un2_column_counter_next_7_ .register_cascade_mode = "off";
4135 defparam \inst|vga_driver_unit|un2_column_counter_next_7_ .sum_lutc_input = "cin";
4136 defparam \inst|vga_driver_unit|un2_column_counter_next_7_ .synch_mode = "off";
4137 // synopsys translate_on
4138
4139 // atom is at LC_X25_Y35_N9
4140 stratix_lcell \inst|vga_driver_unit|un2_column_counter_next_9_ (
4141 // Equation(s):
4142 // \inst|vga_driver_unit|un2_column_counter_next_combout [9] = \inst|vga_driver_unit|column_counter_sig_9  $ (\inst|vga_driver_unit|column_counter_sig_8  & !\inst|vga_driver_unit|un2_column_counter_next_cout [7])
4143
4144         .clk(gnd),
4145         .dataa(\inst|vga_driver_unit|column_counter_sig_8 ),
4146         .datab(\inst|vga_driver_unit|column_counter_sig_9 ),
4147         .datac(vcc),
4148         .datad(vcc),
4149         .aclr(gnd),
4150         .aload(gnd),
4151         .sclr(gnd),
4152         .sload(gnd),
4153         .ena(vcc),
4154         .cin(gnd),
4155         .cin0(\inst|vga_driver_unit|un2_column_counter_next_cout [7]),
4156         .cin1(\inst|vga_driver_unit|un2_column_counter_next_cout[7]~COUT1_16 ),
4157         .inverta(gnd),
4158         .regcascin(gnd),
4159         .devclrn(devclrn),
4160         .devpor(devpor),
4161         .combout(\inst|vga_driver_unit|un2_column_counter_next_combout [9]),
4162         .regout(),
4163         .cout(),
4164         .cout0(),
4165         .cout1());
4166 // synopsys translate_off
4167 defparam \inst|vga_driver_unit|un2_column_counter_next_9_ .cin0_used = "true";
4168 defparam \inst|vga_driver_unit|un2_column_counter_next_9_ .cin1_used = "true";
4169 defparam \inst|vga_driver_unit|un2_column_counter_next_9_ .lut_mask = "c6c6";
4170 defparam \inst|vga_driver_unit|un2_column_counter_next_9_ .operation_mode = "normal";
4171 defparam \inst|vga_driver_unit|un2_column_counter_next_9_ .output_mode = "comb_only";
4172 defparam \inst|vga_driver_unit|un2_column_counter_next_9_ .register_cascade_mode = "off";
4173 defparam \inst|vga_driver_unit|un2_column_counter_next_9_ .sum_lutc_input = "cin";
4174 defparam \inst|vga_driver_unit|un2_column_counter_next_9_ .synch_mode = "off";
4175 // synopsys translate_on
4176
4177 // atom is at LC_X25_Y35_N1
4178 stratix_lcell \inst|vga_driver_unit|column_counter_sig_9_ (
4179 // Equation(s):
4180 // \inst|vga_driver_unit|column_counter_sig_9  = DFFEAS(\inst|vga_driver_unit|un2_column_counter_next_combout [9] # !\inst|vga_driver_unit|un10_column_counter_siglto9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
4181 // !\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 , )
4182
4183         .clk(\inst1|altpll_component|_clk0 ),
4184         .dataa(vcc),
4185         .datab(vcc),
4186         .datac(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
4187         .datad(\inst|vga_driver_unit|un2_column_counter_next_combout [9]),
4188         .aclr(gnd),
4189         .aload(gnd),
4190         .sclr(!\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
4191         .sload(gnd),
4192         .ena(vcc),
4193         .cin(gnd),
4194         .cin0(gnd),
4195         .cin1(vcc),
4196         .inverta(gnd),
4197         .regcascin(gnd),
4198         .devclrn(devclrn),
4199         .devpor(devpor),
4200         .combout(),
4201         .regout(\inst|vga_driver_unit|column_counter_sig_9 ),
4202         .cout(),
4203         .cout0(),
4204         .cout1());
4205 // synopsys translate_off
4206 defparam \inst|vga_driver_unit|column_counter_sig_9_ .lut_mask = "ff0f";
4207 defparam \inst|vga_driver_unit|column_counter_sig_9_ .operation_mode = "normal";
4208 defparam \inst|vga_driver_unit|column_counter_sig_9_ .output_mode = "reg_only";
4209 defparam \inst|vga_driver_unit|column_counter_sig_9_ .register_cascade_mode = "off";
4210 defparam \inst|vga_driver_unit|column_counter_sig_9_ .sum_lutc_input = "datac";
4211 defparam \inst|vga_driver_unit|column_counter_sig_9_ .synch_mode = "on";
4212 // synopsys translate_on
4213
4214 // atom is at LC_X21_Y35_N2
4215 stratix_lcell \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglto9 (
4216 // Equation(s):
4217 // \inst|vga_driver_unit|un10_column_counter_siglto9  = !\inst|vga_driver_unit|column_counter_sig_8  & !\inst|vga_driver_unit|column_counter_sig_7  & \inst|vga_driver_unit|un10_column_counter_siglt6  # !\inst|vga_driver_unit|column_counter_sig_9
4218
4219         .clk(gnd),
4220         .dataa(\inst|vga_driver_unit|column_counter_sig_8 ),
4221         .datab(\inst|vga_driver_unit|column_counter_sig_7 ),
4222         .datac(\inst|vga_driver_unit|un10_column_counter_siglt6 ),
4223         .datad(\inst|vga_driver_unit|column_counter_sig_9 ),
4224         .aclr(gnd),
4225         .aload(gnd),
4226         .sclr(gnd),
4227         .sload(gnd),
4228         .ena(vcc),
4229         .cin(gnd),
4230         .cin0(gnd),
4231         .cin1(vcc),
4232         .inverta(gnd),
4233         .regcascin(gnd),
4234         .devclrn(devclrn),
4235         .devpor(devpor),
4236         .combout(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
4237         .regout(),
4238         .cout(),
4239         .cout0(),
4240         .cout1());
4241 // synopsys translate_off
4242 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglto9 .lut_mask = "10ff";
4243 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglto9 .operation_mode = "normal";
4244 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglto9 .output_mode = "comb_only";
4245 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglto9 .register_cascade_mode = "off";
4246 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglto9 .sum_lutc_input = "datac";
4247 defparam \inst|vga_driver_unit|COLUMN_COUNT_next_un10_column_counter_siglto9 .synch_mode = "off";
4248 // synopsys translate_on
4249
4250 // atom is at LC_X25_Y35_N2
4251 stratix_lcell \inst|vga_driver_unit|column_counter_sig_7_ (
4252 // Equation(s):
4253 // \inst|vga_driver_unit|column_counter_sig_7  = DFFEAS(\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1  & (\inst|vga_driver_unit|un10_column_counter_siglto9  & \inst|vga_driver_unit|un2_column_counter_next_combout [7]),
4254 // GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , , , )
4255
4256         .clk(\inst1|altpll_component|_clk0 ),
4257         .dataa(\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
4258         .datab(vcc),
4259         .datac(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
4260         .datad(\inst|vga_driver_unit|un2_column_counter_next_combout [7]),
4261         .aclr(gnd),
4262         .aload(gnd),
4263         .sclr(gnd),
4264         .sload(gnd),
4265         .ena(vcc),
4266         .cin(gnd),
4267         .cin0(gnd),
4268         .cin1(vcc),
4269         .inverta(gnd),
4270         .regcascin(gnd),
4271         .devclrn(devclrn),
4272         .devpor(devpor),
4273         .combout(),
4274         .regout(\inst|vga_driver_unit|column_counter_sig_7 ),
4275         .cout(),
4276         .cout0(),
4277         .cout1());
4278 // synopsys translate_off
4279 defparam \inst|vga_driver_unit|column_counter_sig_7_ .lut_mask = "a000";
4280 defparam \inst|vga_driver_unit|column_counter_sig_7_ .operation_mode = "normal";
4281 defparam \inst|vga_driver_unit|column_counter_sig_7_ .output_mode = "reg_only";
4282 defparam \inst|vga_driver_unit|column_counter_sig_7_ .register_cascade_mode = "off";
4283 defparam \inst|vga_driver_unit|column_counter_sig_7_ .sum_lutc_input = "datac";
4284 defparam \inst|vga_driver_unit|column_counter_sig_7_ .synch_mode = "off";
4285 // synopsys translate_on
4286
4287 // atom is at LC_X21_Y35_N9
4288 stratix_lcell \inst|vga_driver_unit|column_counter_sig_6_ (
4289 // Equation(s):
4290 // \inst|vga_driver_unit|column_counter_sig_6  = DFFEAS(\inst|vga_driver_unit|un2_column_counter_next_combout [6] # !\inst|vga_driver_unit|un10_column_counter_siglto9 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
4291 // !\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 , )
4292
4293         .clk(\inst1|altpll_component|_clk0 ),
4294         .dataa(vcc),
4295         .datab(vcc),
4296         .datac(\inst|vga_driver_unit|un2_column_counter_next_combout [6]),
4297         .datad(\inst|vga_driver_unit|un10_column_counter_siglto9 ),
4298         .aclr(gnd),
4299         .aload(gnd),
4300         .sclr(!\inst|vga_driver_unit|column_counter_next_0_sqmuxa_1_1 ),
4301         .sload(gnd),
4302         .ena(vcc),
4303         .cin(gnd),
4304         .cin0(gnd),
4305         .cin1(vcc),
4306         .inverta(gnd),
4307         .regcascin(gnd),
4308         .devclrn(devclrn),
4309         .devpor(devpor),
4310         .combout(),
4311         .regout(\inst|vga_driver_unit|column_counter_sig_6 ),
4312         .cout(),
4313         .cout0(),
4314         .cout1());
4315 // synopsys translate_off
4316 defparam \inst|vga_driver_unit|column_counter_sig_6_ .lut_mask = "f0ff";
4317 defparam \inst|vga_driver_unit|column_counter_sig_6_ .operation_mode = "normal";
4318 defparam \inst|vga_driver_unit|column_counter_sig_6_ .output_mode = "reg_only";
4319 defparam \inst|vga_driver_unit|column_counter_sig_6_ .register_cascade_mode = "off";
4320 defparam \inst|vga_driver_unit|column_counter_sig_6_ .sum_lutc_input = "datac";
4321 defparam \inst|vga_driver_unit|column_counter_sig_6_ .synch_mode = "on";
4322 // synopsys translate_on
4323
4324 // atom is at LC_X25_Y35_N4
4325 stratix_lcell \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelt2 (
4326 // Equation(s):
4327 // \inst|vga_control_unit|un5_v_enablelt2  = \inst|vga_driver_unit|column_counter_sig_1  # \inst|vga_driver_unit|column_counter_sig_0  # \inst|vga_driver_unit|column_counter_sig_2
4328
4329         .clk(gnd),
4330         .dataa(vcc),
4331         .datab(\inst|vga_driver_unit|column_counter_sig_1 ),
4332         .datac(\inst|vga_driver_unit|column_counter_sig_0 ),
4333         .datad(\inst|vga_driver_unit|column_counter_sig_2 ),
4334         .aclr(gnd),
4335         .aload(gnd),
4336         .sclr(gnd),
4337         .sload(gnd),
4338         .ena(vcc),
4339         .cin(gnd),
4340         .cin0(gnd),
4341         .cin1(vcc),
4342         .inverta(gnd),
4343         .regcascin(gnd),
4344         .devclrn(devclrn),
4345         .devpor(devpor),
4346         .combout(\inst|vga_control_unit|un5_v_enablelt2 ),
4347         .regout(),
4348         .cout(),
4349         .cout0(),
4350         .cout1());
4351 // synopsys translate_off
4352 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelt2 .lut_mask = "fffc";
4353 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelt2 .operation_mode = "normal";
4354 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelt2 .output_mode = "comb_only";
4355 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelt2 .register_cascade_mode = "off";
4356 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelt2 .sum_lutc_input = "datac";
4357 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelt2 .synch_mode = "off";
4358 // synopsys translate_on
4359
4360 // atom is at LC_X28_Y35_N7
4361 stratix_lcell \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelto5 (
4362 // Equation(s):
4363 // \inst|vga_control_unit|un5_v_enablelto5  = \inst|vga_driver_unit|column_counter_sig_5  # \inst|vga_driver_unit|column_counter_sig_4  # \inst|vga_driver_unit|column_counter_sig_3  & \inst|vga_control_unit|un5_v_enablelt2
4364
4365         .clk(gnd),
4366         .dataa(\inst|vga_driver_unit|column_counter_sig_5 ),
4367         .datab(\inst|vga_driver_unit|column_counter_sig_3 ),
4368         .datac(\inst|vga_driver_unit|column_counter_sig_4 ),
4369         .datad(\inst|vga_control_unit|un5_v_enablelt2 ),
4370         .aclr(gnd),
4371         .aload(gnd),
4372         .sclr(gnd),
4373         .sload(gnd),
4374         .ena(vcc),
4375         .cin(gnd),
4376         .cin0(gnd),
4377         .cin1(vcc),
4378         .inverta(gnd),
4379         .regcascin(gnd),
4380         .devclrn(devclrn),
4381         .devpor(devpor),
4382         .combout(\inst|vga_control_unit|un5_v_enablelto5 ),
4383         .regout(),
4384         .cout(),
4385         .cout0(),
4386         .cout1());
4387 // synopsys translate_off
4388 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelto5 .lut_mask = "fefa";
4389 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelto5 .operation_mode = "normal";
4390 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelto5 .output_mode = "comb_only";
4391 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelto5 .register_cascade_mode = "off";
4392 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelto5 .sum_lutc_input = "datac";
4393 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un5_v_enablelto5 .synch_mode = "off";
4394 // synopsys translate_on
4395
4396 // atom is at LC_X28_Y35_N4
4397 stratix_lcell \inst|vga_control_unit|DRAW_SQUARE_next_un9_v_enablelto4 (
4398 // Equation(s):
4399 // \inst|vga_control_unit|un9_v_enablelto4  = !\inst|vga_driver_unit|column_counter_sig_2  & !\inst|vga_driver_unit|column_counter_sig_4  & !\inst|vga_driver_unit|column_counter_sig_3
4400
4401         .clk(gnd),
4402         .dataa(vcc),
4403         .datab(\inst|vga_driver_unit|column_counter_sig_2 ),
4404         .datac(\inst|vga_driver_unit|column_counter_sig_4 ),
4405         .datad(\inst|vga_driver_unit|column_counter_sig_3 ),
4406         .aclr(gnd),
4407         .aload(gnd),
4408         .sclr(gnd),
4409         .sload(gnd),
4410         .ena(vcc),
4411         .cin(gnd),
4412         .cin0(gnd),
4413         .cin1(vcc),
4414         .inverta(gnd),
4415         .regcascin(gnd),
4416         .devclrn(devclrn),
4417         .devpor(devpor),
4418         .combout(\inst|vga_control_unit|un9_v_enablelto4 ),
4419         .regout(),
4420         .cout(),
4421         .cout0(),
4422         .cout1());
4423 // synopsys translate_off
4424 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un9_v_enablelto4 .lut_mask = "0003";
4425 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un9_v_enablelto4 .operation_mode = "normal";
4426 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un9_v_enablelto4 .output_mode = "comb_only";
4427 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un9_v_enablelto4 .register_cascade_mode = "off";
4428 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un9_v_enablelto4 .sum_lutc_input = "datac";
4429 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un9_v_enablelto4 .synch_mode = "off";
4430 // synopsys translate_on
4431
4432 // atom is at LC_X28_Y35_N5
4433 stratix_lcell \inst|vga_control_unit|DRAW_SQUARE_next_un9_v_enablelto6 (
4434 // Equation(s):
4435 // \inst|vga_control_unit|un9_v_enablelto6  = \inst|vga_control_unit|un9_v_enablelto4  # !\inst|vga_driver_unit|column_counter_sig_5  # !\inst|vga_driver_unit|column_counter_sig_6
4436
4437         .clk(gnd),
4438         .dataa(\inst|vga_driver_unit|column_counter_sig_6 ),
4439         .datab(vcc),
4440         .datac(\inst|vga_driver_unit|column_counter_sig_5 ),
4441         .datad(\inst|vga_control_unit|un9_v_enablelto4 ),
4442         .aclr(gnd),
4443         .aload(gnd),
4444         .sclr(gnd),
4445         .sload(gnd),
4446         .ena(vcc),
4447         .cin(gnd),
4448         .cin0(gnd),
4449         .cin1(vcc),
4450         .inverta(gnd),
4451         .regcascin(gnd),
4452         .devclrn(devclrn),
4453         .devpor(devpor),
4454         .combout(\inst|vga_control_unit|un9_v_enablelto6 ),
4455         .regout(),
4456         .cout(),
4457         .cout0(),
4458         .cout1());
4459 // synopsys translate_off
4460 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un9_v_enablelto6 .lut_mask = "ff5f";
4461 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un9_v_enablelto6 .operation_mode = "normal";
4462 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un9_v_enablelto6 .output_mode = "comb_only";
4463 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un9_v_enablelto6 .register_cascade_mode = "off";
4464 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un9_v_enablelto6 .sum_lutc_input = "datac";
4465 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un9_v_enablelto6 .synch_mode = "off";
4466 // synopsys translate_on
4467
4468 // atom is at LC_X22_Y42_N0
4469 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_1_ (
4470 // Equation(s):
4471 // \inst|vga_driver_unit|un1_line_counter_sig_combout [1] = \inst|vga_driver_unit|d_set_hsync_counter  $ \inst|vga_driver_unit|line_counter_sig_0
4472 // \inst|vga_driver_unit|un1_line_counter_sig_cout [1] = CARRY(\inst|vga_driver_unit|d_set_hsync_counter  & \inst|vga_driver_unit|line_counter_sig_0 )
4473 // \inst|vga_driver_unit|un1_line_counter_sig_cout[1]~COUT1_9  = CARRY(\inst|vga_driver_unit|d_set_hsync_counter  & \inst|vga_driver_unit|line_counter_sig_0 )
4474
4475         .clk(gnd),
4476         .dataa(\inst|vga_driver_unit|d_set_hsync_counter ),
4477         .datab(\inst|vga_driver_unit|line_counter_sig_0 ),
4478         .datac(vcc),
4479         .datad(vcc),
4480         .aclr(gnd),
4481         .aload(gnd),
4482         .sclr(gnd),
4483         .sload(gnd),
4484         .ena(vcc),
4485         .cin(gnd),
4486         .cin0(gnd),
4487         .cin1(vcc),
4488         .inverta(gnd),
4489         .regcascin(gnd),
4490         .devclrn(devclrn),
4491         .devpor(devpor),
4492         .combout(\inst|vga_driver_unit|un1_line_counter_sig_combout [1]),
4493         .regout(),
4494         .cout(),
4495         .cout0(\inst|vga_driver_unit|un1_line_counter_sig_cout [1]),
4496         .cout1(\inst|vga_driver_unit|un1_line_counter_sig_cout[1]~COUT1_9 ));
4497 // synopsys translate_off
4498 defparam \inst|vga_driver_unit|un1_line_counter_sig_1_ .lut_mask = "6688";
4499 defparam \inst|vga_driver_unit|un1_line_counter_sig_1_ .operation_mode = "arithmetic";
4500 defparam \inst|vga_driver_unit|un1_line_counter_sig_1_ .output_mode = "comb_only";
4501 defparam \inst|vga_driver_unit|un1_line_counter_sig_1_ .register_cascade_mode = "off";
4502 defparam \inst|vga_driver_unit|un1_line_counter_sig_1_ .sum_lutc_input = "datac";
4503 defparam \inst|vga_driver_unit|un1_line_counter_sig_1_ .synch_mode = "off";
4504 // synopsys translate_on
4505
4506 // atom is at LC_X30_Y39_N8
4507 stratix_lcell \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1_cZ (
4508 // Equation(s):
4509 // \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1  = \inst|dly_counter [0] & !\inst|vga_driver_unit|vsync_state_1  & \reset~combout  & \inst|dly_counter [1]
4510
4511         .clk(gnd),
4512         .dataa(\inst|dly_counter [0]),
4513         .datab(\inst|vga_driver_unit|vsync_state_1 ),
4514         .datac(\reset~combout ),
4515         .datad(\inst|dly_counter [1]),
4516         .aclr(gnd),
4517         .aload(gnd),
4518         .sclr(gnd),
4519         .sload(gnd),
4520         .ena(vcc),
4521         .cin(gnd),
4522         .cin0(gnd),
4523         .cin1(vcc),
4524         .inverta(gnd),
4525         .regcascin(gnd),
4526         .devclrn(devclrn),
4527         .devpor(devpor),
4528         .combout(\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
4529         .regout(),
4530         .cout(),
4531         .cout0(),
4532         .cout1());
4533 // synopsys translate_off
4534 defparam \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1_cZ .lut_mask = "2000";
4535 defparam \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1_cZ .operation_mode = "normal";
4536 defparam \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1_cZ .output_mode = "comb_only";
4537 defparam \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1_cZ .register_cascade_mode = "off";
4538 defparam \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1_cZ .sum_lutc_input = "datac";
4539 defparam \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1_cZ .synch_mode = "off";
4540 // synopsys translate_on
4541
4542 // atom is at LC_X22_Y42_N5
4543 stratix_lcell \inst|vga_driver_unit|line_counter_sig_0_ (
4544 // Equation(s):
4545 // \inst|vga_driver_unit|line_counter_sig_0  = DFFEAS(\inst|vga_driver_unit|un1_line_counter_sig_combout [1] # !\inst|vga_driver_unit|un10_line_counter_siglto8 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
4546 // !\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 , )
4547
4548         .clk(\inst1|altpll_component|_clk0 ),
4549         .dataa(vcc),
4550         .datab(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
4551         .datac(vcc),
4552         .datad(\inst|vga_driver_unit|un1_line_counter_sig_combout [1]),
4553         .aclr(gnd),
4554         .aload(gnd),
4555         .sclr(!\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
4556         .sload(gnd),
4557         .ena(vcc),
4558         .cin(gnd),
4559         .cin0(gnd),
4560         .cin1(vcc),
4561         .inverta(gnd),
4562         .regcascin(gnd),
4563         .devclrn(devclrn),
4564         .devpor(devpor),
4565         .combout(),
4566         .regout(\inst|vga_driver_unit|line_counter_sig_0 ),
4567         .cout(),
4568         .cout0(),
4569         .cout1());
4570 // synopsys translate_off
4571 defparam \inst|vga_driver_unit|line_counter_sig_0_ .lut_mask = "ff33";
4572 defparam \inst|vga_driver_unit|line_counter_sig_0_ .operation_mode = "normal";
4573 defparam \inst|vga_driver_unit|line_counter_sig_0_ .output_mode = "reg_only";
4574 defparam \inst|vga_driver_unit|line_counter_sig_0_ .register_cascade_mode = "off";
4575 defparam \inst|vga_driver_unit|line_counter_sig_0_ .sum_lutc_input = "datac";
4576 defparam \inst|vga_driver_unit|line_counter_sig_0_ .synch_mode = "on";
4577 // synopsys translate_on
4578
4579 // atom is at LC_X22_Y42_N1
4580 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_3_ (
4581 // Equation(s):
4582 // \inst|vga_driver_unit|un1_line_counter_sig_combout [3] = \inst|vga_driver_unit|line_counter_sig_2  $ (\inst|vga_driver_unit|line_counter_sig_1  & \inst|vga_driver_unit|un1_line_counter_sig_cout [1])
4583 // \inst|vga_driver_unit|un1_line_counter_sig_cout [3] = CARRY(!\inst|vga_driver_unit|un1_line_counter_sig_cout [1] # !\inst|vga_driver_unit|line_counter_sig_2  # !\inst|vga_driver_unit|line_counter_sig_1 )
4584 // \inst|vga_driver_unit|un1_line_counter_sig_cout[3]~COUT1_11  = CARRY(!\inst|vga_driver_unit|un1_line_counter_sig_cout[1]~COUT1_9  # !\inst|vga_driver_unit|line_counter_sig_2  # !\inst|vga_driver_unit|line_counter_sig_1 )
4585
4586         .clk(gnd),
4587         .dataa(\inst|vga_driver_unit|line_counter_sig_1 ),
4588         .datab(\inst|vga_driver_unit|line_counter_sig_2 ),
4589         .datac(vcc),
4590         .datad(vcc),
4591         .aclr(gnd),
4592         .aload(gnd),
4593         .sclr(gnd),
4594         .sload(gnd),
4595         .ena(vcc),
4596         .cin(gnd),
4597         .cin0(\inst|vga_driver_unit|un1_line_counter_sig_cout [1]),
4598         .cin1(\inst|vga_driver_unit|un1_line_counter_sig_cout[1]~COUT1_9 ),
4599         .inverta(gnd),
4600         .regcascin(gnd),
4601         .devclrn(devclrn),
4602         .devpor(devpor),
4603         .combout(\inst|vga_driver_unit|un1_line_counter_sig_combout [3]),
4604         .regout(),
4605         .cout(),
4606         .cout0(\inst|vga_driver_unit|un1_line_counter_sig_cout [3]),
4607         .cout1(\inst|vga_driver_unit|un1_line_counter_sig_cout[3]~COUT1_11 ));
4608 // synopsys translate_off
4609 defparam \inst|vga_driver_unit|un1_line_counter_sig_3_ .cin0_used = "true";
4610 defparam \inst|vga_driver_unit|un1_line_counter_sig_3_ .cin1_used = "true";
4611 defparam \inst|vga_driver_unit|un1_line_counter_sig_3_ .lut_mask = "6c7f";
4612 defparam \inst|vga_driver_unit|un1_line_counter_sig_3_ .operation_mode = "arithmetic";
4613 defparam \inst|vga_driver_unit|un1_line_counter_sig_3_ .output_mode = "comb_only";
4614 defparam \inst|vga_driver_unit|un1_line_counter_sig_3_ .register_cascade_mode = "off";
4615 defparam \inst|vga_driver_unit|un1_line_counter_sig_3_ .sum_lutc_input = "cin";
4616 defparam \inst|vga_driver_unit|un1_line_counter_sig_3_ .synch_mode = "off";
4617 // synopsys translate_on
4618
4619 // atom is at LC_X22_Y42_N9
4620 stratix_lcell \inst|vga_driver_unit|line_counter_sig_2_ (
4621 // Equation(s):
4622 // \inst|vga_driver_unit|line_counter_sig_2  = DFFEAS(\inst|vga_driver_unit|un1_line_counter_sig_combout [3] # !\inst|vga_driver_unit|un10_line_counter_siglto8 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
4623 // !\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 , )
4624
4625         .clk(\inst1|altpll_component|_clk0 ),
4626         .dataa(vcc),
4627         .datab(vcc),
4628         .datac(\inst|vga_driver_unit|un1_line_counter_sig_combout [3]),
4629         .datad(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
4630         .aclr(gnd),
4631         .aload(gnd),
4632         .sclr(!\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
4633         .sload(gnd),
4634         .ena(vcc),
4635         .cin(gnd),
4636         .cin0(gnd),
4637         .cin1(vcc),
4638         .inverta(gnd),
4639         .regcascin(gnd),
4640         .devclrn(devclrn),
4641         .devpor(devpor),
4642         .combout(),
4643         .regout(\inst|vga_driver_unit|line_counter_sig_2 ),
4644         .cout(),
4645         .cout0(),
4646         .cout1());
4647 // synopsys translate_off
4648 defparam \inst|vga_driver_unit|line_counter_sig_2_ .lut_mask = "f0ff";
4649 defparam \inst|vga_driver_unit|line_counter_sig_2_ .operation_mode = "normal";
4650 defparam \inst|vga_driver_unit|line_counter_sig_2_ .output_mode = "reg_only";
4651 defparam \inst|vga_driver_unit|line_counter_sig_2_ .register_cascade_mode = "off";
4652 defparam \inst|vga_driver_unit|line_counter_sig_2_ .sum_lutc_input = "datac";
4653 defparam \inst|vga_driver_unit|line_counter_sig_2_ .synch_mode = "on";
4654 // synopsys translate_on
4655
4656 // atom is at LC_X21_Y42_N5
4657 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_a_1_ (
4658 // Equation(s):
4659 // \inst|vga_driver_unit|un1_line_counter_sig_a_cout [1] = CARRY(\inst|vga_driver_unit|line_counter_sig_0  & \inst|vga_driver_unit|d_set_hsync_counter )
4660 // \inst|vga_driver_unit|un1_line_counter_sig_a_cout[1]~COUT1_3  = CARRY(\inst|vga_driver_unit|line_counter_sig_0  & \inst|vga_driver_unit|d_set_hsync_counter )
4661
4662         .clk(gnd),
4663         .dataa(\inst|vga_driver_unit|line_counter_sig_0 ),
4664         .datab(\inst|vga_driver_unit|d_set_hsync_counter ),
4665         .datac(vcc),
4666         .datad(vcc),
4667         .aclr(gnd),
4668         .aload(gnd),
4669         .sclr(gnd),
4670         .sload(gnd),
4671         .ena(vcc),
4672         .cin(gnd),
4673         .cin0(gnd),
4674         .cin1(vcc),
4675         .inverta(gnd),
4676         .regcascin(gnd),
4677         .devclrn(devclrn),
4678         .devpor(devpor),
4679         .combout(\inst|vga_driver_unit|un1_line_counter_sig_a_1_~COMBOUT ),
4680         .regout(),
4681         .cout(),
4682         .cout0(\inst|vga_driver_unit|un1_line_counter_sig_a_cout [1]),
4683         .cout1(\inst|vga_driver_unit|un1_line_counter_sig_a_cout[1]~COUT1_3 ));
4684 // synopsys translate_off
4685 defparam \inst|vga_driver_unit|un1_line_counter_sig_a_1_ .lut_mask = "ff88";
4686 defparam \inst|vga_driver_unit|un1_line_counter_sig_a_1_ .operation_mode = "arithmetic";
4687 defparam \inst|vga_driver_unit|un1_line_counter_sig_a_1_ .output_mode = "none";
4688 defparam \inst|vga_driver_unit|un1_line_counter_sig_a_1_ .register_cascade_mode = "off";
4689 defparam \inst|vga_driver_unit|un1_line_counter_sig_a_1_ .sum_lutc_input = "datac";
4690 defparam \inst|vga_driver_unit|un1_line_counter_sig_a_1_ .synch_mode = "off";
4691 // synopsys translate_on
4692
4693 // atom is at LC_X21_Y42_N6
4694 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_2_ (
4695 // Equation(s):
4696 // \inst|vga_driver_unit|un1_line_counter_sig_combout [2] = \inst|vga_driver_unit|line_counter_sig_1  $ (\inst|vga_driver_unit|un1_line_counter_sig_a_cout [1])
4697 // \inst|vga_driver_unit|un1_line_counter_sig_cout [2] = CARRY(!\inst|vga_driver_unit|un1_line_counter_sig_a_cout [1] # !\inst|vga_driver_unit|line_counter_sig_2  # !\inst|vga_driver_unit|line_counter_sig_1 )
4698 // \inst|vga_driver_unit|un1_line_counter_sig_cout[2]~COUT1_17  = CARRY(!\inst|vga_driver_unit|un1_line_counter_sig_a_cout[1]~COUT1_3  # !\inst|vga_driver_unit|line_counter_sig_2  # !\inst|vga_driver_unit|line_counter_sig_1 )
4699
4700         .clk(gnd),
4701         .dataa(\inst|vga_driver_unit|line_counter_sig_1 ),
4702         .datab(\inst|vga_driver_unit|line_counter_sig_2 ),
4703         .datac(vcc),
4704         .datad(vcc),
4705         .aclr(gnd),
4706         .aload(gnd),
4707         .sclr(gnd),
4708         .sload(gnd),
4709         .ena(vcc),
4710         .cin(gnd),
4711         .cin0(\inst|vga_driver_unit|un1_line_counter_sig_a_cout [1]),
4712         .cin1(\inst|vga_driver_unit|un1_line_counter_sig_a_cout[1]~COUT1_3 ),
4713         .inverta(gnd),
4714         .regcascin(gnd),
4715         .devclrn(devclrn),
4716         .devpor(devpor),
4717         .combout(\inst|vga_driver_unit|un1_line_counter_sig_combout [2]),
4718         .regout(),
4719         .cout(),
4720         .cout0(\inst|vga_driver_unit|un1_line_counter_sig_cout [2]),
4721         .cout1(\inst|vga_driver_unit|un1_line_counter_sig_cout[2]~COUT1_17 ));
4722 // synopsys translate_off
4723 defparam \inst|vga_driver_unit|un1_line_counter_sig_2_ .cin0_used = "true";
4724 defparam \inst|vga_driver_unit|un1_line_counter_sig_2_ .cin1_used = "true";
4725 defparam \inst|vga_driver_unit|un1_line_counter_sig_2_ .lut_mask = "5a7f";
4726 defparam \inst|vga_driver_unit|un1_line_counter_sig_2_ .operation_mode = "arithmetic";
4727 defparam \inst|vga_driver_unit|un1_line_counter_sig_2_ .output_mode = "comb_only";
4728 defparam \inst|vga_driver_unit|un1_line_counter_sig_2_ .register_cascade_mode = "off";
4729 defparam \inst|vga_driver_unit|un1_line_counter_sig_2_ .sum_lutc_input = "cin";
4730 defparam \inst|vga_driver_unit|un1_line_counter_sig_2_ .synch_mode = "off";
4731 // synopsys translate_on
4732
4733 // atom is at LC_X18_Y42_N5
4734 stratix_lcell \inst|vga_driver_unit|line_counter_sig_1_ (
4735 // Equation(s):
4736 // \inst|vga_driver_unit|line_counter_sig_1  = DFFEAS(\inst|vga_driver_unit|un1_line_counter_sig_combout [2] # !\inst|vga_driver_unit|un10_line_counter_siglto8 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
4737 // !\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 , )
4738
4739         .clk(\inst1|altpll_component|_clk0 ),
4740         .dataa(vcc),
4741         .datab(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
4742         .datac(\inst|vga_driver_unit|un1_line_counter_sig_combout [2]),
4743         .datad(vcc),
4744         .aclr(gnd),
4745         .aload(gnd),
4746         .sclr(!\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
4747         .sload(gnd),
4748         .ena(vcc),
4749         .cin(gnd),
4750         .cin0(gnd),
4751         .cin1(vcc),
4752         .inverta(gnd),
4753         .regcascin(gnd),
4754         .devclrn(devclrn),
4755         .devpor(devpor),
4756         .combout(),
4757         .regout(\inst|vga_driver_unit|line_counter_sig_1 ),
4758         .cout(),
4759         .cout0(),
4760         .cout1());
4761 // synopsys translate_off
4762 defparam \inst|vga_driver_unit|line_counter_sig_1_ .lut_mask = "f3f3";
4763 defparam \inst|vga_driver_unit|line_counter_sig_1_ .operation_mode = "normal";
4764 defparam \inst|vga_driver_unit|line_counter_sig_1_ .output_mode = "reg_only";
4765 defparam \inst|vga_driver_unit|line_counter_sig_1_ .register_cascade_mode = "off";
4766 defparam \inst|vga_driver_unit|line_counter_sig_1_ .sum_lutc_input = "datac";
4767 defparam \inst|vga_driver_unit|line_counter_sig_1_ .synch_mode = "on";
4768 // synopsys translate_on
4769
4770 // atom is at LC_X22_Y42_N2
4771 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_5_ (
4772 // Equation(s):
4773 // \inst|vga_driver_unit|un1_line_counter_sig_combout [5] = \inst|vga_driver_unit|line_counter_sig_4  $ (\inst|vga_driver_unit|line_counter_sig_3  & !\inst|vga_driver_unit|un1_line_counter_sig_cout [3])
4774 // \inst|vga_driver_unit|un1_line_counter_sig_cout [5] = CARRY(\inst|vga_driver_unit|line_counter_sig_3  & \inst|vga_driver_unit|line_counter_sig_4  & !\inst|vga_driver_unit|un1_line_counter_sig_cout [3])
4775 // \inst|vga_driver_unit|un1_line_counter_sig_cout[5]~COUT1_13  = CARRY(\inst|vga_driver_unit|line_counter_sig_3  & \inst|vga_driver_unit|line_counter_sig_4  & !\inst|vga_driver_unit|un1_line_counter_sig_cout[3]~COUT1_11 )
4776
4777         .clk(gnd),
4778         .dataa(\inst|vga_driver_unit|line_counter_sig_3 ),
4779         .datab(\inst|vga_driver_unit|line_counter_sig_4 ),
4780         .datac(vcc),
4781         .datad(vcc),
4782         .aclr(gnd),
4783         .aload(gnd),
4784         .sclr(gnd),
4785         .sload(gnd),
4786         .ena(vcc),
4787         .cin(gnd),
4788         .cin0(\inst|vga_driver_unit|un1_line_counter_sig_cout [3]),
4789         .cin1(\inst|vga_driver_unit|un1_line_counter_sig_cout[3]~COUT1_11 ),
4790         .inverta(gnd),
4791         .regcascin(gnd),
4792         .devclrn(devclrn),
4793         .devpor(devpor),
4794         .combout(\inst|vga_driver_unit|un1_line_counter_sig_combout [5]),
4795         .regout(),
4796         .cout(),
4797         .cout0(\inst|vga_driver_unit|un1_line_counter_sig_cout [5]),
4798         .cout1(\inst|vga_driver_unit|un1_line_counter_sig_cout[5]~COUT1_13 ));
4799 // synopsys translate_off
4800 defparam \inst|vga_driver_unit|un1_line_counter_sig_5_ .cin0_used = "true";
4801 defparam \inst|vga_driver_unit|un1_line_counter_sig_5_ .cin1_used = "true";
4802 defparam \inst|vga_driver_unit|un1_line_counter_sig_5_ .lut_mask = "c608";
4803 defparam \inst|vga_driver_unit|un1_line_counter_sig_5_ .operation_mode = "arithmetic";
4804 defparam \inst|vga_driver_unit|un1_line_counter_sig_5_ .output_mode = "comb_only";
4805 defparam \inst|vga_driver_unit|un1_line_counter_sig_5_ .register_cascade_mode = "off";
4806 defparam \inst|vga_driver_unit|un1_line_counter_sig_5_ .sum_lutc_input = "cin";
4807 defparam \inst|vga_driver_unit|un1_line_counter_sig_5_ .synch_mode = "off";
4808 // synopsys translate_on
4809
4810 // atom is at LC_X22_Y42_N7
4811 stratix_lcell \inst|vga_driver_unit|line_counter_sig_4_ (
4812 // Equation(s):
4813 // \inst|vga_driver_unit|line_counter_sig_4  = DFFEAS(\inst|vga_driver_unit|un1_line_counter_sig_combout [5] # !\inst|vga_driver_unit|un10_line_counter_siglto8 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
4814 // !\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 , )
4815
4816         .clk(\inst1|altpll_component|_clk0 ),
4817         .dataa(vcc),
4818         .datab(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
4819         .datac(vcc),
4820         .datad(\inst|vga_driver_unit|un1_line_counter_sig_combout [5]),
4821         .aclr(gnd),
4822         .aload(gnd),
4823         .sclr(!\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
4824         .sload(gnd),
4825         .ena(vcc),
4826         .cin(gnd),
4827         .cin0(gnd),
4828         .cin1(vcc),
4829         .inverta(gnd),
4830         .regcascin(gnd),
4831         .devclrn(devclrn),
4832         .devpor(devpor),
4833         .combout(),
4834         .regout(\inst|vga_driver_unit|line_counter_sig_4 ),
4835         .cout(),
4836         .cout0(),
4837         .cout1());
4838 // synopsys translate_off
4839 defparam \inst|vga_driver_unit|line_counter_sig_4_ .lut_mask = "ff33";
4840 defparam \inst|vga_driver_unit|line_counter_sig_4_ .operation_mode = "normal";
4841 defparam \inst|vga_driver_unit|line_counter_sig_4_ .output_mode = "reg_only";
4842 defparam \inst|vga_driver_unit|line_counter_sig_4_ .register_cascade_mode = "off";
4843 defparam \inst|vga_driver_unit|line_counter_sig_4_ .sum_lutc_input = "datac";
4844 defparam \inst|vga_driver_unit|line_counter_sig_4_ .synch_mode = "on";
4845 // synopsys translate_on
4846
4847 // atom is at LC_X21_Y42_N7
4848 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_4_ (
4849 // Equation(s):
4850 // \inst|vga_driver_unit|un1_line_counter_sig_combout [4] = \inst|vga_driver_unit|line_counter_sig_3  $ !\inst|vga_driver_unit|un1_line_counter_sig_cout [2]
4851 // \inst|vga_driver_unit|un1_line_counter_sig_cout [4] = CARRY(\inst|vga_driver_unit|line_counter_sig_4  & \inst|vga_driver_unit|line_counter_sig_3  & !\inst|vga_driver_unit|un1_line_counter_sig_cout [2])
4852 // \inst|vga_driver_unit|un1_line_counter_sig_cout[4]~COUT1_19  = CARRY(\inst|vga_driver_unit|line_counter_sig_4  & \inst|vga_driver_unit|line_counter_sig_3  & !\inst|vga_driver_unit|un1_line_counter_sig_cout[2]~COUT1_17 )
4853
4854         .clk(gnd),
4855         .dataa(\inst|vga_driver_unit|line_counter_sig_4 ),
4856         .datab(\inst|vga_driver_unit|line_counter_sig_3 ),
4857         .datac(vcc),
4858         .datad(vcc),
4859         .aclr(gnd),
4860         .aload(gnd),
4861         .sclr(gnd),
4862         .sload(gnd),
4863         .ena(vcc),
4864         .cin(gnd),
4865         .cin0(\inst|vga_driver_unit|un1_line_counter_sig_cout [2]),
4866         .cin1(\inst|vga_driver_unit|un1_line_counter_sig_cout[2]~COUT1_17 ),
4867         .inverta(gnd),
4868         .regcascin(gnd),
4869         .devclrn(devclrn),
4870         .devpor(devpor),
4871         .combout(\inst|vga_driver_unit|un1_line_counter_sig_combout [4]),
4872         .regout(),
4873         .cout(),
4874         .cout0(\inst|vga_driver_unit|un1_line_counter_sig_cout [4]),
4875         .cout1(\inst|vga_driver_unit|un1_line_counter_sig_cout[4]~COUT1_19 ));
4876 // synopsys translate_off
4877 defparam \inst|vga_driver_unit|un1_line_counter_sig_4_ .cin0_used = "true";
4878 defparam \inst|vga_driver_unit|un1_line_counter_sig_4_ .cin1_used = "true";
4879 defparam \inst|vga_driver_unit|un1_line_counter_sig_4_ .lut_mask = "c308";
4880 defparam \inst|vga_driver_unit|un1_line_counter_sig_4_ .operation_mode = "arithmetic";
4881 defparam \inst|vga_driver_unit|un1_line_counter_sig_4_ .output_mode = "comb_only";
4882 defparam \inst|vga_driver_unit|un1_line_counter_sig_4_ .register_cascade_mode = "off";
4883 defparam \inst|vga_driver_unit|un1_line_counter_sig_4_ .sum_lutc_input = "cin";
4884 defparam \inst|vga_driver_unit|un1_line_counter_sig_4_ .synch_mode = "off";
4885 // synopsys translate_on
4886
4887 // atom is at LC_X21_Y42_N1
4888 stratix_lcell \inst|vga_driver_unit|line_counter_sig_3_ (
4889 // Equation(s):
4890 // \inst|vga_driver_unit|line_counter_sig_3  = DFFEAS(\inst|vga_driver_unit|un1_line_counter_sig_combout [4] # !\inst|vga_driver_unit|un10_line_counter_siglto8 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
4891 // !\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 , )
4892
4893         .clk(\inst1|altpll_component|_clk0 ),
4894         .dataa(vcc),
4895         .datab(vcc),
4896         .datac(\inst|vga_driver_unit|un1_line_counter_sig_combout [4]),
4897         .datad(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
4898         .aclr(gnd),
4899         .aload(gnd),
4900         .sclr(!\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
4901         .sload(gnd),
4902         .ena(vcc),
4903         .cin(gnd),
4904         .cin0(gnd),
4905         .cin1(vcc),
4906         .inverta(gnd),
4907         .regcascin(gnd),
4908         .devclrn(devclrn),
4909         .devpor(devpor),
4910         .combout(),
4911         .regout(\inst|vga_driver_unit|line_counter_sig_3 ),
4912         .cout(),
4913         .cout0(),
4914         .cout1());
4915 // synopsys translate_off
4916 defparam \inst|vga_driver_unit|line_counter_sig_3_ .lut_mask = "f0ff";
4917 defparam \inst|vga_driver_unit|line_counter_sig_3_ .operation_mode = "normal";
4918 defparam \inst|vga_driver_unit|line_counter_sig_3_ .output_mode = "reg_only";
4919 defparam \inst|vga_driver_unit|line_counter_sig_3_ .register_cascade_mode = "off";
4920 defparam \inst|vga_driver_unit|line_counter_sig_3_ .sum_lutc_input = "datac";
4921 defparam \inst|vga_driver_unit|line_counter_sig_3_ .synch_mode = "on";
4922 // synopsys translate_on
4923
4924 // atom is at LC_X22_Y42_N3
4925 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_7_ (
4926 // Equation(s):
4927 // \inst|vga_driver_unit|un1_line_counter_sig_combout [7] = \inst|vga_driver_unit|line_counter_sig_6  $ (\inst|vga_driver_unit|line_counter_sig_5  & \inst|vga_driver_unit|un1_line_counter_sig_cout [5])
4928 // \inst|vga_driver_unit|un1_line_counter_sig_cout [7] = CARRY(!\inst|vga_driver_unit|un1_line_counter_sig_cout [5] # !\inst|vga_driver_unit|line_counter_sig_6  # !\inst|vga_driver_unit|line_counter_sig_5 )
4929 // \inst|vga_driver_unit|un1_line_counter_sig_cout[7]~COUT1_15  = CARRY(!\inst|vga_driver_unit|un1_line_counter_sig_cout[5]~COUT1_13  # !\inst|vga_driver_unit|line_counter_sig_6  # !\inst|vga_driver_unit|line_counter_sig_5 )
4930
4931         .clk(gnd),
4932         .dataa(\inst|vga_driver_unit|line_counter_sig_5 ),
4933         .datab(\inst|vga_driver_unit|line_counter_sig_6 ),
4934         .datac(vcc),
4935         .datad(vcc),
4936         .aclr(gnd),
4937         .aload(gnd),
4938         .sclr(gnd),
4939         .sload(gnd),
4940         .ena(vcc),
4941         .cin(gnd),
4942         .cin0(\inst|vga_driver_unit|un1_line_counter_sig_cout [5]),
4943         .cin1(\inst|vga_driver_unit|un1_line_counter_sig_cout[5]~COUT1_13 ),
4944         .inverta(gnd),
4945         .regcascin(gnd),
4946         .devclrn(devclrn),
4947         .devpor(devpor),
4948         .combout(\inst|vga_driver_unit|un1_line_counter_sig_combout [7]),
4949         .regout(),
4950         .cout(),
4951         .cout0(\inst|vga_driver_unit|un1_line_counter_sig_cout [7]),
4952         .cout1(\inst|vga_driver_unit|un1_line_counter_sig_cout[7]~COUT1_15 ));
4953 // synopsys translate_off
4954 defparam \inst|vga_driver_unit|un1_line_counter_sig_7_ .cin0_used = "true";
4955 defparam \inst|vga_driver_unit|un1_line_counter_sig_7_ .cin1_used = "true";
4956 defparam \inst|vga_driver_unit|un1_line_counter_sig_7_ .lut_mask = "6c7f";
4957 defparam \inst|vga_driver_unit|un1_line_counter_sig_7_ .operation_mode = "arithmetic";
4958 defparam \inst|vga_driver_unit|un1_line_counter_sig_7_ .output_mode = "comb_only";
4959 defparam \inst|vga_driver_unit|un1_line_counter_sig_7_ .register_cascade_mode = "off";
4960 defparam \inst|vga_driver_unit|un1_line_counter_sig_7_ .sum_lutc_input = "cin";
4961 defparam \inst|vga_driver_unit|un1_line_counter_sig_7_ .synch_mode = "off";
4962 // synopsys translate_on
4963
4964 // atom is at LC_X22_Y42_N6
4965 stratix_lcell \inst|vga_driver_unit|line_counter_sig_6_ (
4966 // Equation(s):
4967 // \inst|vga_driver_unit|line_counter_sig_6  = DFFEAS(\inst|vga_driver_unit|un1_line_counter_sig_combout [7] # !\inst|vga_driver_unit|un10_line_counter_siglto8 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
4968 // !\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 , )
4969
4970         .clk(\inst1|altpll_component|_clk0 ),
4971         .dataa(vcc),
4972         .datab(vcc),
4973         .datac(\inst|vga_driver_unit|un1_line_counter_sig_combout [7]),
4974         .datad(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
4975         .aclr(gnd),
4976         .aload(gnd),
4977         .sclr(!\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
4978         .sload(gnd),
4979         .ena(vcc),
4980         .cin(gnd),
4981         .cin0(gnd),
4982         .cin1(vcc),
4983         .inverta(gnd),
4984         .regcascin(gnd),
4985         .devclrn(devclrn),
4986         .devpor(devpor),
4987         .combout(),
4988         .regout(\inst|vga_driver_unit|line_counter_sig_6 ),
4989         .cout(),
4990         .cout0(),
4991         .cout1());
4992 // synopsys translate_off
4993 defparam \inst|vga_driver_unit|line_counter_sig_6_ .lut_mask = "f0ff";
4994 defparam \inst|vga_driver_unit|line_counter_sig_6_ .operation_mode = "normal";
4995 defparam \inst|vga_driver_unit|line_counter_sig_6_ .output_mode = "reg_only";
4996 defparam \inst|vga_driver_unit|line_counter_sig_6_ .register_cascade_mode = "off";
4997 defparam \inst|vga_driver_unit|line_counter_sig_6_ .sum_lutc_input = "datac";
4998 defparam \inst|vga_driver_unit|line_counter_sig_6_ .synch_mode = "on";
4999 // synopsys translate_on
5000
5001 // atom is at LC_X21_Y42_N8
5002 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_6_ (
5003 // Equation(s):
5004 // \inst|vga_driver_unit|un1_line_counter_sig_combout [6] = \inst|vga_driver_unit|line_counter_sig_5  $ (\inst|vga_driver_unit|un1_line_counter_sig_cout [4])
5005 // \inst|vga_driver_unit|un1_line_counter_sig_cout [6] = CARRY(!\inst|vga_driver_unit|un1_line_counter_sig_cout [4] # !\inst|vga_driver_unit|line_counter_sig_6  # !\inst|vga_driver_unit|line_counter_sig_5 )
5006 // \inst|vga_driver_unit|un1_line_counter_sig_cout[6]~COUT1_21  = CARRY(!\inst|vga_driver_unit|un1_line_counter_sig_cout[4]~COUT1_19  # !\inst|vga_driver_unit|line_counter_sig_6  # !\inst|vga_driver_unit|line_counter_sig_5 )
5007
5008         .clk(gnd),
5009         .dataa(\inst|vga_driver_unit|line_counter_sig_5 ),
5010         .datab(\inst|vga_driver_unit|line_counter_sig_6 ),
5011         .datac(vcc),
5012         .datad(vcc),
5013         .aclr(gnd),
5014         .aload(gnd),
5015         .sclr(gnd),
5016         .sload(gnd),
5017         .ena(vcc),
5018         .cin(gnd),
5019         .cin0(\inst|vga_driver_unit|un1_line_counter_sig_cout [4]),
5020         .cin1(\inst|vga_driver_unit|un1_line_counter_sig_cout[4]~COUT1_19 ),
5021         .inverta(gnd),
5022         .regcascin(gnd),
5023         .devclrn(devclrn),
5024         .devpor(devpor),
5025         .combout(\inst|vga_driver_unit|un1_line_counter_sig_combout [6]),
5026         .regout(),
5027         .cout(),
5028         .cout0(\inst|vga_driver_unit|un1_line_counter_sig_cout [6]),
5029         .cout1(\inst|vga_driver_unit|un1_line_counter_sig_cout[6]~COUT1_21 ));
5030 // synopsys translate_off
5031 defparam \inst|vga_driver_unit|un1_line_counter_sig_6_ .cin0_used = "true";
5032 defparam \inst|vga_driver_unit|un1_line_counter_sig_6_ .cin1_used = "true";
5033 defparam \inst|vga_driver_unit|un1_line_counter_sig_6_ .lut_mask = "5a7f";
5034 defparam \inst|vga_driver_unit|un1_line_counter_sig_6_ .operation_mode = "arithmetic";
5035 defparam \inst|vga_driver_unit|un1_line_counter_sig_6_ .output_mode = "comb_only";
5036 defparam \inst|vga_driver_unit|un1_line_counter_sig_6_ .register_cascade_mode = "off";
5037 defparam \inst|vga_driver_unit|un1_line_counter_sig_6_ .sum_lutc_input = "cin";
5038 defparam \inst|vga_driver_unit|un1_line_counter_sig_6_ .synch_mode = "off";
5039 // synopsys translate_on
5040
5041 // atom is at LC_X18_Y42_N2
5042 stratix_lcell \inst|vga_driver_unit|line_counter_sig_5_ (
5043 // Equation(s):
5044 // \inst|vga_driver_unit|line_counter_sig_5  = DFFEAS(\inst|vga_driver_unit|un1_line_counter_sig_combout [6] & \inst|vga_driver_unit|un10_line_counter_siglto8  & \inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 , GLOBAL(\inst1|altpll_component|_clk0 ),
5045 // VCC, , , , , , )
5046
5047         .clk(\inst1|altpll_component|_clk0 ),
5048         .dataa(\inst|vga_driver_unit|un1_line_counter_sig_combout [6]),
5049         .datab(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
5050         .datac(\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
5051         .datad(vcc),
5052         .aclr(gnd),
5053         .aload(gnd),
5054         .sclr(gnd),
5055         .sload(gnd),
5056         .ena(vcc),
5057         .cin(gnd),
5058         .cin0(gnd),
5059         .cin1(vcc),
5060         .inverta(gnd),
5061         .regcascin(gnd),
5062         .devclrn(devclrn),
5063         .devpor(devpor),
5064         .combout(),
5065         .regout(\inst|vga_driver_unit|line_counter_sig_5 ),
5066         .cout(),
5067         .cout0(),
5068         .cout1());
5069 // synopsys translate_off
5070 defparam \inst|vga_driver_unit|line_counter_sig_5_ .lut_mask = "8080";
5071 defparam \inst|vga_driver_unit|line_counter_sig_5_ .operation_mode = "normal";
5072 defparam \inst|vga_driver_unit|line_counter_sig_5_ .output_mode = "reg_only";
5073 defparam \inst|vga_driver_unit|line_counter_sig_5_ .register_cascade_mode = "off";
5074 defparam \inst|vga_driver_unit|line_counter_sig_5_ .sum_lutc_input = "datac";
5075 defparam \inst|vga_driver_unit|line_counter_sig_5_ .synch_mode = "off";
5076 // synopsys translate_on
5077
5078 // atom is at LC_X21_Y42_N9
5079 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_8_ (
5080 // Equation(s):
5081 // \inst|vga_driver_unit|un1_line_counter_sig_combout [8] = \inst|vga_driver_unit|un1_line_counter_sig_cout [6] $ !\inst|vga_driver_unit|line_counter_sig_7
5082
5083         .clk(gnd),
5084         .dataa(vcc),
5085         .datab(vcc),
5086         .datac(vcc),
5087         .datad(\inst|vga_driver_unit|line_counter_sig_7 ),
5088         .aclr(gnd),
5089         .aload(gnd),
5090         .sclr(gnd),
5091         .sload(gnd),
5092         .ena(vcc),
5093         .cin(gnd),
5094         .cin0(\inst|vga_driver_unit|un1_line_counter_sig_cout [6]),
5095         .cin1(\inst|vga_driver_unit|un1_line_counter_sig_cout[6]~COUT1_21 ),
5096         .inverta(gnd),
5097         .regcascin(gnd),
5098         .devclrn(devclrn),
5099         .devpor(devpor),
5100         .combout(\inst|vga_driver_unit|un1_line_counter_sig_combout [8]),
5101         .regout(),
5102         .cout(),
5103         .cout0(),
5104         .cout1());
5105 // synopsys translate_off
5106 defparam \inst|vga_driver_unit|un1_line_counter_sig_8_ .cin0_used = "true";
5107 defparam \inst|vga_driver_unit|un1_line_counter_sig_8_ .cin1_used = "true";
5108 defparam \inst|vga_driver_unit|un1_line_counter_sig_8_ .lut_mask = "f00f";
5109 defparam \inst|vga_driver_unit|un1_line_counter_sig_8_ .operation_mode = "normal";
5110 defparam \inst|vga_driver_unit|un1_line_counter_sig_8_ .output_mode = "comb_only";
5111 defparam \inst|vga_driver_unit|un1_line_counter_sig_8_ .register_cascade_mode = "off";
5112 defparam \inst|vga_driver_unit|un1_line_counter_sig_8_ .sum_lutc_input = "cin";
5113 defparam \inst|vga_driver_unit|un1_line_counter_sig_8_ .synch_mode = "off";
5114 // synopsys translate_on
5115
5116 // atom is at LC_X21_Y42_N2
5117 stratix_lcell \inst|vga_driver_unit|line_counter_sig_7_ (
5118 // Equation(s):
5119 // \inst|vga_driver_unit|line_counter_sig_7  = DFFEAS(\inst|vga_driver_unit|un1_line_counter_sig_combout [8] # !\inst|vga_driver_unit|un10_line_counter_siglto8 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
5120 // !\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 , )
5121
5122         .clk(\inst1|altpll_component|_clk0 ),
5123         .dataa(vcc),
5124         .datab(\inst|vga_driver_unit|un1_line_counter_sig_combout [8]),
5125         .datac(vcc),
5126         .datad(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
5127         .aclr(gnd),
5128         .aload(gnd),
5129         .sclr(!\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
5130         .sload(gnd),
5131         .ena(vcc),
5132         .cin(gnd),
5133         .cin0(gnd),
5134         .cin1(vcc),
5135         .inverta(gnd),
5136         .regcascin(gnd),
5137         .devclrn(devclrn),
5138         .devpor(devpor),
5139         .combout(),
5140         .regout(\inst|vga_driver_unit|line_counter_sig_7 ),
5141         .cout(),
5142         .cout0(),
5143         .cout1());
5144 // synopsys translate_off
5145 defparam \inst|vga_driver_unit|line_counter_sig_7_ .lut_mask = "ccff";
5146 defparam \inst|vga_driver_unit|line_counter_sig_7_ .operation_mode = "normal";
5147 defparam \inst|vga_driver_unit|line_counter_sig_7_ .output_mode = "reg_only";
5148 defparam \inst|vga_driver_unit|line_counter_sig_7_ .register_cascade_mode = "off";
5149 defparam \inst|vga_driver_unit|line_counter_sig_7_ .sum_lutc_input = "datac";
5150 defparam \inst|vga_driver_unit|line_counter_sig_7_ .synch_mode = "on";
5151 // synopsys translate_on
5152
5153 // atom is at LC_X21_Y42_N0
5154 stratix_lcell \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglt4_2 (
5155 // Equation(s):
5156 // \inst|vga_driver_unit|un10_line_counter_siglt4_2  = !\inst|vga_driver_unit|line_counter_sig_0  # !\inst|vga_driver_unit|line_counter_sig_3  # !\inst|vga_driver_unit|line_counter_sig_4
5157
5158         .clk(gnd),
5159         .dataa(\inst|vga_driver_unit|line_counter_sig_4 ),
5160         .datab(vcc),
5161         .datac(\inst|vga_driver_unit|line_counter_sig_3 ),
5162         .datad(\inst|vga_driver_unit|line_counter_sig_0 ),
5163         .aclr(gnd),
5164         .aload(gnd),
5165         .sclr(gnd),
5166         .sload(gnd),
5167         .ena(vcc),
5168         .cin(gnd),
5169         .cin0(gnd),
5170         .cin1(vcc),
5171         .inverta(gnd),
5172         .regcascin(gnd),
5173         .devclrn(devclrn),
5174         .devpor(devpor),
5175         .combout(\inst|vga_driver_unit|un10_line_counter_siglt4_2 ),
5176         .regout(),
5177         .cout(),
5178         .cout0(),
5179         .cout1());
5180 // synopsys translate_off
5181 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglt4_2 .lut_mask = "5fff";
5182 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglt4_2 .operation_mode = "normal";
5183 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglt4_2 .output_mode = "comb_only";
5184 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglt4_2 .register_cascade_mode = "off";
5185 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglt4_2 .sum_lutc_input = "datac";
5186 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglt4_2 .synch_mode = "off";
5187 // synopsys translate_on
5188
5189 // atom is at LC_X21_Y42_N3
5190 stratix_lcell \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto5 (
5191 // Equation(s):
5192 // \inst|vga_driver_unit|un10_line_counter_siglto5  = !\inst|vga_driver_unit|line_counter_sig_5  & (\inst|vga_driver_unit|un10_line_counter_siglt4_2  # !\inst|vga_driver_unit|line_counter_sig_2  # !\inst|vga_driver_unit|line_counter_sig_1 )
5193
5194         .clk(gnd),
5195         .dataa(\inst|vga_driver_unit|line_counter_sig_1 ),
5196         .datab(\inst|vga_driver_unit|un10_line_counter_siglt4_2 ),
5197         .datac(\inst|vga_driver_unit|line_counter_sig_5 ),
5198         .datad(\inst|vga_driver_unit|line_counter_sig_2 ),
5199         .aclr(gnd),
5200         .aload(gnd),
5201         .sclr(gnd),
5202         .sload(gnd),
5203         .ena(vcc),
5204         .cin(gnd),
5205         .cin0(gnd),
5206         .cin1(vcc),
5207         .inverta(gnd),
5208         .regcascin(gnd),
5209         .devclrn(devclrn),
5210         .devpor(devpor),
5211         .combout(\inst|vga_driver_unit|un10_line_counter_siglto5 ),
5212         .regout(),
5213         .cout(),
5214         .cout0(),
5215         .cout1());
5216 // synopsys translate_off
5217 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto5 .lut_mask = "0d0f";
5218 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto5 .operation_mode = "normal";
5219 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto5 .output_mode = "comb_only";
5220 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto5 .register_cascade_mode = "off";
5221 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto5 .sum_lutc_input = "datac";
5222 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto5 .synch_mode = "off";
5223 // synopsys translate_on
5224
5225 // atom is at LC_X21_Y42_N4
5226 stratix_lcell \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto8 (
5227 // Equation(s):
5228 // \inst|vga_driver_unit|un10_line_counter_siglto8  = \inst|vga_driver_unit|un10_line_counter_siglto5  # !\inst|vga_driver_unit|line_counter_sig_6  # !\inst|vga_driver_unit|line_counter_sig_8  # !\inst|vga_driver_unit|line_counter_sig_7
5229
5230         .clk(gnd),
5231         .dataa(\inst|vga_driver_unit|line_counter_sig_7 ),
5232         .datab(\inst|vga_driver_unit|line_counter_sig_8 ),
5233         .datac(\inst|vga_driver_unit|line_counter_sig_6 ),
5234         .datad(\inst|vga_driver_unit|un10_line_counter_siglto5 ),
5235         .aclr(gnd),
5236         .aload(gnd),
5237         .sclr(gnd),
5238         .sload(gnd),
5239         .ena(vcc),
5240         .cin(gnd),
5241         .cin0(gnd),
5242         .cin1(vcc),
5243         .inverta(gnd),
5244         .regcascin(gnd),
5245         .devclrn(devclrn),
5246         .devpor(devpor),
5247         .combout(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
5248         .regout(),
5249         .cout(),
5250         .cout0(),
5251         .cout1());
5252 // synopsys translate_off
5253 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto8 .lut_mask = "ff7f";
5254 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto8 .operation_mode = "normal";
5255 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto8 .output_mode = "comb_only";
5256 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto8 .register_cascade_mode = "off";
5257 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto8 .sum_lutc_input = "datac";
5258 defparam \inst|vga_driver_unit|LINE_COUNT_next_un10_line_counter_siglto8 .synch_mode = "off";
5259 // synopsys translate_on
5260
5261 // atom is at LC_X22_Y42_N4
5262 stratix_lcell \inst|vga_driver_unit|un1_line_counter_sig_9_ (
5263 // Equation(s):
5264 // \inst|vga_driver_unit|un1_line_counter_sig_combout [9] = \inst|vga_driver_unit|line_counter_sig_8  $ (\inst|vga_driver_unit|line_counter_sig_7  & !\inst|vga_driver_unit|un1_line_counter_sig_cout [7])
5265
5266         .clk(gnd),
5267         .dataa(vcc),
5268         .datab(\inst|vga_driver_unit|line_counter_sig_7 ),
5269         .datac(vcc),
5270         .datad(\inst|vga_driver_unit|line_counter_sig_8 ),
5271         .aclr(gnd),
5272         .aload(gnd),
5273         .sclr(gnd),
5274         .sload(gnd),
5275         .ena(vcc),
5276         .cin(gnd),
5277         .cin0(\inst|vga_driver_unit|un1_line_counter_sig_cout [7]),
5278         .cin1(\inst|vga_driver_unit|un1_line_counter_sig_cout[7]~COUT1_15 ),
5279         .inverta(gnd),
5280         .regcascin(gnd),
5281         .devclrn(devclrn),
5282         .devpor(devpor),
5283         .combout(\inst|vga_driver_unit|un1_line_counter_sig_combout [9]),
5284         .regout(),
5285         .cout(),
5286         .cout0(),
5287         .cout1());
5288 // synopsys translate_off
5289 defparam \inst|vga_driver_unit|un1_line_counter_sig_9_ .cin0_used = "true";
5290 defparam \inst|vga_driver_unit|un1_line_counter_sig_9_ .cin1_used = "true";
5291 defparam \inst|vga_driver_unit|un1_line_counter_sig_9_ .lut_mask = "f30c";
5292 defparam \inst|vga_driver_unit|un1_line_counter_sig_9_ .operation_mode = "normal";
5293 defparam \inst|vga_driver_unit|un1_line_counter_sig_9_ .output_mode = "comb_only";
5294 defparam \inst|vga_driver_unit|un1_line_counter_sig_9_ .register_cascade_mode = "off";
5295 defparam \inst|vga_driver_unit|un1_line_counter_sig_9_ .sum_lutc_input = "cin";
5296 defparam \inst|vga_driver_unit|un1_line_counter_sig_9_ .synch_mode = "off";
5297 // synopsys translate_on
5298
5299 // atom is at LC_X22_Y42_N8
5300 stratix_lcell \inst|vga_driver_unit|line_counter_sig_8_ (
5301 // Equation(s):
5302 // \inst|vga_driver_unit|line_counter_sig_8  = DFFEAS(\inst|vga_driver_unit|un1_line_counter_sig_combout [9] # !\inst|vga_driver_unit|un10_line_counter_siglto8 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , , , ,
5303 // !\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 , )
5304
5305         .clk(\inst1|altpll_component|_clk0 ),
5306         .dataa(vcc),
5307         .datab(\inst|vga_driver_unit|un10_line_counter_siglto8 ),
5308         .datac(vcc),
5309         .datad(\inst|vga_driver_unit|un1_line_counter_sig_combout [9]),
5310         .aclr(gnd),
5311         .aload(gnd),
5312         .sclr(!\inst|vga_driver_unit|line_counter_next_0_sqmuxa_1_1 ),
5313         .sload(gnd),
5314         .ena(vcc),
5315         .cin(gnd),
5316         .cin0(gnd),
5317         .cin1(vcc),
5318         .inverta(gnd),
5319         .regcascin(gnd),
5320         .devclrn(devclrn),
5321         .devpor(devpor),
5322         .combout(),
5323         .regout(\inst|vga_driver_unit|line_counter_sig_8 ),
5324         .cout(),
5325         .cout0(),
5326         .cout1());
5327 // synopsys translate_off
5328 defparam \inst|vga_driver_unit|line_counter_sig_8_ .lut_mask = "ff33";
5329 defparam \inst|vga_driver_unit|line_counter_sig_8_ .operation_mode = "normal";
5330 defparam \inst|vga_driver_unit|line_counter_sig_8_ .output_mode = "reg_only";
5331 defparam \inst|vga_driver_unit|line_counter_sig_8_ .register_cascade_mode = "off";
5332 defparam \inst|vga_driver_unit|line_counter_sig_8_ .sum_lutc_input = "datac";
5333 defparam \inst|vga_driver_unit|line_counter_sig_8_ .synch_mode = "on";
5334 // synopsys translate_on
5335
5336 // atom is at LC_X30_Y39_N9
5337 stratix_lcell \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4_cZ (
5338 // Equation(s):
5339 // \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4  = \inst|vga_driver_unit|un6_dly_counter_0_x  # !\inst|vga_driver_unit|vsync_state_4  & !\inst|vga_driver_unit|vsync_state_5
5340
5341         .clk(gnd),
5342         .dataa(\inst|vga_driver_unit|vsync_state_4 ),
5343         .datab(vcc),
5344         .datac(\inst|vga_driver_unit|vsync_state_5 ),
5345         .datad(\inst|vga_driver_unit|un6_dly_counter_0_x ),
5346         .aclr(gnd),
5347         .aload(gnd),
5348         .sclr(gnd),
5349         .sload(gnd),
5350         .ena(vcc),
5351         .cin(gnd),
5352         .cin0(gnd),
5353         .cin1(vcc),
5354         .inverta(gnd),
5355         .regcascin(gnd),
5356         .devclrn(devclrn),
5357         .devpor(devpor),
5358         .combout(\inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4 ),
5359         .regout(),
5360         .cout(),
5361         .cout0(),
5362         .cout1());
5363 // synopsys translate_off
5364 defparam \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4_cZ .lut_mask = "ff05";
5365 defparam \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4_cZ .operation_mode = "normal";
5366 defparam \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4_cZ .output_mode = "comb_only";
5367 defparam \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4_cZ .register_cascade_mode = "off";
5368 defparam \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4_cZ .sum_lutc_input = "datac";
5369 defparam \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4_cZ .synch_mode = "off";
5370 // synopsys translate_on
5371
5372 // atom is at LC_X28_Y35_N0
5373 stratix_lcell \inst|vga_driver_unit|h_enable_sig_Z (
5374 // Equation(s):
5375 // \inst|vga_driver_unit|h_enable_sig  = DFFEAS(\inst|vga_driver_unit|vsync_state_3  # \inst|vga_driver_unit|vsync_state_1 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4 , , ,
5376 // \inst|vga_driver_unit|un6_dly_counter_0_x , )
5377
5378         .clk(\inst1|altpll_component|_clk0 ),
5379         .dataa(\inst|vga_driver_unit|vsync_state_3 ),
5380         .datab(vcc),
5381         .datac(vcc),
5382         .datad(\inst|vga_driver_unit|vsync_state_1 ),
5383         .aclr(gnd),
5384         .aload(gnd),
5385         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
5386         .sload(gnd),
5387         .ena(\inst|vga_driver_unit|h_enable_sig_1_0_0_0_g0_i_o4 ),
5388         .cin(gnd),
5389         .cin0(gnd),
5390         .cin1(vcc),
5391         .inverta(gnd),
5392         .regcascin(gnd),
5393         .devclrn(devclrn),
5394         .devpor(devpor),
5395         .combout(),
5396         .regout(\inst|vga_driver_unit|h_enable_sig ),
5397         .cout(),
5398         .cout0(),
5399         .cout1());
5400 // synopsys translate_off
5401 defparam \inst|vga_driver_unit|h_enable_sig_Z .lut_mask = "ffaa";
5402 defparam \inst|vga_driver_unit|h_enable_sig_Z .operation_mode = "normal";
5403 defparam \inst|vga_driver_unit|h_enable_sig_Z .output_mode = "reg_only";
5404 defparam \inst|vga_driver_unit|h_enable_sig_Z .register_cascade_mode = "off";
5405 defparam \inst|vga_driver_unit|h_enable_sig_Z .sum_lutc_input = "datac";
5406 defparam \inst|vga_driver_unit|h_enable_sig_Z .synch_mode = "on";
5407 // synopsys translate_on
5408
5409 // atom is at LC_X28_Y35_N8
5410 stratix_lcell \inst|vga_control_unit|b_next_0_sqmuxa_7_2_cZ (
5411 // Equation(s):
5412 // \inst|vga_control_unit|b_next_0_sqmuxa_7_2  = !\inst|vga_driver_unit|column_counter_sig_9  & !\inst|vga_driver_unit|column_counter_sig_8  & !\inst|vga_driver_unit|line_counter_sig_8  & \inst|vga_driver_unit|h_enable_sig
5413
5414         .clk(gnd),
5415         .dataa(\inst|vga_driver_unit|column_counter_sig_9 ),
5416         .datab(\inst|vga_driver_unit|column_counter_sig_8 ),
5417         .datac(\inst|vga_driver_unit|line_counter_sig_8 ),
5418         .datad(\inst|vga_driver_unit|h_enable_sig ),
5419         .aclr(gnd),
5420         .aload(gnd),
5421         .sclr(gnd),
5422         .sload(gnd),
5423         .ena(vcc),
5424         .cin(gnd),
5425         .cin0(gnd),
5426         .cin1(vcc),
5427         .inverta(gnd),
5428         .regcascin(gnd),
5429         .devclrn(devclrn),
5430         .devpor(devpor),
5431         .combout(\inst|vga_control_unit|b_next_0_sqmuxa_7_2 ),
5432         .regout(),
5433         .cout(),
5434         .cout0(),
5435         .cout1());
5436 // synopsys translate_off
5437 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_2_cZ .lut_mask = "0100";
5438 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_2_cZ .operation_mode = "normal";
5439 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_2_cZ .output_mode = "comb_only";
5440 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_2_cZ .register_cascade_mode = "off";
5441 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_2_cZ .sum_lutc_input = "datac";
5442 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_2_cZ .synch_mode = "off";
5443 // synopsys translate_on
5444
5445 // atom is at LC_X28_Y35_N6
5446 stratix_lcell \inst|vga_control_unit|b_next_0_sqmuxa_7_3_cZ (
5447 // Equation(s):
5448 // \inst|vga_control_unit|b_next_0_sqmuxa_7_3  = \inst|vga_control_unit|b_next_0_sqmuxa_7_2  & (\inst|vga_driver_unit|column_counter_sig_9  # \inst|vga_driver_unit|column_counter_sig_7  # !\inst|vga_control_unit|un9_v_enablelto6 )
5449
5450         .clk(gnd),
5451         .dataa(\inst|vga_driver_unit|column_counter_sig_9 ),
5452         .datab(\inst|vga_driver_unit|column_counter_sig_7 ),
5453         .datac(\inst|vga_control_unit|un9_v_enablelto6 ),
5454         .datad(\inst|vga_control_unit|b_next_0_sqmuxa_7_2 ),
5455         .aclr(gnd),
5456         .aload(gnd),
5457         .sclr(gnd),
5458         .sload(gnd),
5459         .ena(vcc),
5460         .cin(gnd),
5461         .cin0(gnd),
5462         .cin1(vcc),
5463         .inverta(gnd),
5464         .regcascin(gnd),
5465         .devclrn(devclrn),
5466         .devpor(devpor),
5467         .combout(\inst|vga_control_unit|b_next_0_sqmuxa_7_3 ),
5468         .regout(),
5469         .cout(),
5470         .cout0(),
5471         .cout1());
5472 // synopsys translate_off
5473 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_3_cZ .lut_mask = "ef00";
5474 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_3_cZ .operation_mode = "normal";
5475 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_3_cZ .output_mode = "comb_only";
5476 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_3_cZ .register_cascade_mode = "off";
5477 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_3_cZ .sum_lutc_input = "datac";
5478 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_3_cZ .synch_mode = "off";
5479 // synopsys translate_on
5480
5481 // atom is at LC_X28_Y35_N9
5482 stratix_lcell \inst|vga_control_unit|b_next_0_sqmuxa_7_5_cZ (
5483 // Equation(s):
5484 // \inst|vga_control_unit|b_next_0_sqmuxa_7_5  = \inst|vga_control_unit|b_next_0_sqmuxa_7_3  & (!\inst|vga_control_unit|un5_v_enablelto5  # !\inst|vga_driver_unit|column_counter_sig_7  # !\inst|vga_driver_unit|column_counter_sig_6 )
5485
5486         .clk(gnd),
5487         .dataa(\inst|vga_driver_unit|column_counter_sig_6 ),
5488         .datab(\inst|vga_driver_unit|column_counter_sig_7 ),
5489         .datac(\inst|vga_control_unit|un5_v_enablelto5 ),
5490         .datad(\inst|vga_control_unit|b_next_0_sqmuxa_7_3 ),
5491         .aclr(gnd),
5492         .aload(gnd),
5493         .sclr(gnd),
5494         .sload(gnd),
5495         .ena(vcc),
5496         .cin(gnd),
5497         .cin0(gnd),
5498         .cin1(vcc),
5499         .inverta(gnd),
5500         .regcascin(gnd),
5501         .devclrn(devclrn),
5502         .devpor(devpor),
5503         .combout(\inst|vga_control_unit|b_next_0_sqmuxa_7_5 ),
5504         .regout(),
5505         .cout(),
5506         .cout0(),
5507         .cout1());
5508 // synopsys translate_off
5509 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_5_cZ .lut_mask = "7f00";
5510 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_5_cZ .operation_mode = "normal";
5511 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_5_cZ .output_mode = "comb_only";
5512 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_5_cZ .register_cascade_mode = "off";
5513 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_5_cZ .sum_lutc_input = "datac";
5514 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_5_cZ .synch_mode = "off";
5515 // synopsys translate_on
5516
5517 // atom is at LC_X18_Y42_N6
5518 stratix_lcell \inst|vga_control_unit|DRAW_SQUARE_next_un13_v_enablelto4_0 (
5519 // Equation(s):
5520 // \inst|vga_control_unit|un13_v_enablelto4_0  = !\inst|vga_driver_unit|line_counter_sig_4  & (!\inst|vga_driver_unit|line_counter_sig_2 )
5521
5522         .clk(gnd),
5523         .dataa(vcc),
5524         .datab(\inst|vga_driver_unit|line_counter_sig_4 ),
5525         .datac(vcc),
5526         .datad(\inst|vga_driver_unit|line_counter_sig_2 ),
5527         .aclr(gnd),
5528         .aload(gnd),
5529         .sclr(gnd),
5530         .sload(gnd),
5531         .ena(vcc),
5532         .cin(gnd),
5533         .cin0(gnd),
5534         .cin1(vcc),
5535         .inverta(gnd),
5536         .regcascin(gnd),
5537         .devclrn(devclrn),
5538         .devpor(devpor),
5539         .combout(\inst|vga_control_unit|un13_v_enablelto4_0 ),
5540         .regout(),
5541         .cout(),
5542         .cout0(),
5543         .cout1());
5544 // synopsys translate_off
5545 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un13_v_enablelto4_0 .lut_mask = "0033";
5546 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un13_v_enablelto4_0 .operation_mode = "normal";
5547 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un13_v_enablelto4_0 .output_mode = "comb_only";
5548 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un13_v_enablelto4_0 .register_cascade_mode = "off";
5549 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un13_v_enablelto4_0 .sum_lutc_input = "datac";
5550 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un13_v_enablelto4_0 .synch_mode = "off";
5551 // synopsys translate_on
5552
5553 // atom is at LC_X18_Y42_N4
5554 stratix_lcell \inst|vga_control_unit|DRAW_SQUARE_next_un13_v_enablelto6 (
5555 // Equation(s):
5556 // \inst|vga_control_unit|un13_v_enablelto6  = \inst|vga_control_unit|un13_v_enablelto4_0  & !\inst|vga_driver_unit|line_counter_sig_3  # !\inst|vga_driver_unit|line_counter_sig_6  # !\inst|vga_driver_unit|line_counter_sig_5
5557
5558         .clk(gnd),
5559         .dataa(\inst|vga_driver_unit|line_counter_sig_5 ),
5560         .datab(\inst|vga_control_unit|un13_v_enablelto4_0 ),
5561         .datac(\inst|vga_driver_unit|line_counter_sig_3 ),
5562         .datad(\inst|vga_driver_unit|line_counter_sig_6 ),
5563         .aclr(gnd),
5564         .aload(gnd),
5565         .sclr(gnd),
5566         .sload(gnd),
5567         .ena(vcc),
5568         .cin(gnd),
5569         .cin0(gnd),
5570         .cin1(vcc),
5571         .inverta(gnd),
5572         .regcascin(gnd),
5573         .devclrn(devclrn),
5574         .devpor(devpor),
5575         .combout(\inst|vga_control_unit|un13_v_enablelto6 ),
5576         .regout(),
5577         .cout(),
5578         .cout0(),
5579         .cout1());
5580 // synopsys translate_off
5581 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un13_v_enablelto6 .lut_mask = "5dff";
5582 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un13_v_enablelto6 .operation_mode = "normal";
5583 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un13_v_enablelto6 .output_mode = "comb_only";
5584 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un13_v_enablelto6 .register_cascade_mode = "off";
5585 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un13_v_enablelto6 .sum_lutc_input = "datac";
5586 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un13_v_enablelto6 .synch_mode = "off";
5587 // synopsys translate_on
5588
5589 // atom is at LC_X18_Y42_N8
5590 stratix_lcell \inst|vga_control_unit|DRAW_SQUARE_next_un17_v_enablelto3 (
5591 // Equation(s):
5592 // \inst|vga_control_unit|un17_v_enablelto3  = \inst|vga_driver_unit|line_counter_sig_3  & (\inst|vga_driver_unit|line_counter_sig_1  # \inst|vga_driver_unit|line_counter_sig_0  # \inst|vga_driver_unit|line_counter_sig_2 )
5593
5594         .clk(gnd),
5595         .dataa(\inst|vga_driver_unit|line_counter_sig_1 ),
5596         .datab(\inst|vga_driver_unit|line_counter_sig_3 ),
5597         .datac(\inst|vga_driver_unit|line_counter_sig_0 ),
5598         .datad(\inst|vga_driver_unit|line_counter_sig_2 ),
5599         .aclr(gnd),
5600         .aload(gnd),
5601         .sclr(gnd),
5602         .sload(gnd),
5603         .ena(vcc),
5604         .cin(gnd),
5605         .cin0(gnd),
5606         .cin1(vcc),
5607         .inverta(gnd),
5608         .regcascin(gnd),
5609         .devclrn(devclrn),
5610         .devpor(devpor),
5611         .combout(\inst|vga_control_unit|un17_v_enablelto3 ),
5612         .regout(),
5613         .cout(),
5614         .cout0(),
5615         .cout1());
5616 // synopsys translate_off
5617 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un17_v_enablelto3 .lut_mask = "ccc8";
5618 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un17_v_enablelto3 .operation_mode = "normal";
5619 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un17_v_enablelto3 .output_mode = "comb_only";
5620 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un17_v_enablelto3 .register_cascade_mode = "off";
5621 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un17_v_enablelto3 .sum_lutc_input = "datac";
5622 defparam \inst|vga_control_unit|DRAW_SQUARE_next_un17_v_enablelto3 .synch_mode = "off";
5623 // synopsys translate_on
5624
5625 // atom is at LC_X28_Y35_N1
5626 stratix_lcell \inst|vga_control_unit|b_next_0_sqmuxa_7_4_a_cZ (
5627 // Equation(s):
5628 // \inst|vga_control_unit|b_next_0_sqmuxa_7_4_a  = !\inst|vga_control_unit|un17_v_enablelto3  & !\inst|vga_driver_unit|line_counter_sig_4  & !\inst|vga_driver_unit|line_counter_sig_5  # !\inst|vga_driver_unit|line_counter_sig_6
5629
5630         .clk(gnd),
5631         .dataa(\inst|vga_control_unit|un17_v_enablelto3 ),
5632         .datab(\inst|vga_driver_unit|line_counter_sig_6 ),
5633         .datac(\inst|vga_driver_unit|line_counter_sig_4 ),
5634         .datad(\inst|vga_driver_unit|line_counter_sig_5 ),
5635         .aclr(gnd),
5636         .aload(gnd),
5637         .sclr(gnd),
5638         .sload(gnd),
5639         .ena(vcc),
5640         .cin(gnd),
5641         .cin0(gnd),
5642         .cin1(vcc),
5643         .inverta(gnd),
5644         .regcascin(gnd),
5645         .devclrn(devclrn),
5646         .devpor(devpor),
5647         .combout(\inst|vga_control_unit|b_next_0_sqmuxa_7_4_a ),
5648         .regout(),
5649         .cout(),
5650         .cout0(),
5651         .cout1());
5652 // synopsys translate_off
5653 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_4_a_cZ .lut_mask = "3337";
5654 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_4_a_cZ .operation_mode = "normal";
5655 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_4_a_cZ .output_mode = "comb_only";
5656 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_4_a_cZ .register_cascade_mode = "off";
5657 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_4_a_cZ .sum_lutc_input = "datac";
5658 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_4_a_cZ .synch_mode = "off";
5659 // synopsys translate_on
5660
5661 // atom is at LC_X28_Y35_N2
5662 stratix_lcell \inst|vga_control_unit|b_next_0_sqmuxa_7_4_cZ (
5663 // Equation(s):
5664 // \inst|vga_control_unit|b_next_0_sqmuxa_7_4  = \inst|vga_driver_unit|line_counter_sig_7  & (\inst|vga_control_unit|b_next_0_sqmuxa_7_4_a ) # !\inst|vga_driver_unit|line_counter_sig_7  & (\inst|vga_driver_unit|line_counter_sig_8  #
5665 // !\inst|vga_control_unit|un13_v_enablelto6 )
5666
5667         .clk(gnd),
5668         .dataa(\inst|vga_driver_unit|line_counter_sig_8 ),
5669         .datab(\inst|vga_control_unit|un13_v_enablelto6 ),
5670         .datac(\inst|vga_driver_unit|line_counter_sig_7 ),
5671         .datad(\inst|vga_control_unit|b_next_0_sqmuxa_7_4_a ),
5672         .aclr(gnd),
5673         .aload(gnd),
5674         .sclr(gnd),
5675         .sload(gnd),
5676         .ena(vcc),
5677         .cin(gnd),
5678         .cin0(gnd),
5679         .cin1(vcc),
5680         .inverta(gnd),
5681         .regcascin(gnd),
5682         .devclrn(devclrn),
5683         .devpor(devpor),
5684         .combout(\inst|vga_control_unit|b_next_0_sqmuxa_7_4 ),
5685         .regout(),
5686         .cout(),
5687         .cout0(),
5688         .cout1());
5689 // synopsys translate_off
5690 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_4_cZ .lut_mask = "fb0b";
5691 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_4_cZ .operation_mode = "normal";
5692 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_4_cZ .output_mode = "comb_only";
5693 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_4_cZ .register_cascade_mode = "off";
5694 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_4_cZ .sum_lutc_input = "datac";
5695 defparam \inst|vga_control_unit|b_next_0_sqmuxa_7_4_cZ .synch_mode = "off";
5696 // synopsys translate_on
5697
5698 // atom is at LC_X42_Y42_N7
5699 stratix_lcell \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4_cZ (
5700 // Equation(s):
5701 // \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4  = \inst|vga_driver_unit|un6_dly_counter_0_x  # !\inst|vga_driver_unit|hsync_state_5  & !\inst|vga_driver_unit|hsync_state_4
5702
5703         .clk(gnd),
5704         .dataa(\inst|vga_driver_unit|hsync_state_5 ),
5705         .datab(vcc),
5706         .datac(\inst|vga_driver_unit|hsync_state_4 ),
5707         .datad(\inst|vga_driver_unit|un6_dly_counter_0_x ),
5708         .aclr(gnd),
5709         .aload(gnd),
5710         .sclr(gnd),
5711         .sload(gnd),
5712         .ena(vcc),
5713         .cin(gnd),
5714         .cin0(gnd),
5715         .cin1(vcc),
5716         .inverta(gnd),
5717         .regcascin(gnd),
5718         .devclrn(devclrn),
5719         .devpor(devpor),
5720         .combout(\inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4 ),
5721         .regout(),
5722         .cout(),
5723         .cout0(),
5724         .cout1());
5725 // synopsys translate_off
5726 defparam \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4_cZ .lut_mask = "ff05";
5727 defparam \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4_cZ .operation_mode = "normal";
5728 defparam \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4_cZ .output_mode = "comb_only";
5729 defparam \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4_cZ .register_cascade_mode = "off";
5730 defparam \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4_cZ .sum_lutc_input = "datac";
5731 defparam \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4_cZ .synch_mode = "off";
5732 // synopsys translate_on
5733
5734 // atom is at LC_X50_Y42_N2
5735 stratix_lcell \inst|vga_driver_unit|v_enable_sig_Z (
5736 // Equation(s):
5737 // \inst|vga_driver_unit|v_enable_sig  = DFFEAS(\inst|vga_driver_unit|hsync_state_1  # \inst|vga_driver_unit|hsync_state_3 , GLOBAL(\inst1|altpll_component|_clk0 ), VCC, , \inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4 , , ,
5738 // \inst|vga_driver_unit|un6_dly_counter_0_x , )
5739
5740         .clk(\inst1|altpll_component|_clk0 ),
5741         .dataa(vcc),
5742         .datab(\inst|vga_driver_unit|hsync_state_1 ),
5743         .datac(vcc),
5744         .datad(\inst|vga_driver_unit|hsync_state_3 ),
5745         .aclr(gnd),
5746         .aload(gnd),
5747         .sclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
5748         .sload(gnd),
5749         .ena(\inst|vga_driver_unit|v_enable_sig_1_0_0_0_g0_i_o4 ),
5750         .cin(gnd),
5751         .cin0(gnd),
5752         .cin1(vcc),
5753         .inverta(gnd),
5754         .regcascin(gnd),
5755         .devclrn(devclrn),
5756         .devpor(devpor),
5757         .combout(),
5758         .regout(\inst|vga_driver_unit|v_enable_sig ),
5759         .cout(),
5760         .cout0(),
5761         .cout1());
5762 // synopsys translate_off
5763 defparam \inst|vga_driver_unit|v_enable_sig_Z .lut_mask = "ffcc";
5764 defparam \inst|vga_driver_unit|v_enable_sig_Z .operation_mode = "normal";
5765 defparam \inst|vga_driver_unit|v_enable_sig_Z .output_mode = "reg_only";
5766 defparam \inst|vga_driver_unit|v_enable_sig_Z .register_cascade_mode = "off";
5767 defparam \inst|vga_driver_unit|v_enable_sig_Z .sum_lutc_input = "datac";
5768 defparam \inst|vga_driver_unit|v_enable_sig_Z .synch_mode = "on";
5769 // synopsys translate_on
5770
5771 // atom is at LC_X72_Y6_N0
5772 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_0_ (
5773 // Equation(s):
5774 // \inst|vga_control_unit|toggle_counter_sig_0  = DFFEAS(!\inst|vga_control_unit|toggle_counter_sig_0 , GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , , !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
5775
5776         .clk(\inst1|altpll_component|_clk0 ),
5777         .dataa(vcc),
5778         .datab(vcc),
5779         .datac(vcc),
5780         .datad(\inst|vga_control_unit|toggle_counter_sig_0 ),
5781         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
5782         .aload(gnd),
5783         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
5784         .sload(gnd),
5785         .ena(vcc),
5786         .cin(gnd),
5787         .cin0(gnd),
5788         .cin1(vcc),
5789         .inverta(gnd),
5790         .regcascin(gnd),
5791         .devclrn(devclrn),
5792         .devpor(devpor),
5793         .combout(),
5794         .regout(\inst|vga_control_unit|toggle_counter_sig_0 ),
5795         .cout(),
5796         .cout0(),
5797         .cout1());
5798 // synopsys translate_off
5799 defparam \inst|vga_control_unit|toggle_counter_sig_0_ .lut_mask = "00ff";
5800 defparam \inst|vga_control_unit|toggle_counter_sig_0_ .operation_mode = "normal";
5801 defparam \inst|vga_control_unit|toggle_counter_sig_0_ .output_mode = "reg_only";
5802 defparam \inst|vga_control_unit|toggle_counter_sig_0_ .register_cascade_mode = "off";
5803 defparam \inst|vga_control_unit|toggle_counter_sig_0_ .sum_lutc_input = "datac";
5804 defparam \inst|vga_control_unit|toggle_counter_sig_0_ .synch_mode = "on";
5805 // synopsys translate_on
5806
5807 // atom is at LC_X76_Y6_N0
5808 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_1_ (
5809 // Equation(s):
5810 // \inst|vga_control_unit|toggle_counter_sig_1  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_0  $ \inst|vga_control_unit|toggle_counter_sig_1 , GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , ,
5811 // !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
5812 // \inst|vga_control_unit|toggle_counter_sig_cout [1] = CARRY(\inst|vga_control_unit|toggle_counter_sig_0  & \inst|vga_control_unit|toggle_counter_sig_1 )
5813 // \inst|vga_control_unit|toggle_counter_sig_cout[1]~COUT1_17  = CARRY(\inst|vga_control_unit|toggle_counter_sig_0  & \inst|vga_control_unit|toggle_counter_sig_1 )
5814
5815         .clk(\inst1|altpll_component|_clk0 ),
5816         .dataa(\inst|vga_control_unit|toggle_counter_sig_0 ),
5817         .datab(\inst|vga_control_unit|toggle_counter_sig_1 ),
5818         .datac(vcc),
5819         .datad(vcc),
5820         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
5821         .aload(gnd),
5822         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
5823         .sload(gnd),
5824         .ena(vcc),
5825         .cin(gnd),
5826         .cin0(gnd),
5827         .cin1(vcc),
5828         .inverta(gnd),
5829         .regcascin(gnd),
5830         .devclrn(devclrn),
5831         .devpor(devpor),
5832         .combout(),
5833         .regout(\inst|vga_control_unit|toggle_counter_sig_1 ),
5834         .cout(),
5835         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [1]),
5836         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[1]~COUT1_17 ));
5837 // synopsys translate_off
5838 defparam \inst|vga_control_unit|toggle_counter_sig_1_ .lut_mask = "6688";
5839 defparam \inst|vga_control_unit|toggle_counter_sig_1_ .operation_mode = "arithmetic";
5840 defparam \inst|vga_control_unit|toggle_counter_sig_1_ .output_mode = "reg_only";
5841 defparam \inst|vga_control_unit|toggle_counter_sig_1_ .register_cascade_mode = "off";
5842 defparam \inst|vga_control_unit|toggle_counter_sig_1_ .sum_lutc_input = "datac";
5843 defparam \inst|vga_control_unit|toggle_counter_sig_1_ .synch_mode = "on";
5844 // synopsys translate_on
5845
5846 // atom is at LC_X76_Y6_N1
5847 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_3_ (
5848 // Equation(s):
5849 // \inst|vga_control_unit|toggle_counter_sig_3  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_3  $ (\inst|vga_control_unit|toggle_counter_sig_2  & \inst|vga_control_unit|toggle_counter_sig_cout [1]), GLOBAL(\inst1|altpll_component|_clk0 ),
5850 // !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , , !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
5851 // \inst|vga_control_unit|toggle_counter_sig_cout [3] = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout [1] # !\inst|vga_control_unit|toggle_counter_sig_3  # !\inst|vga_control_unit|toggle_counter_sig_2 )
5852 // \inst|vga_control_unit|toggle_counter_sig_cout[3]~COUT1_19  = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout[1]~COUT1_17  # !\inst|vga_control_unit|toggle_counter_sig_3  # !\inst|vga_control_unit|toggle_counter_sig_2 )
5853
5854         .clk(\inst1|altpll_component|_clk0 ),
5855         .dataa(\inst|vga_control_unit|toggle_counter_sig_2 ),
5856         .datab(\inst|vga_control_unit|toggle_counter_sig_3 ),
5857         .datac(vcc),
5858         .datad(vcc),
5859         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
5860         .aload(gnd),
5861         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
5862         .sload(gnd),
5863         .ena(vcc),
5864         .cin(gnd),
5865         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [1]),
5866         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[1]~COUT1_17 ),
5867         .inverta(gnd),
5868         .regcascin(gnd),
5869         .devclrn(devclrn),
5870         .devpor(devpor),
5871         .combout(),
5872         .regout(\inst|vga_control_unit|toggle_counter_sig_3 ),
5873         .cout(),
5874         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [3]),
5875         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[3]~COUT1_19 ));
5876 // synopsys translate_off
5877 defparam \inst|vga_control_unit|toggle_counter_sig_3_ .cin0_used = "true";
5878 defparam \inst|vga_control_unit|toggle_counter_sig_3_ .cin1_used = "true";
5879 defparam \inst|vga_control_unit|toggle_counter_sig_3_ .lut_mask = "6c7f";
5880 defparam \inst|vga_control_unit|toggle_counter_sig_3_ .operation_mode = "arithmetic";
5881 defparam \inst|vga_control_unit|toggle_counter_sig_3_ .output_mode = "reg_only";
5882 defparam \inst|vga_control_unit|toggle_counter_sig_3_ .register_cascade_mode = "off";
5883 defparam \inst|vga_control_unit|toggle_counter_sig_3_ .sum_lutc_input = "cin";
5884 defparam \inst|vga_control_unit|toggle_counter_sig_3_ .synch_mode = "on";
5885 // synopsys translate_on
5886
5887 // atom is at LC_X72_Y6_N5
5888 stratix_lcell \inst|vga_control_unit|un2_toggle_counter_next_0_ (
5889 // Equation(s):
5890 // \inst|vga_control_unit|un2_toggle_counter_next_cout [0] = CARRY(\inst|vga_control_unit|toggle_counter_sig_1  & \inst|vga_control_unit|toggle_counter_sig_0 )
5891 // \inst|vga_control_unit|un2_toggle_counter_next_cout[0]~COUT1_3  = CARRY(\inst|vga_control_unit|toggle_counter_sig_1  & \inst|vga_control_unit|toggle_counter_sig_0 )
5892
5893         .clk(gnd),
5894         .dataa(\inst|vga_control_unit|toggle_counter_sig_1 ),
5895         .datab(\inst|vga_control_unit|toggle_counter_sig_0 ),
5896         .datac(vcc),
5897         .datad(vcc),
5898         .aclr(gnd),
5899         .aload(gnd),
5900         .sclr(gnd),
5901         .sload(gnd),
5902         .ena(vcc),
5903         .cin(gnd),
5904         .cin0(gnd),
5905         .cin1(vcc),
5906         .inverta(gnd),
5907         .regcascin(gnd),
5908         .devclrn(devclrn),
5909         .devpor(devpor),
5910         .combout(\inst|vga_control_unit|un2_toggle_counter_next_0_~COMBOUT ),
5911         .regout(),
5912         .cout(),
5913         .cout0(\inst|vga_control_unit|un2_toggle_counter_next_cout [0]),
5914         .cout1(\inst|vga_control_unit|un2_toggle_counter_next_cout[0]~COUT1_3 ));
5915 // synopsys translate_off
5916 defparam \inst|vga_control_unit|un2_toggle_counter_next_0_ .lut_mask = "ff88";
5917 defparam \inst|vga_control_unit|un2_toggle_counter_next_0_ .operation_mode = "arithmetic";
5918 defparam \inst|vga_control_unit|un2_toggle_counter_next_0_ .output_mode = "none";
5919 defparam \inst|vga_control_unit|un2_toggle_counter_next_0_ .register_cascade_mode = "off";
5920 defparam \inst|vga_control_unit|un2_toggle_counter_next_0_ .sum_lutc_input = "datac";
5921 defparam \inst|vga_control_unit|un2_toggle_counter_next_0_ .synch_mode = "off";
5922 // synopsys translate_on
5923
5924 // atom is at LC_X72_Y6_N6
5925 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_2_ (
5926 // Equation(s):
5927 // \inst|vga_control_unit|toggle_counter_sig_2  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_2  $ \inst|vga_control_unit|un2_toggle_counter_next_cout [0], GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , ,
5928 // , , !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
5929 // \inst|vga_control_unit|toggle_counter_sig_cout [2] = CARRY(!\inst|vga_control_unit|un2_toggle_counter_next_cout [0] # !\inst|vga_control_unit|toggle_counter_sig_2  # !\inst|vga_control_unit|toggle_counter_sig_3 )
5930 // \inst|vga_control_unit|toggle_counter_sig_cout[2]~COUT1_33  = CARRY(!\inst|vga_control_unit|un2_toggle_counter_next_cout[0]~COUT1_3  # !\inst|vga_control_unit|toggle_counter_sig_2  # !\inst|vga_control_unit|toggle_counter_sig_3 )
5931
5932         .clk(\inst1|altpll_component|_clk0 ),
5933         .dataa(\inst|vga_control_unit|toggle_counter_sig_3 ),
5934         .datab(\inst|vga_control_unit|toggle_counter_sig_2 ),
5935         .datac(vcc),
5936         .datad(vcc),
5937         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
5938         .aload(gnd),
5939         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
5940         .sload(gnd),
5941         .ena(vcc),
5942         .cin(gnd),
5943         .cin0(\inst|vga_control_unit|un2_toggle_counter_next_cout [0]),
5944         .cin1(\inst|vga_control_unit|un2_toggle_counter_next_cout[0]~COUT1_3 ),
5945         .inverta(gnd),
5946         .regcascin(gnd),
5947         .devclrn(devclrn),
5948         .devpor(devpor),
5949         .combout(),
5950         .regout(\inst|vga_control_unit|toggle_counter_sig_2 ),
5951         .cout(),
5952         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [2]),
5953         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[2]~COUT1_33 ));
5954 // synopsys translate_off
5955 defparam \inst|vga_control_unit|toggle_counter_sig_2_ .cin0_used = "true";
5956 defparam \inst|vga_control_unit|toggle_counter_sig_2_ .cin1_used = "true";
5957 defparam \inst|vga_control_unit|toggle_counter_sig_2_ .lut_mask = "3c7f";
5958 defparam \inst|vga_control_unit|toggle_counter_sig_2_ .operation_mode = "arithmetic";
5959 defparam \inst|vga_control_unit|toggle_counter_sig_2_ .output_mode = "reg_only";
5960 defparam \inst|vga_control_unit|toggle_counter_sig_2_ .register_cascade_mode = "off";
5961 defparam \inst|vga_control_unit|toggle_counter_sig_2_ .sum_lutc_input = "cin";
5962 defparam \inst|vga_control_unit|toggle_counter_sig_2_ .synch_mode = "on";
5963 // synopsys translate_on
5964
5965 // atom is at LC_X76_Y6_N2
5966 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_5_ (
5967 // Equation(s):
5968 // \inst|vga_control_unit|toggle_counter_sig_5  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_5  $ (\inst|vga_control_unit|toggle_counter_sig_4  & !\inst|vga_control_unit|toggle_counter_sig_cout [3]), GLOBAL(\inst1|altpll_component|_clk0 ),
5969 // !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , , !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
5970 // \inst|vga_control_unit|toggle_counter_sig_cout [5] = CARRY(\inst|vga_control_unit|toggle_counter_sig_5  & \inst|vga_control_unit|toggle_counter_sig_4  & !\inst|vga_control_unit|toggle_counter_sig_cout [3])
5971 // \inst|vga_control_unit|toggle_counter_sig_cout[5]~COUT1_21  = CARRY(\inst|vga_control_unit|toggle_counter_sig_5  & \inst|vga_control_unit|toggle_counter_sig_4  & !\inst|vga_control_unit|toggle_counter_sig_cout[3]~COUT1_19 )
5972
5973         .clk(\inst1|altpll_component|_clk0 ),
5974         .dataa(\inst|vga_control_unit|toggle_counter_sig_5 ),
5975         .datab(\inst|vga_control_unit|toggle_counter_sig_4 ),
5976         .datac(vcc),
5977         .datad(vcc),
5978         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
5979         .aload(gnd),
5980         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
5981         .sload(gnd),
5982         .ena(vcc),
5983         .cin(gnd),
5984         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [3]),
5985         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[3]~COUT1_19 ),
5986         .inverta(gnd),
5987         .regcascin(gnd),
5988         .devclrn(devclrn),
5989         .devpor(devpor),
5990         .combout(),
5991         .regout(\inst|vga_control_unit|toggle_counter_sig_5 ),
5992         .cout(),
5993         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [5]),
5994         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[5]~COUT1_21 ));
5995 // synopsys translate_off
5996 defparam \inst|vga_control_unit|toggle_counter_sig_5_ .cin0_used = "true";
5997 defparam \inst|vga_control_unit|toggle_counter_sig_5_ .cin1_used = "true";
5998 defparam \inst|vga_control_unit|toggle_counter_sig_5_ .lut_mask = "a608";
5999 defparam \inst|vga_control_unit|toggle_counter_sig_5_ .operation_mode = "arithmetic";
6000 defparam \inst|vga_control_unit|toggle_counter_sig_5_ .output_mode = "reg_only";
6001 defparam \inst|vga_control_unit|toggle_counter_sig_5_ .register_cascade_mode = "off";
6002 defparam \inst|vga_control_unit|toggle_counter_sig_5_ .sum_lutc_input = "cin";
6003 defparam \inst|vga_control_unit|toggle_counter_sig_5_ .synch_mode = "on";
6004 // synopsys translate_on
6005
6006 // atom is at LC_X72_Y6_N7
6007 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_4_ (
6008 // Equation(s):
6009 // \inst|vga_control_unit|toggle_counter_sig_4  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_4  $ (!\inst|vga_control_unit|toggle_counter_sig_cout [2]), GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , ,
6010 // , !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6011 // \inst|vga_control_unit|toggle_counter_sig_cout [4] = CARRY(\inst|vga_control_unit|toggle_counter_sig_4  & \inst|vga_control_unit|toggle_counter_sig_5  & !\inst|vga_control_unit|toggle_counter_sig_cout [2])
6012 // \inst|vga_control_unit|toggle_counter_sig_cout[4]~COUT1_35  = CARRY(\inst|vga_control_unit|toggle_counter_sig_4  & \inst|vga_control_unit|toggle_counter_sig_5  & !\inst|vga_control_unit|toggle_counter_sig_cout[2]~COUT1_33 )
6013
6014         .clk(\inst1|altpll_component|_clk0 ),
6015         .dataa(\inst|vga_control_unit|toggle_counter_sig_4 ),
6016         .datab(\inst|vga_control_unit|toggle_counter_sig_5 ),
6017         .datac(vcc),
6018         .datad(vcc),
6019         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6020         .aload(gnd),
6021         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6022         .sload(gnd),
6023         .ena(vcc),
6024         .cin(gnd),
6025         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [2]),
6026         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[2]~COUT1_33 ),
6027         .inverta(gnd),
6028         .regcascin(gnd),
6029         .devclrn(devclrn),
6030         .devpor(devpor),
6031         .combout(),
6032         .regout(\inst|vga_control_unit|toggle_counter_sig_4 ),
6033         .cout(),
6034         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [4]),
6035         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[4]~COUT1_35 ));
6036 // synopsys translate_off
6037 defparam \inst|vga_control_unit|toggle_counter_sig_4_ .cin0_used = "true";
6038 defparam \inst|vga_control_unit|toggle_counter_sig_4_ .cin1_used = "true";
6039 defparam \inst|vga_control_unit|toggle_counter_sig_4_ .lut_mask = "a508";
6040 defparam \inst|vga_control_unit|toggle_counter_sig_4_ .operation_mode = "arithmetic";
6041 defparam \inst|vga_control_unit|toggle_counter_sig_4_ .output_mode = "reg_only";
6042 defparam \inst|vga_control_unit|toggle_counter_sig_4_ .register_cascade_mode = "off";
6043 defparam \inst|vga_control_unit|toggle_counter_sig_4_ .sum_lutc_input = "cin";
6044 defparam \inst|vga_control_unit|toggle_counter_sig_4_ .synch_mode = "on";
6045 // synopsys translate_on
6046
6047 // atom is at LC_X72_Y6_N8
6048 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_6_ (
6049 // Equation(s):
6050 // \inst|vga_control_unit|toggle_counter_sig_6  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_6  $ \inst|vga_control_unit|toggle_counter_sig_cout [4], GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , ,
6051 // !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6052 // \inst|vga_control_unit|toggle_counter_sig_cout [6] = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout [4] # !\inst|vga_control_unit|toggle_counter_sig_6  # !\inst|vga_control_unit|toggle_counter_sig_7 )
6053 // \inst|vga_control_unit|toggle_counter_sig_cout[6]~COUT1_37  = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout[4]~COUT1_35  # !\inst|vga_control_unit|toggle_counter_sig_6  # !\inst|vga_control_unit|toggle_counter_sig_7 )
6054
6055         .clk(\inst1|altpll_component|_clk0 ),
6056         .dataa(\inst|vga_control_unit|toggle_counter_sig_7 ),
6057         .datab(\inst|vga_control_unit|toggle_counter_sig_6 ),
6058         .datac(vcc),
6059         .datad(vcc),
6060         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6061         .aload(gnd),
6062         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6063         .sload(gnd),
6064         .ena(vcc),
6065         .cin(gnd),
6066         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [4]),
6067         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[4]~COUT1_35 ),
6068         .inverta(gnd),
6069         .regcascin(gnd),
6070         .devclrn(devclrn),
6071         .devpor(devpor),
6072         .combout(),
6073         .regout(\inst|vga_control_unit|toggle_counter_sig_6 ),
6074         .cout(),
6075         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [6]),
6076         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[6]~COUT1_37 ));
6077 // synopsys translate_off
6078 defparam \inst|vga_control_unit|toggle_counter_sig_6_ .cin0_used = "true";
6079 defparam \inst|vga_control_unit|toggle_counter_sig_6_ .cin1_used = "true";
6080 defparam \inst|vga_control_unit|toggle_counter_sig_6_ .lut_mask = "3c7f";
6081 defparam \inst|vga_control_unit|toggle_counter_sig_6_ .operation_mode = "arithmetic";
6082 defparam \inst|vga_control_unit|toggle_counter_sig_6_ .output_mode = "reg_only";
6083 defparam \inst|vga_control_unit|toggle_counter_sig_6_ .register_cascade_mode = "off";
6084 defparam \inst|vga_control_unit|toggle_counter_sig_6_ .sum_lutc_input = "cin";
6085 defparam \inst|vga_control_unit|toggle_counter_sig_6_ .synch_mode = "on";
6086 // synopsys translate_on
6087
6088 // atom is at LC_X76_Y6_N3
6089 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_7_ (
6090 // Equation(s):
6091 // \inst|vga_control_unit|toggle_counter_sig_7  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_7  $ (\inst|vga_control_unit|toggle_counter_sig_6  & \inst|vga_control_unit|toggle_counter_sig_cout [5]), GLOBAL(\inst1|altpll_component|_clk0 ),
6092 // !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , , !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6093 // \inst|vga_control_unit|toggle_counter_sig_cout [7] = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout [5] # !\inst|vga_control_unit|toggle_counter_sig_6  # !\inst|vga_control_unit|toggle_counter_sig_7 )
6094 // \inst|vga_control_unit|toggle_counter_sig_cout[7]~COUT1_23  = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout[5]~COUT1_21  # !\inst|vga_control_unit|toggle_counter_sig_6  # !\inst|vga_control_unit|toggle_counter_sig_7 )
6095
6096         .clk(\inst1|altpll_component|_clk0 ),
6097         .dataa(\inst|vga_control_unit|toggle_counter_sig_7 ),
6098         .datab(\inst|vga_control_unit|toggle_counter_sig_6 ),
6099         .datac(vcc),
6100         .datad(vcc),
6101         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6102         .aload(gnd),
6103         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6104         .sload(gnd),
6105         .ena(vcc),
6106         .cin(gnd),
6107         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [5]),
6108         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[5]~COUT1_21 ),
6109         .inverta(gnd),
6110         .regcascin(gnd),
6111         .devclrn(devclrn),
6112         .devpor(devpor),
6113         .combout(),
6114         .regout(\inst|vga_control_unit|toggle_counter_sig_7 ),
6115         .cout(),
6116         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [7]),
6117         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[7]~COUT1_23 ));
6118 // synopsys translate_off
6119 defparam \inst|vga_control_unit|toggle_counter_sig_7_ .cin0_used = "true";
6120 defparam \inst|vga_control_unit|toggle_counter_sig_7_ .cin1_used = "true";
6121 defparam \inst|vga_control_unit|toggle_counter_sig_7_ .lut_mask = "6a7f";
6122 defparam \inst|vga_control_unit|toggle_counter_sig_7_ .operation_mode = "arithmetic";
6123 defparam \inst|vga_control_unit|toggle_counter_sig_7_ .output_mode = "reg_only";
6124 defparam \inst|vga_control_unit|toggle_counter_sig_7_ .register_cascade_mode = "off";
6125 defparam \inst|vga_control_unit|toggle_counter_sig_7_ .sum_lutc_input = "cin";
6126 defparam \inst|vga_control_unit|toggle_counter_sig_7_ .synch_mode = "on";
6127 // synopsys translate_on
6128
6129 // atom is at LC_X72_Y6_N9
6130 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_8_ (
6131 // Equation(s):
6132 // \inst|vga_control_unit|toggle_counter_sig_8  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_8  $ !\inst|vga_control_unit|toggle_counter_sig_cout [6], GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , ,
6133 // !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6134 // \inst|vga_control_unit|toggle_counter_sig_cout [8] = CARRY(\inst|vga_control_unit|toggle_counter_sig_9  & \inst|vga_control_unit|toggle_counter_sig_8  & !\inst|vga_control_unit|toggle_counter_sig_cout[6]~COUT1_37 )
6135
6136         .clk(\inst1|altpll_component|_clk0 ),
6137         .dataa(\inst|vga_control_unit|toggle_counter_sig_9 ),
6138         .datab(\inst|vga_control_unit|toggle_counter_sig_8 ),
6139         .datac(vcc),
6140         .datad(vcc),
6141         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6142         .aload(gnd),
6143         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6144         .sload(gnd),
6145         .ena(vcc),
6146         .cin(gnd),
6147         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [6]),
6148         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[6]~COUT1_37 ),
6149         .inverta(gnd),
6150         .regcascin(gnd),
6151         .devclrn(devclrn),
6152         .devpor(devpor),
6153         .combout(),
6154         .regout(\inst|vga_control_unit|toggle_counter_sig_8 ),
6155         .cout(\inst|vga_control_unit|toggle_counter_sig_cout [8]),
6156         .cout0(),
6157         .cout1());
6158 // synopsys translate_off
6159 defparam \inst|vga_control_unit|toggle_counter_sig_8_ .cin0_used = "true";
6160 defparam \inst|vga_control_unit|toggle_counter_sig_8_ .cin1_used = "true";
6161 defparam \inst|vga_control_unit|toggle_counter_sig_8_ .lut_mask = "c308";
6162 defparam \inst|vga_control_unit|toggle_counter_sig_8_ .operation_mode = "arithmetic";
6163 defparam \inst|vga_control_unit|toggle_counter_sig_8_ .output_mode = "reg_only";
6164 defparam \inst|vga_control_unit|toggle_counter_sig_8_ .register_cascade_mode = "off";
6165 defparam \inst|vga_control_unit|toggle_counter_sig_8_ .sum_lutc_input = "cin";
6166 defparam \inst|vga_control_unit|toggle_counter_sig_8_ .synch_mode = "on";
6167 // synopsys translate_on
6168
6169 // atom is at LC_X76_Y6_N4
6170 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_9_ (
6171 // Equation(s):
6172 // \inst|vga_control_unit|toggle_counter_sig_9  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_9  $ (\inst|vga_control_unit|toggle_counter_sig_8  & !\inst|vga_control_unit|toggle_counter_sig_cout [7]), GLOBAL(\inst1|altpll_component|_clk0 ),
6173 // !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , , !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6174 // \inst|vga_control_unit|toggle_counter_sig_cout [9] = CARRY(\inst|vga_control_unit|toggle_counter_sig_9  & \inst|vga_control_unit|toggle_counter_sig_8  & !\inst|vga_control_unit|toggle_counter_sig_cout[7]~COUT1_23 )
6175
6176         .clk(\inst1|altpll_component|_clk0 ),
6177         .dataa(\inst|vga_control_unit|toggle_counter_sig_9 ),
6178         .datab(\inst|vga_control_unit|toggle_counter_sig_8 ),
6179         .datac(vcc),
6180         .datad(vcc),
6181         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6182         .aload(gnd),
6183         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6184         .sload(gnd),
6185         .ena(vcc),
6186         .cin(gnd),
6187         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [7]),
6188         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[7]~COUT1_23 ),
6189         .inverta(gnd),
6190         .regcascin(gnd),
6191         .devclrn(devclrn),
6192         .devpor(devpor),
6193         .combout(),
6194         .regout(\inst|vga_control_unit|toggle_counter_sig_9 ),
6195         .cout(\inst|vga_control_unit|toggle_counter_sig_cout [9]),
6196         .cout0(),
6197         .cout1());
6198 // synopsys translate_off
6199 defparam \inst|vga_control_unit|toggle_counter_sig_9_ .cin0_used = "true";
6200 defparam \inst|vga_control_unit|toggle_counter_sig_9_ .cin1_used = "true";
6201 defparam \inst|vga_control_unit|toggle_counter_sig_9_ .lut_mask = "a608";
6202 defparam \inst|vga_control_unit|toggle_counter_sig_9_ .operation_mode = "arithmetic";
6203 defparam \inst|vga_control_unit|toggle_counter_sig_9_ .output_mode = "reg_only";
6204 defparam \inst|vga_control_unit|toggle_counter_sig_9_ .register_cascade_mode = "off";
6205 defparam \inst|vga_control_unit|toggle_counter_sig_9_ .sum_lutc_input = "cin";
6206 defparam \inst|vga_control_unit|toggle_counter_sig_9_ .synch_mode = "on";
6207 // synopsys translate_on
6208
6209 // atom is at LC_X76_Y6_N5
6210 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_11_ (
6211 // Equation(s):
6212 // \inst|vga_control_unit|toggle_counter_sig_11  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_11  $ (\inst|vga_control_unit|toggle_counter_sig_10  & \inst|vga_control_unit|toggle_counter_sig_cout [9]), GLOBAL(\inst1|altpll_component|_clk0 ),
6213 // !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , , !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6214 // \inst|vga_control_unit|toggle_counter_sig_cout [11] = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout [9] # !\inst|vga_control_unit|toggle_counter_sig_11  # !\inst|vga_control_unit|toggle_counter_sig_10 )
6215 // \inst|vga_control_unit|toggle_counter_sig_cout[11]~COUT1_25  = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout [9] # !\inst|vga_control_unit|toggle_counter_sig_11  # !\inst|vga_control_unit|toggle_counter_sig_10 )
6216
6217         .clk(\inst1|altpll_component|_clk0 ),
6218         .dataa(\inst|vga_control_unit|toggle_counter_sig_10 ),
6219         .datab(\inst|vga_control_unit|toggle_counter_sig_11 ),
6220         .datac(vcc),
6221         .datad(vcc),
6222         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6223         .aload(gnd),
6224         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6225         .sload(gnd),
6226         .ena(vcc),
6227         .cin(\inst|vga_control_unit|toggle_counter_sig_cout [9]),
6228         .cin0(gnd),
6229         .cin1(vcc),
6230         .inverta(gnd),
6231         .regcascin(gnd),
6232         .devclrn(devclrn),
6233         .devpor(devpor),
6234         .combout(),
6235         .regout(\inst|vga_control_unit|toggle_counter_sig_11 ),
6236         .cout(),
6237         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [11]),
6238         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[11]~COUT1_25 ));
6239 // synopsys translate_off
6240 defparam \inst|vga_control_unit|toggle_counter_sig_11_ .cin_used = "true";
6241 defparam \inst|vga_control_unit|toggle_counter_sig_11_ .lut_mask = "6c7f";
6242 defparam \inst|vga_control_unit|toggle_counter_sig_11_ .operation_mode = "arithmetic";
6243 defparam \inst|vga_control_unit|toggle_counter_sig_11_ .output_mode = "reg_only";
6244 defparam \inst|vga_control_unit|toggle_counter_sig_11_ .register_cascade_mode = "off";
6245 defparam \inst|vga_control_unit|toggle_counter_sig_11_ .sum_lutc_input = "cin";
6246 defparam \inst|vga_control_unit|toggle_counter_sig_11_ .synch_mode = "on";
6247 // synopsys translate_on
6248
6249 // atom is at LC_X72_Y5_N0
6250 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_10_ (
6251 // Equation(s):
6252 // \inst|vga_control_unit|toggle_counter_sig_10  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_10  $ (\inst|vga_control_unit|toggle_counter_sig_cout [8]), GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , ,
6253 // , !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6254 // \inst|vga_control_unit|toggle_counter_sig_cout [10] = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout [8] # !\inst|vga_control_unit|toggle_counter_sig_11  # !\inst|vga_control_unit|toggle_counter_sig_10 )
6255 // \inst|vga_control_unit|toggle_counter_sig_cout[10]~COUT1_39  = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout [8] # !\inst|vga_control_unit|toggle_counter_sig_11  # !\inst|vga_control_unit|toggle_counter_sig_10 )
6256
6257         .clk(\inst1|altpll_component|_clk0 ),
6258         .dataa(\inst|vga_control_unit|toggle_counter_sig_10 ),
6259         .datab(\inst|vga_control_unit|toggle_counter_sig_11 ),
6260         .datac(vcc),
6261         .datad(vcc),
6262         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6263         .aload(gnd),
6264         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6265         .sload(gnd),
6266         .ena(vcc),
6267         .cin(\inst|vga_control_unit|toggle_counter_sig_cout [8]),
6268         .cin0(gnd),
6269         .cin1(vcc),
6270         .inverta(gnd),
6271         .regcascin(gnd),
6272         .devclrn(devclrn),
6273         .devpor(devpor),
6274         .combout(),
6275         .regout(\inst|vga_control_unit|toggle_counter_sig_10 ),
6276         .cout(),
6277         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [10]),
6278         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[10]~COUT1_39 ));
6279 // synopsys translate_off
6280 defparam \inst|vga_control_unit|toggle_counter_sig_10_ .cin_used = "true";
6281 defparam \inst|vga_control_unit|toggle_counter_sig_10_ .lut_mask = "5a7f";
6282 defparam \inst|vga_control_unit|toggle_counter_sig_10_ .operation_mode = "arithmetic";
6283 defparam \inst|vga_control_unit|toggle_counter_sig_10_ .output_mode = "reg_only";
6284 defparam \inst|vga_control_unit|toggle_counter_sig_10_ .register_cascade_mode = "off";
6285 defparam \inst|vga_control_unit|toggle_counter_sig_10_ .sum_lutc_input = "cin";
6286 defparam \inst|vga_control_unit|toggle_counter_sig_10_ .synch_mode = "on";
6287 // synopsys translate_on
6288
6289 // atom is at LC_X76_Y6_N6
6290 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_13_ (
6291 // Equation(s):
6292 // \inst|vga_control_unit|toggle_counter_sig_13  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_13  $ (\inst|vga_control_unit|toggle_counter_sig_12  & !(!\inst|vga_control_unit|toggle_counter_sig_cout [9] & \inst|vga_control_unit|toggle_counter_sig_cout
6293 // [11]) # (\inst|vga_control_unit|toggle_counter_sig_cout [9] & \inst|vga_control_unit|toggle_counter_sig_cout[11]~COUT1_25 )), GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , ,
6294 // !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6295 // \inst|vga_control_unit|toggle_counter_sig_cout [13] = CARRY(\inst|vga_control_unit|toggle_counter_sig_12  & \inst|vga_control_unit|toggle_counter_sig_13  & !\inst|vga_control_unit|toggle_counter_sig_cout [11])
6296 // \inst|vga_control_unit|toggle_counter_sig_cout[13]~COUT1_27  = CARRY(\inst|vga_control_unit|toggle_counter_sig_12  & \inst|vga_control_unit|toggle_counter_sig_13  & !\inst|vga_control_unit|toggle_counter_sig_cout[11]~COUT1_25 )
6297
6298         .clk(\inst1|altpll_component|_clk0 ),
6299         .dataa(\inst|vga_control_unit|toggle_counter_sig_12 ),
6300         .datab(\inst|vga_control_unit|toggle_counter_sig_13 ),
6301         .datac(vcc),
6302         .datad(vcc),
6303         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6304         .aload(gnd),
6305         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6306         .sload(gnd),
6307         .ena(vcc),
6308         .cin(\inst|vga_control_unit|toggle_counter_sig_cout [9]),
6309         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [11]),
6310         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[11]~COUT1_25 ),
6311         .inverta(gnd),
6312         .regcascin(gnd),
6313         .devclrn(devclrn),
6314         .devpor(devpor),
6315         .combout(),
6316         .regout(\inst|vga_control_unit|toggle_counter_sig_13 ),
6317         .cout(),
6318         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [13]),
6319         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[13]~COUT1_27 ));
6320 // synopsys translate_off
6321 defparam \inst|vga_control_unit|toggle_counter_sig_13_ .cin0_used = "true";
6322 defparam \inst|vga_control_unit|toggle_counter_sig_13_ .cin1_used = "true";
6323 defparam \inst|vga_control_unit|toggle_counter_sig_13_ .cin_used = "true";
6324 defparam \inst|vga_control_unit|toggle_counter_sig_13_ .lut_mask = "c608";
6325 defparam \inst|vga_control_unit|toggle_counter_sig_13_ .operation_mode = "arithmetic";
6326 defparam \inst|vga_control_unit|toggle_counter_sig_13_ .output_mode = "reg_only";
6327 defparam \inst|vga_control_unit|toggle_counter_sig_13_ .register_cascade_mode = "off";
6328 defparam \inst|vga_control_unit|toggle_counter_sig_13_ .sum_lutc_input = "cin";
6329 defparam \inst|vga_control_unit|toggle_counter_sig_13_ .synch_mode = "on";
6330 // synopsys translate_on
6331
6332 // atom is at LC_X72_Y5_N1
6333 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_12_ (
6334 // Equation(s):
6335 // \inst|vga_control_unit|toggle_counter_sig_12  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_12  $ (!(!\inst|vga_control_unit|toggle_counter_sig_cout [8] & \inst|vga_control_unit|toggle_counter_sig_cout [10]) #
6336 // (\inst|vga_control_unit|toggle_counter_sig_cout [8] & \inst|vga_control_unit|toggle_counter_sig_cout[10]~COUT1_39 )), GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , ,
6337 // !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6338 // \inst|vga_control_unit|toggle_counter_sig_cout [12] = CARRY(\inst|vga_control_unit|toggle_counter_sig_12  & \inst|vga_control_unit|toggle_counter_sig_13  & !\inst|vga_control_unit|toggle_counter_sig_cout [10])
6339 // \inst|vga_control_unit|toggle_counter_sig_cout[12]~COUT1_41  = CARRY(\inst|vga_control_unit|toggle_counter_sig_12  & \inst|vga_control_unit|toggle_counter_sig_13  & !\inst|vga_control_unit|toggle_counter_sig_cout[10]~COUT1_39 )
6340
6341         .clk(\inst1|altpll_component|_clk0 ),
6342         .dataa(\inst|vga_control_unit|toggle_counter_sig_12 ),
6343         .datab(\inst|vga_control_unit|toggle_counter_sig_13 ),
6344         .datac(vcc),
6345         .datad(vcc),
6346         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6347         .aload(gnd),
6348         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6349         .sload(gnd),
6350         .ena(vcc),
6351         .cin(\inst|vga_control_unit|toggle_counter_sig_cout [8]),
6352         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [10]),
6353         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[10]~COUT1_39 ),
6354         .inverta(gnd),
6355         .regcascin(gnd),
6356         .devclrn(devclrn),
6357         .devpor(devpor),
6358         .combout(),
6359         .regout(\inst|vga_control_unit|toggle_counter_sig_12 ),
6360         .cout(),
6361         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [12]),
6362         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[12]~COUT1_41 ));
6363 // synopsys translate_off
6364 defparam \inst|vga_control_unit|toggle_counter_sig_12_ .cin0_used = "true";
6365 defparam \inst|vga_control_unit|toggle_counter_sig_12_ .cin1_used = "true";
6366 defparam \inst|vga_control_unit|toggle_counter_sig_12_ .cin_used = "true";
6367 defparam \inst|vga_control_unit|toggle_counter_sig_12_ .lut_mask = "a508";
6368 defparam \inst|vga_control_unit|toggle_counter_sig_12_ .operation_mode = "arithmetic";
6369 defparam \inst|vga_control_unit|toggle_counter_sig_12_ .output_mode = "reg_only";
6370 defparam \inst|vga_control_unit|toggle_counter_sig_12_ .register_cascade_mode = "off";
6371 defparam \inst|vga_control_unit|toggle_counter_sig_12_ .sum_lutc_input = "cin";
6372 defparam \inst|vga_control_unit|toggle_counter_sig_12_ .synch_mode = "on";
6373 // synopsys translate_on
6374
6375 // atom is at LC_X76_Y6_N7
6376 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_15_ (
6377 // Equation(s):
6378 // \inst|vga_control_unit|toggle_counter_sig_15  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_15  $ (\inst|vga_control_unit|toggle_counter_sig_14  & (!\inst|vga_control_unit|toggle_counter_sig_cout [9] & \inst|vga_control_unit|toggle_counter_sig_cout
6379 // [13]) # (\inst|vga_control_unit|toggle_counter_sig_cout [9] & \inst|vga_control_unit|toggle_counter_sig_cout[13]~COUT1_27 )), GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , ,
6380 // !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6381 // \inst|vga_control_unit|toggle_counter_sig_cout [15] = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout [13] # !\inst|vga_control_unit|toggle_counter_sig_14  # !\inst|vga_control_unit|toggle_counter_sig_15 )
6382 // \inst|vga_control_unit|toggle_counter_sig_cout[15]~COUT1_29  = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout[13]~COUT1_27  # !\inst|vga_control_unit|toggle_counter_sig_14  # !\inst|vga_control_unit|toggle_counter_sig_15 )
6383
6384         .clk(\inst1|altpll_component|_clk0 ),
6385         .dataa(\inst|vga_control_unit|toggle_counter_sig_15 ),
6386         .datab(\inst|vga_control_unit|toggle_counter_sig_14 ),
6387         .datac(vcc),
6388         .datad(vcc),
6389         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6390         .aload(gnd),
6391         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6392         .sload(gnd),
6393         .ena(vcc),
6394         .cin(\inst|vga_control_unit|toggle_counter_sig_cout [9]),
6395         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [13]),
6396         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[13]~COUT1_27 ),
6397         .inverta(gnd),
6398         .regcascin(gnd),
6399         .devclrn(devclrn),
6400         .devpor(devpor),
6401         .combout(),
6402         .regout(\inst|vga_control_unit|toggle_counter_sig_15 ),
6403         .cout(),
6404         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [15]),
6405         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[15]~COUT1_29 ));
6406 // synopsys translate_off
6407 defparam \inst|vga_control_unit|toggle_counter_sig_15_ .cin0_used = "true";
6408 defparam \inst|vga_control_unit|toggle_counter_sig_15_ .cin1_used = "true";
6409 defparam \inst|vga_control_unit|toggle_counter_sig_15_ .cin_used = "true";
6410 defparam \inst|vga_control_unit|toggle_counter_sig_15_ .lut_mask = "6a7f";
6411 defparam \inst|vga_control_unit|toggle_counter_sig_15_ .operation_mode = "arithmetic";
6412 defparam \inst|vga_control_unit|toggle_counter_sig_15_ .output_mode = "reg_only";
6413 defparam \inst|vga_control_unit|toggle_counter_sig_15_ .register_cascade_mode = "off";
6414 defparam \inst|vga_control_unit|toggle_counter_sig_15_ .sum_lutc_input = "cin";
6415 defparam \inst|vga_control_unit|toggle_counter_sig_15_ .synch_mode = "on";
6416 // synopsys translate_on
6417
6418 // atom is at LC_X72_Y5_N2
6419 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_14_ (
6420 // Equation(s):
6421 // \inst|vga_control_unit|toggle_counter_sig_14  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_14  $ ((!\inst|vga_control_unit|toggle_counter_sig_cout [8] & \inst|vga_control_unit|toggle_counter_sig_cout [12]) #
6422 // (\inst|vga_control_unit|toggle_counter_sig_cout [8] & \inst|vga_control_unit|toggle_counter_sig_cout[12]~COUT1_41 )), GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , ,
6423 // !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6424 // \inst|vga_control_unit|toggle_counter_sig_cout [14] = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout [12] # !\inst|vga_control_unit|toggle_counter_sig_15  # !\inst|vga_control_unit|toggle_counter_sig_14 )
6425 // \inst|vga_control_unit|toggle_counter_sig_cout[14]~COUT1_43  = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout[12]~COUT1_41  # !\inst|vga_control_unit|toggle_counter_sig_15  # !\inst|vga_control_unit|toggle_counter_sig_14 )
6426
6427         .clk(\inst1|altpll_component|_clk0 ),
6428         .dataa(\inst|vga_control_unit|toggle_counter_sig_14 ),
6429         .datab(\inst|vga_control_unit|toggle_counter_sig_15 ),
6430         .datac(vcc),
6431         .datad(vcc),
6432         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6433         .aload(gnd),
6434         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6435         .sload(gnd),
6436         .ena(vcc),
6437         .cin(\inst|vga_control_unit|toggle_counter_sig_cout [8]),
6438         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [12]),
6439         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[12]~COUT1_41 ),
6440         .inverta(gnd),
6441         .regcascin(gnd),
6442         .devclrn(devclrn),
6443         .devpor(devpor),
6444         .combout(),
6445         .regout(\inst|vga_control_unit|toggle_counter_sig_14 ),
6446         .cout(),
6447         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [14]),
6448         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[14]~COUT1_43 ));
6449 // synopsys translate_off
6450 defparam \inst|vga_control_unit|toggle_counter_sig_14_ .cin0_used = "true";
6451 defparam \inst|vga_control_unit|toggle_counter_sig_14_ .cin1_used = "true";
6452 defparam \inst|vga_control_unit|toggle_counter_sig_14_ .cin_used = "true";
6453 defparam \inst|vga_control_unit|toggle_counter_sig_14_ .lut_mask = "5a7f";
6454 defparam \inst|vga_control_unit|toggle_counter_sig_14_ .operation_mode = "arithmetic";
6455 defparam \inst|vga_control_unit|toggle_counter_sig_14_ .output_mode = "reg_only";
6456 defparam \inst|vga_control_unit|toggle_counter_sig_14_ .register_cascade_mode = "off";
6457 defparam \inst|vga_control_unit|toggle_counter_sig_14_ .sum_lutc_input = "cin";
6458 defparam \inst|vga_control_unit|toggle_counter_sig_14_ .synch_mode = "on";
6459 // synopsys translate_on
6460
6461 // atom is at LC_X72_Y6_N3
6462 stratix_lcell \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglt6 (
6463 // Equation(s):
6464 // \inst|vga_control_unit|un1_toggle_counter_siglt6  = !\inst|vga_control_unit|toggle_counter_sig_5  # !\inst|vga_control_unit|toggle_counter_sig_6
6465
6466         .clk(gnd),
6467         .dataa(\inst|vga_control_unit|toggle_counter_sig_6 ),
6468         .datab(vcc),
6469         .datac(vcc),
6470         .datad(\inst|vga_control_unit|toggle_counter_sig_5 ),
6471         .aclr(gnd),
6472         .aload(gnd),
6473         .sclr(gnd),
6474         .sload(gnd),
6475         .ena(vcc),
6476         .cin(gnd),
6477         .cin0(gnd),
6478         .cin1(vcc),
6479         .inverta(gnd),
6480         .regcascin(gnd),
6481         .devclrn(devclrn),
6482         .devpor(devpor),
6483         .combout(\inst|vga_control_unit|un1_toggle_counter_siglt6 ),
6484         .regout(),
6485         .cout(),
6486         .cout0(),
6487         .cout1());
6488 // synopsys translate_off
6489 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglt6 .lut_mask = "55ff";
6490 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglt6 .operation_mode = "normal";
6491 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglt6 .output_mode = "comb_only";
6492 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglt6 .register_cascade_mode = "off";
6493 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglt6 .sum_lutc_input = "datac";
6494 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglt6 .synch_mode = "off";
6495 // synopsys translate_on
6496
6497 // atom is at LC_X72_Y6_N4
6498 stratix_lcell \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto9 (
6499 // Equation(s):
6500 // \inst|vga_control_unit|un1_toggle_counter_siglto9  = !\inst|vga_control_unit|toggle_counter_sig_7  & \inst|vga_control_unit|un1_toggle_counter_siglt6  # !\inst|vga_control_unit|toggle_counter_sig_9  # !\inst|vga_control_unit|toggle_counter_sig_8
6501
6502         .clk(gnd),
6503         .dataa(\inst|vga_control_unit|toggle_counter_sig_7 ),
6504         .datab(\inst|vga_control_unit|toggle_counter_sig_8 ),
6505         .datac(\inst|vga_control_unit|un1_toggle_counter_siglt6 ),
6506         .datad(\inst|vga_control_unit|toggle_counter_sig_9 ),
6507         .aclr(gnd),
6508         .aload(gnd),
6509         .sclr(gnd),
6510         .sload(gnd),
6511         .ena(vcc),
6512         .cin(gnd),
6513         .cin0(gnd),
6514         .cin1(vcc),
6515         .inverta(gnd),
6516         .regcascin(gnd),
6517         .devclrn(devclrn),
6518         .devpor(devpor),
6519         .combout(\inst|vga_control_unit|un1_toggle_counter_siglto9 ),
6520         .regout(),
6521         .cout(),
6522         .cout0(),
6523         .cout1());
6524 // synopsys translate_off
6525 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto9 .lut_mask = "73ff";
6526 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto9 .operation_mode = "normal";
6527 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto9 .output_mode = "comb_only";
6528 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto9 .register_cascade_mode = "off";
6529 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto9 .sum_lutc_input = "datac";
6530 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto9 .synch_mode = "off";
6531 // synopsys translate_on
6532
6533 // atom is at LC_X72_Y5_N6
6534 stratix_lcell \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto12 (
6535 // Equation(s):
6536 // \inst|vga_control_unit|un1_toggle_counter_siglto12  = \inst|vga_control_unit|un1_toggle_counter_siglto9  & !\inst|vga_control_unit|toggle_counter_sig_10  & !\inst|vga_control_unit|toggle_counter_sig_12  & !\inst|vga_control_unit|toggle_counter_sig_11
6537
6538         .clk(gnd),
6539         .dataa(\inst|vga_control_unit|un1_toggle_counter_siglto9 ),
6540         .datab(\inst|vga_control_unit|toggle_counter_sig_10 ),
6541         .datac(\inst|vga_control_unit|toggle_counter_sig_12 ),
6542         .datad(\inst|vga_control_unit|toggle_counter_sig_11 ),
6543         .aclr(gnd),
6544         .aload(gnd),
6545         .sclr(gnd),
6546         .sload(gnd),
6547         .ena(vcc),
6548         .cin(gnd),
6549         .cin0(gnd),
6550         .cin1(vcc),
6551         .inverta(gnd),
6552         .regcascin(gnd),
6553         .devclrn(devclrn),
6554         .devpor(devpor),
6555         .combout(\inst|vga_control_unit|un1_toggle_counter_siglto12 ),
6556         .regout(),
6557         .cout(),
6558         .cout0(),
6559         .cout1());
6560 // synopsys translate_off
6561 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto12 .lut_mask = "0002";
6562 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto12 .operation_mode = "normal";
6563 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto12 .output_mode = "comb_only";
6564 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto12 .register_cascade_mode = "off";
6565 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto12 .sum_lutc_input = "datac";
6566 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto12 .synch_mode = "off";
6567 // synopsys translate_on
6568
6569 // atom is at LC_X72_Y5_N7
6570 stratix_lcell \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto15 (
6571 // Equation(s):
6572 // \inst|vga_control_unit|un1_toggle_counter_siglto15  = \inst|vga_control_unit|un1_toggle_counter_siglto12  # !\inst|vga_control_unit|toggle_counter_sig_13  # !\inst|vga_control_unit|toggle_counter_sig_15  # !\inst|vga_control_unit|toggle_counter_sig_14
6573
6574         .clk(gnd),
6575         .dataa(\inst|vga_control_unit|toggle_counter_sig_14 ),
6576         .datab(\inst|vga_control_unit|un1_toggle_counter_siglto12 ),
6577         .datac(\inst|vga_control_unit|toggle_counter_sig_15 ),
6578         .datad(\inst|vga_control_unit|toggle_counter_sig_13 ),
6579         .aclr(gnd),
6580         .aload(gnd),
6581         .sclr(gnd),
6582         .sload(gnd),
6583         .ena(vcc),
6584         .cin(gnd),
6585         .cin0(gnd),
6586         .cin1(vcc),
6587         .inverta(gnd),
6588         .regcascin(gnd),
6589         .devclrn(devclrn),
6590         .devpor(devpor),
6591         .combout(\inst|vga_control_unit|un1_toggle_counter_siglto15 ),
6592         .regout(),
6593         .cout(),
6594         .cout0(),
6595         .cout1());
6596 // synopsys translate_off
6597 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto15 .lut_mask = "dfff";
6598 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto15 .operation_mode = "normal";
6599 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto15 .output_mode = "comb_only";
6600 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto15 .register_cascade_mode = "off";
6601 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto15 .sum_lutc_input = "datac";
6602 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto15 .synch_mode = "off";
6603 // synopsys translate_on
6604
6605 // atom is at LC_X72_Y5_N3
6606 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_16_ (
6607 // Equation(s):
6608 // \inst|vga_control_unit|toggle_counter_sig_16  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_16  $ (!(!\inst|vga_control_unit|toggle_counter_sig_cout [8] & \inst|vga_control_unit|toggle_counter_sig_cout [14]) #
6609 // (\inst|vga_control_unit|toggle_counter_sig_cout [8] & \inst|vga_control_unit|toggle_counter_sig_cout[14]~COUT1_43 )), GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , ,
6610 // !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6611 // \inst|vga_control_unit|toggle_counter_sig_cout [16] = CARRY(\inst|vga_control_unit|toggle_counter_sig_16  & \inst|vga_control_unit|toggle_counter_sig_17  & !\inst|vga_control_unit|toggle_counter_sig_cout [14])
6612 // \inst|vga_control_unit|toggle_counter_sig_cout[16]~COUT1_45  = CARRY(\inst|vga_control_unit|toggle_counter_sig_16  & \inst|vga_control_unit|toggle_counter_sig_17  & !\inst|vga_control_unit|toggle_counter_sig_cout[14]~COUT1_43 )
6613
6614         .clk(\inst1|altpll_component|_clk0 ),
6615         .dataa(\inst|vga_control_unit|toggle_counter_sig_16 ),
6616         .datab(\inst|vga_control_unit|toggle_counter_sig_17 ),
6617         .datac(vcc),
6618         .datad(vcc),
6619         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6620         .aload(gnd),
6621         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6622         .sload(gnd),
6623         .ena(vcc),
6624         .cin(\inst|vga_control_unit|toggle_counter_sig_cout [8]),
6625         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [14]),
6626         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[14]~COUT1_43 ),
6627         .inverta(gnd),
6628         .regcascin(gnd),
6629         .devclrn(devclrn),
6630         .devpor(devpor),
6631         .combout(),
6632         .regout(\inst|vga_control_unit|toggle_counter_sig_16 ),
6633         .cout(),
6634         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [16]),
6635         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[16]~COUT1_45 ));
6636 // synopsys translate_off
6637 defparam \inst|vga_control_unit|toggle_counter_sig_16_ .cin0_used = "true";
6638 defparam \inst|vga_control_unit|toggle_counter_sig_16_ .cin1_used = "true";
6639 defparam \inst|vga_control_unit|toggle_counter_sig_16_ .cin_used = "true";
6640 defparam \inst|vga_control_unit|toggle_counter_sig_16_ .lut_mask = "a508";
6641 defparam \inst|vga_control_unit|toggle_counter_sig_16_ .operation_mode = "arithmetic";
6642 defparam \inst|vga_control_unit|toggle_counter_sig_16_ .output_mode = "reg_only";
6643 defparam \inst|vga_control_unit|toggle_counter_sig_16_ .register_cascade_mode = "off";
6644 defparam \inst|vga_control_unit|toggle_counter_sig_16_ .sum_lutc_input = "cin";
6645 defparam \inst|vga_control_unit|toggle_counter_sig_16_ .synch_mode = "on";
6646 // synopsys translate_on
6647
6648 // atom is at LC_X76_Y6_N8
6649 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_17_ (
6650 // Equation(s):
6651 // \inst|vga_control_unit|toggle_counter_sig_17  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_17  $ (\inst|vga_control_unit|toggle_counter_sig_16  & !(!\inst|vga_control_unit|toggle_counter_sig_cout [9] & \inst|vga_control_unit|toggle_counter_sig_cout
6652 // [15]) # (\inst|vga_control_unit|toggle_counter_sig_cout [9] & \inst|vga_control_unit|toggle_counter_sig_cout[15]~COUT1_29 )), GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , ,
6653 // !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6654 // \inst|vga_control_unit|toggle_counter_sig_cout [17] = CARRY(\inst|vga_control_unit|toggle_counter_sig_17  & \inst|vga_control_unit|toggle_counter_sig_16  & !\inst|vga_control_unit|toggle_counter_sig_cout [15])
6655 // \inst|vga_control_unit|toggle_counter_sig_cout[17]~COUT1_31  = CARRY(\inst|vga_control_unit|toggle_counter_sig_17  & \inst|vga_control_unit|toggle_counter_sig_16  & !\inst|vga_control_unit|toggle_counter_sig_cout[15]~COUT1_29 )
6656
6657         .clk(\inst1|altpll_component|_clk0 ),
6658         .dataa(\inst|vga_control_unit|toggle_counter_sig_17 ),
6659         .datab(\inst|vga_control_unit|toggle_counter_sig_16 ),
6660         .datac(vcc),
6661         .datad(vcc),
6662         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6663         .aload(gnd),
6664         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6665         .sload(gnd),
6666         .ena(vcc),
6667         .cin(\inst|vga_control_unit|toggle_counter_sig_cout [9]),
6668         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [15]),
6669         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[15]~COUT1_29 ),
6670         .inverta(gnd),
6671         .regcascin(gnd),
6672         .devclrn(devclrn),
6673         .devpor(devpor),
6674         .combout(),
6675         .regout(\inst|vga_control_unit|toggle_counter_sig_17 ),
6676         .cout(),
6677         .cout0(\inst|vga_control_unit|toggle_counter_sig_cout [17]),
6678         .cout1(\inst|vga_control_unit|toggle_counter_sig_cout[17]~COUT1_31 ));
6679 // synopsys translate_off
6680 defparam \inst|vga_control_unit|toggle_counter_sig_17_ .cin0_used = "true";
6681 defparam \inst|vga_control_unit|toggle_counter_sig_17_ .cin1_used = "true";
6682 defparam \inst|vga_control_unit|toggle_counter_sig_17_ .cin_used = "true";
6683 defparam \inst|vga_control_unit|toggle_counter_sig_17_ .lut_mask = "a608";
6684 defparam \inst|vga_control_unit|toggle_counter_sig_17_ .operation_mode = "arithmetic";
6685 defparam \inst|vga_control_unit|toggle_counter_sig_17_ .output_mode = "reg_only";
6686 defparam \inst|vga_control_unit|toggle_counter_sig_17_ .register_cascade_mode = "off";
6687 defparam \inst|vga_control_unit|toggle_counter_sig_17_ .sum_lutc_input = "cin";
6688 defparam \inst|vga_control_unit|toggle_counter_sig_17_ .synch_mode = "on";
6689 // synopsys translate_on
6690
6691 // atom is at LC_X76_Y6_N9
6692 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_19_ (
6693 // Equation(s):
6694 // \inst|vga_control_unit|toggle_counter_sig_19  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_19  $ (\inst|vga_control_unit|toggle_counter_sig_18  & (!\inst|vga_control_unit|toggle_counter_sig_cout [9] & \inst|vga_control_unit|toggle_counter_sig_cout
6695 // [17]) # (\inst|vga_control_unit|toggle_counter_sig_cout [9] & \inst|vga_control_unit|toggle_counter_sig_cout[17]~COUT1_31 )), GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , ,
6696 // !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6697
6698         .clk(\inst1|altpll_component|_clk0 ),
6699         .dataa(vcc),
6700         .datab(\inst|vga_control_unit|toggle_counter_sig_18 ),
6701         .datac(vcc),
6702         .datad(\inst|vga_control_unit|toggle_counter_sig_19 ),
6703         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6704         .aload(gnd),
6705         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6706         .sload(gnd),
6707         .ena(vcc),
6708         .cin(\inst|vga_control_unit|toggle_counter_sig_cout [9]),
6709         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [17]),
6710         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[17]~COUT1_31 ),
6711         .inverta(gnd),
6712         .regcascin(gnd),
6713         .devclrn(devclrn),
6714         .devpor(devpor),
6715         .combout(),
6716         .regout(\inst|vga_control_unit|toggle_counter_sig_19 ),
6717         .cout(),
6718         .cout0(),
6719         .cout1());
6720 // synopsys translate_off
6721 defparam \inst|vga_control_unit|toggle_counter_sig_19_ .cin0_used = "true";
6722 defparam \inst|vga_control_unit|toggle_counter_sig_19_ .cin1_used = "true";
6723 defparam \inst|vga_control_unit|toggle_counter_sig_19_ .cin_used = "true";
6724 defparam \inst|vga_control_unit|toggle_counter_sig_19_ .lut_mask = "3fc0";
6725 defparam \inst|vga_control_unit|toggle_counter_sig_19_ .operation_mode = "normal";
6726 defparam \inst|vga_control_unit|toggle_counter_sig_19_ .output_mode = "reg_only";
6727 defparam \inst|vga_control_unit|toggle_counter_sig_19_ .register_cascade_mode = "off";
6728 defparam \inst|vga_control_unit|toggle_counter_sig_19_ .sum_lutc_input = "cin";
6729 defparam \inst|vga_control_unit|toggle_counter_sig_19_ .synch_mode = "on";
6730 // synopsys translate_on
6731
6732 // atom is at LC_X72_Y5_N4
6733 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_18_ (
6734 // Equation(s):
6735 // \inst|vga_control_unit|toggle_counter_sig_18  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_18  $ ((!\inst|vga_control_unit|toggle_counter_sig_cout [8] & \inst|vga_control_unit|toggle_counter_sig_cout [16]) #
6736 // (\inst|vga_control_unit|toggle_counter_sig_cout [8] & \inst|vga_control_unit|toggle_counter_sig_cout[16]~COUT1_45 )), GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , ,
6737 // !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6738 // \inst|vga_control_unit|toggle_counter_sig_cout [18] = CARRY(!\inst|vga_control_unit|toggle_counter_sig_cout[16]~COUT1_45  # !\inst|vga_control_unit|toggle_counter_sig_19  # !\inst|vga_control_unit|toggle_counter_sig_18 )
6739
6740         .clk(\inst1|altpll_component|_clk0 ),
6741         .dataa(\inst|vga_control_unit|toggle_counter_sig_18 ),
6742         .datab(\inst|vga_control_unit|toggle_counter_sig_19 ),
6743         .datac(vcc),
6744         .datad(vcc),
6745         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6746         .aload(gnd),
6747         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6748         .sload(gnd),
6749         .ena(vcc),
6750         .cin(\inst|vga_control_unit|toggle_counter_sig_cout [8]),
6751         .cin0(\inst|vga_control_unit|toggle_counter_sig_cout [16]),
6752         .cin1(\inst|vga_control_unit|toggle_counter_sig_cout[16]~COUT1_45 ),
6753         .inverta(gnd),
6754         .regcascin(gnd),
6755         .devclrn(devclrn),
6756         .devpor(devpor),
6757         .combout(),
6758         .regout(\inst|vga_control_unit|toggle_counter_sig_18 ),
6759         .cout(\inst|vga_control_unit|toggle_counter_sig_cout [18]),
6760         .cout0(),
6761         .cout1());
6762 // synopsys translate_off
6763 defparam \inst|vga_control_unit|toggle_counter_sig_18_ .cin0_used = "true";
6764 defparam \inst|vga_control_unit|toggle_counter_sig_18_ .cin1_used = "true";
6765 defparam \inst|vga_control_unit|toggle_counter_sig_18_ .cin_used = "true";
6766 defparam \inst|vga_control_unit|toggle_counter_sig_18_ .lut_mask = "5a7f";
6767 defparam \inst|vga_control_unit|toggle_counter_sig_18_ .operation_mode = "arithmetic";
6768 defparam \inst|vga_control_unit|toggle_counter_sig_18_ .output_mode = "reg_only";
6769 defparam \inst|vga_control_unit|toggle_counter_sig_18_ .register_cascade_mode = "off";
6770 defparam \inst|vga_control_unit|toggle_counter_sig_18_ .sum_lutc_input = "cin";
6771 defparam \inst|vga_control_unit|toggle_counter_sig_18_ .synch_mode = "on";
6772 // synopsys translate_on
6773
6774 // atom is at LC_X72_Y5_N8
6775 stratix_lcell \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto18 (
6776 // Equation(s):
6777 // \inst|vga_control_unit|un1_toggle_counter_siglto18  = \inst|vga_control_unit|un1_toggle_counter_siglto15  & !\inst|vga_control_unit|toggle_counter_sig_16  # !\inst|vga_control_unit|toggle_counter_sig_18  # !\inst|vga_control_unit|toggle_counter_sig_17
6778
6779         .clk(gnd),
6780         .dataa(\inst|vga_control_unit|un1_toggle_counter_siglto15 ),
6781         .datab(\inst|vga_control_unit|toggle_counter_sig_17 ),
6782         .datac(\inst|vga_control_unit|toggle_counter_sig_16 ),
6783         .datad(\inst|vga_control_unit|toggle_counter_sig_18 ),
6784         .aclr(gnd),
6785         .aload(gnd),
6786         .sclr(gnd),
6787         .sload(gnd),
6788         .ena(vcc),
6789         .cin(gnd),
6790         .cin0(gnd),
6791         .cin1(vcc),
6792         .inverta(gnd),
6793         .regcascin(gnd),
6794         .devclrn(devclrn),
6795         .devpor(devpor),
6796         .combout(\inst|vga_control_unit|un1_toggle_counter_siglto18 ),
6797         .regout(),
6798         .cout(),
6799         .cout0(),
6800         .cout1());
6801 // synopsys translate_off
6802 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto18 .lut_mask = "3bff";
6803 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto18 .operation_mode = "normal";
6804 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto18 .output_mode = "comb_only";
6805 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto18 .register_cascade_mode = "off";
6806 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto18 .sum_lutc_input = "datac";
6807 defparam \inst|vga_control_unit|BLINKER_next_un1_toggle_counter_siglto18 .synch_mode = "off";
6808 // synopsys translate_on
6809
6810 // atom is at LC_X72_Y5_N5
6811 stratix_lcell \inst|vga_control_unit|toggle_counter_sig_20_ (
6812 // Equation(s):
6813 // \inst|vga_control_unit|toggle_counter_sig_20  = DFFEAS(\inst|vga_control_unit|toggle_counter_sig_20  $ !\inst|vga_control_unit|toggle_counter_sig_cout [18], GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , ,
6814 // , !\inst|vga_control_unit|toggle_sig_0_0_0_g1 , )
6815
6816         .clk(\inst1|altpll_component|_clk0 ),
6817         .dataa(vcc),
6818         .datab(\inst|vga_control_unit|toggle_counter_sig_20 ),
6819         .datac(vcc),
6820         .datad(vcc),
6821         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6822         .aload(gnd),
6823         .sclr(!\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6824         .sload(gnd),
6825         .ena(vcc),
6826         .cin(\inst|vga_control_unit|toggle_counter_sig_cout [18]),
6827         .cin0(gnd),
6828         .cin1(vcc),
6829         .inverta(gnd),
6830         .regcascin(gnd),
6831         .devclrn(devclrn),
6832         .devpor(devpor),
6833         .combout(),
6834         .regout(\inst|vga_control_unit|toggle_counter_sig_20 ),
6835         .cout(),
6836         .cout0(),
6837         .cout1());
6838 // synopsys translate_off
6839 defparam \inst|vga_control_unit|toggle_counter_sig_20_ .cin_used = "true";
6840 defparam \inst|vga_control_unit|toggle_counter_sig_20_ .lut_mask = "c3c3";
6841 defparam \inst|vga_control_unit|toggle_counter_sig_20_ .operation_mode = "normal";
6842 defparam \inst|vga_control_unit|toggle_counter_sig_20_ .output_mode = "reg_only";
6843 defparam \inst|vga_control_unit|toggle_counter_sig_20_ .register_cascade_mode = "off";
6844 defparam \inst|vga_control_unit|toggle_counter_sig_20_ .sum_lutc_input = "cin";
6845 defparam \inst|vga_control_unit|toggle_counter_sig_20_ .synch_mode = "on";
6846 // synopsys translate_on
6847
6848 // atom is at LC_X72_Y5_N9
6849 stratix_lcell \inst|vga_control_unit|toggle_sig_0_0_0_g1_cZ (
6850 // Equation(s):
6851 // \inst|vga_control_unit|toggle_sig_0_0_0_g1  = \inst|vga_control_unit|un1_toggle_counter_siglto18  & !\inst|vga_control_unit|toggle_counter_sig_19  # !\inst|vga_control_unit|toggle_counter_sig_20
6852
6853         .clk(gnd),
6854         .dataa(\inst|vga_control_unit|un1_toggle_counter_siglto18 ),
6855         .datab(vcc),
6856         .datac(\inst|vga_control_unit|toggle_counter_sig_20 ),
6857         .datad(\inst|vga_control_unit|toggle_counter_sig_19 ),
6858         .aclr(gnd),
6859         .aload(gnd),
6860         .sclr(gnd),
6861         .sload(gnd),
6862         .ena(vcc),
6863         .cin(gnd),
6864         .cin0(gnd),
6865         .cin1(vcc),
6866         .inverta(gnd),
6867         .regcascin(gnd),
6868         .devclrn(devclrn),
6869         .devpor(devpor),
6870         .combout(\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6871         .regout(),
6872         .cout(),
6873         .cout0(),
6874         .cout1());
6875 // synopsys translate_off
6876 defparam \inst|vga_control_unit|toggle_sig_0_0_0_g1_cZ .lut_mask = "0faf";
6877 defparam \inst|vga_control_unit|toggle_sig_0_0_0_g1_cZ .operation_mode = "normal";
6878 defparam \inst|vga_control_unit|toggle_sig_0_0_0_g1_cZ .output_mode = "comb_only";
6879 defparam \inst|vga_control_unit|toggle_sig_0_0_0_g1_cZ .register_cascade_mode = "off";
6880 defparam \inst|vga_control_unit|toggle_sig_0_0_0_g1_cZ .sum_lutc_input = "datac";
6881 defparam \inst|vga_control_unit|toggle_sig_0_0_0_g1_cZ .synch_mode = "off";
6882 // synopsys translate_on
6883
6884 // atom is at LC_X72_Y6_N2
6885 stratix_lcell \inst|vga_control_unit|toggle_sig_Z (
6886 // Equation(s):
6887 // \inst|vga_control_unit|toggle_sig  = DFFEAS(\inst|vga_control_unit|toggle_sig_0_0_0_g1  $ !\inst|vga_control_unit|toggle_sig , GLOBAL(\inst1|altpll_component|_clk0 ), !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , , , )
6888
6889         .clk(\inst1|altpll_component|_clk0 ),
6890         .dataa(vcc),
6891         .datab(vcc),
6892         .datac(\inst|vga_control_unit|toggle_sig_0_0_0_g1 ),
6893         .datad(\inst|vga_control_unit|toggle_sig ),
6894         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6895         .aload(gnd),
6896         .sclr(gnd),
6897         .sload(gnd),
6898         .ena(vcc),
6899         .cin(gnd),
6900         .cin0(gnd),
6901         .cin1(vcc),
6902         .inverta(gnd),
6903         .regcascin(gnd),
6904         .devclrn(devclrn),
6905         .devpor(devpor),
6906         .combout(),
6907         .regout(\inst|vga_control_unit|toggle_sig ),
6908         .cout(),
6909         .cout0(),
6910         .cout1());
6911 // synopsys translate_off
6912 defparam \inst|vga_control_unit|toggle_sig_Z .lut_mask = "f00f";
6913 defparam \inst|vga_control_unit|toggle_sig_Z .operation_mode = "normal";
6914 defparam \inst|vga_control_unit|toggle_sig_Z .output_mode = "reg_only";
6915 defparam \inst|vga_control_unit|toggle_sig_Z .register_cascade_mode = "off";
6916 defparam \inst|vga_control_unit|toggle_sig_Z .sum_lutc_input = "datac";
6917 defparam \inst|vga_control_unit|toggle_sig_Z .synch_mode = "off";
6918 // synopsys translate_on
6919
6920 // atom is at LC_X72_Y6_N1
6921 stratix_lcell \inst|vga_control_unit|r_Z (
6922 // Equation(s):
6923 // \inst|vga_control_unit|r  = DFFEAS(\inst|vga_control_unit|b_next_0_sqmuxa_7_5  & \inst|vga_control_unit|b_next_0_sqmuxa_7_4  & \inst|vga_driver_unit|v_enable_sig  & \inst|vga_control_unit|toggle_sig , GLOBAL(\inst1|altpll_component|_clk0 ),
6924 // !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , , , )
6925
6926         .clk(\inst1|altpll_component|_clk0 ),
6927         .dataa(\inst|vga_control_unit|b_next_0_sqmuxa_7_5 ),
6928         .datab(\inst|vga_control_unit|b_next_0_sqmuxa_7_4 ),
6929         .datac(\inst|vga_driver_unit|v_enable_sig ),
6930         .datad(\inst|vga_control_unit|toggle_sig ),
6931         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
6932         .aload(gnd),
6933         .sclr(gnd),
6934         .sload(gnd),
6935         .ena(vcc),
6936         .cin(gnd),
6937         .cin0(gnd),
6938         .cin1(vcc),
6939         .inverta(gnd),
6940         .regcascin(gnd),
6941         .devclrn(devclrn),
6942         .devpor(devpor),
6943         .combout(),
6944         .regout(\inst|vga_control_unit|r ),
6945         .cout(),
6946         .cout0(),
6947         .cout1());
6948 // synopsys translate_off
6949 defparam \inst|vga_control_unit|r_Z .lut_mask = "8000";
6950 defparam \inst|vga_control_unit|r_Z .operation_mode = "normal";
6951 defparam \inst|vga_control_unit|r_Z .output_mode = "reg_only";
6952 defparam \inst|vga_control_unit|r_Z .register_cascade_mode = "off";
6953 defparam \inst|vga_control_unit|r_Z .sum_lutc_input = "datac";
6954 defparam \inst|vga_control_unit|r_Z .synch_mode = "off";
6955 // synopsys translate_on
6956
6957 // atom is at LC_X41_Y42_N2
6958 stratix_lcell \~STRATIX_FITTER_CREATED_GND~I (
6959 // Equation(s):
6960 // \~STRATIX_FITTER_CREATED_GND~I_combout  = GND
6961
6962         .clk(gnd),
6963         .dataa(vcc),
6964         .datab(vcc),
6965         .datac(vcc),
6966         .datad(vcc),
6967         .aclr(gnd),
6968         .aload(gnd),
6969         .sclr(gnd),
6970         .sload(gnd),
6971         .ena(vcc),
6972         .cin(gnd),
6973         .cin0(gnd),
6974         .cin1(vcc),
6975         .inverta(gnd),
6976         .regcascin(gnd),
6977         .devclrn(devclrn),
6978         .devpor(devpor),
6979         .combout(\~STRATIX_FITTER_CREATED_GND~I_combout ),
6980         .regout(),
6981         .cout(),
6982         .cout0(),
6983         .cout1());
6984 // synopsys translate_off
6985 defparam \~STRATIX_FITTER_CREATED_GND~I .lut_mask = "0000";
6986 defparam \~STRATIX_FITTER_CREATED_GND~I .operation_mode = "normal";
6987 defparam \~STRATIX_FITTER_CREATED_GND~I .output_mode = "comb_only";
6988 defparam \~STRATIX_FITTER_CREATED_GND~I .register_cascade_mode = "off";
6989 defparam \~STRATIX_FITTER_CREATED_GND~I .sum_lutc_input = "datac";
6990 defparam \~STRATIX_FITTER_CREATED_GND~I .synch_mode = "off";
6991 // synopsys translate_on
6992
6993 // atom is at LC_X28_Y35_N3
6994 stratix_lcell \inst|vga_control_unit|b_Z (
6995 // Equation(s):
6996 // \inst|vga_control_unit|b  = DFFEAS(\inst|vga_control_unit|b_next_0_sqmuxa_7_4  & \inst|vga_control_unit|b_next_0_sqmuxa_7_5  & !\inst|vga_control_unit|toggle_sig  & \inst|vga_driver_unit|v_enable_sig , GLOBAL(\inst1|altpll_component|_clk0 ),
6997 // !GLOBAL(\inst|vga_driver_unit|un6_dly_counter_0_x ), , , , , , )
6998
6999         .clk(\inst1|altpll_component|_clk0 ),
7000         .dataa(\inst|vga_control_unit|b_next_0_sqmuxa_7_4 ),
7001         .datab(\inst|vga_control_unit|b_next_0_sqmuxa_7_5 ),
7002         .datac(\inst|vga_control_unit|toggle_sig ),
7003         .datad(\inst|vga_driver_unit|v_enable_sig ),
7004         .aclr(\inst|vga_driver_unit|un6_dly_counter_0_x ),
7005         .aload(gnd),
7006         .sclr(gnd),
7007         .sload(gnd),
7008         .ena(vcc),
7009         .cin(gnd),
7010         .cin0(gnd),
7011         .cin1(vcc),
7012         .inverta(gnd),
7013         .regcascin(gnd),
7014         .devclrn(devclrn),
7015         .devpor(devpor),
7016         .combout(),
7017         .regout(\inst|vga_control_unit|b ),
7018         .cout(),
7019         .cout0(),
7020         .cout1());
7021 // synopsys translate_off
7022 defparam \inst|vga_control_unit|b_Z .lut_mask = "0800";
7023 defparam \inst|vga_control_unit|b_Z .operation_mode = "normal";
7024 defparam \inst|vga_control_unit|b_Z .output_mode = "reg_only";
7025 defparam \inst|vga_control_unit|b_Z .register_cascade_mode = "off";
7026 defparam \inst|vga_control_unit|b_Z .sum_lutc_input = "datac";
7027 defparam \inst|vga_control_unit|b_Z .synch_mode = "off";
7028 // synopsys translate_on
7029
7030 // atom is at PIN_L7
7031 stratix_io \inst|d_hsync_out~I (
7032         .datain(\inst|vga_driver_unit|h_sync ),
7033         .ddiodatain(gnd),
7034         .oe(vcc),
7035         .outclk(gnd),
7036         .outclkena(vcc),
7037         .inclk(gnd),
7038         .inclkena(vcc),
7039         .areset(gnd),
7040         .sreset(gnd),
7041         .delayctrlin(gnd),
7042         .devclrn(devclrn),
7043         .devpor(devpor),
7044         .devoe(devoe),
7045         .combout(),
7046         .regout(),
7047         .ddioregout(),
7048         .padio(d_hsync),
7049         .dqsundelayedout());
7050 // synopsys translate_off
7051 defparam \inst|d_hsync_out~I .ddio_mode = "none";
7052 defparam \inst|d_hsync_out~I .input_async_reset = "none";
7053 defparam \inst|d_hsync_out~I .input_power_up = "low";
7054 defparam \inst|d_hsync_out~I .input_register_mode = "none";
7055 defparam \inst|d_hsync_out~I .input_sync_reset = "none";
7056 defparam \inst|d_hsync_out~I .oe_async_reset = "none";
7057 defparam \inst|d_hsync_out~I .oe_power_up = "low";
7058 defparam \inst|d_hsync_out~I .oe_register_mode = "none";
7059 defparam \inst|d_hsync_out~I .oe_sync_reset = "none";
7060 defparam \inst|d_hsync_out~I .operation_mode = "output";
7061 defparam \inst|d_hsync_out~I .output_async_reset = "none";
7062 defparam \inst|d_hsync_out~I .output_power_up = "low";
7063 defparam \inst|d_hsync_out~I .output_register_mode = "none";
7064 defparam \inst|d_hsync_out~I .output_sync_reset = "none";
7065 // synopsys translate_on
7066
7067 // atom is at PIN_L5
7068 stratix_io \inst|d_vsync_out~I (
7069         .datain(\inst|vga_driver_unit|v_sync ),
7070         .ddiodatain(gnd),
7071         .oe(vcc),
7072         .outclk(gnd),
7073         .outclkena(vcc),
7074         .inclk(gnd),
7075         .inclkena(vcc),
7076         .areset(gnd),
7077         .sreset(gnd),
7078         .delayctrlin(gnd),
7079         .devclrn(devclrn),
7080         .devpor(devpor),
7081         .devoe(devoe),
7082         .combout(),
7083         .regout(),
7084         .ddioregout(),
7085         .padio(d_vsync),
7086         .dqsundelayedout());
7087 // synopsys translate_off
7088 defparam \inst|d_vsync_out~I .ddio_mode = "none";
7089 defparam \inst|d_vsync_out~I .input_async_reset = "none";
7090 defparam \inst|d_vsync_out~I .input_power_up = "low";
7091 defparam \inst|d_vsync_out~I .input_register_mode = "none";
7092 defparam \inst|d_vsync_out~I .input_sync_reset = "none";
7093 defparam \inst|d_vsync_out~I .oe_async_reset = "none";
7094 defparam \inst|d_vsync_out~I .oe_power_up = "low";
7095 defparam \inst|d_vsync_out~I .oe_register_mode = "none";
7096 defparam \inst|d_vsync_out~I .oe_sync_reset = "none";
7097 defparam \inst|d_vsync_out~I .operation_mode = "output";
7098 defparam \inst|d_vsync_out~I .output_async_reset = "none";
7099 defparam \inst|d_vsync_out~I .output_power_up = "low";
7100 defparam \inst|d_vsync_out~I .output_register_mode = "none";
7101 defparam \inst|d_vsync_out~I .output_sync_reset = "none";
7102 // synopsys translate_on
7103
7104 // atom is at PIN_Y23
7105 stratix_io \inst|d_set_column_counter_out~I (
7106         .datain(\inst|vga_driver_unit|hsync_state_1 ),
7107         .ddiodatain(gnd),
7108         .oe(vcc),
7109         .outclk(gnd),
7110         .outclkena(vcc),
7111         .inclk(gnd),
7112         .inclkena(vcc),
7113         .areset(gnd),
7114         .sreset(gnd),
7115         .delayctrlin(gnd),
7116         .devclrn(devclrn),
7117         .devpor(devpor),
7118         .devoe(devoe),
7119         .combout(),
7120         .regout(),
7121         .ddioregout(),
7122         .padio(d_set_column_counter),
7123         .dqsundelayedout());
7124 // synopsys translate_off
7125 defparam \inst|d_set_column_counter_out~I .ddio_mode = "none";
7126 defparam \inst|d_set_column_counter_out~I .input_async_reset = "none";
7127 defparam \inst|d_set_column_counter_out~I .input_power_up = "low";
7128 defparam \inst|d_set_column_counter_out~I .input_register_mode = "none";
7129 defparam \inst|d_set_column_counter_out~I .input_sync_reset = "none";
7130 defparam \inst|d_set_column_counter_out~I .oe_async_reset = "none";
7131 defparam \inst|d_set_column_counter_out~I .oe_power_up = "low";
7132 defparam \inst|d_set_column_counter_out~I .oe_register_mode = "none";
7133 defparam \inst|d_set_column_counter_out~I .oe_sync_reset = "none";
7134 defparam \inst|d_set_column_counter_out~I .operation_mode = "output";
7135 defparam \inst|d_set_column_counter_out~I .output_async_reset = "none";
7136 defparam \inst|d_set_column_counter_out~I .output_power_up = "low";
7137 defparam \inst|d_set_column_counter_out~I .output_register_mode = "none";
7138 defparam \inst|d_set_column_counter_out~I .output_sync_reset = "none";
7139 // synopsys translate_on
7140
7141 // atom is at PIN_F21
7142 stratix_io \inst|d_set_line_counter_out~I (
7143         .datain(\inst|vga_driver_unit|vsync_state_1 ),
7144         .ddiodatain(gnd),
7145         .oe(vcc),
7146         .outclk(gnd),
7147         .outclkena(vcc),
7148         .inclk(gnd),
7149         .inclkena(vcc),
7150         .areset(gnd),
7151         .sreset(gnd),
7152         .delayctrlin(gnd),
7153         .devclrn(devclrn),
7154         .devpor(devpor),
7155         .devoe(devoe),
7156         .combout(),
7157         .regout(),
7158         .ddioregout(),
7159         .padio(d_set_line_counter),
7160         .dqsundelayedout());
7161 // synopsys translate_off
7162 defparam \inst|d_set_line_counter_out~I .ddio_mode = "none";
7163 defparam \inst|d_set_line_counter_out~I .input_async_reset = "none";
7164 defparam \inst|d_set_line_counter_out~I .input_power_up = "low";
7165 defparam \inst|d_set_line_counter_out~I .input_register_mode = "none";
7166 defparam \inst|d_set_line_counter_out~I .input_sync_reset = "none";
7167 defparam \inst|d_set_line_counter_out~I .oe_async_reset = "none";
7168 defparam \inst|d_set_line_counter_out~I .oe_power_up = "low";
7169 defparam \inst|d_set_line_counter_out~I .oe_register_mode = "none";
7170 defparam \inst|d_set_line_counter_out~I .oe_sync_reset = "none";
7171 defparam \inst|d_set_line_counter_out~I .operation_mode = "output";
7172 defparam \inst|d_set_line_counter_out~I .output_async_reset = "none";
7173 defparam \inst|d_set_line_counter_out~I .output_power_up = "low";
7174 defparam \inst|d_set_line_counter_out~I .output_register_mode = "none";
7175 defparam \inst|d_set_line_counter_out~I .output_sync_reset = "none";
7176 // synopsys translate_on
7177
7178 // atom is at PIN_F26
7179 stratix_io \inst|d_set_hsync_counter_out~I (
7180         .datain(\inst|vga_driver_unit|d_set_hsync_counter ),
7181         .ddiodatain(gnd),
7182         .oe(vcc),
7183         .outclk(gnd),
7184         .outclkena(vcc),
7185         .inclk(gnd),
7186         .inclkena(vcc),
7187         .areset(gnd),
7188         .sreset(gnd),
7189         .delayctrlin(gnd),
7190         .devclrn(devclrn),
7191         .devpor(devpor),
7192         .devoe(devoe),
7193         .combout(),
7194         .regout(),
7195         .ddioregout(),
7196         .padio(d_set_hsync_counter),
7197         .dqsundelayedout());
7198 // synopsys translate_off
7199 defparam \inst|d_set_hsync_counter_out~I .ddio_mode = "none";
7200 defparam \inst|d_set_hsync_counter_out~I .input_async_reset = "none";
7201 defparam \inst|d_set_hsync_counter_out~I .input_power_up = "low";
7202 defparam \inst|d_set_hsync_counter_out~I .input_register_mode = "none";
7203 defparam \inst|d_set_hsync_counter_out~I .input_sync_reset = "none";
7204 defparam \inst|d_set_hsync_counter_out~I .oe_async_reset = "none";
7205 defparam \inst|d_set_hsync_counter_out~I .oe_power_up = "low";
7206 defparam \inst|d_set_hsync_counter_out~I .oe_register_mode = "none";
7207 defparam \inst|d_set_hsync_counter_out~I .oe_sync_reset = "none";
7208 defparam \inst|d_set_hsync_counter_out~I .operation_mode = "output";
7209 defparam \inst|d_set_hsync_counter_out~I .output_async_reset = "none";
7210 defparam \inst|d_set_hsync_counter_out~I .output_power_up = "low";
7211 defparam \inst|d_set_hsync_counter_out~I .output_register_mode = "none";
7212 defparam \inst|d_set_hsync_counter_out~I .output_sync_reset = "none";
7213 // synopsys translate_on
7214
7215 // atom is at PIN_F24
7216 stratix_io \inst|d_set_vsync_counter_out~I (
7217         .datain(\inst|vga_driver_unit|d_set_vsync_counter ),
7218         .ddiodatain(gnd),
7219         .oe(vcc),
7220         .outclk(gnd),
7221         .outclkena(vcc),
7222         .inclk(gnd),
7223         .inclkena(vcc),
7224         .areset(gnd),
7225         .sreset(gnd),
7226         .delayctrlin(gnd),
7227         .devclrn(devclrn),
7228         .devpor(devpor),
7229         .devoe(devoe),
7230         .combout(),
7231         .regout(),
7232         .ddioregout(),
7233         .padio(d_set_vsync_counter),
7234         .dqsundelayedout());
7235 // synopsys translate_off
7236 defparam \inst|d_set_vsync_counter_out~I .ddio_mode = "none";
7237 defparam \inst|d_set_vsync_counter_out~I .input_async_reset = "none";
7238 defparam \inst|d_set_vsync_counter_out~I .input_power_up = "low";
7239 defparam \inst|d_set_vsync_counter_out~I .input_register_mode = "none";
7240 defparam \inst|d_set_vsync_counter_out~I .input_sync_reset = "none";
7241 defparam \inst|d_set_vsync_counter_out~I .oe_async_reset = "none";
7242 defparam \inst|d_set_vsync_counter_out~I .oe_power_up = "low";
7243 defparam \inst|d_set_vsync_counter_out~I .oe_register_mode = "none";
7244 defparam \inst|d_set_vsync_counter_out~I .oe_sync_reset = "none";
7245 defparam \inst|d_set_vsync_counter_out~I .operation_mode = "output";
7246 defparam \inst|d_set_vsync_counter_out~I .output_async_reset = "none";
7247 defparam \inst|d_set_vsync_counter_out~I .output_power_up = "low";
7248 defparam \inst|d_set_vsync_counter_out~I .output_register_mode = "none";
7249 defparam \inst|d_set_vsync_counter_out~I .output_sync_reset = "none";
7250 // synopsys translate_on
7251
7252 // atom is at PIN_L3
7253 stratix_io \inst|d_r_out~I (
7254         .datain(\inst|vga_control_unit|r ),
7255         .ddiodatain(gnd),
7256         .oe(vcc),
7257         .outclk(gnd),
7258         .outclkena(vcc),
7259         .inclk(gnd),
7260         .inclkena(vcc),
7261         .areset(gnd),
7262         .sreset(gnd),
7263         .delayctrlin(gnd),
7264         .devclrn(devclrn),
7265         .devpor(devpor),
7266         .devoe(devoe),
7267         .combout(),
7268         .regout(),
7269         .ddioregout(),
7270         .padio(d_r),
7271         .dqsundelayedout());
7272 // synopsys translate_off
7273 defparam \inst|d_r_out~I .ddio_mode = "none";
7274 defparam \inst|d_r_out~I .input_async_reset = "none";
7275 defparam \inst|d_r_out~I .input_power_up = "low";
7276 defparam \inst|d_r_out~I .input_register_mode = "none";
7277 defparam \inst|d_r_out~I .input_sync_reset = "none";
7278 defparam \inst|d_r_out~I .oe_async_reset = "none";
7279 defparam \inst|d_r_out~I .oe_power_up = "low";
7280 defparam \inst|d_r_out~I .oe_register_mode = "none";
7281 defparam \inst|d_r_out~I .oe_sync_reset = "none";
7282 defparam \inst|d_r_out~I .operation_mode = "output";
7283 defparam \inst|d_r_out~I .output_async_reset = "none";
7284 defparam \inst|d_r_out~I .output_power_up = "low";
7285 defparam \inst|d_r_out~I .output_register_mode = "none";
7286 defparam \inst|d_r_out~I .output_sync_reset = "none";
7287 // synopsys translate_on
7288
7289 // atom is at PIN_K24
7290 stratix_io \inst|d_g_out~I (
7291         .datain(\~STRATIX_FITTER_CREATED_GND~I_combout ),
7292         .ddiodatain(gnd),
7293         .oe(vcc),
7294         .outclk(gnd),
7295         .outclkena(vcc),
7296         .inclk(gnd),
7297         .inclkena(vcc),
7298         .areset(gnd),
7299         .sreset(gnd),
7300         .delayctrlin(gnd),
7301         .devclrn(devclrn),
7302         .devpor(devpor),
7303         .devoe(devoe),
7304         .combout(),
7305         .regout(),
7306         .ddioregout(),
7307         .padio(d_g),
7308         .dqsundelayedout());
7309 // synopsys translate_off
7310 defparam \inst|d_g_out~I .ddio_mode = "none";
7311 defparam \inst|d_g_out~I .input_async_reset = "none";
7312 defparam \inst|d_g_out~I .input_power_up = "low";
7313 defparam \inst|d_g_out~I .input_register_mode = "none";
7314 defparam \inst|d_g_out~I .input_sync_reset = "none";
7315 defparam \inst|d_g_out~I .oe_async_reset = "none";
7316 defparam \inst|d_g_out~I .oe_power_up = "low";
7317 defparam \inst|d_g_out~I .oe_register_mode = "none";
7318 defparam \inst|d_g_out~I .oe_sync_reset = "none";
7319 defparam \inst|d_g_out~I .operation_mode = "output";
7320 defparam \inst|d_g_out~I .output_async_reset = "none";
7321 defparam \inst|d_g_out~I .output_power_up = "low";
7322 defparam \inst|d_g_out~I .output_register_mode = "none";
7323 defparam \inst|d_g_out~I .output_sync_reset = "none";
7324 // synopsys translate_on
7325
7326 // atom is at PIN_K20
7327 stratix_io \inst|d_b_out~I (
7328         .datain(\inst|vga_control_unit|b ),
7329         .ddiodatain(gnd),
7330         .oe(vcc),
7331         .outclk(gnd),
7332         .outclkena(vcc),
7333         .inclk(gnd),
7334         .inclkena(vcc),
7335         .areset(gnd),
7336         .sreset(gnd),
7337         .delayctrlin(gnd),
7338         .devclrn(devclrn),
7339         .devpor(devpor),
7340         .devoe(devoe),
7341         .combout(),
7342         .regout(),
7343         .ddioregout(),
7344         .padio(d_b),
7345         .dqsundelayedout());
7346 // synopsys translate_off
7347 defparam \inst|d_b_out~I .ddio_mode = "none";
7348 defparam \inst|d_b_out~I .input_async_reset = "none";
7349 defparam \inst|d_b_out~I .input_power_up = "low";
7350 defparam \inst|d_b_out~I .input_register_mode = "none";
7351 defparam \inst|d_b_out~I .input_sync_reset = "none";
7352 defparam \inst|d_b_out~I .oe_async_reset = "none";
7353 defparam \inst|d_b_out~I .oe_power_up = "low";
7354 defparam \inst|d_b_out~I .oe_register_mode = "none";
7355 defparam \inst|d_b_out~I .oe_sync_reset = "none";
7356 defparam \inst|d_b_out~I .operation_mode = "output";
7357 defparam \inst|d_b_out~I .output_async_reset = "none";
7358 defparam \inst|d_b_out~I .output_power_up = "low";
7359 defparam \inst|d_b_out~I .output_register_mode = "none";
7360 defparam \inst|d_b_out~I .output_sync_reset = "none";
7361 // synopsys translate_on
7362
7363 // atom is at PIN_J21
7364 stratix_io \inst|d_h_enable_out~I (
7365         .datain(\inst|vga_driver_unit|h_enable_sig ),
7366         .ddiodatain(gnd),
7367         .oe(vcc),
7368         .outclk(gnd),
7369         .outclkena(vcc),
7370         .inclk(gnd),
7371         .inclkena(vcc),
7372         .areset(gnd),
7373         .sreset(gnd),
7374         .delayctrlin(gnd),
7375         .devclrn(devclrn),
7376         .devpor(devpor),
7377         .devoe(devoe),
7378         .combout(),
7379         .regout(),
7380         .ddioregout(),
7381         .padio(d_h_enable),
7382         .dqsundelayedout());
7383 // synopsys translate_off
7384 defparam \inst|d_h_enable_out~I .ddio_mode = "none";
7385 defparam \inst|d_h_enable_out~I .input_async_reset = "none";
7386 defparam \inst|d_h_enable_out~I .input_power_up = "low";
7387 defparam \inst|d_h_enable_out~I .input_register_mode = "none";
7388 defparam \inst|d_h_enable_out~I .input_sync_reset = "none";
7389 defparam \inst|d_h_enable_out~I .oe_async_reset = "none";
7390 defparam \inst|d_h_enable_out~I .oe_power_up = "low";
7391 defparam \inst|d_h_enable_out~I .oe_register_mode = "none";
7392 defparam \inst|d_h_enable_out~I .oe_sync_reset = "none";
7393 defparam \inst|d_h_enable_out~I .operation_mode = "output";
7394 defparam \inst|d_h_enable_out~I .output_async_reset = "none";
7395 defparam \inst|d_h_enable_out~I .output_power_up = "low";
7396 defparam \inst|d_h_enable_out~I .output_register_mode = "none";
7397 defparam \inst|d_h_enable_out~I .output_sync_reset = "none";
7398 // synopsys translate_on
7399
7400 // atom is at PIN_H18
7401 stratix_io \inst|d_v_enable_out~I (
7402         .datain(\inst|vga_driver_unit|v_enable_sig ),
7403         .ddiodatain(gnd),
7404         .oe(vcc),
7405         .outclk(gnd),
7406         .outclkena(vcc),
7407         .inclk(gnd),
7408         .inclkena(vcc),
7409         .areset(gnd),
7410         .sreset(gnd),
7411         .delayctrlin(gnd),
7412         .devclrn(devclrn),
7413         .devpor(devpor),
7414         .devoe(devoe),
7415         .combout(),
7416         .regout(),
7417         .ddioregout(),
7418         .padio(d_v_enable),
7419         .dqsundelayedout());
7420 // synopsys translate_off
7421 defparam \inst|d_v_enable_out~I .ddio_mode = "none";
7422 defparam \inst|d_v_enable_out~I .input_async_reset = "none";
7423 defparam \inst|d_v_enable_out~I .input_power_up = "low";
7424 defparam \inst|d_v_enable_out~I .input_register_mode = "none";
7425 defparam \inst|d_v_enable_out~I .input_sync_reset = "none";
7426 defparam \inst|d_v_enable_out~I .oe_async_reset = "none";
7427 defparam \inst|d_v_enable_out~I .oe_power_up = "low";
7428 defparam \inst|d_v_enable_out~I .oe_register_mode = "none";
7429 defparam \inst|d_v_enable_out~I .oe_sync_reset = "none";
7430 defparam \inst|d_v_enable_out~I .operation_mode = "output";
7431 defparam \inst|d_v_enable_out~I .output_async_reset = "none";
7432 defparam \inst|d_v_enable_out~I .output_power_up = "low";
7433 defparam \inst|d_v_enable_out~I .output_register_mode = "none";
7434 defparam \inst|d_v_enable_out~I .output_sync_reset = "none";
7435 // synopsys translate_on
7436
7437 // atom is at PIN_K3
7438 stratix_io \inst|d_state_clk_out~I (
7439         .datain(\inst1|altpll_component|_clk0 ),
7440         .ddiodatain(gnd),
7441         .oe(vcc),
7442         .outclk(gnd),
7443         .outclkena(vcc),
7444         .inclk(gnd),
7445         .inclkena(vcc),
7446         .areset(gnd),
7447         .sreset(gnd),
7448         .delayctrlin(gnd),
7449         .devclrn(devclrn),
7450         .devpor(devpor),
7451         .devoe(devoe),
7452         .combout(),
7453         .regout(),
7454         .ddioregout(),
7455         .padio(d_state_clk),
7456         .dqsundelayedout());
7457 // synopsys translate_off
7458 defparam \inst|d_state_clk_out~I .ddio_mode = "none";
7459 defparam \inst|d_state_clk_out~I .input_async_reset = "none";
7460 defparam \inst|d_state_clk_out~I .input_power_up = "low";
7461 defparam \inst|d_state_clk_out~I .input_register_mode = "none";
7462 defparam \inst|d_state_clk_out~I .input_sync_reset = "none";
7463 defparam \inst|d_state_clk_out~I .oe_async_reset = "none";
7464 defparam \inst|d_state_clk_out~I .oe_power_up = "low";
7465 defparam \inst|d_state_clk_out~I .oe_register_mode = "none";
7466 defparam \inst|d_state_clk_out~I .oe_sync_reset = "none";
7467 defparam \inst|d_state_clk_out~I .operation_mode = "output";
7468 defparam \inst|d_state_clk_out~I .output_async_reset = "none";
7469 defparam \inst|d_state_clk_out~I .output_power_up = "low";
7470 defparam \inst|d_state_clk_out~I .output_register_mode = "none";
7471 defparam \inst|d_state_clk_out~I .output_sync_reset = "none";
7472 // synopsys translate_on
7473
7474 // atom is at PIN_H3
7475 stratix_io \inst|d_toggle_out~I (
7476         .datain(\inst|vga_control_unit|toggle_sig ),
7477         .ddiodatain(gnd),
7478         .oe(vcc),
7479         .outclk(gnd),
7480         .outclkena(vcc),
7481         .inclk(gnd),
7482         .inclkena(vcc),
7483         .areset(gnd),
7484         .sreset(gnd),
7485         .delayctrlin(gnd),
7486         .devclrn(devclrn),
7487         .devpor(devpor),
7488         .devoe(devoe),
7489         .combout(),
7490         .regout(),
7491         .ddioregout(),
7492         .padio(d_toggle),
7493         .dqsundelayedout());
7494 // synopsys translate_off
7495 defparam \inst|d_toggle_out~I .ddio_mode = "none";
7496 defparam \inst|d_toggle_out~I .input_async_reset = "none";
7497 defparam \inst|d_toggle_out~I .input_power_up = "low";
7498 defparam \inst|d_toggle_out~I .input_register_mode = "none";
7499 defparam \inst|d_toggle_out~I .input_sync_reset = "none";
7500 defparam \inst|d_toggle_out~I .oe_async_reset = "none";
7501 defparam \inst|d_toggle_out~I .oe_power_up = "low";
7502 defparam \inst|d_toggle_out~I .oe_register_mode = "none";
7503 defparam \inst|d_toggle_out~I .oe_sync_reset = "none";
7504 defparam \inst|d_toggle_out~I .operation_mode = "output";
7505 defparam \inst|d_toggle_out~I .output_async_reset = "none";
7506 defparam \inst|d_toggle_out~I .output_power_up = "low";
7507 defparam \inst|d_toggle_out~I .output_register_mode = "none";
7508 defparam \inst|d_toggle_out~I .output_sync_reset = "none";
7509 // synopsys translate_on
7510
7511 // atom is at PIN_E22
7512 stratix_io \inst|r0_pin_out~I (
7513         .datain(\inst|vga_control_unit|r ),
7514         .ddiodatain(gnd),
7515         .oe(vcc),
7516         .outclk(gnd),
7517         .outclkena(vcc),
7518         .inclk(gnd),
7519         .inclkena(vcc),
7520         .areset(gnd),
7521         .sreset(gnd),
7522         .delayctrlin(gnd),
7523         .devclrn(devclrn),
7524         .devpor(devpor),
7525         .devoe(devoe),
7526         .combout(),
7527         .regout(),
7528         .ddioregout(),
7529         .padio(r0_pin),
7530         .dqsundelayedout());
7531 // synopsys translate_off
7532 defparam \inst|r0_pin_out~I .ddio_mode = "none";
7533 defparam \inst|r0_pin_out~I .input_async_reset = "none";
7534 defparam \inst|r0_pin_out~I .input_power_up = "low";
7535 defparam \inst|r0_pin_out~I .input_register_mode = "none";
7536 defparam \inst|r0_pin_out~I .input_sync_reset = "none";
7537 defparam \inst|r0_pin_out~I .oe_async_reset = "none";
7538 defparam \inst|r0_pin_out~I .oe_power_up = "low";
7539 defparam \inst|r0_pin_out~I .oe_register_mode = "none";
7540 defparam \inst|r0_pin_out~I .oe_sync_reset = "none";
7541 defparam \inst|r0_pin_out~I .operation_mode = "output";
7542 defparam \inst|r0_pin_out~I .output_async_reset = "none";
7543 defparam \inst|r0_pin_out~I .output_power_up = "low";
7544 defparam \inst|r0_pin_out~I .output_register_mode = "none";
7545 defparam \inst|r0_pin_out~I .output_sync_reset = "none";
7546 // synopsys translate_on
7547
7548 // atom is at PIN_T4
7549 stratix_io \inst|r1_pin_out~I (
7550         .datain(\inst|vga_control_unit|r ),
7551         .ddiodatain(gnd),
7552         .oe(vcc),
7553         .outclk(gnd),
7554         .outclkena(vcc),
7555         .inclk(gnd),
7556         .inclkena(vcc),
7557         .areset(gnd),
7558         .sreset(gnd),
7559         .delayctrlin(gnd),
7560         .devclrn(devclrn),
7561         .devpor(devpor),
7562         .devoe(devoe),
7563         .combout(),
7564         .regout(),
7565         .ddioregout(),
7566         .padio(r1_pin),
7567         .dqsundelayedout());
7568 // synopsys translate_off
7569 defparam \inst|r1_pin_out~I .ddio_mode = "none";
7570 defparam \inst|r1_pin_out~I .input_async_reset = "none";
7571 defparam \inst|r1_pin_out~I .input_power_up = "low";
7572 defparam \inst|r1_pin_out~I .input_register_mode = "none";
7573 defparam \inst|r1_pin_out~I .input_sync_reset = "none";
7574 defparam \inst|r1_pin_out~I .oe_async_reset = "none";
7575 defparam \inst|r1_pin_out~I .oe_power_up = "low";
7576 defparam \inst|r1_pin_out~I .oe_register_mode = "none";
7577 defparam \inst|r1_pin_out~I .oe_sync_reset = "none";
7578 defparam \inst|r1_pin_out~I .operation_mode = "output";
7579 defparam \inst|r1_pin_out~I .output_async_reset = "none";
7580 defparam \inst|r1_pin_out~I .output_power_up = "low";
7581 defparam \inst|r1_pin_out~I .output_register_mode = "none";
7582 defparam \inst|r1_pin_out~I .output_sync_reset = "none";
7583 // synopsys translate_on
7584
7585 // atom is at PIN_T7
7586 stratix_io \inst|r2_pin_out~I (
7587         .datain(\inst|vga_control_unit|r ),
7588         .ddiodatain(gnd),
7589         .oe(vcc),
7590         .outclk(gnd),
7591         .outclkena(vcc),
7592         .inclk(gnd),
7593         .inclkena(vcc),
7594         .areset(gnd),
7595         .sreset(gnd),
7596         .delayctrlin(gnd),
7597         .devclrn(devclrn),
7598         .devpor(devpor),
7599         .devoe(devoe),
7600         .combout(),
7601         .regout(),
7602         .ddioregout(),
7603         .padio(r2_pin),
7604         .dqsundelayedout());
7605 // synopsys translate_off
7606 defparam \inst|r2_pin_out~I .ddio_mode = "none";
7607 defparam \inst|r2_pin_out~I .input_async_reset = "none";
7608 defparam \inst|r2_pin_out~I .input_power_up = "low";
7609 defparam \inst|r2_pin_out~I .input_register_mode = "none";
7610 defparam \inst|r2_pin_out~I .input_sync_reset = "none";
7611 defparam \inst|r2_pin_out~I .oe_async_reset = "none";
7612 defparam \inst|r2_pin_out~I .oe_power_up = "low";
7613 defparam \inst|r2_pin_out~I .oe_register_mode = "none";
7614 defparam \inst|r2_pin_out~I .oe_sync_reset = "none";
7615 defparam \inst|r2_pin_out~I .operation_mode = "output";
7616 defparam \inst|r2_pin_out~I .output_async_reset = "none";
7617 defparam \inst|r2_pin_out~I .output_power_up = "low";
7618 defparam \inst|r2_pin_out~I .output_register_mode = "none";
7619 defparam \inst|r2_pin_out~I .output_sync_reset = "none";
7620 // synopsys translate_on
7621
7622 // atom is at PIN_E23
7623 stratix_io \inst|g0_pin_out~I (
7624         .datain(\~STRATIX_FITTER_CREATED_GND~I_combout ),
7625         .ddiodatain(gnd),
7626         .oe(vcc),
7627         .outclk(gnd),
7628         .outclkena(vcc),
7629         .inclk(gnd),
7630         .inclkena(vcc),
7631         .areset(gnd),
7632         .sreset(gnd),
7633         .delayctrlin(gnd),
7634         .devclrn(devclrn),
7635         .devpor(devpor),
7636         .devoe(devoe),
7637         .combout(),
7638         .regout(),
7639         .ddioregout(),
7640         .padio(g0_pin),
7641         .dqsundelayedout());
7642 // synopsys translate_off
7643 defparam \inst|g0_pin_out~I .ddio_mode = "none";
7644 defparam \inst|g0_pin_out~I .input_async_reset = "none";
7645 defparam \inst|g0_pin_out~I .input_power_up = "low";
7646 defparam \inst|g0_pin_out~I .input_register_mode = "none";
7647 defparam \inst|g0_pin_out~I .input_sync_reset = "none";
7648 defparam \inst|g0_pin_out~I .oe_async_reset = "none";
7649 defparam \inst|g0_pin_out~I .oe_power_up = "low";
7650 defparam \inst|g0_pin_out~I .oe_register_mode = "none";
7651 defparam \inst|g0_pin_out~I .oe_sync_reset = "none";
7652 defparam \inst|g0_pin_out~I .operation_mode = "output";
7653 defparam \inst|g0_pin_out~I .output_async_reset = "none";
7654 defparam \inst|g0_pin_out~I .output_power_up = "low";
7655 defparam \inst|g0_pin_out~I .output_register_mode = "none";
7656 defparam \inst|g0_pin_out~I .output_sync_reset = "none";
7657 // synopsys translate_on
7658
7659 // atom is at PIN_T5
7660 stratix_io \inst|g1_pin_out~I (
7661         .datain(\~STRATIX_FITTER_CREATED_GND~I_combout ),
7662         .ddiodatain(gnd),
7663         .oe(vcc),
7664         .outclk(gnd),
7665         .outclkena(vcc),
7666         .inclk(gnd),
7667         .inclkena(vcc),
7668         .areset(gnd),
7669         .sreset(gnd),
7670         .delayctrlin(gnd),
7671         .devclrn(devclrn),
7672         .devpor(devpor),
7673         .devoe(devoe),
7674         .combout(),
7675         .regout(),
7676         .ddioregout(),
7677         .padio(g1_pin),
7678         .dqsundelayedout());
7679 // synopsys translate_off
7680 defparam \inst|g1_pin_out~I .ddio_mode = "none";
7681 defparam \inst|g1_pin_out~I .input_async_reset = "none";
7682 defparam \inst|g1_pin_out~I .input_power_up = "low";
7683 defparam \inst|g1_pin_out~I .input_register_mode = "none";
7684 defparam \inst|g1_pin_out~I .input_sync_reset = "none";
7685 defparam \inst|g1_pin_out~I .oe_async_reset = "none";
7686 defparam \inst|g1_pin_out~I .oe_power_up = "low";
7687 defparam \inst|g1_pin_out~I .oe_register_mode = "none";
7688 defparam \inst|g1_pin_out~I .oe_sync_reset = "none";
7689 defparam \inst|g1_pin_out~I .operation_mode = "output";
7690 defparam \inst|g1_pin_out~I .output_async_reset = "none";
7691 defparam \inst|g1_pin_out~I .output_power_up = "low";
7692 defparam \inst|g1_pin_out~I .output_register_mode = "none";
7693 defparam \inst|g1_pin_out~I .output_sync_reset = "none";
7694 // synopsys translate_on
7695
7696 // atom is at PIN_T24
7697 stratix_io \inst|g2_pin_out~I (
7698         .datain(\~STRATIX_FITTER_CREATED_GND~I_combout ),
7699         .ddiodatain(gnd),
7700         .oe(vcc),
7701         .outclk(gnd),
7702         .outclkena(vcc),
7703         .inclk(gnd),
7704         .inclkena(vcc),
7705         .areset(gnd),
7706         .sreset(gnd),
7707         .delayctrlin(gnd),
7708         .devclrn(devclrn),
7709         .devpor(devpor),
7710         .devoe(devoe),
7711         .combout(),
7712         .regout(),
7713         .ddioregout(),
7714         .padio(g2_pin),
7715         .dqsundelayedout());
7716 // synopsys translate_off
7717 defparam \inst|g2_pin_out~I .ddio_mode = "none";
7718 defparam \inst|g2_pin_out~I .input_async_reset = "none";
7719 defparam \inst|g2_pin_out~I .input_power_up = "low";
7720 defparam \inst|g2_pin_out~I .input_register_mode = "none";
7721 defparam \inst|g2_pin_out~I .input_sync_reset = "none";
7722 defparam \inst|g2_pin_out~I .oe_async_reset = "none";
7723 defparam \inst|g2_pin_out~I .oe_power_up = "low";
7724 defparam \inst|g2_pin_out~I .oe_register_mode = "none";
7725 defparam \inst|g2_pin_out~I .oe_sync_reset = "none";
7726 defparam \inst|g2_pin_out~I .operation_mode = "output";
7727 defparam \inst|g2_pin_out~I .output_async_reset = "none";
7728 defparam \inst|g2_pin_out~I .output_power_up = "low";
7729 defparam \inst|g2_pin_out~I .output_register_mode = "none";
7730 defparam \inst|g2_pin_out~I .output_sync_reset = "none";
7731 // synopsys translate_on
7732
7733 // atom is at PIN_E24
7734 stratix_io \inst|b0_pin_out~I (
7735         .datain(\inst|vga_control_unit|b ),
7736         .ddiodatain(gnd),
7737         .oe(vcc),
7738         .outclk(gnd),
7739         .outclkena(vcc),
7740         .inclk(gnd),
7741         .inclkena(vcc),
7742         .areset(gnd),
7743         .sreset(gnd),
7744         .delayctrlin(gnd),
7745         .devclrn(devclrn),
7746         .devpor(devpor),
7747         .devoe(devoe),
7748         .combout(),
7749         .regout(),
7750         .ddioregout(),
7751         .padio(b0_pin),
7752         .dqsundelayedout());
7753 // synopsys translate_off
7754 defparam \inst|b0_pin_out~I .ddio_mode = "none";
7755 defparam \inst|b0_pin_out~I .input_async_reset = "none";
7756 defparam \inst|b0_pin_out~I .input_power_up = "low";
7757 defparam \inst|b0_pin_out~I .input_register_mode = "none";
7758 defparam \inst|b0_pin_out~I .input_sync_reset = "none";
7759 defparam \inst|b0_pin_out~I .oe_async_reset = "none";
7760 defparam \inst|b0_pin_out~I .oe_power_up = "low";
7761 defparam \inst|b0_pin_out~I .oe_register_mode = "none";
7762 defparam \inst|b0_pin_out~I .oe_sync_reset = "none";
7763 defparam \inst|b0_pin_out~I .operation_mode = "output";
7764 defparam \inst|b0_pin_out~I .output_async_reset = "none";
7765 defparam \inst|b0_pin_out~I .output_power_up = "low";
7766 defparam \inst|b0_pin_out~I .output_register_mode = "none";
7767 defparam \inst|b0_pin_out~I .output_sync_reset = "none";
7768 // synopsys translate_on
7769
7770 // atom is at PIN_T6
7771 stratix_io \inst|b1_pin_out~I (
7772         .datain(\inst|vga_control_unit|b ),
7773         .ddiodatain(gnd),
7774         .oe(vcc),
7775         .outclk(gnd),
7776         .outclkena(vcc),
7777         .inclk(gnd),
7778         .inclkena(vcc),
7779         .areset(gnd),
7780         .sreset(gnd),
7781         .delayctrlin(gnd),
7782         .devclrn(devclrn),
7783         .devpor(devpor),
7784         .devoe(devoe),
7785         .combout(),
7786         .regout(),
7787         .ddioregout(),
7788         .padio(b1_pin),
7789         .dqsundelayedout());
7790 // synopsys translate_off
7791 defparam \inst|b1_pin_out~I .ddio_mode = "none";
7792 defparam \inst|b1_pin_out~I .input_async_reset = "none";
7793 defparam \inst|b1_pin_out~I .input_power_up = "low";
7794 defparam \inst|b1_pin_out~I .input_register_mode = "none";
7795 defparam \inst|b1_pin_out~I .input_sync_reset = "none";
7796 defparam \inst|b1_pin_out~I .oe_async_reset = "none";
7797 defparam \inst|b1_pin_out~I .oe_power_up = "low";
7798 defparam \inst|b1_pin_out~I .oe_register_mode = "none";
7799 defparam \inst|b1_pin_out~I .oe_sync_reset = "none";
7800 defparam \inst|b1_pin_out~I .operation_mode = "output";
7801 defparam \inst|b1_pin_out~I .output_async_reset = "none";
7802 defparam \inst|b1_pin_out~I .output_power_up = "low";
7803 defparam \inst|b1_pin_out~I .output_register_mode = "none";
7804 defparam \inst|b1_pin_out~I .output_sync_reset = "none";
7805 // synopsys translate_on
7806
7807 // atom is at PIN_F1
7808 stratix_io \inst|hsync_pin_out~I (
7809         .datain(\inst|vga_driver_unit|h_sync ),
7810         .ddiodatain(gnd),
7811         .oe(vcc),
7812         .outclk(gnd),
7813         .outclkena(vcc),
7814         .inclk(gnd),
7815         .inclkena(vcc),
7816         .areset(gnd),
7817         .sreset(gnd),
7818         .delayctrlin(gnd),
7819         .devclrn(devclrn),
7820         .devpor(devpor),
7821         .devoe(devoe),
7822         .combout(),
7823         .regout(),
7824         .ddioregout(),
7825         .padio(hsync_pin),
7826         .dqsundelayedout());
7827 // synopsys translate_off
7828 defparam \inst|hsync_pin_out~I .ddio_mode = "none";
7829 defparam \inst|hsync_pin_out~I .input_async_reset = "none";
7830 defparam \inst|hsync_pin_out~I .input_power_up = "low";
7831 defparam \inst|hsync_pin_out~I .input_register_mode = "none";
7832 defparam \inst|hsync_pin_out~I .input_sync_reset = "none";
7833 defparam \inst|hsync_pin_out~I .oe_async_reset = "none";
7834 defparam \inst|hsync_pin_out~I .oe_power_up = "low";
7835 defparam \inst|hsync_pin_out~I .oe_register_mode = "none";
7836 defparam \inst|hsync_pin_out~I .oe_sync_reset = "none";
7837 defparam \inst|hsync_pin_out~I .operation_mode = "output";
7838 defparam \inst|hsync_pin_out~I .output_async_reset = "none";
7839 defparam \inst|hsync_pin_out~I .output_power_up = "low";
7840 defparam \inst|hsync_pin_out~I .output_register_mode = "none";
7841 defparam \inst|hsync_pin_out~I .output_sync_reset = "none";
7842 // synopsys translate_on
7843
7844 // atom is at PIN_F2
7845 stratix_io \inst|vsync_pin_out~I (
7846         .datain(\inst|vga_driver_unit|v_sync ),
7847         .ddiodatain(gnd),
7848         .oe(vcc),
7849         .outclk(gnd),
7850         .outclkena(vcc),
7851         .inclk(gnd),
7852         .inclkena(vcc),
7853         .areset(gnd),
7854         .sreset(gnd),
7855         .delayctrlin(gnd),
7856         .devclrn(devclrn),
7857         .devpor(devpor),
7858         .devoe(devoe),
7859         .combout(),
7860         .regout(),
7861         .ddioregout(),
7862         .padio(vsync_pin),
7863         .dqsundelayedout());
7864 // synopsys translate_off
7865 defparam \inst|vsync_pin_out~I .ddio_mode = "none";
7866 defparam \inst|vsync_pin_out~I .input_async_reset = "none";
7867 defparam \inst|vsync_pin_out~I .input_power_up = "low";
7868 defparam \inst|vsync_pin_out~I .input_register_mode = "none";
7869 defparam \inst|vsync_pin_out~I .input_sync_reset = "none";
7870 defparam \inst|vsync_pin_out~I .oe_async_reset = "none";
7871 defparam \inst|vsync_pin_out~I .oe_power_up = "low";
7872 defparam \inst|vsync_pin_out~I .oe_register_mode = "none";
7873 defparam \inst|vsync_pin_out~I .oe_sync_reset = "none";
7874 defparam \inst|vsync_pin_out~I .operation_mode = "output";
7875 defparam \inst|vsync_pin_out~I .output_async_reset = "none";
7876 defparam \inst|vsync_pin_out~I .output_power_up = "low";
7877 defparam \inst|vsync_pin_out~I .output_register_mode = "none";
7878 defparam \inst|vsync_pin_out~I .output_sync_reset = "none";
7879 // synopsys translate_on
7880
7881 // atom is at PIN_K5
7882 stratix_io \inst|d_column_counter_out_9_~I (
7883         .datain(\inst|vga_driver_unit|column_counter_sig_9 ),
7884         .ddiodatain(gnd),
7885         .oe(vcc),
7886         .outclk(gnd),
7887         .outclkena(vcc),
7888         .inclk(gnd),
7889         .inclkena(vcc),
7890         .areset(gnd),
7891         .sreset(gnd),
7892         .delayctrlin(gnd),
7893         .devclrn(devclrn),
7894         .devpor(devpor),
7895         .devoe(devoe),
7896         .combout(),
7897         .regout(),
7898         .ddioregout(),
7899         .padio(d_column_counter[9]),
7900         .dqsundelayedout());
7901 // synopsys translate_off
7902 defparam \inst|d_column_counter_out_9_~I .ddio_mode = "none";
7903 defparam \inst|d_column_counter_out_9_~I .input_async_reset = "none";
7904 defparam \inst|d_column_counter_out_9_~I .input_power_up = "low";
7905 defparam \inst|d_column_counter_out_9_~I .input_register_mode = "none";
7906 defparam \inst|d_column_counter_out_9_~I .input_sync_reset = "none";
7907 defparam \inst|d_column_counter_out_9_~I .oe_async_reset = "none";
7908 defparam \inst|d_column_counter_out_9_~I .oe_power_up = "low";
7909 defparam \inst|d_column_counter_out_9_~I .oe_register_mode = "none";
7910 defparam \inst|d_column_counter_out_9_~I .oe_sync_reset = "none";
7911 defparam \inst|d_column_counter_out_9_~I .operation_mode = "output";
7912 defparam \inst|d_column_counter_out_9_~I .output_async_reset = "none";
7913 defparam \inst|d_column_counter_out_9_~I .output_power_up = "low";
7914 defparam \inst|d_column_counter_out_9_~I .output_register_mode = "none";
7915 defparam \inst|d_column_counter_out_9_~I .output_sync_reset = "none";
7916 // synopsys translate_on
7917
7918 // atom is at PIN_K19
7919 stratix_io \inst|d_column_counter_out_8_~I (
7920         .datain(\inst|vga_driver_unit|column_counter_sig_8 ),
7921         .ddiodatain(gnd),
7922         .oe(vcc),
7923         .outclk(gnd),
7924         .outclkena(vcc),
7925         .inclk(gnd),
7926         .inclkena(vcc),
7927         .areset(gnd),
7928         .sreset(gnd),
7929         .delayctrlin(gnd),
7930         .devclrn(devclrn),
7931         .devpor(devpor),
7932         .devoe(devoe),
7933         .combout(),
7934         .regout(),
7935         .ddioregout(),
7936         .padio(d_column_counter[8]),
7937         .dqsundelayedout());
7938 // synopsys translate_off
7939 defparam \inst|d_column_counter_out_8_~I .ddio_mode = "none";
7940 defparam \inst|d_column_counter_out_8_~I .input_async_reset = "none";
7941 defparam \inst|d_column_counter_out_8_~I .input_power_up = "low";
7942 defparam \inst|d_column_counter_out_8_~I .input_register_mode = "none";
7943 defparam \inst|d_column_counter_out_8_~I .input_sync_reset = "none";
7944 defparam \inst|d_column_counter_out_8_~I .oe_async_reset = "none";
7945 defparam \inst|d_column_counter_out_8_~I .oe_power_up = "low";
7946 defparam \inst|d_column_counter_out_8_~I .oe_register_mode = "none";
7947 defparam \inst|d_column_counter_out_8_~I .oe_sync_reset = "none";
7948 defparam \inst|d_column_counter_out_8_~I .operation_mode = "output";
7949 defparam \inst|d_column_counter_out_8_~I .output_async_reset = "none";
7950 defparam \inst|d_column_counter_out_8_~I .output_power_up = "low";
7951 defparam \inst|d_column_counter_out_8_~I .output_register_mode = "none";
7952 defparam \inst|d_column_counter_out_8_~I .output_sync_reset = "none";
7953 // synopsys translate_on
7954
7955 // atom is at PIN_K23
7956 stratix_io \inst|d_column_counter_out_7_~I (
7957         .datain(\inst|vga_driver_unit|column_counter_sig_7 ),
7958         .ddiodatain(gnd),
7959         .oe(vcc),
7960         .outclk(gnd),
7961         .outclkena(vcc),
7962         .inclk(gnd),
7963         .inclkena(vcc),
7964         .areset(gnd),
7965         .sreset(gnd),
7966         .delayctrlin(gnd),
7967         .devclrn(devclrn),
7968         .devpor(devpor),
7969         .devoe(devoe),
7970         .combout(),
7971         .regout(),
7972         .ddioregout(),
7973         .padio(d_column_counter[7]),
7974         .dqsundelayedout());
7975 // synopsys translate_off
7976 defparam \inst|d_column_counter_out_7_~I .ddio_mode = "none";
7977 defparam \inst|d_column_counter_out_7_~I .input_async_reset = "none";
7978 defparam \inst|d_column_counter_out_7_~I .input_power_up = "low";
7979 defparam \inst|d_column_counter_out_7_~I .input_register_mode = "none";
7980 defparam \inst|d_column_counter_out_7_~I .input_sync_reset = "none";
7981 defparam \inst|d_column_counter_out_7_~I .oe_async_reset = "none";
7982 defparam \inst|d_column_counter_out_7_~I .oe_power_up = "low";
7983 defparam \inst|d_column_counter_out_7_~I .oe_register_mode = "none";
7984 defparam \inst|d_column_counter_out_7_~I .oe_sync_reset = "none";
7985 defparam \inst|d_column_counter_out_7_~I .operation_mode = "output";
7986 defparam \inst|d_column_counter_out_7_~I .output_async_reset = "none";
7987 defparam \inst|d_column_counter_out_7_~I .output_power_up = "low";
7988 defparam \inst|d_column_counter_out_7_~I .output_register_mode = "none";
7989 defparam \inst|d_column_counter_out_7_~I .output_sync_reset = "none";
7990 // synopsys translate_on
7991
7992 // atom is at PIN_L2
7993 stratix_io \inst|d_column_counter_out_6_~I (
7994         .datain(\inst|vga_driver_unit|column_counter_sig_6 ),
7995         .ddiodatain(gnd),
7996         .oe(vcc),
7997         .outclk(gnd),
7998         .outclkena(vcc),
7999         .inclk(gnd),
8000         .inclkena(vcc),
8001         .areset(gnd),
8002         .sreset(gnd),
8003         .delayctrlin(gnd),
8004         .devclrn(devclrn),
8005         .devpor(devpor),
8006         .devoe(devoe),
8007         .combout(),
8008         .regout(),
8009         .ddioregout(),
8010         .padio(d_column_counter[6]),
8011         .dqsundelayedout());
8012 // synopsys translate_off
8013 defparam \inst|d_column_counter_out_6_~I .ddio_mode = "none";
8014 defparam \inst|d_column_counter_out_6_~I .input_async_reset = "none";
8015 defparam \inst|d_column_counter_out_6_~I .input_power_up = "low";
8016 defparam \inst|d_column_counter_out_6_~I .input_register_mode = "none";
8017 defparam \inst|d_column_counter_out_6_~I .input_sync_reset = "none";
8018 defparam \inst|d_column_counter_out_6_~I .oe_async_reset = "none";
8019 defparam \inst|d_column_counter_out_6_~I .oe_power_up = "low";
8020 defparam \inst|d_column_counter_out_6_~I .oe_register_mode = "none";
8021 defparam \inst|d_column_counter_out_6_~I .oe_sync_reset = "none";
8022 defparam \inst|d_column_counter_out_6_~I .operation_mode = "output";
8023 defparam \inst|d_column_counter_out_6_~I .output_async_reset = "none";
8024 defparam \inst|d_column_counter_out_6_~I .output_power_up = "low";
8025 defparam \inst|d_column_counter_out_6_~I .output_register_mode = "none";
8026 defparam \inst|d_column_counter_out_6_~I .output_sync_reset = "none";
8027 // synopsys translate_on
8028
8029 // atom is at PIN_L4
8030 stratix_io \inst|d_column_counter_out_5_~I (
8031         .datain(\inst|vga_driver_unit|column_counter_sig_5 ),
8032         .ddiodatain(gnd),
8033         .oe(vcc),
8034         .outclk(gnd),
8035         .outclkena(vcc),
8036         .inclk(gnd),
8037         .inclkena(vcc),
8038         .areset(gnd),
8039         .sreset(gnd),
8040         .delayctrlin(gnd),
8041         .devclrn(devclrn),
8042         .devpor(devpor),
8043         .devoe(devoe),
8044         .combout(),
8045         .regout(),
8046         .ddioregout(),
8047         .padio(d_column_counter[5]),
8048         .dqsundelayedout());
8049 // synopsys translate_off
8050 defparam \inst|d_column_counter_out_5_~I .ddio_mode = "none";
8051 defparam \inst|d_column_counter_out_5_~I .input_async_reset = "none";
8052 defparam \inst|d_column_counter_out_5_~I .input_power_up = "low";
8053 defparam \inst|d_column_counter_out_5_~I .input_register_mode = "none";
8054 defparam \inst|d_column_counter_out_5_~I .input_sync_reset = "none";
8055 defparam \inst|d_column_counter_out_5_~I .oe_async_reset = "none";
8056 defparam \inst|d_column_counter_out_5_~I .oe_power_up = "low";
8057 defparam \inst|d_column_counter_out_5_~I .oe_register_mode = "none";
8058 defparam \inst|d_column_counter_out_5_~I .oe_sync_reset = "none";
8059 defparam \inst|d_column_counter_out_5_~I .operation_mode = "output";
8060 defparam \inst|d_column_counter_out_5_~I .output_async_reset = "none";
8061 defparam \inst|d_column_counter_out_5_~I .output_power_up = "low";
8062 defparam \inst|d_column_counter_out_5_~I .output_register_mode = "none";
8063 defparam \inst|d_column_counter_out_5_~I .output_sync_reset = "none";
8064 // synopsys translate_on
8065
8066 // atom is at PIN_L6
8067 stratix_io \inst|d_column_counter_out_4_~I (
8068         .datain(\inst|vga_driver_unit|column_counter_sig_4 ),
8069         .ddiodatain(gnd),
8070         .oe(vcc),
8071         .outclk(gnd),
8072         .outclkena(vcc),
8073         .inclk(gnd),
8074         .inclkena(vcc),
8075         .areset(gnd),
8076         .sreset(gnd),
8077         .delayctrlin(gnd),
8078         .devclrn(devclrn),
8079         .devpor(devpor),
8080         .devoe(devoe),
8081         .combout(),
8082         .regout(),
8083         .ddioregout(),
8084         .padio(d_column_counter[4]),
8085         .dqsundelayedout());
8086 // synopsys translate_off
8087 defparam \inst|d_column_counter_out_4_~I .ddio_mode = "none";
8088 defparam \inst|d_column_counter_out_4_~I .input_async_reset = "none";
8089 defparam \inst|d_column_counter_out_4_~I .input_power_up = "low";
8090 defparam \inst|d_column_counter_out_4_~I .input_register_mode = "none";
8091 defparam \inst|d_column_counter_out_4_~I .input_sync_reset = "none";
8092 defparam \inst|d_column_counter_out_4_~I .oe_async_reset = "none";
8093 defparam \inst|d_column_counter_out_4_~I .oe_power_up = "low";
8094 defparam \inst|d_column_counter_out_4_~I .oe_register_mode = "none";
8095 defparam \inst|d_column_counter_out_4_~I .oe_sync_reset = "none";
8096 defparam \inst|d_column_counter_out_4_~I .operation_mode = "output";
8097 defparam \inst|d_column_counter_out_4_~I .output_async_reset = "none";
8098 defparam \inst|d_column_counter_out_4_~I .output_power_up = "low";
8099 defparam \inst|d_column_counter_out_4_~I .output_register_mode = "none";
8100 defparam \inst|d_column_counter_out_4_~I .output_sync_reset = "none";
8101 // synopsys translate_on
8102
8103 // atom is at PIN_L20
8104 stratix_io \inst|d_column_counter_out_3_~I (
8105         .datain(\inst|vga_driver_unit|column_counter_sig_3 ),
8106         .ddiodatain(gnd),
8107         .oe(vcc),
8108         .outclk(gnd),
8109         .outclkena(vcc),
8110         .inclk(gnd),
8111         .inclkena(vcc),
8112         .areset(gnd),
8113         .sreset(gnd),
8114         .delayctrlin(gnd),
8115         .devclrn(devclrn),
8116         .devpor(devpor),
8117         .devoe(devoe),
8118         .combout(),
8119         .regout(),
8120         .ddioregout(),
8121         .padio(d_column_counter[3]),
8122         .dqsundelayedout());
8123 // synopsys translate_off
8124 defparam \inst|d_column_counter_out_3_~I .ddio_mode = "none";
8125 defparam \inst|d_column_counter_out_3_~I .input_async_reset = "none";
8126 defparam \inst|d_column_counter_out_3_~I .input_power_up = "low";
8127 defparam \inst|d_column_counter_out_3_~I .input_register_mode = "none";
8128 defparam \inst|d_column_counter_out_3_~I .input_sync_reset = "none";
8129 defparam \inst|d_column_counter_out_3_~I .oe_async_reset = "none";
8130 defparam \inst|d_column_counter_out_3_~I .oe_power_up = "low";
8131 defparam \inst|d_column_counter_out_3_~I .oe_register_mode = "none";
8132 defparam \inst|d_column_counter_out_3_~I .oe_sync_reset = "none";
8133 defparam \inst|d_column_counter_out_3_~I .operation_mode = "output";
8134 defparam \inst|d_column_counter_out_3_~I .output_async_reset = "none";
8135 defparam \inst|d_column_counter_out_3_~I .output_power_up = "low";
8136 defparam \inst|d_column_counter_out_3_~I .output_register_mode = "none";
8137 defparam \inst|d_column_counter_out_3_~I .output_sync_reset = "none";
8138 // synopsys translate_on
8139
8140 // atom is at PIN_L21
8141 stratix_io \inst|d_column_counter_out_2_~I (
8142         .datain(\inst|vga_driver_unit|column_counter_sig_2 ),
8143         .ddiodatain(gnd),
8144         .oe(vcc),
8145         .outclk(gnd),
8146         .outclkena(vcc),
8147         .inclk(gnd),
8148         .inclkena(vcc),
8149         .areset(gnd),
8150         .sreset(gnd),
8151         .delayctrlin(gnd),
8152         .devclrn(devclrn),
8153         .devpor(devpor),
8154         .devoe(devoe),
8155         .combout(),
8156         .regout(),
8157         .ddioregout(),
8158         .padio(d_column_counter[2]),
8159         .dqsundelayedout());
8160 // synopsys translate_off
8161 defparam \inst|d_column_counter_out_2_~I .ddio_mode = "none";
8162 defparam \inst|d_column_counter_out_2_~I .input_async_reset = "none";
8163 defparam \inst|d_column_counter_out_2_~I .input_power_up = "low";
8164 defparam \inst|d_column_counter_out_2_~I .input_register_mode = "none";
8165 defparam \inst|d_column_counter_out_2_~I .input_sync_reset = "none";
8166 defparam \inst|d_column_counter_out_2_~I .oe_async_reset = "none";
8167 defparam \inst|d_column_counter_out_2_~I .oe_power_up = "low";
8168 defparam \inst|d_column_counter_out_2_~I .oe_register_mode = "none";
8169 defparam \inst|d_column_counter_out_2_~I .oe_sync_reset = "none";
8170 defparam \inst|d_column_counter_out_2_~I .operation_mode = "output";
8171 defparam \inst|d_column_counter_out_2_~I .output_async_reset = "none";
8172 defparam \inst|d_column_counter_out_2_~I .output_power_up = "low";
8173 defparam \inst|d_column_counter_out_2_~I .output_register_mode = "none";
8174 defparam \inst|d_column_counter_out_2_~I .output_sync_reset = "none";
8175 // synopsys translate_on
8176
8177 // atom is at PIN_L22
8178 stratix_io \inst|d_column_counter_out_1_~I (
8179         .datain(\inst|vga_driver_unit|column_counter_sig_1 ),
8180         .ddiodatain(gnd),
8181         .oe(vcc),
8182         .outclk(gnd),
8183         .outclkena(vcc),
8184         .inclk(gnd),
8185         .inclkena(vcc),
8186         .areset(gnd),
8187         .sreset(gnd),
8188         .delayctrlin(gnd),
8189         .devclrn(devclrn),
8190         .devpor(devpor),
8191         .devoe(devoe),
8192         .combout(),
8193         .regout(),
8194         .ddioregout(),
8195         .padio(d_column_counter[1]),
8196         .dqsundelayedout());
8197 // synopsys translate_off
8198 defparam \inst|d_column_counter_out_1_~I .ddio_mode = "none";
8199 defparam \inst|d_column_counter_out_1_~I .input_async_reset = "none";
8200 defparam \inst|d_column_counter_out_1_~I .input_power_up = "low";
8201 defparam \inst|d_column_counter_out_1_~I .input_register_mode = "none";
8202 defparam \inst|d_column_counter_out_1_~I .input_sync_reset = "none";
8203 defparam \inst|d_column_counter_out_1_~I .oe_async_reset = "none";
8204 defparam \inst|d_column_counter_out_1_~I .oe_power_up = "low";
8205 defparam \inst|d_column_counter_out_1_~I .oe_register_mode = "none";
8206 defparam \inst|d_column_counter_out_1_~I .oe_sync_reset = "none";
8207 defparam \inst|d_column_counter_out_1_~I .operation_mode = "output";
8208 defparam \inst|d_column_counter_out_1_~I .output_async_reset = "none";
8209 defparam \inst|d_column_counter_out_1_~I .output_power_up = "low";
8210 defparam \inst|d_column_counter_out_1_~I .output_register_mode = "none";
8211 defparam \inst|d_column_counter_out_1_~I .output_sync_reset = "none";
8212 // synopsys translate_on
8213
8214 // atom is at PIN_L23
8215 stratix_io \inst|d_column_counter_out_0_~I (
8216         .datain(\inst|vga_driver_unit|column_counter_sig_0 ),
8217         .ddiodatain(gnd),
8218         .oe(vcc),
8219         .outclk(gnd),
8220         .outclkena(vcc),
8221         .inclk(gnd),
8222         .inclkena(vcc),
8223         .areset(gnd),
8224         .sreset(gnd),
8225         .delayctrlin(gnd),
8226         .devclrn(devclrn),
8227         .devpor(devpor),
8228         .devoe(devoe),
8229         .combout(),
8230         .regout(),
8231         .ddioregout(),
8232         .padio(d_column_counter[0]),
8233         .dqsundelayedout());
8234 // synopsys translate_off
8235 defparam \inst|d_column_counter_out_0_~I .ddio_mode = "none";
8236 defparam \inst|d_column_counter_out_0_~I .input_async_reset = "none";
8237 defparam \inst|d_column_counter_out_0_~I .input_power_up = "low";
8238 defparam \inst|d_column_counter_out_0_~I .input_register_mode = "none";
8239 defparam \inst|d_column_counter_out_0_~I .input_sync_reset = "none";
8240 defparam \inst|d_column_counter_out_0_~I .oe_async_reset = "none";
8241 defparam \inst|d_column_counter_out_0_~I .oe_power_up = "low";
8242 defparam \inst|d_column_counter_out_0_~I .oe_register_mode = "none";
8243 defparam \inst|d_column_counter_out_0_~I .oe_sync_reset = "none";
8244 defparam \inst|d_column_counter_out_0_~I .operation_mode = "output";
8245 defparam \inst|d_column_counter_out_0_~I .output_async_reset = "none";
8246 defparam \inst|d_column_counter_out_0_~I .output_power_up = "low";
8247 defparam \inst|d_column_counter_out_0_~I .output_register_mode = "none";
8248 defparam \inst|d_column_counter_out_0_~I .output_sync_reset = "none";
8249 // synopsys translate_on
8250
8251 // atom is at PIN_G18
8252 stratix_io \inst|d_hsync_counter_out_9_~I (
8253         .datain(\inst|vga_driver_unit|hsync_counter_9 ),
8254         .ddiodatain(gnd),
8255         .oe(vcc),
8256         .outclk(gnd),
8257         .outclkena(vcc),
8258         .inclk(gnd),
8259         .inclkena(vcc),
8260         .areset(gnd),
8261         .sreset(gnd),
8262         .delayctrlin(gnd),
8263         .devclrn(devclrn),
8264         .devpor(devpor),
8265         .devoe(devoe),
8266         .combout(),
8267         .regout(),
8268         .ddioregout(),
8269         .padio(d_hsync_counter[9]),
8270         .dqsundelayedout());
8271 // synopsys translate_off
8272 defparam \inst|d_hsync_counter_out_9_~I .ddio_mode = "none";
8273 defparam \inst|d_hsync_counter_out_9_~I .input_async_reset = "none";
8274 defparam \inst|d_hsync_counter_out_9_~I .input_power_up = "low";
8275 defparam \inst|d_hsync_counter_out_9_~I .input_register_mode = "none";
8276 defparam \inst|d_hsync_counter_out_9_~I .input_sync_reset = "none";
8277 defparam \inst|d_hsync_counter_out_9_~I .oe_async_reset = "none";
8278 defparam \inst|d_hsync_counter_out_9_~I .oe_power_up = "low";
8279 defparam \inst|d_hsync_counter_out_9_~I .oe_register_mode = "none";
8280 defparam \inst|d_hsync_counter_out_9_~I .oe_sync_reset = "none";
8281 defparam \inst|d_hsync_counter_out_9_~I .operation_mode = "output";
8282 defparam \inst|d_hsync_counter_out_9_~I .output_async_reset = "none";
8283 defparam \inst|d_hsync_counter_out_9_~I .output_power_up = "low";
8284 defparam \inst|d_hsync_counter_out_9_~I .output_register_mode = "none";
8285 defparam \inst|d_hsync_counter_out_9_~I .output_sync_reset = "none";
8286 // synopsys translate_on
8287
8288 // atom is at PIN_G22
8289 stratix_io \inst|d_hsync_counter_out_8_~I (
8290         .datain(\inst|vga_driver_unit|hsync_counter_8 ),
8291         .ddiodatain(gnd),
8292         .oe(vcc),
8293         .outclk(gnd),
8294         .outclkena(vcc),
8295         .inclk(gnd),
8296         .inclkena(vcc),
8297         .areset(gnd),
8298         .sreset(gnd),
8299         .delayctrlin(gnd),
8300         .devclrn(devclrn),
8301         .devpor(devpor),
8302         .devoe(devoe),
8303         .combout(),
8304         .regout(),
8305         .ddioregout(),
8306         .padio(d_hsync_counter[8]),
8307         .dqsundelayedout());
8308 // synopsys translate_off
8309 defparam \inst|d_hsync_counter_out_8_~I .ddio_mode = "none";
8310 defparam \inst|d_hsync_counter_out_8_~I .input_async_reset = "none";
8311 defparam \inst|d_hsync_counter_out_8_~I .input_power_up = "low";
8312 defparam \inst|d_hsync_counter_out_8_~I .input_register_mode = "none";
8313 defparam \inst|d_hsync_counter_out_8_~I .input_sync_reset = "none";
8314 defparam \inst|d_hsync_counter_out_8_~I .oe_async_reset = "none";
8315 defparam \inst|d_hsync_counter_out_8_~I .oe_power_up = "low";
8316 defparam \inst|d_hsync_counter_out_8_~I .oe_register_mode = "none";
8317 defparam \inst|d_hsync_counter_out_8_~I .oe_sync_reset = "none";
8318 defparam \inst|d_hsync_counter_out_8_~I .operation_mode = "output";
8319 defparam \inst|d_hsync_counter_out_8_~I .output_async_reset = "none";
8320 defparam \inst|d_hsync_counter_out_8_~I .output_power_up = "low";
8321 defparam \inst|d_hsync_counter_out_8_~I .output_register_mode = "none";
8322 defparam \inst|d_hsync_counter_out_8_~I .output_sync_reset = "none";
8323 // synopsys translate_on
8324
8325 // atom is at PIN_G25
8326 stratix_io \inst|d_hsync_counter_out_7_~I (
8327         .datain(\inst|vga_driver_unit|hsync_counter_7 ),
8328         .ddiodatain(gnd),
8329         .oe(vcc),
8330         .outclk(gnd),
8331         .outclkena(vcc),
8332         .inclk(gnd),
8333         .inclkena(vcc),
8334         .areset(gnd),
8335         .sreset(gnd),
8336         .delayctrlin(gnd),
8337         .devclrn(devclrn),
8338         .devpor(devpor),
8339         .devoe(devoe),
8340         .combout(),
8341         .regout(),
8342         .ddioregout(),
8343         .padio(d_hsync_counter[7]),
8344         .dqsundelayedout());
8345 // synopsys translate_off
8346 defparam \inst|d_hsync_counter_out_7_~I .ddio_mode = "none";
8347 defparam \inst|d_hsync_counter_out_7_~I .input_async_reset = "none";
8348 defparam \inst|d_hsync_counter_out_7_~I .input_power_up = "low";
8349 defparam \inst|d_hsync_counter_out_7_~I .input_register_mode = "none";
8350 defparam \inst|d_hsync_counter_out_7_~I .input_sync_reset = "none";
8351 defparam \inst|d_hsync_counter_out_7_~I .oe_async_reset = "none";
8352 defparam \inst|d_hsync_counter_out_7_~I .oe_power_up = "low";
8353 defparam \inst|d_hsync_counter_out_7_~I .oe_register_mode = "none";
8354 defparam \inst|d_hsync_counter_out_7_~I .oe_sync_reset = "none";
8355 defparam \inst|d_hsync_counter_out_7_~I .operation_mode = "output";
8356 defparam \inst|d_hsync_counter_out_7_~I .output_async_reset = "none";
8357 defparam \inst|d_hsync_counter_out_7_~I .output_power_up = "low";
8358 defparam \inst|d_hsync_counter_out_7_~I .output_register_mode = "none";
8359 defparam \inst|d_hsync_counter_out_7_~I .output_sync_reset = "none";
8360 // synopsys translate_on
8361
8362 // atom is at PIN_C15
8363 stratix_io \inst|d_hsync_counter_out_6_~I (
8364         .datain(\inst|vga_driver_unit|hsync_counter_6 ),
8365         .ddiodatain(gnd),
8366         .oe(vcc),
8367         .outclk(gnd),
8368         .outclkena(vcc),
8369         .inclk(gnd),
8370         .inclkena(vcc),
8371         .areset(gnd),
8372         .sreset(gnd),
8373         .delayctrlin(gnd),
8374         .devclrn(devclrn),
8375         .devpor(devpor),
8376         .devoe(devoe),
8377         .combout(),
8378         .regout(),
8379         .ddioregout(),
8380         .padio(d_hsync_counter[6]),
8381         .dqsundelayedout());
8382 // synopsys translate_off
8383 defparam \inst|d_hsync_counter_out_6_~I .ddio_mode = "none";
8384 defparam \inst|d_hsync_counter_out_6_~I .input_async_reset = "none";
8385 defparam \inst|d_hsync_counter_out_6_~I .input_power_up = "low";
8386 defparam \inst|d_hsync_counter_out_6_~I .input_register_mode = "none";
8387 defparam \inst|d_hsync_counter_out_6_~I .input_sync_reset = "none";
8388 defparam \inst|d_hsync_counter_out_6_~I .oe_async_reset = "none";
8389 defparam \inst|d_hsync_counter_out_6_~I .oe_power_up = "low";
8390 defparam \inst|d_hsync_counter_out_6_~I .oe_register_mode = "none";
8391 defparam \inst|d_hsync_counter_out_6_~I .oe_sync_reset = "none";
8392 defparam \inst|d_hsync_counter_out_6_~I .operation_mode = "output";
8393 defparam \inst|d_hsync_counter_out_6_~I .output_async_reset = "none";
8394 defparam \inst|d_hsync_counter_out_6_~I .output_power_up = "low";
8395 defparam \inst|d_hsync_counter_out_6_~I .output_register_mode = "none";
8396 defparam \inst|d_hsync_counter_out_6_~I .output_sync_reset = "none";
8397 // synopsys translate_on
8398
8399 // atom is at PIN_H2
8400 stratix_io \inst|d_hsync_counter_out_5_~I (
8401         .datain(\inst|vga_driver_unit|hsync_counter_5 ),
8402         .ddiodatain(gnd),
8403         .oe(vcc),
8404         .outclk(gnd),
8405         .outclkena(vcc),
8406         .inclk(gnd),
8407         .inclkena(vcc),
8408         .areset(gnd),
8409         .sreset(gnd),
8410         .delayctrlin(gnd),
8411         .devclrn(devclrn),
8412         .devpor(devpor),
8413         .devoe(devoe),
8414         .combout(),
8415         .regout(),
8416         .ddioregout(),
8417         .padio(d_hsync_counter[5]),
8418         .dqsundelayedout());
8419 // synopsys translate_off
8420 defparam \inst|d_hsync_counter_out_5_~I .ddio_mode = "none";
8421 defparam \inst|d_hsync_counter_out_5_~I .input_async_reset = "none";
8422 defparam \inst|d_hsync_counter_out_5_~I .input_power_up = "low";
8423 defparam \inst|d_hsync_counter_out_5_~I .input_register_mode = "none";
8424 defparam \inst|d_hsync_counter_out_5_~I .input_sync_reset = "none";
8425 defparam \inst|d_hsync_counter_out_5_~I .oe_async_reset = "none";
8426 defparam \inst|d_hsync_counter_out_5_~I .oe_power_up = "low";
8427 defparam \inst|d_hsync_counter_out_5_~I .oe_register_mode = "none";
8428 defparam \inst|d_hsync_counter_out_5_~I .oe_sync_reset = "none";
8429 defparam \inst|d_hsync_counter_out_5_~I .operation_mode = "output";
8430 defparam \inst|d_hsync_counter_out_5_~I .output_async_reset = "none";
8431 defparam \inst|d_hsync_counter_out_5_~I .output_power_up = "low";
8432 defparam \inst|d_hsync_counter_out_5_~I .output_register_mode = "none";
8433 defparam \inst|d_hsync_counter_out_5_~I .output_sync_reset = "none";
8434 // synopsys translate_on
8435
8436 // atom is at PIN_H1
8437 stratix_io \inst|d_hsync_counter_out_4_~I (
8438         .datain(\inst|vga_driver_unit|hsync_counter_4 ),
8439         .ddiodatain(gnd),
8440         .oe(vcc),
8441         .outclk(gnd),
8442         .outclkena(vcc),
8443         .inclk(gnd),
8444         .inclkena(vcc),
8445         .areset(gnd),
8446         .sreset(gnd),
8447         .delayctrlin(gnd),
8448         .devclrn(devclrn),
8449         .devpor(devpor),
8450         .devoe(devoe),
8451         .combout(),
8452         .regout(),
8453         .ddioregout(),
8454         .padio(d_hsync_counter[4]),
8455         .dqsundelayedout());
8456 // synopsys translate_off
8457 defparam \inst|d_hsync_counter_out_4_~I .ddio_mode = "none";
8458 defparam \inst|d_hsync_counter_out_4_~I .input_async_reset = "none";
8459 defparam \inst|d_hsync_counter_out_4_~I .input_power_up = "low";
8460 defparam \inst|d_hsync_counter_out_4_~I .input_register_mode = "none";
8461 defparam \inst|d_hsync_counter_out_4_~I .input_sync_reset = "none";
8462 defparam \inst|d_hsync_counter_out_4_~I .oe_async_reset = "none";
8463 defparam \inst|d_hsync_counter_out_4_~I .oe_power_up = "low";
8464 defparam \inst|d_hsync_counter_out_4_~I .oe_register_mode = "none";
8465 defparam \inst|d_hsync_counter_out_4_~I .oe_sync_reset = "none";
8466 defparam \inst|d_hsync_counter_out_4_~I .operation_mode = "output";
8467 defparam \inst|d_hsync_counter_out_4_~I .output_async_reset = "none";
8468 defparam \inst|d_hsync_counter_out_4_~I .output_power_up = "low";
8469 defparam \inst|d_hsync_counter_out_4_~I .output_register_mode = "none";
8470 defparam \inst|d_hsync_counter_out_4_~I .output_sync_reset = "none";
8471 // synopsys translate_on
8472
8473 // atom is at PIN_H25
8474 stratix_io \inst|d_hsync_counter_out_3_~I (
8475         .datain(\inst|vga_driver_unit|hsync_counter_3 ),
8476         .ddiodatain(gnd),
8477         .oe(vcc),
8478         .outclk(gnd),
8479         .outclkena(vcc),
8480         .inclk(gnd),
8481         .inclkena(vcc),
8482         .areset(gnd),
8483         .sreset(gnd),
8484         .delayctrlin(gnd),
8485         .devclrn(devclrn),
8486         .devpor(devpor),
8487         .devoe(devoe),
8488         .combout(),
8489         .regout(),
8490         .ddioregout(),
8491         .padio(d_hsync_counter[3]),
8492         .dqsundelayedout());
8493 // synopsys translate_off
8494 defparam \inst|d_hsync_counter_out_3_~I .ddio_mode = "none";
8495 defparam \inst|d_hsync_counter_out_3_~I .input_async_reset = "none";
8496 defparam \inst|d_hsync_counter_out_3_~I .input_power_up = "low";
8497 defparam \inst|d_hsync_counter_out_3_~I .input_register_mode = "none";
8498 defparam \inst|d_hsync_counter_out_3_~I .input_sync_reset = "none";
8499 defparam \inst|d_hsync_counter_out_3_~I .oe_async_reset = "none";
8500 defparam \inst|d_hsync_counter_out_3_~I .oe_power_up = "low";
8501 defparam \inst|d_hsync_counter_out_3_~I .oe_register_mode = "none";
8502 defparam \inst|d_hsync_counter_out_3_~I .oe_sync_reset = "none";
8503 defparam \inst|d_hsync_counter_out_3_~I .operation_mode = "output";
8504 defparam \inst|d_hsync_counter_out_3_~I .output_async_reset = "none";
8505 defparam \inst|d_hsync_counter_out_3_~I .output_power_up = "low";
8506 defparam \inst|d_hsync_counter_out_3_~I .output_register_mode = "none";
8507 defparam \inst|d_hsync_counter_out_3_~I .output_sync_reset = "none";
8508 // synopsys translate_on
8509
8510 // atom is at PIN_B16
8511 stratix_io \inst|d_hsync_counter_out_2_~I (
8512         .datain(\inst|vga_driver_unit|hsync_counter_2 ),
8513         .ddiodatain(gnd),
8514         .oe(vcc),
8515         .outclk(gnd),
8516         .outclkena(vcc),
8517         .inclk(gnd),
8518         .inclkena(vcc),
8519         .areset(gnd),
8520         .sreset(gnd),
8521         .delayctrlin(gnd),
8522         .devclrn(devclrn),
8523         .devpor(devpor),
8524         .devoe(devoe),
8525         .combout(),
8526         .regout(),
8527         .ddioregout(),
8528         .padio(d_hsync_counter[2]),
8529         .dqsundelayedout());
8530 // synopsys translate_off
8531 defparam \inst|d_hsync_counter_out_2_~I .ddio_mode = "none";
8532 defparam \inst|d_hsync_counter_out_2_~I .input_async_reset = "none";
8533 defparam \inst|d_hsync_counter_out_2_~I .input_power_up = "low";
8534 defparam \inst|d_hsync_counter_out_2_~I .input_register_mode = "none";
8535 defparam \inst|d_hsync_counter_out_2_~I .input_sync_reset = "none";
8536 defparam \inst|d_hsync_counter_out_2_~I .oe_async_reset = "none";
8537 defparam \inst|d_hsync_counter_out_2_~I .oe_power_up = "low";
8538 defparam \inst|d_hsync_counter_out_2_~I .oe_register_mode = "none";
8539 defparam \inst|d_hsync_counter_out_2_~I .oe_sync_reset = "none";
8540 defparam \inst|d_hsync_counter_out_2_~I .operation_mode = "output";
8541 defparam \inst|d_hsync_counter_out_2_~I .output_async_reset = "none";
8542 defparam \inst|d_hsync_counter_out_2_~I .output_power_up = "low";
8543 defparam \inst|d_hsync_counter_out_2_~I .output_register_mode = "none";
8544 defparam \inst|d_hsync_counter_out_2_~I .output_sync_reset = "none";
8545 // synopsys translate_on
8546
8547 // atom is at PIN_AD15
8548 stratix_io \inst|d_hsync_counter_out_1_~I (
8549         .datain(\inst|vga_driver_unit|hsync_counter_1 ),
8550         .ddiodatain(gnd),
8551         .oe(vcc),
8552         .outclk(gnd),
8553         .outclkena(vcc),
8554         .inclk(gnd),
8555         .inclkena(vcc),
8556         .areset(gnd),
8557         .sreset(gnd),
8558         .delayctrlin(gnd),
8559         .devclrn(devclrn),
8560         .devpor(devpor),
8561         .devoe(devoe),
8562         .combout(),
8563         .regout(),
8564         .ddioregout(),
8565         .padio(d_hsync_counter[1]),
8566         .dqsundelayedout());
8567 // synopsys translate_off
8568 defparam \inst|d_hsync_counter_out_1_~I .ddio_mode = "none";
8569 defparam \inst|d_hsync_counter_out_1_~I .input_async_reset = "none";
8570 defparam \inst|d_hsync_counter_out_1_~I .input_power_up = "low";
8571 defparam \inst|d_hsync_counter_out_1_~I .input_register_mode = "none";
8572 defparam \inst|d_hsync_counter_out_1_~I .input_sync_reset = "none";
8573 defparam \inst|d_hsync_counter_out_1_~I .oe_async_reset = "none";
8574 defparam \inst|d_hsync_counter_out_1_~I .oe_power_up = "low";
8575 defparam \inst|d_hsync_counter_out_1_~I .oe_register_mode = "none";
8576 defparam \inst|d_hsync_counter_out_1_~I .oe_sync_reset = "none";
8577 defparam \inst|d_hsync_counter_out_1_~I .operation_mode = "output";
8578 defparam \inst|d_hsync_counter_out_1_~I .output_async_reset = "none";
8579 defparam \inst|d_hsync_counter_out_1_~I .output_power_up = "low";
8580 defparam \inst|d_hsync_counter_out_1_~I .output_register_mode = "none";
8581 defparam \inst|d_hsync_counter_out_1_~I .output_sync_reset = "none";
8582 // synopsys translate_on
8583
8584 // atom is at PIN_H4
8585 stratix_io \inst|d_hsync_counter_out_0_~I (
8586         .datain(\inst|vga_driver_unit|hsync_counter_0 ),
8587         .ddiodatain(gnd),
8588         .oe(vcc),
8589         .outclk(gnd),
8590         .outclkena(vcc),
8591         .inclk(gnd),
8592         .inclkena(vcc),
8593         .areset(gnd),
8594         .sreset(gnd),
8595         .delayctrlin(gnd),
8596         .devclrn(devclrn),
8597         .devpor(devpor),
8598         .devoe(devoe),
8599         .combout(),
8600         .regout(),
8601         .ddioregout(),
8602         .padio(d_hsync_counter[0]),
8603         .dqsundelayedout());
8604 // synopsys translate_off
8605 defparam \inst|d_hsync_counter_out_0_~I .ddio_mode = "none";
8606 defparam \inst|d_hsync_counter_out_0_~I .input_async_reset = "none";
8607 defparam \inst|d_hsync_counter_out_0_~I .input_power_up = "low";
8608 defparam \inst|d_hsync_counter_out_0_~I .input_register_mode = "none";
8609 defparam \inst|d_hsync_counter_out_0_~I .input_sync_reset = "none";
8610 defparam \inst|d_hsync_counter_out_0_~I .oe_async_reset = "none";
8611 defparam \inst|d_hsync_counter_out_0_~I .oe_power_up = "low";
8612 defparam \inst|d_hsync_counter_out_0_~I .oe_register_mode = "none";
8613 defparam \inst|d_hsync_counter_out_0_~I .oe_sync_reset = "none";
8614 defparam \inst|d_hsync_counter_out_0_~I .operation_mode = "output";
8615 defparam \inst|d_hsync_counter_out_0_~I .output_async_reset = "none";
8616 defparam \inst|d_hsync_counter_out_0_~I .output_power_up = "low";
8617 defparam \inst|d_hsync_counter_out_0_~I .output_register_mode = "none";
8618 defparam \inst|d_hsync_counter_out_0_~I .output_sync_reset = "none";
8619 // synopsys translate_on
8620
8621 // atom is at PIN_Y5
8622 stratix_io \inst|d_hsync_state_out_0_~I (
8623         .datain(\inst|vga_driver_unit|hsync_state_0 ),
8624         .ddiodatain(gnd),
8625         .oe(vcc),
8626         .outclk(gnd),
8627         .outclkena(vcc),
8628         .inclk(gnd),
8629         .inclkena(vcc),
8630         .areset(gnd),
8631         .sreset(gnd),
8632         .delayctrlin(gnd),
8633         .devclrn(devclrn),
8634         .devpor(devpor),
8635         .devoe(devoe),
8636         .combout(),
8637         .regout(),
8638         .ddioregout(),
8639         .padio(d_hsync_state[0]),
8640         .dqsundelayedout());
8641 // synopsys translate_off
8642 defparam \inst|d_hsync_state_out_0_~I .ddio_mode = "none";
8643 defparam \inst|d_hsync_state_out_0_~I .input_async_reset = "none";
8644 defparam \inst|d_hsync_state_out_0_~I .input_power_up = "low";
8645 defparam \inst|d_hsync_state_out_0_~I .input_register_mode = "none";
8646 defparam \inst|d_hsync_state_out_0_~I .input_sync_reset = "none";
8647 defparam \inst|d_hsync_state_out_0_~I .oe_async_reset = "none";
8648 defparam \inst|d_hsync_state_out_0_~I .oe_power_up = "low";
8649 defparam \inst|d_hsync_state_out_0_~I .oe_register_mode = "none";
8650 defparam \inst|d_hsync_state_out_0_~I .oe_sync_reset = "none";
8651 defparam \inst|d_hsync_state_out_0_~I .operation_mode = "output";
8652 defparam \inst|d_hsync_state_out_0_~I .output_async_reset = "none";
8653 defparam \inst|d_hsync_state_out_0_~I .output_power_up = "low";
8654 defparam \inst|d_hsync_state_out_0_~I .output_register_mode = "none";
8655 defparam \inst|d_hsync_state_out_0_~I .output_sync_reset = "none";
8656 // synopsys translate_on
8657
8658 // atom is at PIN_F19
8659 stratix_io \inst|d_hsync_state_out_1_~I (
8660         .datain(\inst|vga_driver_unit|hsync_state_1 ),
8661         .ddiodatain(gnd),
8662         .oe(vcc),
8663         .outclk(gnd),
8664         .outclkena(vcc),
8665         .inclk(gnd),
8666         .inclkena(vcc),
8667         .areset(gnd),
8668         .sreset(gnd),
8669         .delayctrlin(gnd),
8670         .devclrn(devclrn),
8671         .devpor(devpor),
8672         .devoe(devoe),
8673         .combout(),
8674         .regout(),
8675         .ddioregout(),
8676         .padio(d_hsync_state[1]),
8677         .dqsundelayedout());
8678 // synopsys translate_off
8679 defparam \inst|d_hsync_state_out_1_~I .ddio_mode = "none";
8680 defparam \inst|d_hsync_state_out_1_~I .input_async_reset = "none";
8681 defparam \inst|d_hsync_state_out_1_~I .input_power_up = "low";
8682 defparam \inst|d_hsync_state_out_1_~I .input_register_mode = "none";
8683 defparam \inst|d_hsync_state_out_1_~I .input_sync_reset = "none";
8684 defparam \inst|d_hsync_state_out_1_~I .oe_async_reset = "none";
8685 defparam \inst|d_hsync_state_out_1_~I .oe_power_up = "low";
8686 defparam \inst|d_hsync_state_out_1_~I .oe_register_mode = "none";
8687 defparam \inst|d_hsync_state_out_1_~I .oe_sync_reset = "none";
8688 defparam \inst|d_hsync_state_out_1_~I .operation_mode = "output";
8689 defparam \inst|d_hsync_state_out_1_~I .output_async_reset = "none";
8690 defparam \inst|d_hsync_state_out_1_~I .output_power_up = "low";
8691 defparam \inst|d_hsync_state_out_1_~I .output_register_mode = "none";
8692 defparam \inst|d_hsync_state_out_1_~I .output_sync_reset = "none";
8693 // synopsys translate_on
8694
8695 // atom is at PIN_F17
8696 stratix_io \inst|d_hsync_state_out_2_~I (
8697         .datain(\inst|vga_driver_unit|hsync_state_2 ),
8698         .ddiodatain(gnd),
8699         .oe(vcc),
8700         .outclk(gnd),
8701         .outclkena(vcc),
8702         .inclk(gnd),
8703         .inclkena(vcc),
8704         .areset(gnd),
8705         .sreset(gnd),
8706         .delayctrlin(gnd),
8707         .devclrn(devclrn),
8708         .devpor(devpor),
8709         .devoe(devoe),
8710         .combout(),
8711         .regout(),
8712         .ddioregout(),
8713         .padio(d_hsync_state[2]),
8714         .dqsundelayedout());
8715 // synopsys translate_off
8716 defparam \inst|d_hsync_state_out_2_~I .ddio_mode = "none";
8717 defparam \inst|d_hsync_state_out_2_~I .input_async_reset = "none";
8718 defparam \inst|d_hsync_state_out_2_~I .input_power_up = "low";
8719 defparam \inst|d_hsync_state_out_2_~I .input_register_mode = "none";
8720 defparam \inst|d_hsync_state_out_2_~I .input_sync_reset = "none";
8721 defparam \inst|d_hsync_state_out_2_~I .oe_async_reset = "none";
8722 defparam \inst|d_hsync_state_out_2_~I .oe_power_up = "low";
8723 defparam \inst|d_hsync_state_out_2_~I .oe_register_mode = "none";
8724 defparam \inst|d_hsync_state_out_2_~I .oe_sync_reset = "none";
8725 defparam \inst|d_hsync_state_out_2_~I .operation_mode = "output";
8726 defparam \inst|d_hsync_state_out_2_~I .output_async_reset = "none";
8727 defparam \inst|d_hsync_state_out_2_~I .output_power_up = "low";
8728 defparam \inst|d_hsync_state_out_2_~I .output_register_mode = "none";
8729 defparam \inst|d_hsync_state_out_2_~I .output_sync_reset = "none";
8730 // synopsys translate_on
8731
8732 // atom is at PIN_Y2
8733 stratix_io \inst|d_hsync_state_out_3_~I (
8734         .datain(\inst|vga_driver_unit|hsync_state_3 ),
8735         .ddiodatain(gnd),
8736         .oe(vcc),
8737         .outclk(gnd),
8738         .outclkena(vcc),
8739         .inclk(gnd),
8740         .inclkena(vcc),
8741         .areset(gnd),
8742         .sreset(gnd),
8743         .delayctrlin(gnd),
8744         .devclrn(devclrn),
8745         .devpor(devpor),
8746         .devoe(devoe),
8747         .combout(),
8748         .regout(),
8749         .ddioregout(),
8750         .padio(d_hsync_state[3]),
8751         .dqsundelayedout());
8752 // synopsys translate_off
8753 defparam \inst|d_hsync_state_out_3_~I .ddio_mode = "none";
8754 defparam \inst|d_hsync_state_out_3_~I .input_async_reset = "none";
8755 defparam \inst|d_hsync_state_out_3_~I .input_power_up = "low";
8756 defparam \inst|d_hsync_state_out_3_~I .input_register_mode = "none";
8757 defparam \inst|d_hsync_state_out_3_~I .input_sync_reset = "none";
8758 defparam \inst|d_hsync_state_out_3_~I .oe_async_reset = "none";
8759 defparam \inst|d_hsync_state_out_3_~I .oe_power_up = "low";
8760 defparam \inst|d_hsync_state_out_3_~I .oe_register_mode = "none";
8761 defparam \inst|d_hsync_state_out_3_~I .oe_sync_reset = "none";
8762 defparam \inst|d_hsync_state_out_3_~I .operation_mode = "output";
8763 defparam \inst|d_hsync_state_out_3_~I .output_async_reset = "none";
8764 defparam \inst|d_hsync_state_out_3_~I .output_power_up = "low";
8765 defparam \inst|d_hsync_state_out_3_~I .output_register_mode = "none";
8766 defparam \inst|d_hsync_state_out_3_~I .output_sync_reset = "none";
8767 // synopsys translate_on
8768
8769 // atom is at PIN_F10
8770 stratix_io \inst|d_hsync_state_out_4_~I (
8771         .datain(\inst|vga_driver_unit|hsync_state_4 ),
8772         .ddiodatain(gnd),
8773         .oe(vcc),
8774         .outclk(gnd),
8775         .outclkena(vcc),
8776         .inclk(gnd),
8777         .inclkena(vcc),
8778         .areset(gnd),
8779         .sreset(gnd),
8780         .delayctrlin(gnd),
8781         .devclrn(devclrn),
8782         .devpor(devpor),
8783         .devoe(devoe),
8784         .combout(),
8785         .regout(),
8786         .ddioregout(),
8787         .padio(d_hsync_state[4]),
8788         .dqsundelayedout());
8789 // synopsys translate_off
8790 defparam \inst|d_hsync_state_out_4_~I .ddio_mode = "none";
8791 defparam \inst|d_hsync_state_out_4_~I .input_async_reset = "none";
8792 defparam \inst|d_hsync_state_out_4_~I .input_power_up = "low";
8793 defparam \inst|d_hsync_state_out_4_~I .input_register_mode = "none";
8794 defparam \inst|d_hsync_state_out_4_~I .input_sync_reset = "none";
8795 defparam \inst|d_hsync_state_out_4_~I .oe_async_reset = "none";
8796 defparam \inst|d_hsync_state_out_4_~I .oe_power_up = "low";
8797 defparam \inst|d_hsync_state_out_4_~I .oe_register_mode = "none";
8798 defparam \inst|d_hsync_state_out_4_~I .oe_sync_reset = "none";
8799 defparam \inst|d_hsync_state_out_4_~I .operation_mode = "output";
8800 defparam \inst|d_hsync_state_out_4_~I .output_async_reset = "none";
8801 defparam \inst|d_hsync_state_out_4_~I .output_power_up = "low";
8802 defparam \inst|d_hsync_state_out_4_~I .output_register_mode = "none";
8803 defparam \inst|d_hsync_state_out_4_~I .output_sync_reset = "none";
8804 // synopsys translate_on
8805
8806 // atom is at PIN_F9
8807 stratix_io \inst|d_hsync_state_out_5_~I (
8808         .datain(\inst|vga_driver_unit|hsync_state_5 ),
8809         .ddiodatain(gnd),
8810         .oe(vcc),
8811         .outclk(gnd),
8812         .outclkena(vcc),
8813         .inclk(gnd),
8814         .inclkena(vcc),
8815         .areset(gnd),
8816         .sreset(gnd),
8817         .delayctrlin(gnd),
8818         .devclrn(devclrn),
8819         .devpor(devpor),
8820         .devoe(devoe),
8821         .combout(),
8822         .regout(),
8823         .ddioregout(),
8824         .padio(d_hsync_state[5]),
8825         .dqsundelayedout());
8826 // synopsys translate_off
8827 defparam \inst|d_hsync_state_out_5_~I .ddio_mode = "none";
8828 defparam \inst|d_hsync_state_out_5_~I .input_async_reset = "none";
8829 defparam \inst|d_hsync_state_out_5_~I .input_power_up = "low";
8830 defparam \inst|d_hsync_state_out_5_~I .input_register_mode = "none";
8831 defparam \inst|d_hsync_state_out_5_~I .input_sync_reset = "none";
8832 defparam \inst|d_hsync_state_out_5_~I .oe_async_reset = "none";
8833 defparam \inst|d_hsync_state_out_5_~I .oe_power_up = "low";
8834 defparam \inst|d_hsync_state_out_5_~I .oe_register_mode = "none";
8835 defparam \inst|d_hsync_state_out_5_~I .oe_sync_reset = "none";
8836 defparam \inst|d_hsync_state_out_5_~I .operation_mode = "output";
8837 defparam \inst|d_hsync_state_out_5_~I .output_async_reset = "none";
8838 defparam \inst|d_hsync_state_out_5_~I .output_power_up = "low";
8839 defparam \inst|d_hsync_state_out_5_~I .output_register_mode = "none";
8840 defparam \inst|d_hsync_state_out_5_~I .output_sync_reset = "none";
8841 // synopsys translate_on
8842
8843 // atom is at PIN_F6
8844 stratix_io \inst|d_hsync_state_out_6_~I (
8845         .datain(\inst|vga_driver_unit|hsync_state_6 ),
8846         .ddiodatain(gnd),
8847         .oe(vcc),
8848         .outclk(gnd),
8849         .outclkena(vcc),
8850         .inclk(gnd),
8851         .inclkena(vcc),
8852         .areset(gnd),
8853         .sreset(gnd),
8854         .delayctrlin(gnd),
8855         .devclrn(devclrn),
8856         .devpor(devpor),
8857         .devoe(devoe),
8858         .combout(),
8859         .regout(),
8860         .ddioregout(),
8861         .padio(d_hsync_state[6]),
8862         .dqsundelayedout());
8863 // synopsys translate_off
8864 defparam \inst|d_hsync_state_out_6_~I .ddio_mode = "none";
8865 defparam \inst|d_hsync_state_out_6_~I .input_async_reset = "none";
8866 defparam \inst|d_hsync_state_out_6_~I .input_power_up = "low";
8867 defparam \inst|d_hsync_state_out_6_~I .input_register_mode = "none";
8868 defparam \inst|d_hsync_state_out_6_~I .input_sync_reset = "none";
8869 defparam \inst|d_hsync_state_out_6_~I .oe_async_reset = "none";
8870 defparam \inst|d_hsync_state_out_6_~I .oe_power_up = "low";
8871 defparam \inst|d_hsync_state_out_6_~I .oe_register_mode = "none";
8872 defparam \inst|d_hsync_state_out_6_~I .oe_sync_reset = "none";
8873 defparam \inst|d_hsync_state_out_6_~I .operation_mode = "output";
8874 defparam \inst|d_hsync_state_out_6_~I .output_async_reset = "none";
8875 defparam \inst|d_hsync_state_out_6_~I .output_power_up = "low";
8876 defparam \inst|d_hsync_state_out_6_~I .output_register_mode = "none";
8877 defparam \inst|d_hsync_state_out_6_~I .output_sync_reset = "none";
8878 // synopsys translate_on
8879
8880 // atom is at PIN_L25
8881 stratix_io \inst|d_line_counter_out_8_~I (
8882         .datain(\inst|vga_driver_unit|line_counter_sig_8 ),
8883         .ddiodatain(gnd),
8884         .oe(vcc),
8885         .outclk(gnd),
8886         .outclkena(vcc),
8887         .inclk(gnd),
8888         .inclkena(vcc),
8889         .areset(gnd),
8890         .sreset(gnd),
8891         .delayctrlin(gnd),
8892         .devclrn(devclrn),
8893         .devpor(devpor),
8894         .devoe(devoe),
8895         .combout(),
8896         .regout(),
8897         .ddioregout(),
8898         .padio(d_line_counter[8]),
8899         .dqsundelayedout());
8900 // synopsys translate_off
8901 defparam \inst|d_line_counter_out_8_~I .ddio_mode = "none";
8902 defparam \inst|d_line_counter_out_8_~I .input_async_reset = "none";
8903 defparam \inst|d_line_counter_out_8_~I .input_power_up = "low";
8904 defparam \inst|d_line_counter_out_8_~I .input_register_mode = "none";
8905 defparam \inst|d_line_counter_out_8_~I .input_sync_reset = "none";
8906 defparam \inst|d_line_counter_out_8_~I .oe_async_reset = "none";
8907 defparam \inst|d_line_counter_out_8_~I .oe_power_up = "low";
8908 defparam \inst|d_line_counter_out_8_~I .oe_register_mode = "none";
8909 defparam \inst|d_line_counter_out_8_~I .oe_sync_reset = "none";
8910 defparam \inst|d_line_counter_out_8_~I .operation_mode = "output";
8911 defparam \inst|d_line_counter_out_8_~I .output_async_reset = "none";
8912 defparam \inst|d_line_counter_out_8_~I .output_power_up = "low";
8913 defparam \inst|d_line_counter_out_8_~I .output_register_mode = "none";
8914 defparam \inst|d_line_counter_out_8_~I .output_sync_reset = "none";
8915 // synopsys translate_on
8916
8917 // atom is at PIN_L24
8918 stratix_io \inst|d_line_counter_out_7_~I (
8919         .datain(\inst|vga_driver_unit|line_counter_sig_7 ),
8920         .ddiodatain(gnd),
8921         .oe(vcc),
8922         .outclk(gnd),
8923         .outclkena(vcc),
8924         .inclk(gnd),
8925         .inclkena(vcc),
8926         .areset(gnd),
8927         .sreset(gnd),
8928         .delayctrlin(gnd),
8929         .devclrn(devclrn),
8930         .devpor(devpor),
8931         .devoe(devoe),
8932         .combout(),
8933         .regout(),
8934         .ddioregout(),
8935         .padio(d_line_counter[7]),
8936         .dqsundelayedout());
8937 // synopsys translate_off
8938 defparam \inst|d_line_counter_out_7_~I .ddio_mode = "none";
8939 defparam \inst|d_line_counter_out_7_~I .input_async_reset = "none";
8940 defparam \inst|d_line_counter_out_7_~I .input_power_up = "low";
8941 defparam \inst|d_line_counter_out_7_~I .input_register_mode = "none";
8942 defparam \inst|d_line_counter_out_7_~I .input_sync_reset = "none";
8943 defparam \inst|d_line_counter_out_7_~I .oe_async_reset = "none";
8944 defparam \inst|d_line_counter_out_7_~I .oe_power_up = "low";
8945 defparam \inst|d_line_counter_out_7_~I .oe_register_mode = "none";
8946 defparam \inst|d_line_counter_out_7_~I .oe_sync_reset = "none";
8947 defparam \inst|d_line_counter_out_7_~I .operation_mode = "output";
8948 defparam \inst|d_line_counter_out_7_~I .output_async_reset = "none";
8949 defparam \inst|d_line_counter_out_7_~I .output_power_up = "low";
8950 defparam \inst|d_line_counter_out_7_~I .output_register_mode = "none";
8951 defparam \inst|d_line_counter_out_7_~I .output_sync_reset = "none";
8952 // synopsys translate_on
8953
8954 // atom is at PIN_M5
8955 stratix_io \inst|d_line_counter_out_6_~I (
8956         .datain(\inst|vga_driver_unit|line_counter_sig_6 ),
8957         .ddiodatain(gnd),
8958         .oe(vcc),
8959         .outclk(gnd),
8960         .outclkena(vcc),
8961         .inclk(gnd),
8962         .inclkena(vcc),
8963         .areset(gnd),
8964         .sreset(gnd),
8965         .delayctrlin(gnd),
8966         .devclrn(devclrn),
8967         .devpor(devpor),
8968         .devoe(devoe),
8969         .combout(),
8970         .regout(),
8971         .ddioregout(),
8972         .padio(d_line_counter[6]),
8973         .dqsundelayedout());
8974 // synopsys translate_off
8975 defparam \inst|d_line_counter_out_6_~I .ddio_mode = "none";
8976 defparam \inst|d_line_counter_out_6_~I .input_async_reset = "none";
8977 defparam \inst|d_line_counter_out_6_~I .input_power_up = "low";
8978 defparam \inst|d_line_counter_out_6_~I .input_register_mode = "none";
8979 defparam \inst|d_line_counter_out_6_~I .input_sync_reset = "none";
8980 defparam \inst|d_line_counter_out_6_~I .oe_async_reset = "none";
8981 defparam \inst|d_line_counter_out_6_~I .oe_power_up = "low";
8982 defparam \inst|d_line_counter_out_6_~I .oe_register_mode = "none";
8983 defparam \inst|d_line_counter_out_6_~I .oe_sync_reset = "none";
8984 defparam \inst|d_line_counter_out_6_~I .operation_mode = "output";
8985 defparam \inst|d_line_counter_out_6_~I .output_async_reset = "none";
8986 defparam \inst|d_line_counter_out_6_~I .output_power_up = "low";
8987 defparam \inst|d_line_counter_out_6_~I .output_register_mode = "none";
8988 defparam \inst|d_line_counter_out_6_~I .output_sync_reset = "none";
8989 // synopsys translate_on
8990
8991 // atom is at PIN_M6
8992 stratix_io \inst|d_line_counter_out_5_~I (
8993         .datain(\inst|vga_driver_unit|line_counter_sig_5 ),
8994         .ddiodatain(gnd),
8995         .oe(vcc),
8996         .outclk(gnd),
8997         .outclkena(vcc),
8998         .inclk(gnd),
8999         .inclkena(vcc),
9000         .areset(gnd),
9001         .sreset(gnd),
9002         .delayctrlin(gnd),
9003         .devclrn(devclrn),
9004         .devpor(devpor),
9005         .devoe(devoe),
9006         .combout(),
9007         .regout(),
9008         .ddioregout(),
9009         .padio(d_line_counter[5]),
9010         .dqsundelayedout());
9011 // synopsys translate_off
9012 defparam \inst|d_line_counter_out_5_~I .ddio_mode = "none";
9013 defparam \inst|d_line_counter_out_5_~I .input_async_reset = "none";
9014 defparam \inst|d_line_counter_out_5_~I .input_power_up = "low";
9015 defparam \inst|d_line_counter_out_5_~I .input_register_mode = "none";
9016 defparam \inst|d_line_counter_out_5_~I .input_sync_reset = "none";
9017 defparam \inst|d_line_counter_out_5_~I .oe_async_reset = "none";
9018 defparam \inst|d_line_counter_out_5_~I .oe_power_up = "low";
9019 defparam \inst|d_line_counter_out_5_~I .oe_register_mode = "none";
9020 defparam \inst|d_line_counter_out_5_~I .oe_sync_reset = "none";
9021 defparam \inst|d_line_counter_out_5_~I .operation_mode = "output";
9022 defparam \inst|d_line_counter_out_5_~I .output_async_reset = "none";
9023 defparam \inst|d_line_counter_out_5_~I .output_power_up = "low";
9024 defparam \inst|d_line_counter_out_5_~I .output_register_mode = "none";
9025 defparam \inst|d_line_counter_out_5_~I .output_sync_reset = "none";
9026 // synopsys translate_on
9027
9028 // atom is at PIN_M8
9029 stratix_io \inst|d_line_counter_out_4_~I (
9030         .datain(\inst|vga_driver_unit|line_counter_sig_4 ),
9031         .ddiodatain(gnd),
9032         .oe(vcc),
9033         .outclk(gnd),
9034         .outclkena(vcc),
9035         .inclk(gnd),
9036         .inclkena(vcc),
9037         .areset(gnd),
9038         .sreset(gnd),
9039         .delayctrlin(gnd),
9040         .devclrn(devclrn),
9041         .devpor(devpor),
9042         .devoe(devoe),
9043         .combout(),
9044         .regout(),
9045         .ddioregout(),
9046         .padio(d_line_counter[4]),
9047         .dqsundelayedout());
9048 // synopsys translate_off
9049 defparam \inst|d_line_counter_out_4_~I .ddio_mode = "none";
9050 defparam \inst|d_line_counter_out_4_~I .input_async_reset = "none";
9051 defparam \inst|d_line_counter_out_4_~I .input_power_up = "low";
9052 defparam \inst|d_line_counter_out_4_~I .input_register_mode = "none";
9053 defparam \inst|d_line_counter_out_4_~I .input_sync_reset = "none";
9054 defparam \inst|d_line_counter_out_4_~I .oe_async_reset = "none";
9055 defparam \inst|d_line_counter_out_4_~I .oe_power_up = "low";
9056 defparam \inst|d_line_counter_out_4_~I .oe_register_mode = "none";
9057 defparam \inst|d_line_counter_out_4_~I .oe_sync_reset = "none";
9058 defparam \inst|d_line_counter_out_4_~I .operation_mode = "output";
9059 defparam \inst|d_line_counter_out_4_~I .output_async_reset = "none";
9060 defparam \inst|d_line_counter_out_4_~I .output_power_up = "low";
9061 defparam \inst|d_line_counter_out_4_~I .output_register_mode = "none";
9062 defparam \inst|d_line_counter_out_4_~I .output_sync_reset = "none";
9063 // synopsys translate_on
9064
9065 // atom is at PIN_M9
9066 stratix_io \inst|d_line_counter_out_3_~I (
9067         .datain(\inst|vga_driver_unit|line_counter_sig_3 ),
9068         .ddiodatain(gnd),
9069         .oe(vcc),
9070         .outclk(gnd),
9071         .outclkena(vcc),
9072         .inclk(gnd),
9073         .inclkena(vcc),
9074         .areset(gnd),
9075         .sreset(gnd),
9076         .delayctrlin(gnd),
9077         .devclrn(devclrn),
9078         .devpor(devpor),
9079         .devoe(devoe),
9080         .combout(),
9081         .regout(),
9082         .ddioregout(),
9083         .padio(d_line_counter[3]),
9084         .dqsundelayedout());
9085 // synopsys translate_off
9086 defparam \inst|d_line_counter_out_3_~I .ddio_mode = "none";
9087 defparam \inst|d_line_counter_out_3_~I .input_async_reset = "none";
9088 defparam \inst|d_line_counter_out_3_~I .input_power_up = "low";
9089 defparam \inst|d_line_counter_out_3_~I .input_register_mode = "none";
9090 defparam \inst|d_line_counter_out_3_~I .input_sync_reset = "none";
9091 defparam \inst|d_line_counter_out_3_~I .oe_async_reset = "none";
9092 defparam \inst|d_line_counter_out_3_~I .oe_power_up = "low";
9093 defparam \inst|d_line_counter_out_3_~I .oe_register_mode = "none";
9094 defparam \inst|d_line_counter_out_3_~I .oe_sync_reset = "none";
9095 defparam \inst|d_line_counter_out_3_~I .operation_mode = "output";
9096 defparam \inst|d_line_counter_out_3_~I .output_async_reset = "none";
9097 defparam \inst|d_line_counter_out_3_~I .output_power_up = "low";
9098 defparam \inst|d_line_counter_out_3_~I .output_register_mode = "none";
9099 defparam \inst|d_line_counter_out_3_~I .output_sync_reset = "none";
9100 // synopsys translate_on
9101
9102 // atom is at PIN_J22
9103 stratix_io \inst|d_line_counter_out_2_~I (
9104         .datain(\inst|vga_driver_unit|line_counter_sig_2 ),
9105         .ddiodatain(gnd),
9106         .oe(vcc),
9107         .outclk(gnd),
9108         .outclkena(vcc),
9109         .inclk(gnd),
9110         .inclkena(vcc),
9111         .areset(gnd),
9112         .sreset(gnd),
9113         .delayctrlin(gnd),
9114         .devclrn(devclrn),
9115         .devpor(devpor),
9116         .devoe(devoe),
9117         .combout(),
9118         .regout(),
9119         .ddioregout(),
9120         .padio(d_line_counter[2]),
9121         .dqsundelayedout());
9122 // synopsys translate_off
9123 defparam \inst|d_line_counter_out_2_~I .ddio_mode = "none";
9124 defparam \inst|d_line_counter_out_2_~I .input_async_reset = "none";
9125 defparam \inst|d_line_counter_out_2_~I .input_power_up = "low";
9126 defparam \inst|d_line_counter_out_2_~I .input_register_mode = "none";
9127 defparam \inst|d_line_counter_out_2_~I .input_sync_reset = "none";
9128 defparam \inst|d_line_counter_out_2_~I .oe_async_reset = "none";
9129 defparam \inst|d_line_counter_out_2_~I .oe_power_up = "low";
9130 defparam \inst|d_line_counter_out_2_~I .oe_register_mode = "none";
9131 defparam \inst|d_line_counter_out_2_~I .oe_sync_reset = "none";
9132 defparam \inst|d_line_counter_out_2_~I .operation_mode = "output";
9133 defparam \inst|d_line_counter_out_2_~I .output_async_reset = "none";
9134 defparam \inst|d_line_counter_out_2_~I .output_power_up = "low";
9135 defparam \inst|d_line_counter_out_2_~I .output_register_mode = "none";
9136 defparam \inst|d_line_counter_out_2_~I .output_sync_reset = "none";
9137 // synopsys translate_on
9138
9139 // atom is at PIN_K4
9140 stratix_io \inst|d_line_counter_out_1_~I (
9141         .datain(\inst|vga_driver_unit|line_counter_sig_1 ),
9142         .ddiodatain(gnd),
9143         .oe(vcc),
9144         .outclk(gnd),
9145         .outclkena(vcc),
9146         .inclk(gnd),
9147         .inclkena(vcc),
9148         .areset(gnd),
9149         .sreset(gnd),
9150         .delayctrlin(gnd),
9151         .devclrn(devclrn),
9152         .devpor(devpor),
9153         .devoe(devoe),
9154         .combout(),
9155         .regout(),
9156         .ddioregout(),
9157         .padio(d_line_counter[1]),
9158         .dqsundelayedout());
9159 // synopsys translate_off
9160 defparam \inst|d_line_counter_out_1_~I .ddio_mode = "none";
9161 defparam \inst|d_line_counter_out_1_~I .input_async_reset = "none";
9162 defparam \inst|d_line_counter_out_1_~I .input_power_up = "low";
9163 defparam \inst|d_line_counter_out_1_~I .input_register_mode = "none";
9164 defparam \inst|d_line_counter_out_1_~I .input_sync_reset = "none";
9165 defparam \inst|d_line_counter_out_1_~I .oe_async_reset = "none";
9166 defparam \inst|d_line_counter_out_1_~I .oe_power_up = "low";
9167 defparam \inst|d_line_counter_out_1_~I .oe_register_mode = "none";
9168 defparam \inst|d_line_counter_out_1_~I .oe_sync_reset = "none";
9169 defparam \inst|d_line_counter_out_1_~I .operation_mode = "output";
9170 defparam \inst|d_line_counter_out_1_~I .output_async_reset = "none";
9171 defparam \inst|d_line_counter_out_1_~I .output_power_up = "low";
9172 defparam \inst|d_line_counter_out_1_~I .output_register_mode = "none";
9173 defparam \inst|d_line_counter_out_1_~I .output_sync_reset = "none";
9174 // synopsys translate_on
9175
9176 // atom is at PIN_K6
9177 stratix_io \inst|d_line_counter_out_0_~I (
9178         .datain(\inst|vga_driver_unit|line_counter_sig_0 ),
9179         .ddiodatain(gnd),
9180         .oe(vcc),
9181         .outclk(gnd),
9182         .outclkena(vcc),
9183         .inclk(gnd),
9184         .inclkena(vcc),
9185         .areset(gnd),
9186         .sreset(gnd),
9187         .delayctrlin(gnd),
9188         .devclrn(devclrn),
9189         .devpor(devpor),
9190         .devoe(devoe),
9191         .combout(),
9192         .regout(),
9193         .ddioregout(),
9194         .padio(d_line_counter[0]),
9195         .dqsundelayedout());
9196 // synopsys translate_off
9197 defparam \inst|d_line_counter_out_0_~I .ddio_mode = "none";
9198 defparam \inst|d_line_counter_out_0_~I .input_async_reset = "none";
9199 defparam \inst|d_line_counter_out_0_~I .input_power_up = "low";
9200 defparam \inst|d_line_counter_out_0_~I .input_register_mode = "none";
9201 defparam \inst|d_line_counter_out_0_~I .input_sync_reset = "none";
9202 defparam \inst|d_line_counter_out_0_~I .oe_async_reset = "none";
9203 defparam \inst|d_line_counter_out_0_~I .oe_power_up = "low";
9204 defparam \inst|d_line_counter_out_0_~I .oe_register_mode = "none";
9205 defparam \inst|d_line_counter_out_0_~I .oe_sync_reset = "none";
9206 defparam \inst|d_line_counter_out_0_~I .operation_mode = "output";
9207 defparam \inst|d_line_counter_out_0_~I .output_async_reset = "none";
9208 defparam \inst|d_line_counter_out_0_~I .output_power_up = "low";
9209 defparam \inst|d_line_counter_out_0_~I .output_register_mode = "none";
9210 defparam \inst|d_line_counter_out_0_~I .output_sync_reset = "none";
9211 // synopsys translate_on
9212
9213 // atom is at PIN_T19
9214 stratix_io \inst|d_toggle_counter_out_24_~I (
9215         .datain(\~STRATIX_FITTER_CREATED_GND~I_combout ),
9216         .ddiodatain(gnd),
9217         .oe(vcc),
9218         .outclk(gnd),
9219         .outclkena(vcc),
9220         .inclk(gnd),
9221         .inclkena(vcc),
9222         .areset(gnd),
9223         .sreset(gnd),
9224         .delayctrlin(gnd),
9225         .devclrn(devclrn),
9226         .devpor(devpor),
9227         .devoe(devoe),
9228         .combout(),
9229         .regout(),
9230         .ddioregout(),
9231         .padio(d_toggle_counter[24]),
9232         .dqsundelayedout());
9233 // synopsys translate_off
9234 defparam \inst|d_toggle_counter_out_24_~I .ddio_mode = "none";
9235 defparam \inst|d_toggle_counter_out_24_~I .input_async_reset = "none";
9236 defparam \inst|d_toggle_counter_out_24_~I .input_power_up = "low";
9237 defparam \inst|d_toggle_counter_out_24_~I .input_register_mode = "none";
9238 defparam \inst|d_toggle_counter_out_24_~I .input_sync_reset = "none";
9239 defparam \inst|d_toggle_counter_out_24_~I .oe_async_reset = "none";
9240 defparam \inst|d_toggle_counter_out_24_~I .oe_power_up = "low";
9241 defparam \inst|d_toggle_counter_out_24_~I .oe_register_mode = "none";
9242 defparam \inst|d_toggle_counter_out_24_~I .oe_sync_reset = "none";
9243 defparam \inst|d_toggle_counter_out_24_~I .operation_mode = "output";
9244 defparam \inst|d_toggle_counter_out_24_~I .output_async_reset = "none";
9245 defparam \inst|d_toggle_counter_out_24_~I .output_power_up = "low";
9246 defparam \inst|d_toggle_counter_out_24_~I .output_register_mode = "none";
9247 defparam \inst|d_toggle_counter_out_24_~I .output_sync_reset = "none";
9248 // synopsys translate_on
9249
9250 // atom is at PIN_F23
9251 stratix_io \inst|d_toggle_counter_out_23_~I (
9252         .datain(\~STRATIX_FITTER_CREATED_GND~I_combout ),
9253         .ddiodatain(gnd),
9254         .oe(vcc),
9255         .outclk(gnd),
9256         .outclkena(vcc),
9257         .inclk(gnd),
9258         .inclkena(vcc),
9259         .areset(gnd),
9260         .sreset(gnd),
9261         .delayctrlin(gnd),
9262         .devclrn(devclrn),
9263         .devpor(devpor),
9264         .devoe(devoe),
9265         .combout(),
9266         .regout(),
9267         .ddioregout(),
9268         .padio(d_toggle_counter[23]),
9269         .dqsundelayedout());
9270 // synopsys translate_off
9271 defparam \inst|d_toggle_counter_out_23_~I .ddio_mode = "none";
9272 defparam \inst|d_toggle_counter_out_23_~I .input_async_reset = "none";
9273 defparam \inst|d_toggle_counter_out_23_~I .input_power_up = "low";
9274 defparam \inst|d_toggle_counter_out_23_~I .input_register_mode = "none";
9275 defparam \inst|d_toggle_counter_out_23_~I .input_sync_reset = "none";
9276 defparam \inst|d_toggle_counter_out_23_~I .oe_async_reset = "none";
9277 defparam \inst|d_toggle_counter_out_23_~I .oe_power_up = "low";
9278 defparam \inst|d_toggle_counter_out_23_~I .oe_register_mode = "none";
9279 defparam \inst|d_toggle_counter_out_23_~I .oe_sync_reset = "none";
9280 defparam \inst|d_toggle_counter_out_23_~I .operation_mode = "output";
9281 defparam \inst|d_toggle_counter_out_23_~I .output_async_reset = "none";
9282 defparam \inst|d_toggle_counter_out_23_~I .output_power_up = "low";
9283 defparam \inst|d_toggle_counter_out_23_~I .output_register_mode = "none";
9284 defparam \inst|d_toggle_counter_out_23_~I .output_sync_reset = "none";
9285 // synopsys translate_on
9286
9287 // atom is at PIN_F25
9288 stratix_io \inst|d_toggle_counter_out_22_~I (
9289         .datain(\~STRATIX_FITTER_CREATED_GND~I_combout ),
9290         .ddiodatain(gnd),
9291         .oe(vcc),
9292         .outclk(gnd),
9293         .outclkena(vcc),
9294         .inclk(gnd),
9295         .inclkena(vcc),
9296         .areset(gnd),
9297         .sreset(gnd),
9298         .delayctrlin(gnd),
9299         .devclrn(devclrn),
9300         .devpor(devpor),
9301         .devoe(devoe),
9302         .combout(),
9303         .regout(),
9304         .ddioregout(),
9305         .padio(d_toggle_counter[22]),
9306         .dqsundelayedout());
9307 // synopsys translate_off
9308 defparam \inst|d_toggle_counter_out_22_~I .ddio_mode = "none";
9309 defparam \inst|d_toggle_counter_out_22_~I .input_async_reset = "none";
9310 defparam \inst|d_toggle_counter_out_22_~I .input_power_up = "low";
9311 defparam \inst|d_toggle_counter_out_22_~I .input_register_mode = "none";
9312 defparam \inst|d_toggle_counter_out_22_~I .input_sync_reset = "none";
9313 defparam \inst|d_toggle_counter_out_22_~I .oe_async_reset = "none";
9314 defparam \inst|d_toggle_counter_out_22_~I .oe_power_up = "low";
9315 defparam \inst|d_toggle_counter_out_22_~I .oe_register_mode = "none";
9316 defparam \inst|d_toggle_counter_out_22_~I .oe_sync_reset = "none";
9317 defparam \inst|d_toggle_counter_out_22_~I .operation_mode = "output";
9318 defparam \inst|d_toggle_counter_out_22_~I .output_async_reset = "none";
9319 defparam \inst|d_toggle_counter_out_22_~I .output_power_up = "low";
9320 defparam \inst|d_toggle_counter_out_22_~I .output_register_mode = "none";
9321 defparam \inst|d_toggle_counter_out_22_~I .output_sync_reset = "none";
9322 // synopsys translate_on
9323
9324 // atom is at PIN_G1
9325 stratix_io \inst|d_toggle_counter_out_21_~I (
9326         .datain(\~STRATIX_FITTER_CREATED_GND~I_combout ),
9327         .ddiodatain(gnd),
9328         .oe(vcc),
9329         .outclk(gnd),
9330         .outclkena(vcc),
9331         .inclk(gnd),
9332         .inclkena(vcc),
9333         .areset(gnd),
9334         .sreset(gnd),
9335         .delayctrlin(gnd),
9336         .devclrn(devclrn),
9337         .devpor(devpor),
9338         .devoe(devoe),
9339         .combout(),
9340         .regout(),
9341         .ddioregout(),
9342         .padio(d_toggle_counter[21]),
9343         .dqsundelayedout());
9344 // synopsys translate_off
9345 defparam \inst|d_toggle_counter_out_21_~I .ddio_mode = "none";
9346 defparam \inst|d_toggle_counter_out_21_~I .input_async_reset = "none";
9347 defparam \inst|d_toggle_counter_out_21_~I .input_power_up = "low";
9348 defparam \inst|d_toggle_counter_out_21_~I .input_register_mode = "none";
9349 defparam \inst|d_toggle_counter_out_21_~I .input_sync_reset = "none";
9350 defparam \inst|d_toggle_counter_out_21_~I .oe_async_reset = "none";
9351 defparam \inst|d_toggle_counter_out_21_~I .oe_power_up = "low";
9352 defparam \inst|d_toggle_counter_out_21_~I .oe_register_mode = "none";
9353 defparam \inst|d_toggle_counter_out_21_~I .oe_sync_reset = "none";
9354 defparam \inst|d_toggle_counter_out_21_~I .operation_mode = "output";
9355 defparam \inst|d_toggle_counter_out_21_~I .output_async_reset = "none";
9356 defparam \inst|d_toggle_counter_out_21_~I .output_power_up = "low";
9357 defparam \inst|d_toggle_counter_out_21_~I .output_register_mode = "none";
9358 defparam \inst|d_toggle_counter_out_21_~I .output_sync_reset = "none";
9359 // synopsys translate_on
9360
9361 // atom is at PIN_G3
9362 stratix_io \inst|d_toggle_counter_out_20_~I (
9363         .datain(\inst|vga_control_unit|toggle_counter_sig_20 ),
9364         .ddiodatain(gnd),
9365         .oe(vcc),
9366         .outclk(gnd),
9367         .outclkena(vcc),
9368         .inclk(gnd),
9369         .inclkena(vcc),
9370         .areset(gnd),
9371         .sreset(gnd),
9372         .delayctrlin(gnd),
9373         .devclrn(devclrn),
9374         .devpor(devpor),
9375         .devoe(devoe),
9376         .combout(),
9377         .regout(),
9378         .ddioregout(),
9379         .padio(d_toggle_counter[20]),
9380         .dqsundelayedout());
9381 // synopsys translate_off
9382 defparam \inst|d_toggle_counter_out_20_~I .ddio_mode = "none";
9383 defparam \inst|d_toggle_counter_out_20_~I .input_async_reset = "none";
9384 defparam \inst|d_toggle_counter_out_20_~I .input_power_up = "low";
9385 defparam \inst|d_toggle_counter_out_20_~I .input_register_mode = "none";
9386 defparam \inst|d_toggle_counter_out_20_~I .input_sync_reset = "none";
9387 defparam \inst|d_toggle_counter_out_20_~I .oe_async_reset = "none";
9388 defparam \inst|d_toggle_counter_out_20_~I .oe_power_up = "low";
9389 defparam \inst|d_toggle_counter_out_20_~I .oe_register_mode = "none";
9390 defparam \inst|d_toggle_counter_out_20_~I .oe_sync_reset = "none";
9391 defparam \inst|d_toggle_counter_out_20_~I .operation_mode = "output";
9392 defparam \inst|d_toggle_counter_out_20_~I .output_async_reset = "none";
9393 defparam \inst|d_toggle_counter_out_20_~I .output_power_up = "low";
9394 defparam \inst|d_toggle_counter_out_20_~I .output_register_mode = "none";
9395 defparam \inst|d_toggle_counter_out_20_~I .output_sync_reset = "none";
9396 // synopsys translate_on
9397
9398 // atom is at PIN_G5
9399 stratix_io \inst|d_toggle_counter_out_19_~I (
9400         .datain(\inst|vga_control_unit|toggle_counter_sig_19 ),
9401         .ddiodatain(gnd),
9402         .oe(vcc),
9403         .outclk(gnd),
9404         .outclkena(vcc),
9405         .inclk(gnd),
9406         .inclkena(vcc),
9407         .areset(gnd),
9408         .sreset(gnd),
9409         .delayctrlin(gnd),
9410         .devclrn(devclrn),
9411         .devpor(devpor),
9412         .devoe(devoe),
9413         .combout(),
9414         .regout(),
9415         .ddioregout(),
9416         .padio(d_toggle_counter[19]),
9417         .dqsundelayedout());
9418 // synopsys translate_off
9419 defparam \inst|d_toggle_counter_out_19_~I .ddio_mode = "none";
9420 defparam \inst|d_toggle_counter_out_19_~I .input_async_reset = "none";
9421 defparam \inst|d_toggle_counter_out_19_~I .input_power_up = "low";
9422 defparam \inst|d_toggle_counter_out_19_~I .input_register_mode = "none";
9423 defparam \inst|d_toggle_counter_out_19_~I .input_sync_reset = "none";
9424 defparam \inst|d_toggle_counter_out_19_~I .oe_async_reset = "none";
9425 defparam \inst|d_toggle_counter_out_19_~I .oe_power_up = "low";
9426 defparam \inst|d_toggle_counter_out_19_~I .oe_register_mode = "none";
9427 defparam \inst|d_toggle_counter_out_19_~I .oe_sync_reset = "none";
9428 defparam \inst|d_toggle_counter_out_19_~I .operation_mode = "output";
9429 defparam \inst|d_toggle_counter_out_19_~I .output_async_reset = "none";
9430 defparam \inst|d_toggle_counter_out_19_~I .output_power_up = "low";
9431 defparam \inst|d_toggle_counter_out_19_~I .output_register_mode = "none";
9432 defparam \inst|d_toggle_counter_out_19_~I .output_sync_reset = "none";
9433 // synopsys translate_on
9434
9435 // atom is at PIN_G20
9436 stratix_io \inst|d_toggle_counter_out_18_~I (
9437         .datain(\inst|vga_control_unit|toggle_counter_sig_18 ),
9438         .ddiodatain(gnd),
9439         .oe(vcc),
9440         .outclk(gnd),
9441         .outclkena(vcc),
9442         .inclk(gnd),
9443         .inclkena(vcc),
9444         .areset(gnd),
9445         .sreset(gnd),
9446         .delayctrlin(gnd),
9447         .devclrn(devclrn),
9448         .devpor(devpor),
9449         .devoe(devoe),
9450         .combout(),
9451         .regout(),
9452         .ddioregout(),
9453         .padio(d_toggle_counter[18]),
9454         .dqsundelayedout());
9455 // synopsys translate_off
9456 defparam \inst|d_toggle_counter_out_18_~I .ddio_mode = "none";
9457 defparam \inst|d_toggle_counter_out_18_~I .input_async_reset = "none";
9458 defparam \inst|d_toggle_counter_out_18_~I .input_power_up = "low";
9459 defparam \inst|d_toggle_counter_out_18_~I .input_register_mode = "none";
9460 defparam \inst|d_toggle_counter_out_18_~I .input_sync_reset = "none";
9461 defparam \inst|d_toggle_counter_out_18_~I .oe_async_reset = "none";
9462 defparam \inst|d_toggle_counter_out_18_~I .oe_power_up = "low";
9463 defparam \inst|d_toggle_counter_out_18_~I .oe_register_mode = "none";
9464 defparam \inst|d_toggle_counter_out_18_~I .oe_sync_reset = "none";
9465 defparam \inst|d_toggle_counter_out_18_~I .operation_mode = "output";
9466 defparam \inst|d_toggle_counter_out_18_~I .output_async_reset = "none";
9467 defparam \inst|d_toggle_counter_out_18_~I .output_power_up = "low";
9468 defparam \inst|d_toggle_counter_out_18_~I .output_register_mode = "none";
9469 defparam \inst|d_toggle_counter_out_18_~I .output_sync_reset = "none";
9470 // synopsys translate_on
9471
9472 // atom is at PIN_G21
9473 stratix_io \inst|d_toggle_counter_out_17_~I (
9474         .datain(\inst|vga_control_unit|toggle_counter_sig_17 ),
9475         .ddiodatain(gnd),
9476         .oe(vcc),
9477         .outclk(gnd),
9478         .outclkena(vcc),
9479         .inclk(gnd),
9480         .inclkena(vcc),
9481         .areset(gnd),
9482         .sreset(gnd),
9483         .delayctrlin(gnd),
9484         .devclrn(devclrn),
9485         .devpor(devpor),
9486         .devoe(devoe),
9487         .combout(),
9488         .regout(),
9489         .ddioregout(),
9490         .padio(d_toggle_counter[17]),
9491         .dqsundelayedout());
9492 // synopsys translate_off
9493 defparam \inst|d_toggle_counter_out_17_~I .ddio_mode = "none";
9494 defparam \inst|d_toggle_counter_out_17_~I .input_async_reset = "none";
9495 defparam \inst|d_toggle_counter_out_17_~I .input_power_up = "low";
9496 defparam \inst|d_toggle_counter_out_17_~I .input_register_mode = "none";
9497 defparam \inst|d_toggle_counter_out_17_~I .input_sync_reset = "none";
9498 defparam \inst|d_toggle_counter_out_17_~I .oe_async_reset = "none";
9499 defparam \inst|d_toggle_counter_out_17_~I .oe_power_up = "low";
9500 defparam \inst|d_toggle_counter_out_17_~I .oe_register_mode = "none";
9501 defparam \inst|d_toggle_counter_out_17_~I .oe_sync_reset = "none";
9502 defparam \inst|d_toggle_counter_out_17_~I .operation_mode = "output";
9503 defparam \inst|d_toggle_counter_out_17_~I .output_async_reset = "none";
9504 defparam \inst|d_toggle_counter_out_17_~I .output_power_up = "low";
9505 defparam \inst|d_toggle_counter_out_17_~I .output_register_mode = "none";
9506 defparam \inst|d_toggle_counter_out_17_~I .output_sync_reset = "none";
9507 // synopsys translate_on
9508
9509 // atom is at PIN_G23
9510 stratix_io \inst|d_toggle_counter_out_16_~I (
9511         .datain(\inst|vga_control_unit|toggle_counter_sig_16 ),
9512         .ddiodatain(gnd),
9513         .oe(vcc),
9514         .outclk(gnd),
9515         .outclkena(vcc),
9516         .inclk(gnd),
9517         .inclkena(vcc),
9518         .areset(gnd),
9519         .sreset(gnd),
9520         .delayctrlin(gnd),
9521         .devclrn(devclrn),
9522         .devpor(devpor),
9523         .devoe(devoe),
9524         .combout(),
9525         .regout(),
9526         .ddioregout(),
9527         .padio(d_toggle_counter[16]),
9528         .dqsundelayedout());
9529 // synopsys translate_off
9530 defparam \inst|d_toggle_counter_out_16_~I .ddio_mode = "none";
9531 defparam \inst|d_toggle_counter_out_16_~I .input_async_reset = "none";
9532 defparam \inst|d_toggle_counter_out_16_~I .input_power_up = "low";
9533 defparam \inst|d_toggle_counter_out_16_~I .input_register_mode = "none";
9534 defparam \inst|d_toggle_counter_out_16_~I .input_sync_reset = "none";
9535 defparam \inst|d_toggle_counter_out_16_~I .oe_async_reset = "none";
9536 defparam \inst|d_toggle_counter_out_16_~I .oe_power_up = "low";
9537 defparam \inst|d_toggle_counter_out_16_~I .oe_register_mode = "none";
9538 defparam \inst|d_toggle_counter_out_16_~I .oe_sync_reset = "none";
9539 defparam \inst|d_toggle_counter_out_16_~I .operation_mode = "output";
9540 defparam \inst|d_toggle_counter_out_16_~I .output_async_reset = "none";
9541 defparam \inst|d_toggle_counter_out_16_~I .output_power_up = "low";
9542 defparam \inst|d_toggle_counter_out_16_~I .output_register_mode = "none";
9543 defparam \inst|d_toggle_counter_out_16_~I .output_sync_reset = "none";
9544 // synopsys translate_on
9545
9546 // atom is at PIN_G24
9547 stratix_io \inst|d_toggle_counter_out_15_~I (
9548         .datain(\inst|vga_control_unit|toggle_counter_sig_15 ),
9549         .ddiodatain(gnd),
9550         .oe(vcc),
9551         .outclk(gnd),
9552         .outclkena(vcc),
9553         .inclk(gnd),
9554         .inclkena(vcc),
9555         .areset(gnd),
9556         .sreset(gnd),
9557         .delayctrlin(gnd),
9558         .devclrn(devclrn),
9559         .devpor(devpor),
9560         .devoe(devoe),
9561         .combout(),
9562         .regout(),
9563         .ddioregout(),
9564         .padio(d_toggle_counter[15]),
9565         .dqsundelayedout());
9566 // synopsys translate_off
9567 defparam \inst|d_toggle_counter_out_15_~I .ddio_mode = "none";
9568 defparam \inst|d_toggle_counter_out_15_~I .input_async_reset = "none";
9569 defparam \inst|d_toggle_counter_out_15_~I .input_power_up = "low";
9570 defparam \inst|d_toggle_counter_out_15_~I .input_register_mode = "none";
9571 defparam \inst|d_toggle_counter_out_15_~I .input_sync_reset = "none";
9572 defparam \inst|d_toggle_counter_out_15_~I .oe_async_reset = "none";
9573 defparam \inst|d_toggle_counter_out_15_~I .oe_power_up = "low";
9574 defparam \inst|d_toggle_counter_out_15_~I .oe_register_mode = "none";
9575 defparam \inst|d_toggle_counter_out_15_~I .oe_sync_reset = "none";
9576 defparam \inst|d_toggle_counter_out_15_~I .operation_mode = "output";
9577 defparam \inst|d_toggle_counter_out_15_~I .output_async_reset = "none";
9578 defparam \inst|d_toggle_counter_out_15_~I .output_power_up = "low";
9579 defparam \inst|d_toggle_counter_out_15_~I .output_register_mode = "none";
9580 defparam \inst|d_toggle_counter_out_15_~I .output_sync_reset = "none";
9581 // synopsys translate_on
9582
9583 // atom is at PIN_AB21
9584 stratix_io \inst|d_toggle_counter_out_14_~I (
9585         .datain(\inst|vga_control_unit|toggle_counter_sig_14 ),
9586         .ddiodatain(gnd),
9587         .oe(vcc),
9588         .outclk(gnd),
9589         .outclkena(vcc),
9590         .inclk(gnd),
9591         .inclkena(vcc),
9592         .areset(gnd),
9593         .sreset(gnd),
9594         .delayctrlin(gnd),
9595         .devclrn(devclrn),
9596         .devpor(devpor),
9597         .devoe(devoe),
9598         .combout(),
9599         .regout(),
9600         .ddioregout(),
9601         .padio(d_toggle_counter[14]),
9602         .dqsundelayedout());
9603 // synopsys translate_off
9604 defparam \inst|d_toggle_counter_out_14_~I .ddio_mode = "none";
9605 defparam \inst|d_toggle_counter_out_14_~I .input_async_reset = "none";
9606 defparam \inst|d_toggle_counter_out_14_~I .input_power_up = "low";
9607 defparam \inst|d_toggle_counter_out_14_~I .input_register_mode = "none";
9608 defparam \inst|d_toggle_counter_out_14_~I .input_sync_reset = "none";
9609 defparam \inst|d_toggle_counter_out_14_~I .oe_async_reset = "none";
9610 defparam \inst|d_toggle_counter_out_14_~I .oe_power_up = "low";
9611 defparam \inst|d_toggle_counter_out_14_~I .oe_register_mode = "none";
9612 defparam \inst|d_toggle_counter_out_14_~I .oe_sync_reset = "none";
9613 defparam \inst|d_toggle_counter_out_14_~I .operation_mode = "output";
9614 defparam \inst|d_toggle_counter_out_14_~I .output_async_reset = "none";
9615 defparam \inst|d_toggle_counter_out_14_~I .output_power_up = "low";
9616 defparam \inst|d_toggle_counter_out_14_~I .output_register_mode = "none";
9617 defparam \inst|d_toggle_counter_out_14_~I .output_sync_reset = "none";
9618 // synopsys translate_on
9619
9620 // atom is at PIN_C20
9621 stratix_io \inst|d_toggle_counter_out_13_~I (
9622         .datain(\inst|vga_control_unit|toggle_counter_sig_13 ),
9623         .ddiodatain(gnd),
9624         .oe(vcc),
9625         .outclk(gnd),
9626         .outclkena(vcc),
9627         .inclk(gnd),
9628         .inclkena(vcc),
9629         .areset(gnd),
9630         .sreset(gnd),
9631         .delayctrlin(gnd),
9632         .devclrn(devclrn),
9633         .devpor(devpor),
9634         .devoe(devoe),
9635         .combout(),
9636         .regout(),
9637         .ddioregout(),
9638         .padio(d_toggle_counter[13]),
9639         .dqsundelayedout());
9640 // synopsys translate_off
9641 defparam \inst|d_toggle_counter_out_13_~I .ddio_mode = "none";
9642 defparam \inst|d_toggle_counter_out_13_~I .input_async_reset = "none";
9643 defparam \inst|d_toggle_counter_out_13_~I .input_power_up = "low";
9644 defparam \inst|d_toggle_counter_out_13_~I .input_register_mode = "none";
9645 defparam \inst|d_toggle_counter_out_13_~I .input_sync_reset = "none";
9646 defparam \inst|d_toggle_counter_out_13_~I .oe_async_reset = "none";
9647 defparam \inst|d_toggle_counter_out_13_~I .oe_power_up = "low";
9648 defparam \inst|d_toggle_counter_out_13_~I .oe_register_mode = "none";
9649 defparam \inst|d_toggle_counter_out_13_~I .oe_sync_reset = "none";
9650 defparam \inst|d_toggle_counter_out_13_~I .operation_mode = "output";
9651 defparam \inst|d_toggle_counter_out_13_~I .output_async_reset = "none";
9652 defparam \inst|d_toggle_counter_out_13_~I .output_power_up = "low";
9653 defparam \inst|d_toggle_counter_out_13_~I .output_register_mode = "none";
9654 defparam \inst|d_toggle_counter_out_13_~I .output_sync_reset = "none";
9655 // synopsys translate_on
9656
9657 // atom is at PIN_AA21
9658 stratix_io \inst|d_toggle_counter_out_12_~I (
9659         .datain(\inst|vga_control_unit|toggle_counter_sig_12 ),
9660         .ddiodatain(gnd),
9661         .oe(vcc),
9662         .outclk(gnd),
9663         .outclkena(vcc),
9664         .inclk(gnd),
9665         .inclkena(vcc),
9666         .areset(gnd),
9667         .sreset(gnd),
9668         .delayctrlin(gnd),
9669         .devclrn(devclrn),
9670         .devpor(devpor),
9671         .devoe(devoe),
9672         .combout(),
9673         .regout(),
9674         .ddioregout(),
9675         .padio(d_toggle_counter[12]),
9676         .dqsundelayedout());
9677 // synopsys translate_off
9678 defparam \inst|d_toggle_counter_out_12_~I .ddio_mode = "none";
9679 defparam \inst|d_toggle_counter_out_12_~I .input_async_reset = "none";
9680 defparam \inst|d_toggle_counter_out_12_~I .input_power_up = "low";
9681 defparam \inst|d_toggle_counter_out_12_~I .input_register_mode = "none";
9682 defparam \inst|d_toggle_counter_out_12_~I .input_sync_reset = "none";
9683 defparam \inst|d_toggle_counter_out_12_~I .oe_async_reset = "none";
9684 defparam \inst|d_toggle_counter_out_12_~I .oe_power_up = "low";
9685 defparam \inst|d_toggle_counter_out_12_~I .oe_register_mode = "none";
9686 defparam \inst|d_toggle_counter_out_12_~I .oe_sync_reset = "none";
9687 defparam \inst|d_toggle_counter_out_12_~I .operation_mode = "output";
9688 defparam \inst|d_toggle_counter_out_12_~I .output_async_reset = "none";
9689 defparam \inst|d_toggle_counter_out_12_~I .output_power_up = "low";
9690 defparam \inst|d_toggle_counter_out_12_~I .output_register_mode = "none";
9691 defparam \inst|d_toggle_counter_out_12_~I .output_sync_reset = "none";
9692 // synopsys translate_on
9693
9694 // atom is at PIN_AA26
9695 stratix_io \inst|d_toggle_counter_out_11_~I (
9696         .datain(\inst|vga_control_unit|toggle_counter_sig_11 ),
9697         .ddiodatain(gnd),
9698         .oe(vcc),
9699         .outclk(gnd),
9700         .outclkena(vcc),
9701         .inclk(gnd),
9702         .inclkena(vcc),
9703         .areset(gnd),
9704         .sreset(gnd),
9705         .delayctrlin(gnd),
9706         .devclrn(devclrn),
9707         .devpor(devpor),
9708         .devoe(devoe),
9709         .combout(),
9710         .regout(),
9711         .ddioregout(),
9712         .padio(d_toggle_counter[11]),
9713         .dqsundelayedout());
9714 // synopsys translate_off
9715 defparam \inst|d_toggle_counter_out_11_~I .ddio_mode = "none";
9716 defparam \inst|d_toggle_counter_out_11_~I .input_async_reset = "none";
9717 defparam \inst|d_toggle_counter_out_11_~I .input_power_up = "low";
9718 defparam \inst|d_toggle_counter_out_11_~I .input_register_mode = "none";
9719 defparam \inst|d_toggle_counter_out_11_~I .input_sync_reset = "none";
9720 defparam \inst|d_toggle_counter_out_11_~I .oe_async_reset = "none";
9721 defparam \inst|d_toggle_counter_out_11_~I .oe_power_up = "low";
9722 defparam \inst|d_toggle_counter_out_11_~I .oe_register_mode = "none";
9723 defparam \inst|d_toggle_counter_out_11_~I .oe_sync_reset = "none";
9724 defparam \inst|d_toggle_counter_out_11_~I .operation_mode = "output";
9725 defparam \inst|d_toggle_counter_out_11_~I .output_async_reset = "none";
9726 defparam \inst|d_toggle_counter_out_11_~I .output_power_up = "low";
9727 defparam \inst|d_toggle_counter_out_11_~I .output_register_mode = "none";
9728 defparam \inst|d_toggle_counter_out_11_~I .output_sync_reset = "none";
9729 // synopsys translate_on
9730
9731 // atom is at PIN_W24
9732 stratix_io \inst|d_toggle_counter_out_10_~I (
9733         .datain(\inst|vga_control_unit|toggle_counter_sig_10 ),
9734         .ddiodatain(gnd),
9735         .oe(vcc),
9736         .outclk(gnd),
9737         .outclkena(vcc),
9738         .inclk(gnd),
9739         .inclkena(vcc),
9740         .areset(gnd),
9741         .sreset(gnd),
9742         .delayctrlin(gnd),
9743         .devclrn(devclrn),
9744         .devpor(devpor),
9745         .devoe(devoe),
9746         .combout(),
9747         .regout(),
9748         .ddioregout(),
9749         .padio(d_toggle_counter[10]),
9750         .dqsundelayedout());
9751 // synopsys translate_off
9752 defparam \inst|d_toggle_counter_out_10_~I .ddio_mode = "none";
9753 defparam \inst|d_toggle_counter_out_10_~I .input_async_reset = "none";
9754 defparam \inst|d_toggle_counter_out_10_~I .input_power_up = "low";
9755 defparam \inst|d_toggle_counter_out_10_~I .input_register_mode = "none";
9756 defparam \inst|d_toggle_counter_out_10_~I .input_sync_reset = "none";
9757 defparam \inst|d_toggle_counter_out_10_~I .oe_async_reset = "none";
9758 defparam \inst|d_toggle_counter_out_10_~I .oe_power_up = "low";
9759 defparam \inst|d_toggle_counter_out_10_~I .oe_register_mode = "none";
9760 defparam \inst|d_toggle_counter_out_10_~I .oe_sync_reset = "none";
9761 defparam \inst|d_toggle_counter_out_10_~I .operation_mode = "output";
9762 defparam \inst|d_toggle_counter_out_10_~I .output_async_reset = "none";
9763 defparam \inst|d_toggle_counter_out_10_~I .output_power_up = "low";
9764 defparam \inst|d_toggle_counter_out_10_~I .output_register_mode = "none";
9765 defparam \inst|d_toggle_counter_out_10_~I .output_sync_reset = "none";
9766 // synopsys translate_on
9767
9768 // atom is at PIN_AF22
9769 stratix_io \inst|d_toggle_counter_out_9_~I (
9770         .datain(\inst|vga_control_unit|toggle_counter_sig_9 ),
9771         .ddiodatain(gnd),
9772         .oe(vcc),
9773         .outclk(gnd),
9774         .outclkena(vcc),
9775         .inclk(gnd),
9776         .inclkena(vcc),
9777         .areset(gnd),
9778         .sreset(gnd),
9779         .delayctrlin(gnd),
9780         .devclrn(devclrn),
9781         .devpor(devpor),
9782         .devoe(devoe),
9783         .combout(),
9784         .regout(),
9785         .ddioregout(),
9786         .padio(d_toggle_counter[9]),
9787         .dqsundelayedout());
9788 // synopsys translate_off
9789 defparam \inst|d_toggle_counter_out_9_~I .ddio_mode = "none";
9790 defparam \inst|d_toggle_counter_out_9_~I .input_async_reset = "none";
9791 defparam \inst|d_toggle_counter_out_9_~I .input_power_up = "low";
9792 defparam \inst|d_toggle_counter_out_9_~I .input_register_mode = "none";
9793 defparam \inst|d_toggle_counter_out_9_~I .input_sync_reset = "none";
9794 defparam \inst|d_toggle_counter_out_9_~I .oe_async_reset = "none";
9795 defparam \inst|d_toggle_counter_out_9_~I .oe_power_up = "low";
9796 defparam \inst|d_toggle_counter_out_9_~I .oe_register_mode = "none";
9797 defparam \inst|d_toggle_counter_out_9_~I .oe_sync_reset = "none";
9798 defparam \inst|d_toggle_counter_out_9_~I .operation_mode = "output";
9799 defparam \inst|d_toggle_counter_out_9_~I .output_async_reset = "none";
9800 defparam \inst|d_toggle_counter_out_9_~I .output_power_up = "low";
9801 defparam \inst|d_toggle_counter_out_9_~I .output_register_mode = "none";
9802 defparam \inst|d_toggle_counter_out_9_~I .output_sync_reset = "none";
9803 // synopsys translate_on
9804
9805 // atom is at PIN_W22
9806 stratix_io \inst|d_toggle_counter_out_8_~I (
9807         .datain(\inst|vga_control_unit|toggle_counter_sig_8 ),
9808         .ddiodatain(gnd),
9809         .oe(vcc),
9810         .outclk(gnd),
9811         .outclkena(vcc),
9812         .inclk(gnd),
9813         .inclkena(vcc),
9814         .areset(gnd),
9815         .sreset(gnd),
9816         .delayctrlin(gnd),
9817         .devclrn(devclrn),
9818         .devpor(devpor),
9819         .devoe(devoe),
9820         .combout(),
9821         .regout(),
9822         .ddioregout(),
9823         .padio(d_toggle_counter[8]),
9824         .dqsundelayedout());
9825 // synopsys translate_off
9826 defparam \inst|d_toggle_counter_out_8_~I .ddio_mode = "none";
9827 defparam \inst|d_toggle_counter_out_8_~I .input_async_reset = "none";
9828 defparam \inst|d_toggle_counter_out_8_~I .input_power_up = "low";
9829 defparam \inst|d_toggle_counter_out_8_~I .input_register_mode = "none";
9830 defparam \inst|d_toggle_counter_out_8_~I .input_sync_reset = "none";
9831 defparam \inst|d_toggle_counter_out_8_~I .oe_async_reset = "none";
9832 defparam \inst|d_toggle_counter_out_8_~I .oe_power_up = "low";
9833 defparam \inst|d_toggle_counter_out_8_~I .oe_register_mode = "none";
9834 defparam \inst|d_toggle_counter_out_8_~I .oe_sync_reset = "none";
9835 defparam \inst|d_toggle_counter_out_8_~I .operation_mode = "output";
9836 defparam \inst|d_toggle_counter_out_8_~I .output_async_reset = "none";
9837 defparam \inst|d_toggle_counter_out_8_~I .output_power_up = "low";
9838 defparam \inst|d_toggle_counter_out_8_~I .output_register_mode = "none";
9839 defparam \inst|d_toggle_counter_out_8_~I .output_sync_reset = "none";
9840 // synopsys translate_on
9841
9842 // atom is at PIN_AE22
9843 stratix_io \inst|d_toggle_counter_out_7_~I (
9844         .datain(\inst|vga_control_unit|toggle_counter_sig_7 ),
9845         .ddiodatain(gnd),
9846         .oe(vcc),
9847         .outclk(gnd),
9848         .outclkena(vcc),
9849         .inclk(gnd),
9850         .inclkena(vcc),
9851         .areset(gnd),
9852         .sreset(gnd),
9853         .delayctrlin(gnd),
9854         .devclrn(devclrn),
9855         .devpor(devpor),
9856         .devoe(devoe),
9857         .combout(),
9858         .regout(),
9859         .ddioregout(),
9860         .padio(d_toggle_counter[7]),
9861         .dqsundelayedout());
9862 // synopsys translate_off
9863 defparam \inst|d_toggle_counter_out_7_~I .ddio_mode = "none";
9864 defparam \inst|d_toggle_counter_out_7_~I .input_async_reset = "none";
9865 defparam \inst|d_toggle_counter_out_7_~I .input_power_up = "low";
9866 defparam \inst|d_toggle_counter_out_7_~I .input_register_mode = "none";
9867 defparam \inst|d_toggle_counter_out_7_~I .input_sync_reset = "none";
9868 defparam \inst|d_toggle_counter_out_7_~I .oe_async_reset = "none";
9869 defparam \inst|d_toggle_counter_out_7_~I .oe_power_up = "low";
9870 defparam \inst|d_toggle_counter_out_7_~I .oe_register_mode = "none";
9871 defparam \inst|d_toggle_counter_out_7_~I .oe_sync_reset = "none";
9872 defparam \inst|d_toggle_counter_out_7_~I .operation_mode = "output";
9873 defparam \inst|d_toggle_counter_out_7_~I .output_async_reset = "none";
9874 defparam \inst|d_toggle_counter_out_7_~I .output_power_up = "low";
9875 defparam \inst|d_toggle_counter_out_7_~I .output_register_mode = "none";
9876 defparam \inst|d_toggle_counter_out_7_~I .output_sync_reset = "none";
9877 // synopsys translate_on
9878
9879 // atom is at PIN_B3
9880 stratix_io \inst|d_toggle_counter_out_6_~I (
9881         .datain(\inst|vga_control_unit|toggle_counter_sig_6 ),
9882         .ddiodatain(gnd),
9883         .oe(vcc),
9884         .outclk(gnd),
9885         .outclkena(vcc),
9886         .inclk(gnd),
9887         .inclkena(vcc),
9888         .areset(gnd),
9889         .sreset(gnd),
9890         .delayctrlin(gnd),
9891         .devclrn(devclrn),
9892         .devpor(devpor),
9893         .devoe(devoe),
9894         .combout(),
9895         .regout(),
9896         .ddioregout(),
9897         .padio(d_toggle_counter[6]),
9898         .dqsundelayedout());
9899 // synopsys translate_off
9900 defparam \inst|d_toggle_counter_out_6_~I .ddio_mode = "none";
9901 defparam \inst|d_toggle_counter_out_6_~I .input_async_reset = "none";
9902 defparam \inst|d_toggle_counter_out_6_~I .input_power_up = "low";
9903 defparam \inst|d_toggle_counter_out_6_~I .input_register_mode = "none";
9904 defparam \inst|d_toggle_counter_out_6_~I .input_sync_reset = "none";
9905 defparam \inst|d_toggle_counter_out_6_~I .oe_async_reset = "none";
9906 defparam \inst|d_toggle_counter_out_6_~I .oe_power_up = "low";
9907 defparam \inst|d_toggle_counter_out_6_~I .oe_register_mode = "none";
9908 defparam \inst|d_toggle_counter_out_6_~I .oe_sync_reset = "none";
9909 defparam \inst|d_toggle_counter_out_6_~I .operation_mode = "output";
9910 defparam \inst|d_toggle_counter_out_6_~I .output_async_reset = "none";
9911 defparam \inst|d_toggle_counter_out_6_~I .output_power_up = "low";
9912 defparam \inst|d_toggle_counter_out_6_~I .output_register_mode = "none";
9913 defparam \inst|d_toggle_counter_out_6_~I .output_sync_reset = "none";
9914 // synopsys translate_on
9915
9916 // atom is at PIN_AC21
9917 stratix_io \inst|d_toggle_counter_out_5_~I (
9918         .datain(\inst|vga_control_unit|toggle_counter_sig_5 ),
9919         .ddiodatain(gnd),
9920         .oe(vcc),
9921         .outclk(gnd),
9922         .outclkena(vcc),
9923         .inclk(gnd),
9924         .inclkena(vcc),
9925         .areset(gnd),
9926         .sreset(gnd),
9927         .delayctrlin(gnd),
9928         .devclrn(devclrn),
9929         .devpor(devpor),
9930         .devoe(devoe),
9931         .combout(),
9932         .regout(),
9933         .ddioregout(),
9934         .padio(d_toggle_counter[5]),
9935         .dqsundelayedout());
9936 // synopsys translate_off
9937 defparam \inst|d_toggle_counter_out_5_~I .ddio_mode = "none";
9938 defparam \inst|d_toggle_counter_out_5_~I .input_async_reset = "none";
9939 defparam \inst|d_toggle_counter_out_5_~I .input_power_up = "low";
9940 defparam \inst|d_toggle_counter_out_5_~I .input_register_mode = "none";
9941 defparam \inst|d_toggle_counter_out_5_~I .input_sync_reset = "none";
9942 defparam \inst|d_toggle_counter_out_5_~I .oe_async_reset = "none";
9943 defparam \inst|d_toggle_counter_out_5_~I .oe_power_up = "low";
9944 defparam \inst|d_toggle_counter_out_5_~I .oe_register_mode = "none";
9945 defparam \inst|d_toggle_counter_out_5_~I .oe_sync_reset = "none";
9946 defparam \inst|d_toggle_counter_out_5_~I .operation_mode = "output";
9947 defparam \inst|d_toggle_counter_out_5_~I .output_async_reset = "none";
9948 defparam \inst|d_toggle_counter_out_5_~I .output_power_up = "low";
9949 defparam \inst|d_toggle_counter_out_5_~I .output_register_mode = "none";
9950 defparam \inst|d_toggle_counter_out_5_~I .output_sync_reset = "none";
9951 // synopsys translate_on
9952
9953 // atom is at PIN_AF24
9954 stratix_io \inst|d_toggle_counter_out_4_~I (
9955         .datain(\inst|vga_control_unit|toggle_counter_sig_4 ),
9956         .ddiodatain(gnd),
9957         .oe(vcc),
9958         .outclk(gnd),
9959         .outclkena(vcc),
9960         .inclk(gnd),
9961         .inclkena(vcc),
9962         .areset(gnd),
9963         .sreset(gnd),
9964         .delayctrlin(gnd),
9965         .devclrn(devclrn),
9966         .devpor(devpor),
9967         .devoe(devoe),
9968         .combout(),
9969         .regout(),
9970         .ddioregout(),
9971         .padio(d_toggle_counter[4]),
9972         .dqsundelayedout());
9973 // synopsys translate_off
9974 defparam \inst|d_toggle_counter_out_4_~I .ddio_mode = "none";
9975 defparam \inst|d_toggle_counter_out_4_~I .input_async_reset = "none";
9976 defparam \inst|d_toggle_counter_out_4_~I .input_power_up = "low";
9977 defparam \inst|d_toggle_counter_out_4_~I .input_register_mode = "none";
9978 defparam \inst|d_toggle_counter_out_4_~I .input_sync_reset = "none";
9979 defparam \inst|d_toggle_counter_out_4_~I .oe_async_reset = "none";
9980 defparam \inst|d_toggle_counter_out_4_~I .oe_power_up = "low";
9981 defparam \inst|d_toggle_counter_out_4_~I .oe_register_mode = "none";
9982 defparam \inst|d_toggle_counter_out_4_~I .oe_sync_reset = "none";
9983 defparam \inst|d_toggle_counter_out_4_~I .operation_mode = "output";
9984 defparam \inst|d_toggle_counter_out_4_~I .output_async_reset = "none";
9985 defparam \inst|d_toggle_counter_out_4_~I .output_power_up = "low";
9986 defparam \inst|d_toggle_counter_out_4_~I .output_register_mode = "none";
9987 defparam \inst|d_toggle_counter_out_4_~I .output_sync_reset = "none";
9988 // synopsys translate_on
9989
9990 // atom is at PIN_A24
9991 stratix_io \inst|d_toggle_counter_out_3_~I (
9992         .datain(\inst|vga_control_unit|toggle_counter_sig_3 ),
9993         .ddiodatain(gnd),
9994         .oe(vcc),
9995         .outclk(gnd),
9996         .outclkena(vcc),
9997         .inclk(gnd),
9998         .inclkena(vcc),
9999         .areset(gnd),
10000         .sreset(gnd),
10001         .delayctrlin(gnd),
10002         .devclrn(devclrn),
10003         .devpor(devpor),
10004         .devoe(devoe),
10005         .combout(),
10006         .regout(),
10007         .ddioregout(),
10008         .padio(d_toggle_counter[3]),
10009         .dqsundelayedout());
10010 // synopsys translate_off
10011 defparam \inst|d_toggle_counter_out_3_~I .ddio_mode = "none";
10012 defparam \inst|d_toggle_counter_out_3_~I .input_async_reset = "none";
10013 defparam \inst|d_toggle_counter_out_3_~I .input_power_up = "low";
10014 defparam \inst|d_toggle_counter_out_3_~I .input_register_mode = "none";
10015 defparam \inst|d_toggle_counter_out_3_~I .input_sync_reset = "none";
10016 defparam \inst|d_toggle_counter_out_3_~I .oe_async_reset = "none";
10017 defparam \inst|d_toggle_counter_out_3_~I .oe_power_up = "low";
10018 defparam \inst|d_toggle_counter_out_3_~I .oe_register_mode = "none";
10019 defparam \inst|d_toggle_counter_out_3_~I .oe_sync_reset = "none";
10020 defparam \inst|d_toggle_counter_out_3_~I .operation_mode = "output";
10021 defparam \inst|d_toggle_counter_out_3_~I .output_async_reset = "none";
10022 defparam \inst|d_toggle_counter_out_3_~I .output_power_up = "low";
10023 defparam \inst|d_toggle_counter_out_3_~I .output_register_mode = "none";
10024 defparam \inst|d_toggle_counter_out_3_~I .output_sync_reset = "none";
10025 // synopsys translate_on
10026
10027 // atom is at PIN_B23
10028 stratix_io \inst|d_toggle_counter_out_2_~I (
10029         .datain(\inst|vga_control_unit|toggle_counter_sig_2 ),
10030         .ddiodatain(gnd),
10031         .oe(vcc),
10032         .outclk(gnd),
10033         .outclkena(vcc),
10034         .inclk(gnd),
10035         .inclkena(vcc),
10036         .areset(gnd),
10037         .sreset(gnd),
10038         .delayctrlin(gnd),
10039         .devclrn(devclrn),
10040         .devpor(devpor),
10041         .devoe(devoe),
10042         .combout(),
10043         .regout(),
10044         .ddioregout(),
10045         .padio(d_toggle_counter[2]),
10046         .dqsundelayedout());
10047 // synopsys translate_off
10048 defparam \inst|d_toggle_counter_out_2_~I .ddio_mode = "none";
10049 defparam \inst|d_toggle_counter_out_2_~I .input_async_reset = "none";
10050 defparam \inst|d_toggle_counter_out_2_~I .input_power_up = "low";
10051 defparam \inst|d_toggle_counter_out_2_~I .input_register_mode = "none";
10052 defparam \inst|d_toggle_counter_out_2_~I .input_sync_reset = "none";
10053 defparam \inst|d_toggle_counter_out_2_~I .oe_async_reset = "none";
10054 defparam \inst|d_toggle_counter_out_2_~I .oe_power_up = "low";
10055 defparam \inst|d_toggle_counter_out_2_~I .oe_register_mode = "none";
10056 defparam \inst|d_toggle_counter_out_2_~I .oe_sync_reset = "none";
10057 defparam \inst|d_toggle_counter_out_2_~I .operation_mode = "output";
10058 defparam \inst|d_toggle_counter_out_2_~I .output_async_reset = "none";
10059 defparam \inst|d_toggle_counter_out_2_~I .output_power_up = "low";
10060 defparam \inst|d_toggle_counter_out_2_~I .output_register_mode = "none";
10061 defparam \inst|d_toggle_counter_out_2_~I .output_sync_reset = "none";
10062 // synopsys translate_on
10063
10064 // atom is at PIN_W21
10065 stratix_io \inst|d_toggle_counter_out_1_~I (
10066         .datain(\inst|vga_control_unit|toggle_counter_sig_1 ),
10067         .ddiodatain(gnd),
10068         .oe(vcc),
10069         .outclk(gnd),
10070         .outclkena(vcc),
10071         .inclk(gnd),
10072         .inclkena(vcc),
10073         .areset(gnd),
10074         .sreset(gnd),
10075         .delayctrlin(gnd),
10076         .devclrn(devclrn),
10077         .devpor(devpor),
10078         .devoe(devoe),
10079         .combout(),
10080         .regout(),
10081         .ddioregout(),
10082         .padio(d_toggle_counter[1]),
10083         .dqsundelayedout());
10084 // synopsys translate_off
10085 defparam \inst|d_toggle_counter_out_1_~I .ddio_mode = "none";
10086 defparam \inst|d_toggle_counter_out_1_~I .input_async_reset = "none";
10087 defparam \inst|d_toggle_counter_out_1_~I .input_power_up = "low";
10088 defparam \inst|d_toggle_counter_out_1_~I .input_register_mode = "none";
10089 defparam \inst|d_toggle_counter_out_1_~I .input_sync_reset = "none";
10090 defparam \inst|d_toggle_counter_out_1_~I .oe_async_reset = "none";
10091 defparam \inst|d_toggle_counter_out_1_~I .oe_power_up = "low";
10092 defparam \inst|d_toggle_counter_out_1_~I .oe_register_mode = "none";
10093 defparam \inst|d_toggle_counter_out_1_~I .oe_sync_reset = "none";
10094 defparam \inst|d_toggle_counter_out_1_~I .operation_mode = "output";
10095 defparam \inst|d_toggle_counter_out_1_~I .output_async_reset = "none";
10096 defparam \inst|d_toggle_counter_out_1_~I .output_power_up = "low";
10097 defparam \inst|d_toggle_counter_out_1_~I .output_register_mode = "none";
10098 defparam \inst|d_toggle_counter_out_1_~I .output_sync_reset = "none";
10099 // synopsys translate_on
10100
10101 // atom is at PIN_H26
10102 stratix_io \inst|d_toggle_counter_out_0_~I (
10103         .datain(\inst|vga_control_unit|toggle_counter_sig_0 ),
10104         .ddiodatain(gnd),
10105         .oe(vcc),
10106         .outclk(gnd),
10107         .outclkena(vcc),
10108         .inclk(gnd),
10109         .inclkena(vcc),
10110         .areset(gnd),
10111         .sreset(gnd),
10112         .delayctrlin(gnd),
10113         .devclrn(devclrn),
10114         .devpor(devpor),
10115         .devoe(devoe),
10116         .combout(),
10117         .regout(),
10118         .ddioregout(),
10119         .padio(d_toggle_counter[0]),
10120         .dqsundelayedout());
10121 // synopsys translate_off
10122 defparam \inst|d_toggle_counter_out_0_~I .ddio_mode = "none";
10123 defparam \inst|d_toggle_counter_out_0_~I .input_async_reset = "none";
10124 defparam \inst|d_toggle_counter_out_0_~I .input_power_up = "low";
10125 defparam \inst|d_toggle_counter_out_0_~I .input_register_mode = "none";
10126 defparam \inst|d_toggle_counter_out_0_~I .input_sync_reset = "none";
10127 defparam \inst|d_toggle_counter_out_0_~I .oe_async_reset = "none";
10128 defparam \inst|d_toggle_counter_out_0_~I .oe_power_up = "low";
10129 defparam \inst|d_toggle_counter_out_0_~I .oe_register_mode = "none";
10130 defparam \inst|d_toggle_counter_out_0_~I .oe_sync_reset = "none";
10131 defparam \inst|d_toggle_counter_out_0_~I .operation_mode = "output";
10132 defparam \inst|d_toggle_counter_out_0_~I .output_async_reset = "none";
10133 defparam \inst|d_toggle_counter_out_0_~I .output_power_up = "low";
10134 defparam \inst|d_toggle_counter_out_0_~I .output_register_mode = "none";
10135 defparam \inst|d_toggle_counter_out_0_~I .output_sync_reset = "none";
10136 // synopsys translate_on
10137
10138 // atom is at PIN_G2
10139 stratix_io \inst|d_vsync_counter_out_9_~I (
10140         .datain(\inst|vga_driver_unit|vsync_counter_9 ),
10141         .ddiodatain(gnd),
10142         .oe(vcc),
10143         .outclk(gnd),
10144         .outclkena(vcc),
10145         .inclk(gnd),
10146         .inclkena(vcc),
10147         .areset(gnd),
10148         .sreset(gnd),
10149         .delayctrlin(gnd),
10150         .devclrn(devclrn),
10151         .devpor(devpor),
10152         .devoe(devoe),
10153         .combout(),
10154         .regout(),
10155         .ddioregout(),
10156         .padio(d_vsync_counter[9]),
10157         .dqsundelayedout());
10158 // synopsys translate_off
10159 defparam \inst|d_vsync_counter_out_9_~I .ddio_mode = "none";
10160 defparam \inst|d_vsync_counter_out_9_~I .input_async_reset = "none";
10161 defparam \inst|d_vsync_counter_out_9_~I .input_power_up = "low";
10162 defparam \inst|d_vsync_counter_out_9_~I .input_register_mode = "none";
10163 defparam \inst|d_vsync_counter_out_9_~I .input_sync_reset = "none";
10164 defparam \inst|d_vsync_counter_out_9_~I .oe_async_reset = "none";
10165 defparam \inst|d_vsync_counter_out_9_~I .oe_power_up = "low";
10166 defparam \inst|d_vsync_counter_out_9_~I .oe_register_mode = "none";
10167 defparam \inst|d_vsync_counter_out_9_~I .oe_sync_reset = "none";
10168 defparam \inst|d_vsync_counter_out_9_~I .operation_mode = "output";
10169 defparam \inst|d_vsync_counter_out_9_~I .output_async_reset = "none";
10170 defparam \inst|d_vsync_counter_out_9_~I .output_power_up = "low";
10171 defparam \inst|d_vsync_counter_out_9_~I .output_register_mode = "none";
10172 defparam \inst|d_vsync_counter_out_9_~I .output_sync_reset = "none";
10173 // synopsys translate_on
10174
10175 // atom is at PIN_G4
10176 stratix_io \inst|d_vsync_counter_out_8_~I (
10177         .datain(\inst|vga_driver_unit|vsync_counter_8 ),
10178         .ddiodatain(gnd),
10179         .oe(vcc),
10180         .outclk(gnd),
10181         .outclkena(vcc),
10182         .inclk(gnd),
10183         .inclkena(vcc),
10184         .areset(gnd),
10185         .sreset(gnd),
10186         .delayctrlin(gnd),
10187         .devclrn(devclrn),
10188         .devpor(devpor),
10189         .devoe(devoe),
10190         .combout(),
10191         .regout(),
10192         .ddioregout(),
10193         .padio(d_vsync_counter[8]),
10194         .dqsundelayedout());
10195 // synopsys translate_off
10196 defparam \inst|d_vsync_counter_out_8_~I .ddio_mode = "none";
10197 defparam \inst|d_vsync_counter_out_8_~I .input_async_reset = "none";
10198 defparam \inst|d_vsync_counter_out_8_~I .input_power_up = "low";
10199 defparam \inst|d_vsync_counter_out_8_~I .input_register_mode = "none";
10200 defparam \inst|d_vsync_counter_out_8_~I .input_sync_reset = "none";
10201 defparam \inst|d_vsync_counter_out_8_~I .oe_async_reset = "none";
10202 defparam \inst|d_vsync_counter_out_8_~I .oe_power_up = "low";
10203 defparam \inst|d_vsync_counter_out_8_~I .oe_register_mode = "none";
10204 defparam \inst|d_vsync_counter_out_8_~I .oe_sync_reset = "none";
10205 defparam \inst|d_vsync_counter_out_8_~I .operation_mode = "output";
10206 defparam \inst|d_vsync_counter_out_8_~I .output_async_reset = "none";
10207 defparam \inst|d_vsync_counter_out_8_~I .output_power_up = "low";
10208 defparam \inst|d_vsync_counter_out_8_~I .output_register_mode = "none";
10209 defparam \inst|d_vsync_counter_out_8_~I .output_sync_reset = "none";
10210 // synopsys translate_on
10211
10212 // atom is at PIN_G6
10213 stratix_io \inst|d_vsync_counter_out_7_~I (
10214         .datain(\inst|vga_driver_unit|vsync_counter_7 ),
10215         .ddiodatain(gnd),
10216         .oe(vcc),
10217         .outclk(gnd),
10218         .outclkena(vcc),
10219         .inclk(gnd),
10220         .inclkena(vcc),
10221         .areset(gnd),
10222         .sreset(gnd),
10223         .delayctrlin(gnd),
10224         .devclrn(devclrn),
10225         .devpor(devpor),
10226         .devoe(devoe),
10227         .combout(),
10228         .regout(),
10229         .ddioregout(),
10230         .padio(d_vsync_counter[7]),
10231         .dqsundelayedout());
10232 // synopsys translate_off
10233 defparam \inst|d_vsync_counter_out_7_~I .ddio_mode = "none";
10234 defparam \inst|d_vsync_counter_out_7_~I .input_async_reset = "none";
10235 defparam \inst|d_vsync_counter_out_7_~I .input_power_up = "low";
10236 defparam \inst|d_vsync_counter_out_7_~I .input_register_mode = "none";
10237 defparam \inst|d_vsync_counter_out_7_~I .input_sync_reset = "none";
10238 defparam \inst|d_vsync_counter_out_7_~I .oe_async_reset = "none";
10239 defparam \inst|d_vsync_counter_out_7_~I .oe_power_up = "low";
10240 defparam \inst|d_vsync_counter_out_7_~I .oe_register_mode = "none";
10241 defparam \inst|d_vsync_counter_out_7_~I .oe_sync_reset = "none";
10242 defparam \inst|d_vsync_counter_out_7_~I .operation_mode = "output";
10243 defparam \inst|d_vsync_counter_out_7_~I .output_async_reset = "none";
10244 defparam \inst|d_vsync_counter_out_7_~I .output_power_up = "low";
10245 defparam \inst|d_vsync_counter_out_7_~I .output_register_mode = "none";
10246 defparam \inst|d_vsync_counter_out_7_~I .output_sync_reset = "none";
10247 // synopsys translate_on
10248
10249 // atom is at PIN_J4
10250 stratix_io \inst|d_vsync_counter_out_6_~I (
10251         .datain(\inst|vga_driver_unit|vsync_counter_6 ),
10252         .ddiodatain(gnd),
10253         .oe(vcc),
10254         .outclk(gnd),
10255         .outclkena(vcc),
10256         .inclk(gnd),
10257         .inclkena(vcc),
10258         .areset(gnd),
10259         .sreset(gnd),
10260         .delayctrlin(gnd),
10261         .devclrn(devclrn),
10262         .devpor(devpor),
10263         .devoe(devoe),
10264         .combout(),
10265         .regout(),
10266         .ddioregout(),
10267         .padio(d_vsync_counter[6]),
10268         .dqsundelayedout());
10269 // synopsys translate_off
10270 defparam \inst|d_vsync_counter_out_6_~I .ddio_mode = "none";
10271 defparam \inst|d_vsync_counter_out_6_~I .input_async_reset = "none";
10272 defparam \inst|d_vsync_counter_out_6_~I .input_power_up = "low";
10273 defparam \inst|d_vsync_counter_out_6_~I .input_register_mode = "none";
10274 defparam \inst|d_vsync_counter_out_6_~I .input_sync_reset = "none";
10275 defparam \inst|d_vsync_counter_out_6_~I .oe_async_reset = "none";
10276 defparam \inst|d_vsync_counter_out_6_~I .oe_power_up = "low";
10277 defparam \inst|d_vsync_counter_out_6_~I .oe_register_mode = "none";
10278 defparam \inst|d_vsync_counter_out_6_~I .oe_sync_reset = "none";
10279 defparam \inst|d_vsync_counter_out_6_~I .operation_mode = "output";
10280 defparam \inst|d_vsync_counter_out_6_~I .output_async_reset = "none";
10281 defparam \inst|d_vsync_counter_out_6_~I .output_power_up = "low";
10282 defparam \inst|d_vsync_counter_out_6_~I .output_register_mode = "none";
10283 defparam \inst|d_vsync_counter_out_6_~I .output_sync_reset = "none";
10284 // synopsys translate_on
10285
10286 // atom is at PIN_G11
10287 stratix_io \inst|d_vsync_counter_out_5_~I (
10288         .datain(\inst|vga_driver_unit|vsync_counter_5 ),
10289         .ddiodatain(gnd),
10290         .oe(vcc),
10291         .outclk(gnd),
10292         .outclkena(vcc),
10293         .inclk(gnd),
10294         .inclkena(vcc),
10295         .areset(gnd),
10296         .sreset(gnd),
10297         .delayctrlin(gnd),
10298         .devclrn(devclrn),
10299         .devpor(devpor),
10300         .devoe(devoe),
10301         .combout(),
10302         .regout(),
10303         .ddioregout(),
10304         .padio(d_vsync_counter[5]),
10305         .dqsundelayedout());
10306 // synopsys translate_off
10307 defparam \inst|d_vsync_counter_out_5_~I .ddio_mode = "none";
10308 defparam \inst|d_vsync_counter_out_5_~I .input_async_reset = "none";
10309 defparam \inst|d_vsync_counter_out_5_~I .input_power_up = "low";
10310 defparam \inst|d_vsync_counter_out_5_~I .input_register_mode = "none";
10311 defparam \inst|d_vsync_counter_out_5_~I .input_sync_reset = "none";
10312 defparam \inst|d_vsync_counter_out_5_~I .oe_async_reset = "none";
10313 defparam \inst|d_vsync_counter_out_5_~I .oe_power_up = "low";
10314 defparam \inst|d_vsync_counter_out_5_~I .oe_register_mode = "none";
10315 defparam \inst|d_vsync_counter_out_5_~I .oe_sync_reset = "none";
10316 defparam \inst|d_vsync_counter_out_5_~I .operation_mode = "output";
10317 defparam \inst|d_vsync_counter_out_5_~I .output_async_reset = "none";
10318 defparam \inst|d_vsync_counter_out_5_~I .output_power_up = "low";
10319 defparam \inst|d_vsync_counter_out_5_~I .output_register_mode = "none";
10320 defparam \inst|d_vsync_counter_out_5_~I .output_sync_reset = "none";
10321 // synopsys translate_on
10322
10323 // atom is at PIN_AD11
10324 stratix_io \inst|d_vsync_counter_out_4_~I (
10325         .datain(\inst|vga_driver_unit|vsync_counter_4 ),
10326         .ddiodatain(gnd),
10327         .oe(vcc),
10328         .outclk(gnd),
10329         .outclkena(vcc),
10330         .inclk(gnd),
10331         .inclkena(vcc),
10332         .areset(gnd),
10333         .sreset(gnd),
10334         .delayctrlin(gnd),
10335         .devclrn(devclrn),
10336         .devpor(devpor),
10337         .devoe(devoe),
10338         .combout(),
10339         .regout(),
10340         .ddioregout(),
10341         .padio(d_vsync_counter[4]),
10342         .dqsundelayedout());
10343 // synopsys translate_off
10344 defparam \inst|d_vsync_counter_out_4_~I .ddio_mode = "none";
10345 defparam \inst|d_vsync_counter_out_4_~I .input_async_reset = "none";
10346 defparam \inst|d_vsync_counter_out_4_~I .input_power_up = "low";
10347 defparam \inst|d_vsync_counter_out_4_~I .input_register_mode = "none";
10348 defparam \inst|d_vsync_counter_out_4_~I .input_sync_reset = "none";
10349 defparam \inst|d_vsync_counter_out_4_~I .oe_async_reset = "none";
10350 defparam \inst|d_vsync_counter_out_4_~I .oe_power_up = "low";
10351 defparam \inst|d_vsync_counter_out_4_~I .oe_register_mode = "none";
10352 defparam \inst|d_vsync_counter_out_4_~I .oe_sync_reset = "none";
10353 defparam \inst|d_vsync_counter_out_4_~I .operation_mode = "output";
10354 defparam \inst|d_vsync_counter_out_4_~I .output_async_reset = "none";
10355 defparam \inst|d_vsync_counter_out_4_~I .output_power_up = "low";
10356 defparam \inst|d_vsync_counter_out_4_~I .output_register_mode = "none";
10357 defparam \inst|d_vsync_counter_out_4_~I .output_sync_reset = "none";
10358 // synopsys translate_on
10359
10360 // atom is at PIN_J1
10361 stratix_io \inst|d_vsync_counter_out_3_~I (
10362         .datain(\inst|vga_driver_unit|vsync_counter_3 ),
10363         .ddiodatain(gnd),
10364         .oe(vcc),
10365         .outclk(gnd),
10366         .outclkena(vcc),
10367         .inclk(gnd),
10368         .inclkena(vcc),
10369         .areset(gnd),
10370         .sreset(gnd),
10371         .delayctrlin(gnd),
10372         .devclrn(devclrn),
10373         .devpor(devpor),
10374         .devoe(devoe),
10375         .combout(),
10376         .regout(),
10377         .ddioregout(),
10378         .padio(d_vsync_counter[3]),
10379         .dqsundelayedout());
10380 // synopsys translate_off
10381 defparam \inst|d_vsync_counter_out_3_~I .ddio_mode = "none";
10382 defparam \inst|d_vsync_counter_out_3_~I .input_async_reset = "none";
10383 defparam \inst|d_vsync_counter_out_3_~I .input_power_up = "low";
10384 defparam \inst|d_vsync_counter_out_3_~I .input_register_mode = "none";
10385 defparam \inst|d_vsync_counter_out_3_~I .input_sync_reset = "none";
10386 defparam \inst|d_vsync_counter_out_3_~I .oe_async_reset = "none";
10387 defparam \inst|d_vsync_counter_out_3_~I .oe_power_up = "low";
10388 defparam \inst|d_vsync_counter_out_3_~I .oe_register_mode = "none";
10389 defparam \inst|d_vsync_counter_out_3_~I .oe_sync_reset = "none";
10390 defparam \inst|d_vsync_counter_out_3_~I .operation_mode = "output";
10391 defparam \inst|d_vsync_counter_out_3_~I .output_async_reset = "none";
10392 defparam \inst|d_vsync_counter_out_3_~I .output_power_up = "low";
10393 defparam \inst|d_vsync_counter_out_3_~I .output_register_mode = "none";
10394 defparam \inst|d_vsync_counter_out_3_~I .output_sync_reset = "none";
10395 // synopsys translate_on
10396
10397 // atom is at PIN_B11
10398 stratix_io \inst|d_vsync_counter_out_2_~I (
10399         .datain(\inst|vga_driver_unit|vsync_counter_2 ),
10400         .ddiodatain(gnd),
10401         .oe(vcc),
10402         .outclk(gnd),
10403         .outclkena(vcc),
10404         .inclk(gnd),
10405         .inclkena(vcc),
10406         .areset(gnd),
10407         .sreset(gnd),
10408         .delayctrlin(gnd),
10409         .devclrn(devclrn),
10410         .devpor(devpor),
10411         .devoe(devoe),
10412         .combout(),
10413         .regout(),
10414         .ddioregout(),
10415         .padio(d_vsync_counter[2]),
10416         .dqsundelayedout());
10417 // synopsys translate_off
10418 defparam \inst|d_vsync_counter_out_2_~I .ddio_mode = "none";
10419 defparam \inst|d_vsync_counter_out_2_~I .input_async_reset = "none";
10420 defparam \inst|d_vsync_counter_out_2_~I .input_power_up = "low";
10421 defparam \inst|d_vsync_counter_out_2_~I .input_register_mode = "none";
10422 defparam \inst|d_vsync_counter_out_2_~I .input_sync_reset = "none";
10423 defparam \inst|d_vsync_counter_out_2_~I .oe_async_reset = "none";
10424 defparam \inst|d_vsync_counter_out_2_~I .oe_power_up = "low";
10425 defparam \inst|d_vsync_counter_out_2_~I .oe_register_mode = "none";
10426 defparam \inst|d_vsync_counter_out_2_~I .oe_sync_reset = "none";
10427 defparam \inst|d_vsync_counter_out_2_~I .operation_mode = "output";
10428 defparam \inst|d_vsync_counter_out_2_~I .output_async_reset = "none";
10429 defparam \inst|d_vsync_counter_out_2_~I .output_power_up = "low";
10430 defparam \inst|d_vsync_counter_out_2_~I .output_register_mode = "none";
10431 defparam \inst|d_vsync_counter_out_2_~I .output_sync_reset = "none";
10432 // synopsys translate_on
10433
10434 // atom is at PIN_J23
10435 stratix_io \inst|d_vsync_counter_out_1_~I (
10436         .datain(\inst|vga_driver_unit|vsync_counter_1 ),
10437         .ddiodatain(gnd),
10438         .oe(vcc),
10439         .outclk(gnd),
10440         .outclkena(vcc),
10441         .inclk(gnd),
10442         .inclkena(vcc),
10443         .areset(gnd),
10444         .sreset(gnd),
10445         .delayctrlin(gnd),
10446         .devclrn(devclrn),
10447         .devpor(devpor),
10448         .devoe(devoe),
10449         .combout(),
10450         .regout(),
10451         .ddioregout(),
10452         .padio(d_vsync_counter[1]),
10453         .dqsundelayedout());
10454 // synopsys translate_off
10455 defparam \inst|d_vsync_counter_out_1_~I .ddio_mode = "none";
10456 defparam \inst|d_vsync_counter_out_1_~I .input_async_reset = "none";
10457 defparam \inst|d_vsync_counter_out_1_~I .input_power_up = "low";
10458 defparam \inst|d_vsync_counter_out_1_~I .input_register_mode = "none";
10459 defparam \inst|d_vsync_counter_out_1_~I .input_sync_reset = "none";
10460 defparam \inst|d_vsync_counter_out_1_~I .oe_async_reset = "none";
10461 defparam \inst|d_vsync_counter_out_1_~I .oe_power_up = "low";
10462 defparam \inst|d_vsync_counter_out_1_~I .oe_register_mode = "none";
10463 defparam \inst|d_vsync_counter_out_1_~I .oe_sync_reset = "none";
10464 defparam \inst|d_vsync_counter_out_1_~I .operation_mode = "output";
10465 defparam \inst|d_vsync_counter_out_1_~I .output_async_reset = "none";
10466 defparam \inst|d_vsync_counter_out_1_~I .output_power_up = "low";
10467 defparam \inst|d_vsync_counter_out_1_~I .output_register_mode = "none";
10468 defparam \inst|d_vsync_counter_out_1_~I .output_sync_reset = "none";
10469 // synopsys translate_on
10470
10471 // atom is at PIN_G9
10472 stratix_io \inst|d_vsync_counter_out_0_~I (
10473         .datain(\inst|vga_driver_unit|vsync_counter_0 ),
10474         .ddiodatain(gnd),
10475         .oe(vcc),
10476         .outclk(gnd),
10477         .outclkena(vcc),
10478         .inclk(gnd),
10479         .inclkena(vcc),
10480         .areset(gnd),
10481         .sreset(gnd),
10482         .delayctrlin(gnd),
10483         .devclrn(devclrn),
10484         .devpor(devpor),
10485         .devoe(devoe),
10486         .combout(),
10487         .regout(),
10488         .ddioregout(),
10489         .padio(d_vsync_counter[0]),
10490         .dqsundelayedout());
10491 // synopsys translate_off
10492 defparam \inst|d_vsync_counter_out_0_~I .ddio_mode = "none";
10493 defparam \inst|d_vsync_counter_out_0_~I .input_async_reset = "none";
10494 defparam \inst|d_vsync_counter_out_0_~I .input_power_up = "low";
10495 defparam \inst|d_vsync_counter_out_0_~I .input_register_mode = "none";
10496 defparam \inst|d_vsync_counter_out_0_~I .input_sync_reset = "none";
10497 defparam \inst|d_vsync_counter_out_0_~I .oe_async_reset = "none";
10498 defparam \inst|d_vsync_counter_out_0_~I .oe_power_up = "low";
10499 defparam \inst|d_vsync_counter_out_0_~I .oe_register_mode = "none";
10500 defparam \inst|d_vsync_counter_out_0_~I .oe_sync_reset = "none";
10501 defparam \inst|d_vsync_counter_out_0_~I .operation_mode = "output";
10502 defparam \inst|d_vsync_counter_out_0_~I .output_async_reset = "none";
10503 defparam \inst|d_vsync_counter_out_0_~I .output_power_up = "low";
10504 defparam \inst|d_vsync_counter_out_0_~I .output_register_mode = "none";
10505 defparam \inst|d_vsync_counter_out_0_~I .output_sync_reset = "none";
10506 // synopsys translate_on
10507
10508 // atom is at PIN_F5
10509 stratix_io \inst|d_vsync_state_out_0_~I (
10510         .datain(\inst|vga_driver_unit|vsync_state_0 ),
10511         .ddiodatain(gnd),
10512         .oe(vcc),
10513         .outclk(gnd),
10514         .outclkena(vcc),
10515         .inclk(gnd),
10516         .inclkena(vcc),
10517         .areset(gnd),
10518         .sreset(gnd),
10519         .delayctrlin(gnd),
10520         .devclrn(devclrn),
10521         .devpor(devpor),
10522         .devoe(devoe),
10523         .combout(),
10524         .regout(),
10525         .ddioregout(),
10526         .padio(d_vsync_state[0]),
10527         .dqsundelayedout());
10528 // synopsys translate_off
10529 defparam \inst|d_vsync_state_out_0_~I .ddio_mode = "none";
10530 defparam \inst|d_vsync_state_out_0_~I .input_async_reset = "none";
10531 defparam \inst|d_vsync_state_out_0_~I .input_power_up = "low";
10532 defparam \inst|d_vsync_state_out_0_~I .input_register_mode = "none";
10533 defparam \inst|d_vsync_state_out_0_~I .input_sync_reset = "none";
10534 defparam \inst|d_vsync_state_out_0_~I .oe_async_reset = "none";
10535 defparam \inst|d_vsync_state_out_0_~I .oe_power_up = "low";
10536 defparam \inst|d_vsync_state_out_0_~I .oe_register_mode = "none";
10537 defparam \inst|d_vsync_state_out_0_~I .oe_sync_reset = "none";
10538 defparam \inst|d_vsync_state_out_0_~I .operation_mode = "output";
10539 defparam \inst|d_vsync_state_out_0_~I .output_async_reset = "none";
10540 defparam \inst|d_vsync_state_out_0_~I .output_power_up = "low";
10541 defparam \inst|d_vsync_state_out_0_~I .output_register_mode = "none";
10542 defparam \inst|d_vsync_state_out_0_~I .output_sync_reset = "none";
10543 // synopsys translate_on
10544
10545 // atom is at PIN_F4
10546 stratix_io \inst|d_vsync_state_out_1_~I (
10547         .datain(\inst|vga_driver_unit|vsync_state_1 ),
10548         .ddiodatain(gnd),
10549         .oe(vcc),
10550         .outclk(gnd),
10551         .outclkena(vcc),
10552         .inclk(gnd),
10553         .inclkena(vcc),
10554         .areset(gnd),
10555         .sreset(gnd),
10556         .delayctrlin(gnd),
10557         .devclrn(devclrn),
10558         .devpor(devpor),
10559         .devoe(devoe),
10560         .combout(),
10561         .regout(),
10562         .ddioregout(),
10563         .padio(d_vsync_state[1]),
10564         .dqsundelayedout());
10565 // synopsys translate_off
10566 defparam \inst|d_vsync_state_out_1_~I .ddio_mode = "none";
10567 defparam \inst|d_vsync_state_out_1_~I .input_async_reset = "none";
10568 defparam \inst|d_vsync_state_out_1_~I .input_power_up = "low";
10569 defparam \inst|d_vsync_state_out_1_~I .input_register_mode = "none";
10570 defparam \inst|d_vsync_state_out_1_~I .input_sync_reset = "none";
10571 defparam \inst|d_vsync_state_out_1_~I .oe_async_reset = "none";
10572 defparam \inst|d_vsync_state_out_1_~I .oe_power_up = "low";
10573 defparam \inst|d_vsync_state_out_1_~I .oe_register_mode = "none";
10574 defparam \inst|d_vsync_state_out_1_~I .oe_sync_reset = "none";
10575 defparam \inst|d_vsync_state_out_1_~I .operation_mode = "output";
10576 defparam \inst|d_vsync_state_out_1_~I .output_async_reset = "none";
10577 defparam \inst|d_vsync_state_out_1_~I .output_power_up = "low";
10578 defparam \inst|d_vsync_state_out_1_~I .output_register_mode = "none";
10579 defparam \inst|d_vsync_state_out_1_~I .output_sync_reset = "none";
10580 // synopsys translate_on
10581
10582 // atom is at PIN_F3
10583 stratix_io \inst|d_vsync_state_out_2_~I (
10584         .datain(\inst|vga_driver_unit|vsync_state_2 ),
10585         .ddiodatain(gnd),
10586         .oe(vcc),
10587         .outclk(gnd),
10588         .outclkena(vcc),
10589         .inclk(gnd),
10590         .inclkena(vcc),
10591         .areset(gnd),
10592         .sreset(gnd),
10593         .delayctrlin(gnd),
10594         .devclrn(devclrn),
10595         .devpor(devpor),
10596         .devoe(devoe),
10597         .combout(),
10598         .regout(),
10599         .ddioregout(),
10600         .padio(d_vsync_state[2]),
10601         .dqsundelayedout());
10602 // synopsys translate_off
10603 defparam \inst|d_vsync_state_out_2_~I .ddio_mode = "none";
10604 defparam \inst|d_vsync_state_out_2_~I .input_async_reset = "none";
10605 defparam \inst|d_vsync_state_out_2_~I .input_power_up = "low";
10606 defparam \inst|d_vsync_state_out_2_~I .input_register_mode = "none";
10607 defparam \inst|d_vsync_state_out_2_~I .input_sync_reset = "none";
10608 defparam \inst|d_vsync_state_out_2_~I .oe_async_reset = "none";
10609 defparam \inst|d_vsync_state_out_2_~I .oe_power_up = "low";
10610 defparam \inst|d_vsync_state_out_2_~I .oe_register_mode = "none";
10611 defparam \inst|d_vsync_state_out_2_~I .oe_sync_reset = "none";
10612 defparam \inst|d_vsync_state_out_2_~I .operation_mode = "output";
10613 defparam \inst|d_vsync_state_out_2_~I .output_async_reset = "none";
10614 defparam \inst|d_vsync_state_out_2_~I .output_power_up = "low";
10615 defparam \inst|d_vsync_state_out_2_~I .output_register_mode = "none";
10616 defparam \inst|d_vsync_state_out_2_~I .output_sync_reset = "none";
10617 // synopsys translate_on
10618
10619 // atom is at PIN_M19
10620 stratix_io \inst|d_vsync_state_out_3_~I (
10621         .datain(\inst|vga_driver_unit|vsync_state_3 ),
10622         .ddiodatain(gnd),
10623         .oe(vcc),
10624         .outclk(gnd),
10625         .outclkena(vcc),
10626         .inclk(gnd),
10627         .inclkena(vcc),
10628         .areset(gnd),
10629         .sreset(gnd),
10630         .delayctrlin(gnd),
10631         .devclrn(devclrn),
10632         .devpor(devpor),
10633         .devoe(devoe),
10634         .combout(),
10635         .regout(),
10636         .ddioregout(),
10637         .padio(d_vsync_state[3]),
10638         .dqsundelayedout());
10639 // synopsys translate_off
10640 defparam \inst|d_vsync_state_out_3_~I .ddio_mode = "none";
10641 defparam \inst|d_vsync_state_out_3_~I .input_async_reset = "none";
10642 defparam \inst|d_vsync_state_out_3_~I .input_power_up = "low";
10643 defparam \inst|d_vsync_state_out_3_~I .input_register_mode = "none";
10644 defparam \inst|d_vsync_state_out_3_~I .input_sync_reset = "none";
10645 defparam \inst|d_vsync_state_out_3_~I .oe_async_reset = "none";
10646 defparam \inst|d_vsync_state_out_3_~I .oe_power_up = "low";
10647 defparam \inst|d_vsync_state_out_3_~I .oe_register_mode = "none";
10648 defparam \inst|d_vsync_state_out_3_~I .oe_sync_reset = "none";
10649 defparam \inst|d_vsync_state_out_3_~I .operation_mode = "output";
10650 defparam \inst|d_vsync_state_out_3_~I .output_async_reset = "none";
10651 defparam \inst|d_vsync_state_out_3_~I .output_power_up = "low";
10652 defparam \inst|d_vsync_state_out_3_~I .output_register_mode = "none";
10653 defparam \inst|d_vsync_state_out_3_~I .output_sync_reset = "none";
10654 // synopsys translate_on
10655
10656 // atom is at PIN_M18
10657 stratix_io \inst|d_vsync_state_out_4_~I (
10658         .datain(\inst|vga_driver_unit|vsync_state_4 ),
10659         .ddiodatain(gnd),
10660         .oe(vcc),
10661         .outclk(gnd),
10662         .outclkena(vcc),
10663         .inclk(gnd),
10664         .inclkena(vcc),
10665         .areset(gnd),
10666         .sreset(gnd),
10667         .delayctrlin(gnd),
10668         .devclrn(devclrn),
10669         .devpor(devpor),
10670         .devoe(devoe),
10671         .combout(),
10672         .regout(),
10673         .ddioregout(),
10674         .padio(d_vsync_state[4]),
10675         .dqsundelayedout());
10676 // synopsys translate_off
10677 defparam \inst|d_vsync_state_out_4_~I .ddio_mode = "none";
10678 defparam \inst|d_vsync_state_out_4_~I .input_async_reset = "none";
10679 defparam \inst|d_vsync_state_out_4_~I .input_power_up = "low";
10680 defparam \inst|d_vsync_state_out_4_~I .input_register_mode = "none";
10681 defparam \inst|d_vsync_state_out_4_~I .input_sync_reset = "none";
10682 defparam \inst|d_vsync_state_out_4_~I .oe_async_reset = "none";
10683 defparam \inst|d_vsync_state_out_4_~I .oe_power_up = "low";
10684 defparam \inst|d_vsync_state_out_4_~I .oe_register_mode = "none";
10685 defparam \inst|d_vsync_state_out_4_~I .oe_sync_reset = "none";
10686 defparam \inst|d_vsync_state_out_4_~I .operation_mode = "output";
10687 defparam \inst|d_vsync_state_out_4_~I .output_async_reset = "none";
10688 defparam \inst|d_vsync_state_out_4_~I .output_power_up = "low";
10689 defparam \inst|d_vsync_state_out_4_~I .output_register_mode = "none";
10690 defparam \inst|d_vsync_state_out_4_~I .output_sync_reset = "none";
10691 // synopsys translate_on
10692
10693 // atom is at PIN_M7
10694 stratix_io \inst|d_vsync_state_out_5_~I (
10695         .datain(\inst|vga_driver_unit|vsync_state_5 ),
10696         .ddiodatain(gnd),
10697         .oe(vcc),
10698         .outclk(gnd),
10699         .outclkena(vcc),
10700         .inclk(gnd),
10701         .inclkena(vcc),
10702         .areset(gnd),
10703         .sreset(gnd),
10704         .delayctrlin(gnd),
10705         .devclrn(devclrn),
10706         .devpor(devpor),
10707         .devoe(devoe),
10708         .combout(),
10709         .regout(),
10710         .ddioregout(),
10711         .padio(d_vsync_state[5]),
10712         .dqsundelayedout());
10713 // synopsys translate_off
10714 defparam \inst|d_vsync_state_out_5_~I .ddio_mode = "none";
10715 defparam \inst|d_vsync_state_out_5_~I .input_async_reset = "none";
10716 defparam \inst|d_vsync_state_out_5_~I .input_power_up = "low";
10717 defparam \inst|d_vsync_state_out_5_~I .input_register_mode = "none";
10718 defparam \inst|d_vsync_state_out_5_~I .input_sync_reset = "none";
10719 defparam \inst|d_vsync_state_out_5_~I .oe_async_reset = "none";
10720 defparam \inst|d_vsync_state_out_5_~I .oe_power_up = "low";
10721 defparam \inst|d_vsync_state_out_5_~I .oe_register_mode = "none";
10722 defparam \inst|d_vsync_state_out_5_~I .oe_sync_reset = "none";
10723 defparam \inst|d_vsync_state_out_5_~I .operation_mode = "output";
10724 defparam \inst|d_vsync_state_out_5_~I .output_async_reset = "none";
10725 defparam \inst|d_vsync_state_out_5_~I .output_power_up = "low";
10726 defparam \inst|d_vsync_state_out_5_~I .output_register_mode = "none";
10727 defparam \inst|d_vsync_state_out_5_~I .output_sync_reset = "none";
10728 // synopsys translate_on
10729
10730 // atom is at PIN_M4
10731 stratix_io \inst|d_vsync_state_out_6_~I (
10732         .datain(\inst|vga_driver_unit|vsync_state_6 ),
10733         .ddiodatain(gnd),
10734         .oe(vcc),
10735         .outclk(gnd),
10736         .outclkena(vcc),
10737         .inclk(gnd),
10738         .inclkena(vcc),
10739         .areset(gnd),
10740         .sreset(gnd),
10741         .delayctrlin(gnd),
10742         .devclrn(devclrn),
10743         .devpor(devpor),
10744         .devoe(devoe),
10745         .combout(),
10746         .regout(),
10747         .ddioregout(),
10748         .padio(d_vsync_state[6]),
10749         .dqsundelayedout());
10750 // synopsys translate_off
10751 defparam \inst|d_vsync_state_out_6_~I .ddio_mode = "none";
10752 defparam \inst|d_vsync_state_out_6_~I .input_async_reset = "none";
10753 defparam \inst|d_vsync_state_out_6_~I .input_power_up = "low";
10754 defparam \inst|d_vsync_state_out_6_~I .input_register_mode = "none";
10755 defparam \inst|d_vsync_state_out_6_~I .input_sync_reset = "none";
10756 defparam \inst|d_vsync_state_out_6_~I .oe_async_reset = "none";
10757 defparam \inst|d_vsync_state_out_6_~I .oe_power_up = "low";
10758 defparam \inst|d_vsync_state_out_6_~I .oe_register_mode = "none";
10759 defparam \inst|d_vsync_state_out_6_~I .oe_sync_reset = "none";
10760 defparam \inst|d_vsync_state_out_6_~I .operation_mode = "output";
10761 defparam \inst|d_vsync_state_out_6_~I .output_async_reset = "none";
10762 defparam \inst|d_vsync_state_out_6_~I .output_power_up = "low";
10763 defparam \inst|d_vsync_state_out_6_~I .output_register_mode = "none";
10764 defparam \inst|d_vsync_state_out_6_~I .output_sync_reset = "none";
10765 // synopsys translate_on
10766
10767 // atom is at PIN_T2
10768 stratix_io \inst|seven_seg_pin_tri_13_~I (
10769         .datain(!\~STRATIX_FITTER_CREATED_GND~I_combout ),
10770         .ddiodatain(gnd),
10771         .oe(vcc),
10772         .outclk(gnd),
10773         .outclkena(vcc),
10774         .inclk(gnd),
10775         .inclkena(vcc),
10776         .areset(gnd),
10777         .sreset(gnd),
10778         .delayctrlin(gnd),
10779         .devclrn(devclrn),
10780         .devpor(devpor),
10781         .devoe(devoe),
10782         .combout(),
10783         .regout(),
10784         .ddioregout(),
10785         .padio(seven_seg_pin[13]),
10786         .dqsundelayedout());
10787 // synopsys translate_off
10788 defparam \inst|seven_seg_pin_tri_13_~I .ddio_mode = "none";
10789 defparam \inst|seven_seg_pin_tri_13_~I .input_async_reset = "none";
10790 defparam \inst|seven_seg_pin_tri_13_~I .input_power_up = "low";
10791 defparam \inst|seven_seg_pin_tri_13_~I .input_register_mode = "none";
10792 defparam \inst|seven_seg_pin_tri_13_~I .input_sync_reset = "none";
10793 defparam \inst|seven_seg_pin_tri_13_~I .oe_async_reset = "none";
10794 defparam \inst|seven_seg_pin_tri_13_~I .oe_power_up = "low";
10795 defparam \inst|seven_seg_pin_tri_13_~I .oe_register_mode = "none";
10796 defparam \inst|seven_seg_pin_tri_13_~I .oe_sync_reset = "none";
10797 defparam \inst|seven_seg_pin_tri_13_~I .operation_mode = "output";
10798 defparam \inst|seven_seg_pin_tri_13_~I .output_async_reset = "none";
10799 defparam \inst|seven_seg_pin_tri_13_~I .output_power_up = "low";
10800 defparam \inst|seven_seg_pin_tri_13_~I .output_register_mode = "none";
10801 defparam \inst|seven_seg_pin_tri_13_~I .output_sync_reset = "none";
10802 // synopsys translate_on
10803
10804 // atom is at PIN_AA11
10805 stratix_io \inst|seven_seg_pin_out_12_~I (
10806         .datain(\inst|vga_driver_unit|un6_dly_counter_0_x ),
10807         .ddiodatain(gnd),
10808         .oe(vcc),
10809         .outclk(gnd),
10810         .outclkena(vcc),
10811         .inclk(gnd),
10812         .inclkena(vcc),
10813         .areset(gnd),
10814         .sreset(gnd),
10815         .delayctrlin(gnd),
10816         .devclrn(devclrn),
10817         .devpor(devpor),
10818         .devoe(devoe),
10819         .combout(),
10820         .regout(),
10821         .ddioregout(),
10822         .padio(seven_seg_pin[12]),
10823         .dqsundelayedout());
10824 // synopsys translate_off
10825 defparam \inst|seven_seg_pin_out_12_~I .ddio_mode = "none";
10826 defparam \inst|seven_seg_pin_out_12_~I .input_async_reset = "none";
10827 defparam \inst|seven_seg_pin_out_12_~I .input_power_up = "low";
10828 defparam \inst|seven_seg_pin_out_12_~I .input_register_mode = "none";
10829 defparam \inst|seven_seg_pin_out_12_~I .input_sync_reset = "none";
10830 defparam \inst|seven_seg_pin_out_12_~I .oe_async_reset = "none";
10831 defparam \inst|seven_seg_pin_out_12_~I .oe_power_up = "low";
10832 defparam \inst|seven_seg_pin_out_12_~I .oe_register_mode = "none";
10833 defparam \inst|seven_seg_pin_out_12_~I .oe_sync_reset = "none";
10834 defparam \inst|seven_seg_pin_out_12_~I .operation_mode = "output";
10835 defparam \inst|seven_seg_pin_out_12_~I .output_async_reset = "none";
10836 defparam \inst|seven_seg_pin_out_12_~I .output_power_up = "low";
10837 defparam \inst|seven_seg_pin_out_12_~I .output_register_mode = "none";
10838 defparam \inst|seven_seg_pin_out_12_~I .output_sync_reset = "none";
10839 // synopsys translate_on
10840
10841 // atom is at PIN_R6
10842 stratix_io \inst|seven_seg_pin_out_11_~I (
10843         .datain(\inst|vga_driver_unit|un6_dly_counter_0_x ),
10844         .ddiodatain(gnd),
10845         .oe(vcc),
10846         .outclk(gnd),
10847         .outclkena(vcc),
10848         .inclk(gnd),
10849         .inclkena(vcc),
10850         .areset(gnd),
10851         .sreset(gnd),
10852         .delayctrlin(gnd),
10853         .devclrn(devclrn),
10854         .devpor(devpor),
10855         .devoe(devoe),
10856         .combout(),
10857         .regout(),
10858         .ddioregout(),
10859         .padio(seven_seg_pin[11]),
10860         .dqsundelayedout());
10861 // synopsys translate_off
10862 defparam \inst|seven_seg_pin_out_11_~I .ddio_mode = "none";
10863 defparam \inst|seven_seg_pin_out_11_~I .input_async_reset = "none";
10864 defparam \inst|seven_seg_pin_out_11_~I .input_power_up = "low";
10865 defparam \inst|seven_seg_pin_out_11_~I .input_register_mode = "none";
10866 defparam \inst|seven_seg_pin_out_11_~I .input_sync_reset = "none";
10867 defparam \inst|seven_seg_pin_out_11_~I .oe_async_reset = "none";
10868 defparam \inst|seven_seg_pin_out_11_~I .oe_power_up = "low";
10869 defparam \inst|seven_seg_pin_out_11_~I .oe_register_mode = "none";
10870 defparam \inst|seven_seg_pin_out_11_~I .oe_sync_reset = "none";
10871 defparam \inst|seven_seg_pin_out_11_~I .operation_mode = "output";
10872 defparam \inst|seven_seg_pin_out_11_~I .output_async_reset = "none";
10873 defparam \inst|seven_seg_pin_out_11_~I .output_power_up = "low";
10874 defparam \inst|seven_seg_pin_out_11_~I .output_register_mode = "none";
10875 defparam \inst|seven_seg_pin_out_11_~I .output_sync_reset = "none";
10876 // synopsys translate_on
10877
10878 // atom is at PIN_R4
10879 stratix_io \inst|seven_seg_pin_out_10_~I (
10880         .datain(\inst|vga_driver_unit|un6_dly_counter_0_x ),
10881         .ddiodatain(gnd),
10882         .oe(vcc),
10883         .outclk(gnd),
10884         .outclkena(vcc),
10885         .inclk(gnd),
10886         .inclkena(vcc),
10887         .areset(gnd),
10888         .sreset(gnd),
10889         .delayctrlin(gnd),
10890         .devclrn(devclrn),
10891         .devpor(devpor),
10892         .devoe(devoe),
10893         .combout(),
10894         .regout(),
10895         .ddioregout(),
10896         .padio(seven_seg_pin[10]),
10897         .dqsundelayedout());
10898 // synopsys translate_off
10899 defparam \inst|seven_seg_pin_out_10_~I .ddio_mode = "none";
10900 defparam \inst|seven_seg_pin_out_10_~I .input_async_reset = "none";
10901 defparam \inst|seven_seg_pin_out_10_~I .input_power_up = "low";
10902 defparam \inst|seven_seg_pin_out_10_~I .input_register_mode = "none";
10903 defparam \inst|seven_seg_pin_out_10_~I .input_sync_reset = "none";
10904 defparam \inst|seven_seg_pin_out_10_~I .oe_async_reset = "none";
10905 defparam \inst|seven_seg_pin_out_10_~I .oe_power_up = "low";
10906 defparam \inst|seven_seg_pin_out_10_~I .oe_register_mode = "none";
10907 defparam \inst|seven_seg_pin_out_10_~I .oe_sync_reset = "none";
10908 defparam \inst|seven_seg_pin_out_10_~I .operation_mode = "output";
10909 defparam \inst|seven_seg_pin_out_10_~I .output_async_reset = "none";
10910 defparam \inst|seven_seg_pin_out_10_~I .output_power_up = "low";
10911 defparam \inst|seven_seg_pin_out_10_~I .output_register_mode = "none";
10912 defparam \inst|seven_seg_pin_out_10_~I .output_sync_reset = "none";
10913 // synopsys translate_on
10914
10915 // atom is at PIN_N8
10916 stratix_io \inst|seven_seg_pin_out_9_~I (
10917         .datain(\inst|vga_driver_unit|un6_dly_counter_0_x ),
10918         .ddiodatain(gnd),
10919         .oe(vcc),
10920         .outclk(gnd),
10921         .outclkena(vcc),
10922         .inclk(gnd),
10923         .inclkena(vcc),
10924         .areset(gnd),
10925         .sreset(gnd),
10926         .delayctrlin(gnd),
10927         .devclrn(devclrn),
10928         .devpor(devpor),
10929         .devoe(devoe),
10930         .combout(),
10931         .regout(),
10932         .ddioregout(),
10933         .padio(seven_seg_pin[9]),
10934         .dqsundelayedout());
10935 // synopsys translate_off
10936 defparam \inst|seven_seg_pin_out_9_~I .ddio_mode = "none";
10937 defparam \inst|seven_seg_pin_out_9_~I .input_async_reset = "none";
10938 defparam \inst|seven_seg_pin_out_9_~I .input_power_up = "low";
10939 defparam \inst|seven_seg_pin_out_9_~I .input_register_mode = "none";
10940 defparam \inst|seven_seg_pin_out_9_~I .input_sync_reset = "none";
10941 defparam \inst|seven_seg_pin_out_9_~I .oe_async_reset = "none";
10942 defparam \inst|seven_seg_pin_out_9_~I .oe_power_up = "low";
10943 defparam \inst|seven_seg_pin_out_9_~I .oe_register_mode = "none";
10944 defparam \inst|seven_seg_pin_out_9_~I .oe_sync_reset = "none";
10945 defparam \inst|seven_seg_pin_out_9_~I .operation_mode = "output";
10946 defparam \inst|seven_seg_pin_out_9_~I .output_async_reset = "none";
10947 defparam \inst|seven_seg_pin_out_9_~I .output_power_up = "low";
10948 defparam \inst|seven_seg_pin_out_9_~I .output_register_mode = "none";
10949 defparam \inst|seven_seg_pin_out_9_~I .output_sync_reset = "none";
10950 // synopsys translate_on
10951
10952 // atom is at PIN_N7
10953 stratix_io \inst|seven_seg_pin_out_8_~I (
10954         .datain(\inst|vga_driver_unit|un6_dly_counter_0_x ),
10955         .ddiodatain(gnd),
10956         .oe(vcc),
10957         .outclk(gnd),
10958         .outclkena(vcc),
10959         .inclk(gnd),
10960         .inclkena(vcc),
10961         .areset(gnd),
10962         .sreset(gnd),
10963         .delayctrlin(gnd),
10964         .devclrn(devclrn),
10965         .devpor(devpor),
10966         .devoe(devoe),
10967         .combout(),
10968         .regout(),
10969         .ddioregout(),
10970         .padio(seven_seg_pin[8]),
10971         .dqsundelayedout());
10972 // synopsys translate_off
10973 defparam \inst|seven_seg_pin_out_8_~I .ddio_mode = "none";
10974 defparam \inst|seven_seg_pin_out_8_~I .input_async_reset = "none";
10975 defparam \inst|seven_seg_pin_out_8_~I .input_power_up = "low";
10976 defparam \inst|seven_seg_pin_out_8_~I .input_register_mode = "none";
10977 defparam \inst|seven_seg_pin_out_8_~I .input_sync_reset = "none";
10978 defparam \inst|seven_seg_pin_out_8_~I .oe_async_reset = "none";
10979 defparam \inst|seven_seg_pin_out_8_~I .oe_power_up = "low";
10980 defparam \inst|seven_seg_pin_out_8_~I .oe_register_mode = "none";
10981 defparam \inst|seven_seg_pin_out_8_~I .oe_sync_reset = "none";
10982 defparam \inst|seven_seg_pin_out_8_~I .operation_mode = "output";
10983 defparam \inst|seven_seg_pin_out_8_~I .output_async_reset = "none";
10984 defparam \inst|seven_seg_pin_out_8_~I .output_power_up = "low";
10985 defparam \inst|seven_seg_pin_out_8_~I .output_register_mode = "none";
10986 defparam \inst|seven_seg_pin_out_8_~I .output_sync_reset = "none";
10987 // synopsys translate_on
10988
10989 // atom is at PIN_Y11
10990 stratix_io \inst|seven_seg_pin_out_7_~I (
10991         .datain(\inst|vga_driver_unit|un6_dly_counter_0_x ),
10992         .ddiodatain(gnd),
10993         .oe(vcc),
10994         .outclk(gnd),
10995         .outclkena(vcc),
10996         .inclk(gnd),
10997         .inclkena(vcc),
10998         .areset(gnd),
10999         .sreset(gnd),
11000         .delayctrlin(gnd),
11001         .devclrn(devclrn),
11002         .devpor(devpor),
11003         .devoe(devoe),
11004         .combout(),
11005         .regout(),
11006         .ddioregout(),
11007         .padio(seven_seg_pin[7]),
11008         .dqsundelayedout());
11009 // synopsys translate_off
11010 defparam \inst|seven_seg_pin_out_7_~I .ddio_mode = "none";
11011 defparam \inst|seven_seg_pin_out_7_~I .input_async_reset = "none";
11012 defparam \inst|seven_seg_pin_out_7_~I .input_power_up = "low";
11013 defparam \inst|seven_seg_pin_out_7_~I .input_register_mode = "none";
11014 defparam \inst|seven_seg_pin_out_7_~I .input_sync_reset = "none";
11015 defparam \inst|seven_seg_pin_out_7_~I .oe_async_reset = "none";
11016 defparam \inst|seven_seg_pin_out_7_~I .oe_power_up = "low";
11017 defparam \inst|seven_seg_pin_out_7_~I .oe_register_mode = "none";
11018 defparam \inst|seven_seg_pin_out_7_~I .oe_sync_reset = "none";
11019 defparam \inst|seven_seg_pin_out_7_~I .operation_mode = "output";
11020 defparam \inst|seven_seg_pin_out_7_~I .output_async_reset = "none";
11021 defparam \inst|seven_seg_pin_out_7_~I .output_power_up = "low";
11022 defparam \inst|seven_seg_pin_out_7_~I .output_register_mode = "none";
11023 defparam \inst|seven_seg_pin_out_7_~I .output_sync_reset = "none";
11024 // synopsys translate_on
11025
11026 // atom is at PIN_R23
11027 stratix_io \inst|seven_seg_pin_tri_6_~I (
11028         .datain(!\~STRATIX_FITTER_CREATED_GND~I_combout ),
11029         .ddiodatain(gnd),
11030         .oe(vcc),
11031         .outclk(gnd),
11032         .outclkena(vcc),
11033         .inclk(gnd),
11034         .inclkena(vcc),
11035         .areset(gnd),
11036         .sreset(gnd),
11037         .delayctrlin(gnd),
11038         .devclrn(devclrn),
11039         .devpor(devpor),
11040         .devoe(devoe),
11041         .combout(),
11042         .regout(),
11043         .ddioregout(),
11044         .padio(seven_seg_pin[6]),
11045         .dqsundelayedout());
11046 // synopsys translate_off
11047 defparam \inst|seven_seg_pin_tri_6_~I .ddio_mode = "none";
11048 defparam \inst|seven_seg_pin_tri_6_~I .input_async_reset = "none";
11049 defparam \inst|seven_seg_pin_tri_6_~I .input_power_up = "low";
11050 defparam \inst|seven_seg_pin_tri_6_~I .input_register_mode = "none";
11051 defparam \inst|seven_seg_pin_tri_6_~I .input_sync_reset = "none";
11052 defparam \inst|seven_seg_pin_tri_6_~I .oe_async_reset = "none";
11053 defparam \inst|seven_seg_pin_tri_6_~I .oe_power_up = "low";
11054 defparam \inst|seven_seg_pin_tri_6_~I .oe_register_mode = "none";
11055 defparam \inst|seven_seg_pin_tri_6_~I .oe_sync_reset = "none";
11056 defparam \inst|seven_seg_pin_tri_6_~I .operation_mode = "output";
11057 defparam \inst|seven_seg_pin_tri_6_~I .output_async_reset = "none";
11058 defparam \inst|seven_seg_pin_tri_6_~I .output_power_up = "low";
11059 defparam \inst|seven_seg_pin_tri_6_~I .output_register_mode = "none";
11060 defparam \inst|seven_seg_pin_tri_6_~I .output_sync_reset = "none";
11061 // synopsys translate_on
11062
11063 // atom is at PIN_R22
11064 stratix_io \inst|seven_seg_pin_tri_5_~I (
11065         .datain(!\~STRATIX_FITTER_CREATED_GND~I_combout ),
11066         .ddiodatain(gnd),
11067         .oe(vcc),
11068         .outclk(gnd),
11069         .outclkena(vcc),
11070         .inclk(gnd),
11071         .inclkena(vcc),
11072         .areset(gnd),
11073         .sreset(gnd),
11074         .delayctrlin(gnd),
11075         .devclrn(devclrn),
11076         .devpor(devpor),
11077         .devoe(devoe),
11078         .combout(),
11079         .regout(),
11080         .ddioregout(),
11081         .padio(seven_seg_pin[5]),
11082         .dqsundelayedout());
11083 // synopsys translate_off
11084 defparam \inst|seven_seg_pin_tri_5_~I .ddio_mode = "none";
11085 defparam \inst|seven_seg_pin_tri_5_~I .input_async_reset = "none";
11086 defparam \inst|seven_seg_pin_tri_5_~I .input_power_up = "low";
11087 defparam \inst|seven_seg_pin_tri_5_~I .input_register_mode = "none";
11088 defparam \inst|seven_seg_pin_tri_5_~I .input_sync_reset = "none";
11089 defparam \inst|seven_seg_pin_tri_5_~I .oe_async_reset = "none";
11090 defparam \inst|seven_seg_pin_tri_5_~I .oe_power_up = "low";
11091 defparam \inst|seven_seg_pin_tri_5_~I .oe_register_mode = "none";
11092 defparam \inst|seven_seg_pin_tri_5_~I .oe_sync_reset = "none";
11093 defparam \inst|seven_seg_pin_tri_5_~I .operation_mode = "output";
11094 defparam \inst|seven_seg_pin_tri_5_~I .output_async_reset = "none";
11095 defparam \inst|seven_seg_pin_tri_5_~I .output_power_up = "low";
11096 defparam \inst|seven_seg_pin_tri_5_~I .output_register_mode = "none";
11097 defparam \inst|seven_seg_pin_tri_5_~I .output_sync_reset = "none";
11098 // synopsys translate_on
11099
11100 // atom is at PIN_R21
11101 stratix_io \inst|seven_seg_pin_tri_4_~I (
11102         .datain(!\~STRATIX_FITTER_CREATED_GND~I_combout ),
11103         .ddiodatain(gnd),
11104         .oe(vcc),
11105         .outclk(gnd),
11106         .outclkena(vcc),
11107         .inclk(gnd),
11108         .inclkena(vcc),
11109         .areset(gnd),
11110         .sreset(gnd),
11111         .delayctrlin(gnd),
11112         .devclrn(devclrn),
11113         .devpor(devpor),
11114         .devoe(devoe),
11115         .combout(),
11116         .regout(),
11117         .ddioregout(),
11118         .padio(seven_seg_pin[4]),
11119         .dqsundelayedout());
11120 // synopsys translate_off
11121 defparam \inst|seven_seg_pin_tri_4_~I .ddio_mode = "none";
11122 defparam \inst|seven_seg_pin_tri_4_~I .input_async_reset = "none";
11123 defparam \inst|seven_seg_pin_tri_4_~I .input_power_up = "low";
11124 defparam \inst|seven_seg_pin_tri_4_~I .input_register_mode = "none";
11125 defparam \inst|seven_seg_pin_tri_4_~I .input_sync_reset = "none";
11126 defparam \inst|seven_seg_pin_tri_4_~I .oe_async_reset = "none";
11127 defparam \inst|seven_seg_pin_tri_4_~I .oe_power_up = "low";
11128 defparam \inst|seven_seg_pin_tri_4_~I .oe_register_mode = "none";
11129 defparam \inst|seven_seg_pin_tri_4_~I .oe_sync_reset = "none";
11130 defparam \inst|seven_seg_pin_tri_4_~I .operation_mode = "output";
11131 defparam \inst|seven_seg_pin_tri_4_~I .output_async_reset = "none";
11132 defparam \inst|seven_seg_pin_tri_4_~I .output_power_up = "low";
11133 defparam \inst|seven_seg_pin_tri_4_~I .output_register_mode = "none";
11134 defparam \inst|seven_seg_pin_tri_4_~I .output_sync_reset = "none";
11135 // synopsys translate_on
11136
11137 // atom is at PIN_R20
11138 stratix_io \inst|seven_seg_pin_tri_3_~I (
11139         .datain(!\~STRATIX_FITTER_CREATED_GND~I_combout ),
11140         .ddiodatain(gnd),
11141         .oe(vcc),
11142         .outclk(gnd),
11143         .outclkena(vcc),
11144         .inclk(gnd),
11145         .inclkena(vcc),
11146         .areset(gnd),
11147         .sreset(gnd),
11148         .delayctrlin(gnd),
11149         .devclrn(devclrn),
11150         .devpor(devpor),
11151         .devoe(devoe),
11152         .combout(),
11153         .regout(),
11154         .ddioregout(),
11155         .padio(seven_seg_pin[3]),
11156         .dqsundelayedout());
11157 // synopsys translate_off
11158 defparam \inst|seven_seg_pin_tri_3_~I .ddio_mode = "none";
11159 defparam \inst|seven_seg_pin_tri_3_~I .input_async_reset = "none";
11160 defparam \inst|seven_seg_pin_tri_3_~I .input_power_up = "low";
11161 defparam \inst|seven_seg_pin_tri_3_~I .input_register_mode = "none";
11162 defparam \inst|seven_seg_pin_tri_3_~I .input_sync_reset = "none";
11163 defparam \inst|seven_seg_pin_tri_3_~I .oe_async_reset = "none";
11164 defparam \inst|seven_seg_pin_tri_3_~I .oe_power_up = "low";
11165 defparam \inst|seven_seg_pin_tri_3_~I .oe_register_mode = "none";
11166 defparam \inst|seven_seg_pin_tri_3_~I .oe_sync_reset = "none";
11167 defparam \inst|seven_seg_pin_tri_3_~I .operation_mode = "output";
11168 defparam \inst|seven_seg_pin_tri_3_~I .output_async_reset = "none";
11169 defparam \inst|seven_seg_pin_tri_3_~I .output_power_up = "low";
11170 defparam \inst|seven_seg_pin_tri_3_~I .output_register_mode = "none";
11171 defparam \inst|seven_seg_pin_tri_3_~I .output_sync_reset = "none";
11172 // synopsys translate_on
11173
11174 // atom is at PIN_R19
11175 stratix_io \inst|seven_seg_pin_out_2_~I (
11176         .datain(\inst|vga_driver_unit|un6_dly_counter_0_x ),
11177         .ddiodatain(gnd),
11178         .oe(vcc),
11179         .outclk(gnd),
11180         .outclkena(vcc),
11181         .inclk(gnd),
11182         .inclkena(vcc),
11183         .areset(gnd),
11184         .sreset(gnd),
11185         .delayctrlin(gnd),
11186         .devclrn(devclrn),
11187         .devpor(devpor),
11188         .devoe(devoe),
11189         .combout(),
11190         .regout(),
11191         .ddioregout(),
11192         .padio(seven_seg_pin[2]),
11193         .dqsundelayedout());
11194 // synopsys translate_off
11195 defparam \inst|seven_seg_pin_out_2_~I .ddio_mode = "none";
11196 defparam \inst|seven_seg_pin_out_2_~I .input_async_reset = "none";
11197 defparam \inst|seven_seg_pin_out_2_~I .input_power_up = "low";
11198 defparam \inst|seven_seg_pin_out_2_~I .input_register_mode = "none";
11199 defparam \inst|seven_seg_pin_out_2_~I .input_sync_reset = "none";
11200 defparam \inst|seven_seg_pin_out_2_~I .oe_async_reset = "none";
11201 defparam \inst|seven_seg_pin_out_2_~I .oe_power_up = "low";
11202 defparam \inst|seven_seg_pin_out_2_~I .oe_register_mode = "none";
11203 defparam \inst|seven_seg_pin_out_2_~I .oe_sync_reset = "none";
11204 defparam \inst|seven_seg_pin_out_2_~I .operation_mode = "output";
11205 defparam \inst|seven_seg_pin_out_2_~I .output_async_reset = "none";
11206 defparam \inst|seven_seg_pin_out_2_~I .output_power_up = "low";
11207 defparam \inst|seven_seg_pin_out_2_~I .output_register_mode = "none";
11208 defparam \inst|seven_seg_pin_out_2_~I .output_sync_reset = "none";
11209 // synopsys translate_on
11210
11211 // atom is at PIN_R9
11212 stratix_io \inst|seven_seg_pin_out_1_~I (
11213         .datain(\inst|vga_driver_unit|un6_dly_counter_0_x ),
11214         .ddiodatain(gnd),
11215         .oe(vcc),
11216         .outclk(gnd),
11217         .outclkena(vcc),
11218         .inclk(gnd),
11219         .inclkena(vcc),
11220         .areset(gnd),
11221         .sreset(gnd),
11222         .delayctrlin(gnd),
11223         .devclrn(devclrn),
11224         .devpor(devpor),
11225         .devoe(devoe),
11226         .combout(),
11227         .regout(),
11228         .ddioregout(),
11229         .padio(seven_seg_pin[1]),
11230         .dqsundelayedout());
11231 // synopsys translate_off
11232 defparam \inst|seven_seg_pin_out_1_~I .ddio_mode = "none";
11233 defparam \inst|seven_seg_pin_out_1_~I .input_async_reset = "none";
11234 defparam \inst|seven_seg_pin_out_1_~I .input_power_up = "low";
11235 defparam \inst|seven_seg_pin_out_1_~I .input_register_mode = "none";
11236 defparam \inst|seven_seg_pin_out_1_~I .input_sync_reset = "none";
11237 defparam \inst|seven_seg_pin_out_1_~I .oe_async_reset = "none";
11238 defparam \inst|seven_seg_pin_out_1_~I .oe_power_up = "low";
11239 defparam \inst|seven_seg_pin_out_1_~I .oe_register_mode = "none";
11240 defparam \inst|seven_seg_pin_out_1_~I .oe_sync_reset = "none";
11241 defparam \inst|seven_seg_pin_out_1_~I .operation_mode = "output";
11242 defparam \inst|seven_seg_pin_out_1_~I .output_async_reset = "none";
11243 defparam \inst|seven_seg_pin_out_1_~I .output_power_up = "low";
11244 defparam \inst|seven_seg_pin_out_1_~I .output_register_mode = "none";
11245 defparam \inst|seven_seg_pin_out_1_~I .output_sync_reset = "none";
11246 // synopsys translate_on
11247
11248 // atom is at PIN_R8
11249 stratix_io \inst|seven_seg_pin_tri_0_~I (
11250         .datain(!\~STRATIX_FITTER_CREATED_GND~I_combout ),
11251         .ddiodatain(gnd),
11252         .oe(vcc),
11253         .outclk(gnd),
11254         .outclkena(vcc),
11255         .inclk(gnd),
11256         .inclkena(vcc),
11257         .areset(gnd),
11258         .sreset(gnd),
11259         .delayctrlin(gnd),
11260         .devclrn(devclrn),
11261         .devpor(devpor),
11262         .devoe(devoe),
11263         .combout(),
11264         .regout(),
11265         .ddioregout(),
11266         .padio(seven_seg_pin[0]),
11267         .dqsundelayedout());
11268 // synopsys translate_off
11269 defparam \inst|seven_seg_pin_tri_0_~I .ddio_mode = "none";
11270 defparam \inst|seven_seg_pin_tri_0_~I .input_async_reset = "none";
11271 defparam \inst|seven_seg_pin_tri_0_~I .input_power_up = "low";
11272 defparam \inst|seven_seg_pin_tri_0_~I .input_register_mode = "none";
11273 defparam \inst|seven_seg_pin_tri_0_~I .input_sync_reset = "none";
11274 defparam \inst|seven_seg_pin_tri_0_~I .oe_async_reset = "none";
11275 defparam \inst|seven_seg_pin_tri_0_~I .oe_power_up = "low";
11276 defparam \inst|seven_seg_pin_tri_0_~I .oe_register_mode = "none";
11277 defparam \inst|seven_seg_pin_tri_0_~I .oe_sync_reset = "none";
11278 defparam \inst|seven_seg_pin_tri_0_~I .operation_mode = "output";
11279 defparam \inst|seven_seg_pin_tri_0_~I .output_async_reset = "none";
11280 defparam \inst|seven_seg_pin_tri_0_~I .output_power_up = "low";
11281 defparam \inst|seven_seg_pin_tri_0_~I .output_register_mode = "none";
11282 defparam \inst|seven_seg_pin_tri_0_~I .output_sync_reset = "none";
11283 // synopsys translate_on
11284
11285 endmodule