1) wraps the s3 parts of chipset code/memory init code with if CONFIG_HAVE_ACPI_RESUM...
[coreboot.git] / payloads /
drwxr-xr-x   ..
drwxr-xr-x - bayou
drwxr-xr-x - coreinfo
drwxr-xr-x - external
drwxr-xr-x - libpayload