From f483766a38cf8258eac85d1f9c7f21da9ca5f2bb Mon Sep 17 00:00:00 2001
From: Bernhard Urban <lewurm@gmail.com>
Date: Fri, 6 Apr 2012 14:27:34 +0200
Subject: [PATCH] sigh

---
 src/mainboard/asus/m5a99x-evo/fadt.c         |  2 +-
 src/mainboard/asus/m5a99x-evo/get_bus_conf.c |  2 +-
 src/mainboard/asus/m5a99x-evo/mainboard.c    |  2 +-
 src/mainboard/asus/m5a99x-evo/mptable.c      |  2 +-
 src/northbridge/amd/amdfam10/northbridge.c   |  6 ++++--
 src/southbridge/amd/cimx/sb800/early.c       |  4 ++--
 src/vendorcode/amd/cimx/sb900/GppHp.c        | 10 ++++++++--
 7 files changed, 18 insertions(+), 10 deletions(-)

diff --git a/src/mainboard/asus/m5a99x-evo/fadt.c b/src/mainboard/asus/m5a99x-evo/fadt.c
index adba78055..420c3bac8 100644
--- a/src/mainboard/asus/m5a99x-evo/fadt.c
+++ b/src/mainboard/asus/m5a99x-evo/fadt.c
@@ -26,7 +26,7 @@
 #include <arch/acpi.h>
 #include <arch/io.h>
 #include <device/device.h>
-#include "SBPLATFORM.h"
+#include "SbPlatform.h"
 
 void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 {
diff --git a/src/mainboard/asus/m5a99x-evo/get_bus_conf.c b/src/mainboard/asus/m5a99x-evo/get_bus_conf.c
index 5c21e09d5..4a939dc93 100644
--- a/src/mainboard/asus/m5a99x-evo/get_bus_conf.c
+++ b/src/mainboard/asus/m5a99x-evo/get_bus_conf.c
@@ -28,7 +28,7 @@
 #endif
 #include <cpu/amd/amdfam10_sysconf.h>
 #if CONFIG_AMD_SB_CIMX
-#include <sb_cimx.h>
+#include <SbEarly.h>
 #endif
 
 /* Global variables for MB layouts and these will be shared by irqtable mptable
diff --git a/src/mainboard/asus/m5a99x-evo/mainboard.c b/src/mainboard/asus/m5a99x-evo/mainboard.c
index d6c3a5b61..b4bc11aca 100644
--- a/src/mainboard/asus/m5a99x-evo/mainboard.c
+++ b/src/mainboard/asus/m5a99x-evo/mainboard.c
@@ -25,7 +25,7 @@
 #include <cpu/x86/msr.h>
 #include <cpu/amd/mtrr.h>
 #include <device/pci_def.h>
-#include "SBPLATFORM.h"
+#include "SbPlatform.h"
 #include "chip.h"
 
 uint64_t uma_memory_base, uma_memory_size;
diff --git a/src/mainboard/asus/m5a99x-evo/mptable.c b/src/mainboard/asus/m5a99x-evo/mptable.c
index 516b915c4..4396a2b6b 100644
--- a/src/mainboard/asus/m5a99x-evo/mptable.c
+++ b/src/mainboard/asus/m5a99x-evo/mptable.c
@@ -24,7 +24,7 @@
 #include <string.h>
 #include <stdint.h>
 #include <cpu/amd/amdfam10_sysconf.h>
-#include <SBPLATFORM.h>
+#include <SbPlatform.h>
 
 extern int bus_isa;
 extern u8 bus_rs780[11];
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index 89bd6733c..018b6c83b 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -47,8 +47,10 @@
 #endif
 
 #include <cpu/amd/amdfam10_sysconf.h>
-#if CONFIG_AMD_SB_CIMX
+#if CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800
 #include <sb_cimx.h>
+#elif CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900
+#include <SbEarly.h>
 #endif
 
 struct amdfam10_sysconf_t sysconf;
@@ -1448,7 +1450,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max)
 static void cpu_bus_init(device_t dev)
 {
 	initialize_cpus(dev->link_list);
-#if CONFIG_AMD_SB_CIMX
+#if CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 || CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900
 	sb_After_Pci_Init();
 	sb_Mid_Post_Init();
 #endif
diff --git a/src/southbridge/amd/cimx/sb800/early.c b/src/southbridge/amd/cimx/sb800/early.c
index 9d49a52d5..3f4020f0c 100644
--- a/src/southbridge/amd/cimx/sb800/early.c
+++ b/src/southbridge/amd/cimx/sb800/early.c
@@ -23,8 +23,8 @@
 #include <device/pci_ids.h>
 #include <arch/io.h>		/* inl, outl */
 #include <arch/romcc_io.h>	/* device_t */
-#include "SBPLATFORM.h"
-#include "sb_cimx.h"
+#include "SbPlatform.h"
+#include "SbEarly.h"
 #include "cfg.h"		/*sb800_cimx_config*/
 
 
diff --git a/src/vendorcode/amd/cimx/sb900/GppHp.c b/src/vendorcode/amd/cimx/sb900/GppHp.c
index 4975b8ab4..59e2e4dd7 100755
--- a/src/vendorcode/amd/cimx/sb900/GppHp.c
+++ b/src/vendorcode/amd/cimx/sb900/GppHp.c
@@ -51,7 +51,13 @@ VOID  sbGppDynamicPowerSaving (IN AMDSBCFG* pConfig );
 VOID  sbGppForceGen1 (IN AMDSBCFG* pConfig, IN CONST UINT8 ActivePorts);
 VOID  sbGppForceGen2 (IN AMDSBCFG* pConfig, IN CONST UINT8 ActivePorts);
 UINT8 GppPortPollingLtssm (IN AMDSBCFG* pConfig, IN UINT8 ActivePorts, IN BOOLEAN IsGen2);
+VOID SbStall (IN UINT32 uSec);
+VOID outPort80 (IN UINT32 pcode);
 
+// wtf Declaration ...
+VOID sbGppHotPlugSmiProcess (IN AMDSBCFG* pConfig, IN UINT32 HpPort);
+VOID sbGppHotUnplugSmiProcess (IN AMDSBCFG* pConfig, IN UINT32 HpPort);
+VOID sbGppHotplugSmiCallback (IN AMDSBCFG* pConfig, IN BOOLEAN IsPlugged);
 
 /**
  * GPP hot plug handler
@@ -61,8 +67,8 @@ UINT8 GppPortPollingLtssm (IN AMDSBCFG* pConfig, IN UINT8 ActivePorts, IN BOOLEA
  * @param[in] HpPort    The hot plug port number.
  *
  */
-VOID
-sbGppHotPlugSmiProcess (
+
+VOID sbGppHotPlugSmiProcess (
   IN       AMDSBCFG*     pConfig,
   IN       UINT32        HpPort
   )
-- 
2.25.1