From d6a1373da2c4f49b1f96b6516bc88c72de7338b4 Mon Sep 17 00:00:00 2001 From: Uwe Hermann Date: Sat, 1 Jan 2011 23:30:37 +0000 Subject: [PATCH] AMD SB800: Drop component prefix from filenames. We did the same with other chipsets in r6150. Signed-off-by: Uwe Hermann Acked-by: Uwe Hermann git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6236 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/amd/bimini_fam10/romstage.c | 4 +-- src/southbridge/amd/cimx_wrapper/sb800/Amd.h | 10 ++----- .../amd/cimx_wrapper/sb800/Amdlib.h | 1 - .../amd/cimx_wrapper/sb800/Kconfig | 9 +++--- .../amd/cimx_wrapper/sb800/Makefile.inc | 14 ++++----- .../amd/cimx_wrapper/sb800/SBPLATFORM.h | 25 +++++++--------- .../amd/cimx_wrapper/sb800/SbEarly.h | 1 - .../amd/cimx_wrapper/sb800/bootblock.c | 5 ---- .../cimx_wrapper/sb800/{sb800_cfg.c => cfg.c} | 7 ++--- .../cimx_wrapper/sb800/{sb800_cfg.h => cfg.h} | 6 ---- .../amd/cimx_wrapper/sb800/chip_name.c | 2 +- .../sb800/{sb800_early.c => early.c} | 13 ++++----- .../sb800/{sb800_late.c => late.c} | 29 ++++++------------- .../cimx_wrapper/sb800/{sb800_lpc.c => lpc.c} | 4 +-- .../cimx_wrapper/sb800/{sb800_lpc.h => lpc.h} | 1 - .../sb800/{sb800_smbus.c => smbus.c} | 4 +-- .../sb800/{sb800_smbus.h => smbus.h} | 0 17 files changed, 46 insertions(+), 89 deletions(-) rename src/southbridge/amd/cimx_wrapper/sb800/{sb800_cfg.c => cfg.c} (97%) rename src/southbridge/amd/cimx_wrapper/sb800/{sb800_cfg.h => cfg.h} (99%) rename src/southbridge/amd/cimx_wrapper/sb800/{sb800_early.c => early.c} (88%) rename src/southbridge/amd/cimx_wrapper/sb800/{sb800_late.c => late.c} (96%) rename src/southbridge/amd/cimx_wrapper/sb800/{sb800_lpc.c => lpc.c} (98%) rename src/southbridge/amd/cimx_wrapper/sb800/{sb800_lpc.h => lpc.h} (99%) rename src/southbridge/amd/cimx_wrapper/sb800/{sb800_smbus.c => smbus.c} (99%) rename src/southbridge/amd/cimx_wrapper/sb800/{sb800_smbus.h => smbus.h} (100%) diff --git a/src/mainboard/amd/bimini_fam10/romstage.c b/src/mainboard/amd/bimini_fam10/romstage.c index 3709862e5..503ddea95 100644 --- a/src/mainboard/amd/bimini_fam10/romstage.c +++ b/src/mainboard/amd/bimini_fam10/romstage.c @@ -47,7 +47,7 @@ #include "southbridge/amd/rs780/early_setup.c" #include #include /* SB OEM constants */ -#include +#include #include "northbridge/amd/amdfam10/debug.c" static void activate_spd_rom(const struct mem_controller *ctrl) @@ -193,7 +193,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* show final fid and vid */ msr=rdmsr(0xc0010071); printk(BIOS_DEBUG, "End FIDVIDMSR 0xc0010071 0x%08x 0x%08x \n", msr.hi, msr.lo); - #endif +#endif rs780_htinit(); diff --git a/src/southbridge/amd/cimx_wrapper/sb800/Amd.h b/src/southbridge/amd/cimx_wrapper/sb800/Amd.h index cbe6d5d06..b7fd04574 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/Amd.h +++ b/src/southbridge/amd/cimx_wrapper/sb800/Amd.h @@ -35,20 +35,15 @@ * */ - #ifndef _AMD_H_ #define _AMD_H_ -// -// // AGESA Types and Definitions -// -// + #ifndef NULL #define NULL 0 #endif - #define LAST_ENTRY 0xFFFFFFFF #define IOCF8 0xCF8 #define IOCFC 0xCFC @@ -58,7 +53,6 @@ typedef UINTN AGESA_STATUS; - #define AGESA_SUCCESS ((AGESA_STATUS) 0x0) #define AGESA_ALERT ((AGESA_STATUS) 0x40000000) #define AGESA_WARNING ((AGESA_STATUS) 0x40000001) @@ -131,7 +125,6 @@ typedef struct _AMD_MODULE_HEADER { IN struct _AMD_MODULE_HEADER *NextBlockPtr; ///< Next module header link } AMD_MODULE_HEADER; - #define FUNC_0 0 // bit-placed for PCI address creation #define FUNC_1 1 #define FUNC_2 2 @@ -378,4 +371,5 @@ typedef enum { #ifndef BIT63 #define BIT63 0x8000000000000000ull #endif + #endif diff --git a/src/southbridge/amd/cimx_wrapper/sb800/Amdlib.h b/src/southbridge/amd/cimx_wrapper/sb800/Amdlib.h index c5fd22b69..48177ed17 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/Amdlib.h +++ b/src/southbridge/amd/cimx_wrapper/sb800/Amdlib.h @@ -36,7 +36,6 @@ typedef CHAR8 *va_list; #define va_arg(ap, t) ( *(t *) ((ap += _INTSIZEOF (t)) - _INTSIZEOF (t)) ) #define va_end(ap) ( ap = (va_list)0 ) - #pragma pack (push, 1) #define IMAGE_ALIGN 32*1024 diff --git a/src/southbridge/amd/cimx_wrapper/sb800/Kconfig b/src/southbridge/amd/cimx_wrapper/sb800/Kconfig index a24b29c1f..8b9ddf820 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/Kconfig +++ b/src/southbridge/amd/cimx_wrapper/sb800/Kconfig @@ -17,10 +17,11 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## - if SOUTHBRIDGE_AMD_CIMX_WRAPPER_SB800 + config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/amd/cimx_wrapper/sb800/bootblock.c" -endif #SOUTHBRIDGE_AMD_CIMX_WRAPPER_SB800 + string + default "southbridge/amd/cimx_wrapper/sb800/bootblock.c" + +endif diff --git a/src/southbridge/amd/cimx_wrapper/sb800/Makefile.inc b/src/southbridge/amd/cimx_wrapper/sb800/Makefile.inc index 204c4ffab..c48234d1f 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/Makefile.inc +++ b/src/southbridge/amd/cimx_wrapper/sb800/Makefile.inc @@ -23,13 +23,13 @@ subdirs-y += ../../../../../src/vendorcode/amd/cimx/lib # SB800 Platform Files -romstage-y += sb800_cfg.c -romstage-y += sb800_early.c -romstage-y += sb800_smbus.c +romstage-y += cfg.c +romstage-y += early.c +romstage-y += smbus.c -ramstage-y += sb800_cfg.c -ramstage-y += sb800_late.c +ramstage-y += cfg.c +ramstage-y += late.c -driver-y += sb800_smbus.c -driver-y += sb800_lpc.c +driver-y += smbus.c +driver-y += lpc.c diff --git a/src/southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h b/src/southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h index 10409f201..ea71c4414 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h +++ b/src/southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h @@ -24,18 +24,18 @@ #ifndef _AMD_SBPLATFORM_H_ #define _AMD_SBPLATFORM_H_ -#include "cbtypes.h" +#include typedef UINT64 PLACEHOLDER; -#include "Amdlib.h" -#include "Amd.h" -#include "amdlib32.h"//TODO merge with agesa wrapper -#include "SB800.h" -#include "SBTYPE.h" -#include "ACPILIB.h" -#include "SBDEF.h" -#include "AMDSBLIB.h" -#include "SBSUBFUN.h" -#include "OEM.h" +#include +#include +#include //TODO merge with agesa wrapper +#include +#include +#include +#include +#include +#include +#include #ifdef NULL #undef NULL @@ -66,9 +66,6 @@ typedef union _PCI_ADDR { #define FIXUP_PTR(ptr) ptr - - - //------------------------------------------------------------------------------------------------------------------------// /** * SB_CIMx_PARAMETER 0 1 2 Defult Value When CIMx Take over diff --git a/src/southbridge/amd/cimx_wrapper/sb800/SbEarly.h b/src/southbridge/amd/cimx_wrapper/sb800/SbEarly.h index df5143aeb..706d9153c 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/SbEarly.h +++ b/src/southbridge/amd/cimx_wrapper/sb800/SbEarly.h @@ -17,7 +17,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ - #ifndef _CIMX_SB_EARLY_H_ #define _CIMX_SB_EARLY_H_ diff --git a/src/southbridge/amd/cimx_wrapper/sb800/bootblock.c b/src/southbridge/amd/cimx_wrapper/sb800/bootblock.c index 51160e5dc..a29bf8c3f 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/bootblock.c +++ b/src/southbridge/amd/cimx_wrapper/sb800/bootblock.c @@ -17,11 +17,9 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ - #include #include - #if CONFIG_SERIAL_POST == 1 /* Data */ @@ -53,7 +51,6 @@ #endif // CONFIG_SERIAL_POST == 1 - static void sb800_enable_rom(void) { u32 word; @@ -90,7 +87,6 @@ static void sb800_enable_rom(void) pci_io_write_config16(dev, 0x6c, word); } - static void uart_init(void) { #if CONFIG_SERIAL_POST == 1 @@ -106,7 +102,6 @@ static void uart_init(void) #endif // CONFIG_SERIAL_POST == 1 } - static void bootblock_southbridge_init(void) { /* Setup the rom access for 2M */ diff --git a/src/southbridge/amd/cimx_wrapper/sb800/sb800_cfg.c b/src/southbridge/amd/cimx_wrapper/sb800/cfg.c similarity index 97% rename from src/southbridge/amd/cimx_wrapper/sb800/sb800_cfg.c rename to src/southbridge/amd/cimx_wrapper/sb800/cfg.c index 9d772b6d0..64fb0ff11 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/sb800_cfg.c +++ b/src/southbridge/amd/cimx_wrapper/sb800/cfg.c @@ -17,10 +17,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ - -#include "SBPLATFORM.h" -#include "sb800_cfg.h" - +#include +#include /** * @brief South Bridge CIMx configuration @@ -124,4 +122,3 @@ void sb800_cimx_config(AMDSBCFG *sb_config) //sb_config-> #endif //!__PRE_RAM__ } - diff --git a/src/southbridge/amd/cimx_wrapper/sb800/sb800_cfg.h b/src/southbridge/amd/cimx_wrapper/sb800/cfg.h similarity index 99% rename from src/southbridge/amd/cimx_wrapper/sb800/sb800_cfg.h rename to src/southbridge/amd/cimx_wrapper/sb800/cfg.h index a3d8a290a..9fae525cb 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/sb800_cfg.h +++ b/src/southbridge/amd/cimx_wrapper/sb800/cfg.h @@ -17,13 +17,11 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ - #ifndef _SB800_CFG_H_ #define _SB800_CFG_H_ #include - /** * @def BIOS_SIZE_1M * @def BIOS_SIZE_2M @@ -150,7 +148,6 @@ */ #define SATA_PORT_MULT_CAP_RESERVED 1 - /** * @def AZALIA_AUTO * @brief Detect Azalia controller automatically. @@ -218,10 +215,8 @@ #define GPP_CFGMODE GPP_CFGMODE_X1111 #endif - /** * @brief South Bridge CIMx configuration - * */ void sb800_cimx_config(AMDSBCFG *sb_cfg); @@ -233,7 +228,6 @@ void sb800_cimx_config(AMDSBCFG *sb_cfg); * @param[in] func Southbridge CIMx Function ID. * @param[in] data Southbridge Input Data. * @param[in] sb_cfg Southbridge configuration structure pointer. - * */ u32 sb800_callout_entry(u32 func, u32 data, void* sb_cfg); diff --git a/src/southbridge/amd/cimx_wrapper/sb800/chip_name.c b/src/southbridge/amd/cimx_wrapper/sb800/chip_name.c index 4a9ede938..817f49fb0 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/chip_name.c +++ b/src/southbridge/amd/cimx_wrapper/sb800/chip_name.c @@ -21,5 +21,5 @@ #include "chip.h" struct chip_operations southbridge_amd_cimx_wrapper_sb800_ops = { - CHIP_NAME("AMD South Bridge SB800") + CHIP_NAME("AMD SB800 Southbridge") }; diff --git a/src/southbridge/amd/cimx_wrapper/sb800/sb800_early.c b/src/southbridge/amd/cimx_wrapper/sb800/early.c similarity index 88% rename from src/southbridge/amd/cimx_wrapper/sb800/sb800_early.c rename to src/southbridge/amd/cimx_wrapper/sb800/early.c index 871c423e3..a97bdb325 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/sb800_early.c +++ b/src/southbridge/amd/cimx_wrapper/sb800/early.c @@ -17,16 +17,14 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ - //#include #include #include -#include /* inl, outl */ -#include /* device_t */ -#include "SBPLATFORM.h" -#include "SbEarly.h" -#include "sb800_cfg.h" /*sb800_cimx_config*/ - +#include +#include +#include +#include +#include /** * @brief Get SouthBridge device number @@ -45,7 +43,6 @@ u32 get_sbdn(u32 bus) return (dev >> 15) & 0x1f; } - /** * @brief South Bridge CIMx romstage entry, * wrapper of sbPowerOnInit entry point. diff --git a/src/southbridge/amd/cimx_wrapper/sb800/sb800_late.c b/src/southbridge/amd/cimx_wrapper/sb800/late.c similarity index 96% rename from src/southbridge/amd/cimx_wrapper/sb800/sb800_late.c rename to src/southbridge/amd/cimx_wrapper/sb800/late.c index 1ef5b1f83..1df3edcc0 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/sb800_late.c +++ b/src/southbridge/amd/cimx_wrapper/sb800/late.c @@ -17,17 +17,15 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ - -#include /* device_t */ -#include /* device_operations */ +#include +#include #include -#include /* smbus_bus_operations */ -#include /* printk */ -#include "sb800_lpc.h" /* lpc_read_resources */ -#include "SBPLATFORM.h" /* Platfrom Specific Definitions */ -#include "sb800_cfg.h" /* sb800 Cimx configuration */ -#include "chip.h" /* struct southbridge_amd_cimx_wrapper_sb800_config */ - +#include +#include +#include +#include +#include +#include "chip.h" /*implement in mainboard.c*/ //void set_pcie_assert(void); @@ -35,14 +33,13 @@ void set_pcie_reset(void); void set_pcie_dereset(void); - #ifndef _RAMSTAGE_ #define _RAMSTAGE_ #endif + static AMDSBCFG sb_late_cfg; //global, init in sb800_cimx_config static AMDSBCFG *sb_config = &sb_late_cfg; - /** * @brief Entry point of Southbridge CIMx callout * @@ -78,14 +75,12 @@ u32 sb800_callout_entry(u32 func, u32 data, void* config) return ret; } - static struct pci_operations lops_pci = { .set_subsystem = 0, }; static void lpc_enable_resources(device_t dev) { - pci_dev_enable_resources(dev); //lpc_enable_childrens_resources(dev); } @@ -111,7 +106,6 @@ static const struct pci_driver lpc_driver __pci_driver = { .device = PCI_DEVICE_ID_ATI_SB800_LPC, }; - static void sata_enable_resources(struct device *dev) { sataInitAfterPciEnum(sb_config); @@ -141,7 +135,6 @@ static const struct pci_driver sata_driver __pci_driver = { .device = PCI_DEVICE_ID_ATI_SB800_SATA, //SATA IDE Mode 4390 }; - #if CONFIG_USBDEBUG static void usb_set_resources(struct device *dev) { @@ -225,7 +218,6 @@ static const struct pci_driver azalia_driver __pci_driver = { .device = PCI_DEVICE_ID_ATI_SB800_HDA, }; - static void gec_init(struct device *dev) { gecInitAfterPciEnum(sb_config); @@ -248,7 +240,6 @@ static const struct pci_driver gec_driver __pci_driver = { .device = PCI_DEVICE_ID_ATI_SB800_GEC, }; - static void pcie_init(device_t dev) { sbPcieGppLateInit(sb_config); @@ -270,7 +261,6 @@ static const struct pci_driver pci_driver __pci_driver = { .device = PCI_DEVICE_ID_ATI_SB800_PCI, }; - struct device_operations bridge_ops = { .read_resources = pci_bus_read_resources, .set_resources = pci_dev_set_resources, @@ -310,7 +300,6 @@ static const struct pci_driver PORTD_driver __pci_driver = { .device = PCI_DEVICE_ID_ATI_SB800_PCIED, }; - /** * @brief SB Cimx entry point sbBeforePciInit wrapper */ diff --git a/src/southbridge/amd/cimx_wrapper/sb800/sb800_lpc.c b/src/southbridge/amd/cimx_wrapper/sb800/lpc.c similarity index 98% rename from src/southbridge/amd/cimx_wrapper/sb800/sb800_lpc.c rename to src/southbridge/amd/cimx_wrapper/sb800/lpc.c index 6a64aa9cc..7cc4d27ef 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/sb800_lpc.c +++ b/src/southbridge/amd/cimx_wrapper/sb800/lpc.c @@ -18,8 +18,7 @@ */ #include -#include "sb800_lpc.h" - +#include void lpc_read_resources(device_t dev) { @@ -60,7 +59,6 @@ void lpc_set_resources(struct device *dev) /* Specical case. SPI Base Address. The SpiRomEnable should be set. */ res = find_resource(dev, SPIROM_BASE_ADDRESS); pci_write_config32(dev, SPIROM_BASE_ADDRESS, res->base | 1 << 1); - } /** diff --git a/src/southbridge/amd/cimx_wrapper/sb800/sb800_lpc.h b/src/southbridge/amd/cimx_wrapper/sb800/lpc.h similarity index 99% rename from src/southbridge/amd/cimx_wrapper/sb800/sb800_lpc.h rename to src/southbridge/amd/cimx_wrapper/sb800/lpc.h index 8fc4f6c16..00f15a3eb 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/sb800_lpc.h +++ b/src/southbridge/amd/cimx_wrapper/sb800/lpc.h @@ -20,7 +20,6 @@ #ifndef _SB800_LPC_H_ #define _SB800_LPC_H_ - #define SPIROM_BASE_ADDRESS 0xA0 /* SPI ROM base address */ void lpc_read_resources(device_t dev); diff --git a/src/southbridge/amd/cimx_wrapper/sb800/sb800_smbus.c b/src/southbridge/amd/cimx_wrapper/sb800/smbus.c similarity index 99% rename from src/southbridge/amd/cimx_wrapper/sb800/sb800_smbus.c rename to src/southbridge/amd/cimx_wrapper/sb800/smbus.c index e5ac4b8ab..6599cafc3 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/sb800_smbus.c +++ b/src/southbridge/amd/cimx_wrapper/sb800/smbus.c @@ -17,9 +17,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ - #include -#include "sb800_smbus.h" +#include static inline void smbus_delay(void) { @@ -248,4 +247,3 @@ void alink_ax_indx(u32 space /*c or p? */ , u32 axindc, u32 mask, u32 val) outl(tmp, AB_DATA); outl(0, AB_INDX); } - diff --git a/src/southbridge/amd/cimx_wrapper/sb800/sb800_smbus.h b/src/southbridge/amd/cimx_wrapper/sb800/smbus.h similarity index 100% rename from src/southbridge/amd/cimx_wrapper/sb800/sb800_smbus.h rename to src/southbridge/amd/cimx_wrapper/sb800/smbus.h -- 2.25.1