From 305e8861d66b050a3e35133603acce69324349fe Mon Sep 17 00:00:00 2001 From: Uwe Hermann Date: Thu, 4 Nov 2010 18:33:42 +0000 Subject: [PATCH] Add a rom_enable() function to via/vt8231 and call it from via/epia/romstage.c Signed-off-by: Uwe Hermann Signed-off-by: Myles Watson Acked-by: Uwe Hermann git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6018 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/via/epia/romstage.c | 2 + .../via/vt8231/vt8231_enable_rom.c | 47 +++++++++++++++++++ src/southbridge/via/vt8231/vt8231_lpc.c | 3 -- 3 files changed, 49 insertions(+), 3 deletions(-) create mode 100644 src/southbridge/via/vt8231/vt8231_enable_rom.c diff --git a/src/mainboard/via/epia/romstage.c b/src/mainboard/via/epia/romstage.c index caab9a246..be72d1c96 100644 --- a/src/mainboard/via/epia/romstage.c +++ b/src/mainboard/via/epia/romstage.c @@ -15,6 +15,7 @@ #include "lib/debug.c" #include "southbridge/via/vt8231/vt8231_early_smbus.c" #include "southbridge/via/vt8231/vt8231_early_serial.c" +#include "southbridge/via/vt8231/vt8231_enable_rom.c" static inline int spd_read_byte(unsigned device, unsigned address) { @@ -86,6 +87,7 @@ static void main(unsigned long bist) /* Halt if there was a built in self test failure */ report_bist_failure(bist); + vt8231_enable_rom(); enable_mainboard_devices(); enable_smbus(); enable_shadow_ram(); diff --git a/src/southbridge/via/vt8231/vt8231_enable_rom.c b/src/southbridge/via/vt8231/vt8231_enable_rom.c new file mode 100644 index 000000000..bb4342061 --- /dev/null +++ b/src/southbridge/via/vt8231/vt8231_enable_rom.c @@ -0,0 +1,47 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2010 Uwe Hermann + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include +#include +#include + +static void vt8231_enable_rom(void) +{ + device_t dev; + + dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, + PCI_DEVICE_ID_VIA_8231), 0); + + /* + * ROM decode control register (0x43): + * + * Bit Decode range + * ----------------- + * 7 0xFFFE0000-0xFFFEFFFF + * 6 0xFFF80000-0xFFFDFFFF + * 5 0xFFF00000-0xFFF7FFFF + * 4 0x000E0000-0x000EFFFF + * 3 0x000D8000-0x000DFFFF + * 2 0x000D0000-0x000D7FFF + * 1 0x000C8000-0x000CFFFF + * 0 0x000C0000-0x000C7FFF + */ + pci_write_config8(dev, 0x43, (1 << 7) | (1 << 6) | (1 << 5)); +} diff --git a/src/southbridge/via/vt8231/vt8231_lpc.c b/src/southbridge/via/vt8231/vt8231_lpc.c index a063adf71..40854dbcf 100644 --- a/src/southbridge/via/vt8231/vt8231_lpc.c +++ b/src/southbridge/via/vt8231/vt8231_lpc.c @@ -61,9 +61,6 @@ static void vt8231_init(struct device *dev) enables |= 0x80; pci_write_config8(dev, 0x6C, enables); - // Map 4MB of FLASH into the address space - pci_write_config8(dev, 0x41, 0x7f); - // Set bit 6 of 0x40, because Award does it (IO recovery time) // IMPORTANT FIX - EISA 0x4d0 decoding must be on so that PCI // interrupts can be properly marked as level triggered. -- 2.25.1