Use __PAYLOAD__ instead of PAYLOAD as replacement template for abuild.

Comment out code which currently doesn't compile. Needs fixing later.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2614 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Update URL for the PCI IRQ Routing Table Specification (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2613 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Make the output of getpir look a bit less crappy (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2612 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

This patch makes a some elf debugging information available at log level
debug instead of spew. (trivial)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2611 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Exit on return code of read_layout and print error message to stderr
instead of stdout (trivial)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2610 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

On behalf of AMD:

Drop AMD prototype mainboards that were for internal testing &
validation use only.

Note: These boards could never be purchased. No reasons to worry.
Questions welcome via private mail.

Signed-off-by: Yinghai Lu <yinghai.lu@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2609 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

add uses CONFIG_COMPRESSED_PAYLOAD_* to allow building the board in
abuild with a payload. Trivial

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2608 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Fix two boards broken by the large patches of late.

artecgroup/dbe61
Add CONFIG_COMPRESSED_PAYLOAD_NRV2B to Options.lb since it's used in
Config.lb.
Change default for CONFIG_PCI_ROM_RUN to 1 so VGA ROM can run.

technologic/ts5300
Removed CONFIG_CONSOLE_VGA, the embedded board has no VGA without the
development addon card anyways.
Changes to target Config.lb so it actually builds.

Signed-off-by: Peter Stuge <peter@stuge.se>
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2607 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Vendor specific patch, thus self-acked.

* going back to old board specific dsdt for agami aruma.
  This is hopefully dropped again some day, but until then
  here's a working solution.
* Some minor Agami specific changes.
* drop obsolete bringup workaround hyperclocking.diff
* increase image size again, x86emu wants it.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2606 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Config file update for Agami Aruma board.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2605 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Trivial patch: Make buildrom a little bit more verbose.
It shows the remaining space in an image now.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2604 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Rename flash_rom.c to flashrom.c. The tool is called 'flashrom' after
all.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2603 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Jeremy Jackson wrote:
I'm guessing nobody has tried compiling it with 64bit userspace?

Patch makes it compile cleanly and stops a "SEGV instead of working"
issue.

I also added a few checks for errors on system calls.

Signed-off-by: Jeremy Jackson <jerj@coplanar.net>
Reworked and
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2602 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Add VIA CX700 to the list of supported southbridges (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2601 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

This patch corrects r2587. It makes sure that the VGA is initialized
when CONFIG_CONSOLE_VGA==0 and CONFIG_PCI_ROM_RUN==1

Signed-off-by: Roman Kononov <kononov@dls.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2600 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

add support for CX700 builtin southbridge
Signed-off-by: Randall Philipson <rtphilipson@cox.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2599 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

increase image size for abuild (trivial)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2598 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Fix epia-m build after u8/u16/u32 changes in Yh Lu's patch.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2597 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

YhLu's patch from January 18th.

hypertransport specific updates

Signed-off-by: Yinghai Lu <yinghai.lu@amd.com>
Signed-off-by: Ed Swierk <eswierk@arastra.com>
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ward Vandewege <ward@gnu.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2596 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

This commit is part of YhLu's patch from January 18th.

Drop a lot of debugging code from northbridge.c

Signed-off-by: Yinghai Lu <yinghai.lu@amd.com>
Signed-off-by: Ed Swierk <eswierk@arastra.com>
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ward Vandewege <ward@gnu.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2595 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

YhLu's patch from January 18th. This part is mostly cleaning up
dead code and adding a few fixmes.

Signed-off-by: Yinghai Lu <yinghai.lu@amd.com>
Signed-off-by: Ed Swierk <eswierk@arastra.com>
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ward Vandewege <ward@gnu.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2594 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

next part of YhLu's large patch. I am not sure whether the tables.c
changes are correct. If someone could look into this, thank you.

Signed-off-by: Yinghai Lu <yinghai.lu@amd.com>
Signed-off-by: Ed Swierk <eswierk@arastra.com>
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ward Vandewege <ward@gnu.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2593 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Disable USB console on the m57sli for now.

Signed-off-by: Ed Swierk <eswierk@arastra.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2592 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Part IV

Signed-off-by: Yinghai Lu <yinghai.lu at amd.com>
Signed-off-by: Ed Swierk <eswierk at arastra.com>
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ward Vandewege <ward at gnu.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2591 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Part III of YhLu's patch from January 18th

Signed-off-by: Yinghai Lu <yinghai.lu at amd.com>
Signed-off-by: Ed Swierk <eswierk at arastra.com>
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ward Vandewege <ward at gnu.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2590 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

two more directories from YhLu's mcp55 megapatch.

Signed-off-by: Yinghai Lu <yinghai.lu at amd.com>
Signed-off-by: Ed Swierk <eswierk at arastra.com>
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ward Vandewege <ward at gnu.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2589 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

This is part of the outstanding mcp55 commit from January 18th. It will
likely break the build, since it is only a small part, but it needs to
go in at some point and doing it directory by directory makes things
easier.

Signed-off-by: Yinghai Lu <yinghai.lu at amd.com>
Signed-off-by: Ed Swierk <eswierk at arastra.com>
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ward Vandewege <ward at gnu.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2588 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

This patch makes sure that VGA is initialized before it is used. Without
this fix, LinuxBIOS crashes if the CONSOLE_LOG_LEVEL is high enough.

Additionally, The VGA option rom will be executed if either
CONFIG_PCI_ROM_RUN=1 or CONFIG_CONSOLE_VGA=1.

Signed-off-by: Roman Kononov <kononov195-lbl@yahoo.com>
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2587 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Trivial patch:

* Drop empty file (0 bytes) northbridge/amd/amdk8/cpu_rev.c
  and references to it.
* move config option decision to preprocessor instead of code
  since config options can not change during runtime
* slightly more verbose output in built_opt_tbl.c

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2586 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Trivial (cosmetic) cleanup:
* Only open /dev/mem once and do it early.
* Drop extern for function prototypes.
* Minimize ts5300 impact in probe_flash()

This cleanup will making ICH7 SPI support quite some easier.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2585 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Fix typo, add datasheet info, minor cosmetic fixes (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2584 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Coding style and cosmetics (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2583 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Add early serial support for the Fintek F81705F Super I/O.

Signed-off-by: Corey Osgood <corey_osgood@verizon.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2582 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: split flash_enable.c into chipset_enable.c and board_enable.c

This splits up the ROM Write enable code into chipset specific and
board specific parts. This of course means that a lot of code is
plainly moved about.

* Allows for linuxbios name matching and pci-subsystem id matching.
  The latter uses a double set to properly distuinguish boards despite
  of some known vendors being lax about it.
* Fixes GPIO15 being raised on every VT8235 southbridge, regardless of what
  that line actually controls; rom on EPIA-M, backlight on mitac 8999 laptop.
* Adds flashrom support for Asus A7V400-MX (KM400 + VT8235)
* Island aruma was renamed agami aruma, the board specific code now got
  adjusted. A set of pci-ids was retrieved from source code.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2581 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Add initial framework for the Tyan S1846.

It's not fully working, among other things because the Intel
440BX northbridge isn't working, yet.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2580 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

The *_early_serial.c pre-RAM code should do just that -- enable the serial
port(s), and nothing else. The code in superio.c will initialize the
rest when RAM is available...

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2579 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Drop useless and partly even incorrect comments (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2578 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Coding style fixes (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2577 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Initial Intel 440BX RAM initialization framework.

This does _not_ fully work, yet. You will _not_ be able to boot any
payload with this code, yet.

Add missing license headers.

Base the northbridge.c file on the Intel 855PM version, that comes
closer to what we want.

The raminit.c file is written from scratch and hardcodes several
values for now. This needs to be fixed later by reading the
correct values via SPD.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2576 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Flashrom: Add support for the ICH7-DH southbridge (untested).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2575 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Add support for the NSC PC87309 Super I/O.

Pre-RAM serial output on COM1 and COM2 has been tested. The rest is not
yet tested on real hardware.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2574 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

This is a trivial cosmetic fix. Without it, the error message might look like:
Image size doesnt match: Success

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2573 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

fix a stupid cut and paste error.

This is pretty trivial, as it was correct in the original non-CAR code.
Suddently, CAR works nicely.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2572 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Add initial pre-RAM serial output support for the VIA VT82C686(A/B)
southbridge (with integrated Super-I/O).

Signed-off-by: Corey Osgood <corey_osgood@verizon.net>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Corey Osgood <corey_osgood@verizon.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2571 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

The attached patch adds additional PCI IDs for MCP55 LPC devices to
flashrom. 0x0360 is needed to support the DFI LANParty NF590SLI, and I
am deducing the others based on pci_ids.h in the Linux kernel.

Signed-off-by: Ed Swierk <eswierk@arastra.com>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2570 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Document POST codes emitted by LinuxBIOSv2.

The list was created by Richard Smith <smithbone@gmail.com>, see
http://tracker.linuxbios.org/trac/LinuxBIOS/ticket/74.

It is probably not complete, yet.

(Closes #74)

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2569 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

flashrom: Fix wrong VT8235 flash enable failed warning.

* Fix harmless but worrying warning where the return value of
  pci_write_byte is misinterpreted.
* Hash together VT8231 and VT8235 code into VT823x. VT8231 is the better
  implementation, but lacked the write protect disable code that's
  apparently needed for VT8235.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2568 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

This patch splits console.c into 3 different files to get a better
overview of the code, facilitate future cleanups and reduce the
diff to Yinghai's tree at the same time.
No functional changes, only moving lines between files.
Copyright headers will be added later. Right now we benefit from
keeping the diff as small as possible.

Most of the work was done by Yinghai Lu.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2567 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Add missing it8716f_early_init.c file, which got lost in the commit of
http://www.openbios.org/pipermail/linuxbios/2007-February/018330.html
in revision 2559.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2566 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Add Winbond W39V080A support to Flashrom.

Signed-off-by: David Hendricks <david.hendricks@gmail.com>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2565 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Add support for the Gigabyte m57sli-s4 board to flashrom.

Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2564 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

This is (most of) the usb2 debug console code ripped out of
Uwe's version of yh_rest_of_patch.patch (13.02.07 - [PATCH]
Rest of huge MCP55 patch).

I dropped a lot of stuff, like broken indenting, removed copyright messages,
and this printk_ram_* stuff (what the heck is this supposed to be)

This codebase is really a mess. Further tarball contributions without a
_CLEANED UP_ patch will be denied, especially if they are not from an up to
date svn tree.

Signed-off-by: Yinghai Lu <yinghai.lu@amd.com>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2563 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Add a note that the resulting LinuxBIOS images are licensed under the
terms of the GPL, version 2 (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2562 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

This is another fixup round for Yinghai Lu's great patch.

It does the ROM_STREAM -> PAYLOAD rename that afaik was done after
Yinghai sent his work to legal, so it is required to get that code
building.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2561 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

List more possible payloads in the README (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2560 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Improve ITE IT8716F support.

Signed-off-by: Yinghai Lu <yinghai.lu@amd.com>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Signed-off-by: Ed Swierk <eswierk@arastra.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2559 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Remove unused defines.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2558 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Fix some CHIP_NAME() entries to use canonical names.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2557 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Fix typo (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2556 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Move HOWTO/ into documentation/ where it belongs (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2555 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Initial support for the following new mainboards:

* Nvidia l1_2pvv
* Gigabyte m57sli
* Supermicro h8dmr
* Tyan s2912 -- with HTX

The boards will currently _not_ compile, two further patches
from Yinghai Lu are still missing. Please be patient :)

Signed-off-by: Yinghai Lu <yinghai.lu@amd.com>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2554 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Currently the flashrom Makefile tries to detect whether pciutils-devel
is installed, but the test also fails if zlib-devel is missing. This
patch changes the error message accordingly.

Signed-off-by: Ed Swierk <eswierk@arastra.com>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2553 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Add support for the MSI K9ND Master Series (ms9282) board.

Signed-off-by: Bingxun Shi <bingxunshi@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2552 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Include src/include/boot/linuxbios_tables.h in the flashrom source
tree to make it compilable independant of the LinuxBIOS source code.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2551 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

This patch is a rework of Adam Kaufman's Solaris patch.

* flash.h:
  - add a license header
  - add system definitions
* flash_enable.c:
  - put io priviledge access in one single place
  - add includes required for Solaris.
* lbtable.c, flash_rom.c, 82802ab.c:
  - use MEM_DEV so it works on Solaris
* sst49lfxxxc.c, sharplhf00l04.c, sst_fwhub.c, 82802ab.c
  - drop unneeded include to sys/io.h
* Makefile
  - adapt to Solaris specifics.

Signed-off-by: Adam Kaufman <adam.kaufman@pinnacle.com>
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Adam Kaufman <adam.kaufman@pinnacle.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2550 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Add support for the Winbond W83627EHG Super I/O.

Signed-off-by: Yinghai Lu <yinghai.lu@amd.com>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Bingxun Shi <bingxunshi@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2549 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Nvidia MCP55 uses CMD to send/receive bytes instead of DAT0,
that's the same as broadcom/bcm5785.

Signed-off-by: bxshi <bingxunshi@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2548 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

This eliminates an illegal and annoying warning.

'rom' is the current read pointer.
'rom_end' points to last valid byte of the stream.

Signed-off-by: Roman Kononov <kononov195-lbl@yahoo.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2547 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

I have Sun Ultra40 workstation. Southbridge is nVidia CrushK8-04/nforce
2200 (too many names, sounds like a criminal).

1) Linuxbios loads kernel A; kernel A loads kernel B. Everything works
fine.

2) Then I push the reset button.

3) Linuxbios loads kernel A; kernel A loads kernel B. Kernel B complains
about wrong checksum of the mptable and crushes later.

An investigation showed that in 3), short after kernel A (v2.6.19.2)
sets
the Bus Master Enable bit of the nVidia's USB1 controller
(pci_set_master()),
the mptable gets two bytes at physical address 0x80 damaged.

Nothing is plugged to the USB ports. Other two Sun workstations had the
same
behavior. This does not make sense to me unless the controller has a HW
bug.

I believe, this should better be fixed in the kernel USB driver.

For now this patch offers a possibility for linuxbios to reset the USB
controller by setting HostControllerReset bit in HcCommandStatus
Register.
It is enablead by using 'register "usb1_hc_reset"="1"' in 'chip
southbridge/nvidia/ck804' section of the mainboard's Config.lb.

Signed-off-by: Roman Kononov <kononov195-lbl@yahoo.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2546 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Remove hardcoded gcc versions otherwise the build will break for
most people.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2545 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Fix typo which breaks the build ('defalut' should be 'default').

Signed-off-by: Ed Swierk <eswierk@arastra.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2544 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

This patch adds the MCP55 PCI IDs (without which the southbridge code
won't compile), and breaks an unnecessary dependency on the usbdebug
code.

Signed-off-by: Ed Swierk <eswierk@arastra.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2543 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

great check-in message:

Linuxbios boots an Opteron motherboard with 1GB memory.

Linuxbios directly loads a recent linux kernel.
The memory layout is like this:

BIOS-provided physical RAM map:
   BIOS-e820: 0000000000000000 - 0000000000000e18 (reserved)
   BIOS-e820: 0000000000000e18 - 00000000000a0000 (usable)
   BIOS-e820: 00000000000c0000 - 00000000000f0000 (usable)
   BIOS-e820: 00000000000f0000 - 00000000000f0400 (reserved)
   BIOS-e820: 00000000000f0400 - 0000000040000000 (usable)

The f0000-f0400 region contains IRQ and ACPI tables.

At some point the kernel builds a resource table containing
all physical address ranges and type of hardware the addresses
are mapped to. The table is accessible via /proc/iomem:

# cat /proc/iomem
00000000-00000e17 : reserved
00000e18-0009ffff : System RAM
000a0000-000bffff : Video RAM area
000c0000-000cbfff : Video ROM
000f0000-000fffff : System ROM
e0000000-efffffff : PCI Bus #03
    e0000000-efffffff : 0000:03:00.0
f0000000-f3ffffff : GART
f4000000-f60fffff : PCI Bus #03
    f4000000-f4ffffff : 0000:03:00.0
    f5000000-f5ffffff : 0000:03:00.0
    f6000000-f601ffff : 0000:03:00.0
f6100000-f6100fff : 0000:00:01.0
f6101000-f6101fff : 0000:00:02.0
    f6101000-f6101fff : ohci_hcd
f6102000-f6102fff : 0000:00:04.0
f6103000-f6103fff : 0000:00:07.0
    f6103000-f6103fff : sata_nv
f6104000-f6104fff : 0000:00:08.0
    f6104000-f6104fff : sata_nv
f6105000-f6105fff : 0000:00:0a.0
f6106000-f61060ff : 0000:00:02.1
f6200000-f620ffff : 0000:40:01.0

As you can see, the 00000000000f0400-0000000040000000
region is not listed.

It is not listed because the kernel unconditionally adds
"000f0000-000fffff : System ROM" first (look for
"request_resource(&iomem_resource, &system_rom_resource)"),
and then the attempt to add f0400-40000000 range fails
because of overlapping.

The kernel does not care that the range is not listed there.
Kexec does. It uses the /proc/iomem file to instruct the
kexec system call how to place the segments of a new kernel
in the physical memory. Kexec fails to start a new kernel
because it cannot locate enough physical memory.

This must be fixed either in linux or linuxbios.

Assuming that linuxbios is to be fixed, I cooked a patch
which provides this memory layout:

BIOS-provided physical RAM map:
   BIOS-e820: 0000000000000000 - 0000000000000e18 (reserved)
   BIOS-e820: 0000000000000e18 - 00000000000a0000 (usable)
   BIOS-e820: 00000000000c0000 - 00000000000f0000 (usable)
   BIOS-e820: 00000000000f0000 - 0000000000100000 (reserved)
   BIOS-e820: 0000000000100000 - 0000000040000000 (usable)

The /proc/iomem contains:

# cat /proc/iomem
00000000-00000e17 : reserved
00000e18-0009ffff : System RAM
000a0000-000bffff : Video RAM area
000c0000-000cbfff : Video ROM
000f0000-000fffff : System ROM
00100000-3fffffff : System RAM
    00100000-00203c61 : Kernel code
    00203c62-00248c3f : Kernel data
e0000000-efffffff : PCI Bus #03
    e0000000-efffffff : 0000:03:00.0
f0000000-f3ffffff : GART
f4000000-f60fffff : PCI Bus #03
    f4000000-f4ffffff : 0000:03:00.0
    f5000000-f5ffffff : 0000:03:00.0
    f6000000-f601ffff : 0000:03:00.0
f6100000-f6100fff : 0000:00:01.0
f6101000-f6101fff : 0000:00:02.0
    f6101000-f6101fff : ohci_hcd
f6102000-f6102fff : 0000:00:04.0
f6103000-f6103fff : 0000:00:07.0
    f6103000-f6103fff : sata_nv
f6104000-f6104fff : 0000:00:08.0
    f6104000-f6104fff : sata_nv
f6105000-f6105fff : 0000:00:0a.0
f6106000-f61060ff : 0000:00:02.1
f6200000-f620ffff : 0000:40:01.0

Kexec is happier with the patch.

Regards,

Signed-off-by: Roman Kononov <kononov195-lbl@yahoo.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2542 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

This fixes a small typo.

Signed-off-by: Roman Kononov <kononov195-lbl@yahoo.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2541 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Add support for the NVIDIA MCP55 southbridge.

Signed-off-by: Yinghai Lu <yinghai.lu@amd.com>
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Yinghai Lu <yinghai.lu@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2540 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Add support for the SST 49LF160C.

Signed-off-by: Alan Carvalho de Assis <acassis@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2539 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Delete superfluous and incorrect comment (trivial).
See also http://www.openbios.org/pipermail/linuxbios/2007-January/018042.html.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2538 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Add support for the SST-49LF004C, SST-49LF008C, SST-49LF016C in flashrom.
Also add suport for NVIDIA MCP55.

Signed-off-by: Yinghai Lu <yinghai.lu@amd.com>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2537 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

trivial enhancement
* add fintek superio support
* add license header
* add clean target in makefile
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2536 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Change 'ram' to 'RAM' in user-visible output (closes #60).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2535 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

A patch to add initial support for the i82801db southbridge based
heavily on the code for i82801dbm and i82801er

Signed-off-by: Jon Dufresne <jon.dufresne@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2534 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

htx card on io apic on htx slot of dk8_htx

Signed-off-by: Yinghai Lu <yinghai.lu@amd.com>
Acked-by: Yinghai Lu <yinghai.lu@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2533 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

ck804 pref mem 4G above support

Signed-off-by: Yinghai Lu <yinghai.lu@amd.com>
Acked-by: Yinghai Lu <yinghai.lu@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2532 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Improve flashrom description in the manpage a bit (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2531 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Update flashrom requirements in the README (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2530 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Apply linuxbios-rename-other-payload-options.patch
(Patch 2, refs #14)

Signed-off-by: Ed Swierk <eswierk@arastra.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2529 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

ouch. always abuild with payloads! trivial fix.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2528 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Apply linuxbios-rename-compressed-payload-options.patch, refs #14
Signed-off-by: Ed Swierk <eswierk@arastra.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2527 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

In the file mainboard/intel/i82801dbm/i82801dbm.c the variable
southbridge_intel_i82801dbm_control should be named
southbridge_intel_i82801dbm_ops. Otherwise a compile error occurs if this
device is included in Config.lb of the mainboard.

Closes #62

Signed-off-by: Jon Dufresne <jon.dufresne@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2526 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Add support for the SMSC FDC37M60x Super I/O (tested on FDC37M602).

Serial output on serial port 1 is tested and works, the rest probably not yet.

Closes #59.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2525 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Add an install target to the flashrom Makefile which installs flashrom
into /usr/local/bin. Closes #54.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2524 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

In src/southbridge/intel/i82801ca, first the smbus registers are mapped at i/o
space offset 0x1000, and later is the acpi registers also mapped at 0x1000.
This patch fixes this behavior. Closes #44

Signed-off-by: <chn@virtutech.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2523 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Add mtrr support for pentium m cpus

For cache to work the x86_setup_mtrrs() must be called.

Closes #61

Signed-off-by: Jon Dufresne <jon.dufresne@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2522 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

This is a typo that went into one of the abuild files. it will break abuild
on this board for everyone but me. Closes #58
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de> (trivial patch)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2521 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Use the common LinuxBIOS license header (trivial). Refs #5.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2520 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Add missing license headers to some files (info based on svn history).

Adapt some existing license headers to use the common LinuxBIOS
format. Please note that this does not make any qualitative
license changes, merely cosmetic syntax changes (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2519 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Update list of supported flash chips in the flashrom README (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2518 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

List the supported flash chips and southbridges in the flashrom
README file (trivial).

Closes #52.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2517 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

Remove
  #include <device/device.h>
from all *_early_serial.c ITE Super I/O files, as arch/romcc_io.h already
#defines device_t, thus adding device/device.h breaks the build (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2516 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

fix romcc preprocessor bug
Signed-off-by: Eric Biederman <ebiederman@lnxi.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2515 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1