From: Marc Jones <marcj303@gmail.com>
Date: Thu, 16 Sep 2010 21:04:54 +0000 (+0000)
Subject: Add more Fam10 CPUID strings from the AMD revision guide. Includes
X-Git-Url: http://wien.tomnetworks.com/gitweb/?p=coreboot.git;a=commitdiff_plain;h=1c5637d9263fc58154dfde28ed09b2cdcc2523cf

Add more Fam10 CPUID strings from the AMD revision guide. Includes
newer Phenom II.

Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Paul Menzel <paulepanter@users.sourceforge.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5815 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
---

diff --git a/src/cpu/amd/model_10xxx/processor_name.c b/src/cpu/amd/model_10xxx/processor_name.c
index 15604de53..52e5cae3c 100644
--- a/src/cpu/amd/model_10xxx/processor_name.c
+++ b/src/cpu/amd/model_10xxx/processor_name.c
@@ -3,6 +3,7 @@
  *
  * Copyright (C) 2007 Advanced Micro Devices, Inc.
  * Copyright (C) 2008 Peter Stuge
+ * Copyright (C) 2010 Marc Jones <marcj303@gmail.com>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -73,12 +74,31 @@ static const struct str_s String2_socket_F[] = {
 static const struct str_s String1_socket_AM2[] = {
 	{0x00, 0x00, 0x00, "AMD Athlon(tm) Processor LE-"},
 	{0x00, 0x00, 0x01, "AMD Sempron(tm) Processor LE-"},
+	{0x00, 0x00, 0x02, "AMD Sempron(tm) 1"},
+	{0x00, 0x00, 0x03, "AMD Athlon(tm) II 1"},
 	{0x00, 0x01, 0x00, "Dual-Core AMD Opteron(tm) Processor 13"},
 	{0x00, 0x01, 0x01, "AMD Athlon(tm)"},
+	{0x00, 0x01, 0x03, "AMD Athlon(tm) II X2 2"},
+	{0x00, 0x01, 0x04, "AMD Athlon(tm) II X2 B"},
+	{0x00, 0x01, 0x05, "AMD Athlon(tm) II X2"},
+	{0x00, 0x01, 0x07, "AMD Phenom(tm) II X2 5"},
+	{0x00, 0x01, 0x0A, "AMD Phenom(tm) II X2"},
+	{0x00, 0x01, 0x0B, "AMD Phenom(tm) II X2 B"},
 	{0x00, 0x02, 0x00, "AMD Phenom(tm)"},
+	{0x00, 0x02, 0x03, "AMD Phenom(tm) II X3 B"},
+	{0x00, 0x02, 0x04, "AMD Phenom(tm) II X3"},
+	{0x00, 0x02, 0x07, "AMD Athlon(tm) II X3 4"},
+	{0x00, 0x02, 0x08, "AMD Phenom(tm) II X3 7"},
+	{0x00, 0x02, 0x0A, "AMD Athlon(tm) II X3"},
 	{0x00, 0x03, 0x00, "Quad-Core AMD Opteron(tm) Processor 13"},
 	{0x00, 0x03, 0x01, "AMD Phenom(tm) FX-"},
 	{0x00, 0x03, 0x02, "AMD Phenom(tm)"},
+	{0x00, 0x03, 0x03, "AMD Phenom(tm) II X4 9"},
+	{0x00, 0x03, 0x04, "AMD Phenom(tm) II X4 8"},
+	{0x00, 0x03, 0x07, "AMD Phenom(tm) II X4 B"},
+	{0x00, 0x03, 0x08, "AMD Phenom(tm) II X4"},
+	{0x00, 0x03, 0x0A, "AMD Athlon(tm) II X4 6"},
+	{0x00, 0x03, 0x0F, "AMD Athlon(tm) II X4"},
 	{0, 0, 0, NULL}
 };
 
@@ -93,28 +113,43 @@ static const struct str_s String2_socket_AM2[] = {
 	{0x00, 0x00, 0x07, "70"},
 	{0x00, 0x00, 0x08, "80"},
 	{0x00, 0x00, 0x09, "90"},
+	{0x00, 0x00, 0x09, " Processor"},
+	{0x00, 0x00, 0x09, "u Processor"},
 	{0x00, 0x01, 0x00, "00 Dual-Core Processor"},
 	{0x00, 0x01, 0x01, "00e Dual-Core Processor"},
 	{0x00, 0x01, 0x02, "00B Dual-Core Processor"},
 	{0x00, 0x01, 0x03, "50 Dual-Core Processor"},
 	{0x00, 0x01, 0x04, "50e Dual-Core Processor"},
 	{0x00, 0x01, 0x05, "50B Dual-Core Processor"},
+	{0x00, 0x01, 0x06, " Processor"},
+	{0x00, 0x01, 0x07, "e Processor"},
+	{0x00, 0x01, 0x09, "0 Processor"},
+	{0x00, 0x01, 0x0A, "0e Processor"},
+	{0x00, 0x01, 0x0B, "u Processor"},
 	{0x00, 0x02, 0x00, "00 Triple-Core Processor"},
 	{0x00, 0x02, 0x01, "00e Triple-Core Processor"},
 	{0x00, 0x02, 0x02, "00B Triple-Core Processor"},
 	{0x00, 0x02, 0x03, "50 Triple-Core Processor"},
 	{0x00, 0x02, 0x04, "50e Triple-Core Processor"},
 	{0x00, 0x02, 0x05, "50B Triple-Core Processor"},
+	{0x00, 0x02, 0x06, " Processor"},
+	{0x00, 0x02, 0x07, "e Processor"},
+	{0x00, 0x02, 0x09, "0e Processor"},
+	{0x00, 0x02, 0x0A, "0 Processor"},
 	{0x00, 0x03, 0x00, "00 Quad-Core Processor"},
 	{0x00, 0x03, 0x01, "00e Quad-Core Processor"},
 	{0x00, 0x03, 0x02, "00B Quad-Core Processor"},
 	{0x00, 0x03, 0x03, "50 Quad-Core Processor"},
 	{0x00, 0x03, 0x04, "50e Quad-Core Processor"},
 	{0x00, 0x03, 0x05, "50B Quad-Core Processor"},
+	{0x00, 0x03, 0x06, " Processor"},
+	{0x00, 0x03, 0x07, "e Processor"},
+	{0x00, 0x03, 0x09, "0e Processor"},
 	{0x00, 0x03, 0x0A, " SE"},
 	{0x00, 0x03, 0x0B, " HE"},
 	{0x00, 0x03, 0x0C, " EE"},
 	{0x00, 0x03, 0x0D, " Quad-Core Processor"},
+	{0x00, 0x03, 0x0E, "0 Processor"},
 	{0x00, 0xFF, 0x0F, ""},
 	{0, 0, 0, NULL}
 };