From: Bernhard Urban <lewurm@gmail.com>
Date: Fri, 6 Apr 2012 12:27:49 +0000 (+0200)
Subject: blah: seabios quirks (not here)
X-Git-Url: http://wien.tomnetworks.com/gitweb/?p=coreboot.git;a=commitdiff_plain;h=12d66d9fa655d2cf128cf7d063a7e213d3f1fb6f

blah: seabios quirks (not here)

- set some static value for tsc configure
	-> something wrong at coreboot init?
- keyboard not found, so I uncommented stuff in boot.c
  I don't have a vga anyway...
---

diff --git a/src/mainboard/asus/m5a99x-evo/dsdt.asl b/src/mainboard/asus/m5a99x-evo/dsdt.asl
index 88354cf93..00169ab34 100644
--- a/src/mainboard/asus/m5a99x-evo/dsdt.asl
+++ b/src/mainboard/asus/m5a99x-evo/dsdt.asl
@@ -98,6 +98,24 @@ DefinitionBlock (
 			) {
 			#include "acpi/cpstate.asl"
 		}
+
+		Processor(
+			CPU4,		/* name space name */
+			4,		/* Unique number for this processor */
+			0x0000,		/* PBLK system I/O address !hardcoded! */
+			0x00		/* PBLKLEN for boot processor */
+			) {
+			#include "acpi/cpstate.asl"
+		}
+
+		Processor(
+			CPU5,		/* name space name */
+			5,		/* Unique number for this processor */
+			0x0000,		/* PBLK system I/O address !hardcoded! */
+			0x00		/* PBLKLEN for boot processor */
+			) {
+			#include "acpi/cpstate.asl"
+		}
 	} /* End _PR scope */
 
 	/* PIC IRQ mapping registers, C00h-C01h. */
diff --git a/src/mainboard/asus/m5a99x-evo/mainboard.c b/src/mainboard/asus/m5a99x-evo/mainboard.c
index 3a4465423..12e3c85da 100644
--- a/src/mainboard/asus/m5a99x-evo/mainboard.c
+++ b/src/mainboard/asus/m5a99x-evo/mainboard.c
@@ -55,6 +55,20 @@ static void m5a99x_evo_enable(device_t dev)
 
 	printk(BIOS_INFO, "Mainboard ASUS M5A99X-EVO Enable. dev=0x%p\n", dev);
 
+	msr_t msr, msr2;
+
+	/* TOP_MEM: the top of DRAM below 4G */
+	msr = rdmsr(TOP_MEM);
+	printk
+	    (BIOS_INFO, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
+	     __func__, msr.lo, msr.hi);
+
+	/* TOP_MEM2: the top of DRAM above 4G */
+	msr2 = rdmsr(TOP_MEM2);
+	printk
+	    (BIOS_INFO, "%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n",
+	     __func__, msr2.lo, msr2.hi);
+
 	set_pcie_dereset();
 }