m5a99x-evo: ugly quirks, but WOOT: ohai seabios :-)

diff --git a/src/boot/hardwaremain.c b/src/boot/hardwaremain.c
index 489caa39a594ae5e5293bad06b7704a65e8b197a..ca39660232c75063a92b886d87ec9afa3f0fabc5 100644 (file)
--- a/src/boot/hardwaremain.c
+++ b/src/boot/hardwaremain.c
@@ -87,6 +87,7 @@ void hardwaremain(int boot_complete)
        post_code(POST_DEVICE_ENUMERATION_COMPLETE);
 
        timestamps[2] = rdtsc();
+       printk(BIOS_NOTICE, "===============Enumeration done!========\n");
        /* Now compute and assign the bus resources. */
        dev_configure();
        post_code(POST_DEVICE_CONFIGURATION_COMPLETE);

diff --git a/src/devices/device.c b/src/devices/device.c
index 0e9c39e2031d7fe77c5fc4fa8b42d23a6e5a124f..688ccc9fe2bc37d7dfe7bdbdcea30488d4264f62 100644 (file)
--- a/src/devices/device.c
+++ b/src/devices/device.c
@@ -912,6 +912,7 @@ void dev_enumerate(void)
                printk(BIOS_ERR, "dev_root missing scan_bus operation");
                return;
        }
+       printk(BIOS_INFO, "Enumerating buses... starting with root now\n");
        scan_bus(root, 0);
        printk(BIOS_INFO, "done\n");
 }

diff --git a/src/devices/hypertransport.c b/src/devices/hypertransport.c
index 926729177eb0d9d4d2ffa751df37a2e83855177a..2a733867e6a38cbada563b1f57f25f52c478aeef 100644 (file)
--- a/src/devices/hypertransport.c
+++ b/src/devices/hypertransport.c
@@ -436,8 +436,10 @@ unsigned int hypertransport_scan_chain(struct bus *bus, unsigned min_devfn,
        device_t real_last_dev = NULL;
 #endif
 
+       printk(BIOS_INFO, "%s: before ht_collapse_early_enumeration\n", __func__);
        /* Restore the hypertransport chain to it's unitialized state. */
        ht_collapse_early_enumeration(bus, offset_unitid);
+       printk(BIOS_INFO, "%s: after  ht_collapse_early_enumeration\n", __func__);
 
        /* See which static device nodes I have. */
        old_devices = bus->children;
@@ -492,16 +494,22 @@ unsigned int hypertransport_scan_chain(struct bus *bus, unsigned min_devfn,
                } while ((ctrl & (1 << 5)) == 0);
 
 
+               printk(BIOS_INFO, "%s: before ht_scan_get_devs\n", __func__);
                /* Get and setup the device_structure. */
                dev = ht_scan_get_devs(&old_devices);
+               printk(BIOS_INFO, "%s: after  ht_scan_get_devs\n", __func__);
 
                /* See if a device is present and setup the device structure. */
+               printk(BIOS_INFO, "%s: before pci_probe_dev\n", __func__);
                dev = pci_probe_dev(dev, bus, 0);
+               printk(BIOS_INFO, "%s: after  pci_probe_dev\n", __func__);
                if (!dev || !dev->enabled)
                        break;
 
                /* Find the hypertransport link capability. */
+               printk(BIOS_INFO, "%s: before ht_lookup_slave_capability\n", __func__);
                pos = ht_lookup_slave_capability(dev);
+               printk(BIOS_INFO, "%s: after  ht_lookup_slave_capability\n", __func__);
                if (pos == 0) {
                        printk(BIOS_ERR, "%s Hypertransport link capability "
                               "not found", dev_path(dev));
@@ -572,7 +580,9 @@ unsigned int hypertransport_scan_chain(struct bus *bus, unsigned min_devfn,
                        max_unitid = next_unitid;
 
                /* Setup the hypetransport link. */
+               printk(BIOS_INFO, "%s: before ht_setup_link\n", __func__);
                bus->reset_needed |= ht_setup_link(&prev, dev, pos);
+               printk(BIOS_INFO, "%s: after  ht_setup_link\n", __func__);
 
                printk(BIOS_DEBUG, "%s [%04x/%04x] %s next_unitid: %04x\n",
                       dev_path(dev), dev->vendor, dev->device,
@@ -582,6 +592,7 @@ unsigned int hypertransport_scan_chain(struct bus *bus, unsigned min_devfn,
 
 end_of_chain:
 
+       printk(BIOS_INFO, "%s: end_of_chain.  w00t!\n", __func__);
 #if OPT_HT_LINK == 1
        if (bus->reset_needed)
                printk(BIOS_INFO, "HyperT reset needed\n");
@@ -642,8 +653,10 @@ end_of_chain:
                        last_func->sibling = old_devices;
        }
 
+       printk(BIOS_INFO, "%s: before pci_scan_bus!\n", __func__);
        /* Now that nothing is overlapping it is safe to scan the children. */
        max = pci_scan_bus(bus, 0x00, ((next_unitid - 1) << 3) | 7, max);
+       printk(BIOS_INFO, "%s: after  pci_scan_bus!\n", __func__);
        return max;
 }
 

diff --git a/src/devices/pci_device.c b/src/devices/pci_device.c
index c0559956b39e94a196ee79b7000202ada316fbfb..f54e2620bf78c6e6564cf14523bb4a54d587881b 100644 (file)
--- a/src/devices/pci_device.c
+++ b/src/devices/pci_device.c
@@ -1055,7 +1055,7 @@ unsigned int pci_scan_bus(struct bus *bus, unsigned min_devfn,
                       "devfn %x\n", min_devfn, max_devfn);
                printk(BIOS_ERR, "PCI: pci_scan_bus upper limit too big. "
                       "Using 0xff.\n");
-               max_devfn=0xff;
+               max_devfn=0x08;
        }
 
        old_devices = bus->children;
@@ -1071,10 +1071,14 @@ unsigned int pci_scan_bus(struct bus *bus, unsigned min_devfn,
                struct device *dev;
 
                /* First thing setup the device structure. */
+               printk(BIOS_INFO, "%s: before pci_scan_get_dev! devfn: %d\n", __func__, devfn);
                dev = pci_scan_get_dev(&old_devices, devfn);
+               printk(BIOS_INFO, "%s: after  pci_scan_get_dev!\n", __func__);
 
                /* See if a device is present and setup the device structure. */
+               printk(BIOS_INFO, "%s: before pci_probe_dev!\n", __func__);
                dev = pci_probe_dev(dev, bus, devfn);
+               printk(BIOS_INFO, "%s: after  pci_probe_dev!\n", __func__);
 
                /*
                 * If this is not a multi function device, or the device is

diff --git a/src/mainboard/asus/m5a99x-evo/devicetree.cb b/src/mainboard/asus/m5a99x-evo/devicetree.cb
index 5270c28b9a4d5df366633fce0c1c3dfeb96a01b6..623f0f9120872bf7736e2422ffb2e7d26b012f68 100644 (file)
--- a/src/mainboard/asus/m5a99x-evo/devicetree.cb
+++ b/src/mainboard/asus/m5a99x-evo/devicetree.cb
@@ -11,7 +11,6 @@ chip northbridge/amd/amdfam10/root_complex
                        device pci 18.0 on #  northbridge
                                chip southbridge/amd/rs780
                                        device pci 0.0 on end # HT      0x9600
-                                       device pci 1.0 on end # Internal Graphics P2P bridge 0x9712
                                        device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x9603
                                        device pci 3.0 off end # PCIE P2P bridge 0x960b
                                        device pci 4.0 on end # PCIE P2P bridge 0x9604 wireless
@@ -34,7 +33,7 @@ chip northbridge/amd/amdfam10/root_complex
                                        register "gfx_pcie_config" = "3" # 1x8 GFX on Lanes 8-15
                                        register "gfx_ddi_config" = "1"  # Lanes 0-3 DDI_SL
                                end
-                               chip southbridge/amd/cimx/sb800 # it is under NB/SB Link, but on the same pci bus
+                               chip southbridge/amd/cimx/sb900 # it is under NB/SB Link, but on the same pci bus
                                        device pci 11.0 on end # SATA
                                        device pci 12.0 on end # USB
                                        device pci 12.2 on end # USB

diff --git a/src/mainboard/asus/m5a99x-evo/mainboard.c b/src/mainboard/asus/m5a99x-evo/mainboard.c
index b4bc11aca8f2a119f89e9ca0fe1394591cd7931d..657d1815705830f1c3cce8e8e48bb14271b61bd9 100644 (file)
--- a/src/mainboard/asus/m5a99x-evo/mainboard.c
+++ b/src/mainboard/asus/m5a99x-evo/mainboard.c
@@ -120,9 +120,13 @@ static void m5a99x_evo_enable(device_t dev)
        uma_memory_size = 0x8000000;    /* 128M recommended UMA */
        uma_memory_base = 0x38000000;   /* 1GB  system memory supposed */
 #endif
+       printk (BIOS_INFO, "%s, w00t?!\n", __func__);
 
        set_pcie_dereset();
+#if 0
        enable_int_gfx();
+#endif
+       printk (BIOS_INFO, "%s, cya enable?!\n", __func__);
 }
 
 int add_mainboard_resources(struct lb_memory *mem)

diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index 018b6c83b0d8e81dc3be08340885918f266e1b5b..2d0f3c8836519de18379ebf72285feadc863f825 100644 (file)
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -147,6 +147,7 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, u32 l
 {
 //     I want to put sb chain in bus 0 can I?
 
+       printk(BIOS_INFO, "%s: starting...\n", __func__);
 
                u32 link_type;
                int i;
@@ -179,12 +180,14 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, u32 l
                link->cap = 0x80 + ((link_num&3) *0x20);
                do {
                        link_type = pci_read_config32(devx, link->cap + 0x18);
+                       printk(BIOS_INFO, "%s: link_type: 0x%08x\n", __func__, link_type);
                } while(link_type & ConnectionPending);
                if (!(link_type & LinkConnected)) {
                        return max;
                }
                do {
                        link_type = pci_read_config32(devx, link->cap + 0x18);
+                       printk(BIOS_INFO, "%s: link_type: 0x%08x\n", __func__, link_type);
                } while(!(link_type & InitComplete));
                if (!(link_type & NonCoherent)) {
                        return max;
@@ -192,7 +195,9 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, u32 l
                /* See if there is an available configuration space mapping
                 * register in function 1.
                 */
+               printk(BIOS_INFO, "%s: before get_ht_c_index\n", __func__);
                ht_c_index = get_ht_c_index(nodeid, link_num, &sysconf);
+               printk(BIOS_INFO, "%s: after  get_ht_c_index\n", __func__);
 
 #if CONFIG_EXT_CONF_SUPPORT == 0
                if(ht_c_index>=4) return max;
@@ -245,7 +250,9 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, u32 l
 
                /* set the config map space */
 
+               printk(BIOS_INFO, "%s: before set_config_map_reg\n", __func__);
                set_config_map_reg(nodeid, link_num, ht_c_index, link->secondary, link->subordinate, sysconf.segbit, sysconf.nodes);
+               printk(BIOS_INFO, "%s: after  set_config_map_reg\n", __func__);
 
                /* Now we can scan all of the subordinate busses i.e. the
                 * chain on the hypertranport link
@@ -260,17 +267,24 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, u32 l
                else
                        max_devfn = (0x1f<<3) | 7;
 
+               printk(BIOS_INFO, "%s: before hypertransport_scan_chain\n", __func__);
+               /* HERE. ZOMG */
                max = hypertransport_scan_chain(link, 0, max_devfn, max, ht_unitid_base, offset_unitid);
+               printk(BIOS_INFO, "%s: after  hypertransport_scan_chain\n", __func__);
 
                /* We know the number of busses behind this bridge.  Set the
                 * subordinate bus number to it's real value
                 */
                if(ht_c_index>3) { // clear the extend reg
+                       printk(BIOS_INFO, "%s: before clear_config_map_reg\n", __func__);
                        clear_config_map_reg(nodeid, link_num, ht_c_index, (max+1)>>sysconf.segbit, (link->subordinate)>>sysconf.segbit, sysconf.nodes);
+                       printk(BIOS_INFO, "%s: after  clear_config_map_reg\n", __func__);
                }
 
                link->subordinate = max;
+               printk(BIOS_INFO, "%s: before set_config_map_reg\n", __func__);
                set_config_map_reg(nodeid, link_num, ht_c_index, link->secondary, link->subordinate, sysconf.segbit, sysconf.nodes);
+               printk(BIOS_INFO, "%s: after  set_config_map_reg\n", __func__);
                sysconf.ht_c_num++;
 
                {
@@ -283,7 +297,10 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, u32 l
                        sysconf.hcdn_reg[ht_c_index] = temp;
 
                }
+       printk(BIOS_INFO, "%s: before store_ht_c_conf_bus\n", __func__);
        store_ht_c_conf_bus(nodeid, link_num, ht_c_index, link->secondary, link->subordinate, &sysconf);
+       printk(BIOS_INFO, "%s: after  store_ht_c_conf_bus\n", __func__);
+       printk(BIOS_INFO, "%s: done.\n", __func__);
        return max;
 }
 
@@ -294,6 +311,8 @@ static unsigned amdfam10_scan_chains(device_t dev, unsigned max)
        unsigned sblink = sysconf.sblk;
        unsigned offset_unitid = 0;
 
+       printk(BIOS_INFO, "%s: starting...\n", __func__);
+
        nodeid = amdfam10_nodeid(dev);
 
 // Put sb chain in bus 0
@@ -302,9 +321,11 @@ static unsigned amdfam10_scan_chains(device_t dev, unsigned max)
        #if ((CONFIG_HT_CHAIN_UNITID_BASE != 1) || (CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20))
                offset_unitid = 1;
        #endif
-               for (link = dev->link_list; link; link = link->next)
+               for (link = dev->link_list; link; link = link->next) {
+                       printk(BIOS_INFO, "%s: link: %p\n", __func__, link);
                        if (link->link_num == sblink)
                                max = amdfam10_scan_chain(dev, nodeid, link, sblink, sblink, max, offset_unitid ); // do sb ht chain at first, in case s2885 put sb chain (8131/8111) on link2, but put 8151 on link0
+               }
        }
 #endif
 
@@ -313,6 +334,7 @@ static unsigned amdfam10_scan_chains(device_t dev, unsigned max)
 #endif
 
        for(link = dev->link_list; link; link = link->next) {
+               printk(BIOS_INFO, "%s: link2: %p\n", __func__, link);
 #if CONFIG_SB_HT_CHAIN_ON_BUS0 > 0
                if( (nodeid == 0) && (sblink == link->link_num) ) continue; //already done
 #endif
@@ -326,6 +348,7 @@ static unsigned amdfam10_scan_chains(device_t dev, unsigned max)
 
                max = amdfam10_scan_chain(dev, nodeid, link, link->link_num, sblink, max, offset_unitid);
        }
+       printk(BIOS_INFO, "%s: done.\n", __func__);
        return max;
 }
 
@@ -1258,6 +1281,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max)
        int disable_siblings;
        unsigned ApicIdCoreIdSize;
 
+       printk(BIOS_INFO, "%s: starting...\n", __func__);
        nb_cfg_54 = 0;
        ApicIdCoreIdSize = (cpuid_ecx(0x80000008)>>12 & 0xf);
        if(ApicIdCoreIdSize) {
@@ -1444,6 +1468,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max)
 
                } //j
        }
+       printk(BIOS_INFO, "%s: done.\n", __func__);
        return max;
 }
 

diff --git a/src/southbridge/amd/cimx/sb900/smbus.c b/src/southbridge/amd/cimx/sb900/smbus.c
index 1fbf5ac6c76f527fcee92f122f28184310c8ff61..0fb040b928fdd0301ac8fd7d480b62f04da0eae5 100644 (file)
--- a/src/southbridge/amd/cimx/sb900/smbus.c
+++ b/src/southbridge/amd/cimx/sb900/smbus.c
@@ -132,11 +132,15 @@ int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address)
        u8 byte;
 
        if (smbus_wait_until_ready(smbus_io_base) < 0) {
+#if 0
         printk(BIOS_INFO, "SB900 - Smbus.c - do_smbus_read_byte - smbus no ready.\n");
+#endif
                return -2;      /* not ready */
        }
 
+#if 0
     printk(BIOS_INFO, "SB900 - Smbus.c - do_smbus_read_byte - Start.\n");
+#endif
        /* set the command/address... */
        outb(address & 0xff, smbus_io_base + SMBHSTCMD);
 
@@ -156,7 +160,9 @@ int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address)
        /* read results of transaction */
        byte = inb(smbus_io_base + SMBHSTDAT0);
 
+#if 0
     printk(BIOS_INFO, "SB900 - Smbus.c - do_smbus_read_byte - End.\n");
+#endif
        return byte;
 }
 

diff --git a/src/southbridge/amd/rs780/rs780.c b/src/southbridge/amd/rs780/rs780.c
index 717aeab2c6cef3244f26bf8ba5b6bd152b275bc1..0fea909760f596435e137ec0a0a691e430499f32 100644 (file)
--- a/src/southbridge/amd/rs780/rs780.c
+++ b/src/southbridge/amd/rs780/rs780.c
@@ -186,6 +186,7 @@ static void rs780_nb_pci_table(device_t nb_dev)
 #endif
 }
 
+#if 0
 static void rs780_nb_gfx_dev_table(device_t nb_dev, device_t dev)
 {
        /* NB_InitGFXStraps */
@@ -272,6 +273,7 @@ static void rs780_nb_gfx_dev_table(device_t nb_dev, device_t dev)
 
        printk(BIOS_INFO, "GC is accessible from now on.\n");
 }
+#endif
 
 /***********************************************
 *      0:00.0  NBCFG   :
@@ -325,15 +327,19 @@ void rs780_enable(device_t dev)
 
        case 1: /* bus0, dev1, APC. */
                printk(BIOS_INFO, "Bus-0, Dev-1, Fun-0.\n");
+#if 0
                rs780_nb_gfx_dev_table(nb_dev, dev);
+#endif
                break;
        case 2:         /* bus0, dev2,3, two GFX */
        case 3:
                printk(BIOS_INFO, "Bus-0, Dev-2,3, Fun-0. enable=%d\n", dev->enabled);
                set_nbmisc_enable_bits(nb_dev, 0x0c, 1 << dev_ind,
                                       (dev->enabled ? 0 : 1) << dev_ind);
+#if 0
                if (dev->enabled)
                        rs780_gfx_init(nb_dev, dev, dev_ind);
+#endif
                break;
        case 4:         /* bus0, dev4-7, four GPPSB */
        case 5:
@@ -370,6 +376,7 @@ void rs780_enable(device_t dev)
        default:
                printk(BIOS_DEBUG, "unknown dev: %s\n", dev_path(dev));
        }
+       printk(BIOS_INFO, "rs780_enable: done\n");
 }
 
 struct chip_operations southbridge_amd_rs780_ops = {