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(parent: 586470c) | patch
svn mv src/northbridge/intel/E7520 src/northbridge/intel/e7520
authorUwe Hermann <uwe@hermann-uwe.de>
Fri, 27 Oct 2006 11:40:01 +0000 (11:40 +0000)
committerUwe Hermann <uwe@hermann-uwe.de>
Fri, 27 Oct 2006 11:40:01 +0000 (11:40 +0000)
commitcf201870797d542915b2c52fa596b27c1616a821
tree91ce83bc599b0cf58c175da717369d003b062fb2tree | snapshot
parent586470c646ac1b8753858b013b268f049a28b818commit | diff
svn mv src/northbridge/intel/E7520 src/northbridge/intel/e7520
svn mv src/northbridge/intel/E7525 src/northbridge/intel/e7525

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2478 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
52 files changed:
src/northbridge/intel/E7520/Config.lb [deleted file] blob | history
src/northbridge/intel/E7520/chip.h [deleted file] blob | history
src/northbridge/intel/E7520/e7520.h [deleted file] blob | history
src/northbridge/intel/E7520/memory_initialized.c [deleted file] blob | history
src/northbridge/intel/E7520/northbridge.c [deleted file] blob | history
src/northbridge/intel/E7520/northbridge.h [deleted file] blob | history
src/northbridge/intel/E7520/pciexp_porta.c [deleted file] blob | history
src/northbridge/intel/E7520/pciexp_porta1.c [deleted file] blob | history
src/northbridge/intel/E7520/pciexp_portb.c [deleted file] blob | history
src/northbridge/intel/E7520/pciexp_portc.c [deleted file] blob | history
src/northbridge/intel/E7520/raminit.c [deleted file] blob | history
src/northbridge/intel/E7520/raminit.h [deleted file] blob | history
src/northbridge/intel/E7520/raminit_test.c [deleted file] blob | history
src/northbridge/intel/E7525/Config.lb [deleted file] blob | history
src/northbridge/intel/E7525/chip.h [deleted file] blob | history
src/northbridge/intel/E7525/e7525.h [deleted file] blob | history
src/northbridge/intel/E7525/memory_initialized.c [deleted file] blob | history
src/northbridge/intel/E7525/northbridge.c [deleted file] blob | history
src/northbridge/intel/E7525/northbridge.h [deleted file] blob | history
src/northbridge/intel/E7525/pciexp_porta.c [deleted file] blob | history
src/northbridge/intel/E7525/pciexp_porta1.c [deleted file] blob | history
src/northbridge/intel/E7525/pciexp_portb.c [deleted file] blob | history
src/northbridge/intel/E7525/pciexp_portc.c [deleted file] blob | history
src/northbridge/intel/E7525/raminit.c [deleted file] blob | history
src/northbridge/intel/E7525/raminit.h [deleted file] blob | history
src/northbridge/intel/E7525/raminit_test.c [deleted file] blob | history
src/northbridge/intel/e7520/Config.lb [new file with mode: 0644] blob
src/northbridge/intel/e7520/chip.h [new file with mode: 0644] blob
src/northbridge/intel/e7520/e7520.h [new file with mode: 0644] blob
src/northbridge/intel/e7520/memory_initialized.c [new file with mode: 0644] blob
src/northbridge/intel/e7520/northbridge.c [new file with mode: 0644] blob
src/northbridge/intel/e7520/northbridge.h [new file with mode: 0644] blob
src/northbridge/intel/e7520/pciexp_porta.c [new file with mode: 0644] blob
src/northbridge/intel/e7520/pciexp_porta1.c [new file with mode: 0644] blob
src/northbridge/intel/e7520/pciexp_portb.c [new file with mode: 0644] blob
src/northbridge/intel/e7520/pciexp_portc.c [new file with mode: 0644] blob
src/northbridge/intel/e7520/raminit.c [new file with mode: 0644] blob
src/northbridge/intel/e7520/raminit.h [new file with mode: 0644] blob
src/northbridge/intel/e7520/raminit_test.c [new file with mode: 0644] blob
src/northbridge/intel/e7525/Config.lb [new file with mode: 0644] blob
src/northbridge/intel/e7525/chip.h [new file with mode: 0644] blob
src/northbridge/intel/e7525/e7525.h [new file with mode: 0644] blob
src/northbridge/intel/e7525/memory_initialized.c [new file with mode: 0644] blob
src/northbridge/intel/e7525/northbridge.c [new file with mode: 0644] blob
src/northbridge/intel/e7525/northbridge.h [new file with mode: 0644] blob
src/northbridge/intel/e7525/pciexp_porta.c [new file with mode: 0644] blob
src/northbridge/intel/e7525/pciexp_porta1.c [new file with mode: 0644] blob
src/northbridge/intel/e7525/pciexp_portb.c [new file with mode: 0644] blob
src/northbridge/intel/e7525/pciexp_portc.c [new file with mode: 0644] blob
src/northbridge/intel/e7525/raminit.c [new file with mode: 0644] blob
src/northbridge/intel/e7525/raminit.h [new file with mode: 0644] blob
src/northbridge/intel/e7525/raminit_test.c [new file with mode: 0644] blob
my coreboot WIP stuff (asus m5a99x-evo board)