projects / coreboot.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 7dea955) | patch
Intel E7501 P64H2 ICH5R support
authorYinghai Lu <yinghailu@gmail.com>
Thu, 1 Jul 2004 03:55:03 +0000 (03:55 +0000)
committerYinghai Lu <yinghailu@gmail.com>
Thu, 1 Jul 2004 03:55:03 +0000 (03:55 +0000)
commit70093f7875371abe52c4417c6cc3a427d20781c5
treef5812172eab817e66840583c669f16d4b1121531tree | snapshot
parent7dea9552d5fa10c5542e744fe1d8e0a81689e3c1commit | diff
Intel E7501 P64H2 ICH5R support

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1616 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
47 files changed:
src/cpu/p6/Config.lb diff | blob | history
src/cpu/p6/apic_timer.c [new file with mode: 0644] blob
src/cpu/p6/chip.h [new file with mode: 0644] blob
src/cpu/p6/cpufixup.c diff | blob | history
src/cpu/p6/disable_mmx_sse.inc [new file with mode: 0644] blob
src/cpu/p6/enable_mmx_sse.inc [new file with mode: 0644] blob
src/include/device/pci_ids.h diff | blob | history
src/mainboard/tyan/s2735/Config.lb [new file with mode: 0644] blob
src/mainboard/tyan/s2735/auto.c [new file with mode: 0644] blob
src/mainboard/tyan/s2735/chip.h [new file with mode: 0644] blob
src/mainboard/tyan/s2735/cmos.layout [new file with mode: 0644] blob
src/mainboard/tyan/s2735/failover.c [new file with mode: 0644] blob
src/mainboard/tyan/s2735/irq_tables.c [new file with mode: 0644] blob
src/mainboard/tyan/s2735/mainboard.c [new file with mode: 0644] blob
src/mainboard/tyan/s2735/mptable.c [new file with mode: 0644] blob
src/northbridge/intel/e7501/Config.lb [new file with mode: 0644] blob
src/northbridge/intel/e7501/chip.h [new file with mode: 0644] blob
src/northbridge/intel/e7501/debug.c [new file with mode: 0644] blob
src/northbridge/intel/e7501/e7501.h [new file with mode: 0644] blob
src/northbridge/intel/e7501/northbridge.c [new file with mode: 0644] blob
src/northbridge/intel/e7501/raminit.c [new file with mode: 0644] blob
src/northbridge/intel/e7501/raminit.h [new file with mode: 0644] blob
src/northbridge/intel/e7501/reset_test.c [new file with mode: 0644] blob
src/southbridge/intel/i82801er/Config.lb [new file with mode: 0644] blob
src/southbridge/intel/i82801er/cmos_failover.c [new file with mode: 0644] blob
src/southbridge/intel/i82801er/i82801er.c [new file with mode: 0644] blob
src/southbridge/intel/i82801er/i82801er.h [new file with mode: 0644] blob
src/southbridge/intel/i82801er/i82801er_ac97.c [new file with mode: 0644] blob
src/southbridge/intel/i82801er/i82801er_early_smbus.c [new file with mode: 0644] blob
src/southbridge/intel/i82801er/i82801er_ide.c [new file with mode: 0644] blob
src/southbridge/intel/i82801er/i82801er_lpc.c [new file with mode: 0644] blob
src/southbridge/intel/i82801er/i82801er_nic.c [new file with mode: 0644] blob
src/southbridge/intel/i82801er/i82801er_pci.c [new file with mode: 0644] blob
src/southbridge/intel/i82801er/i82801er_reset.c [new file with mode: 0644] blob
src/southbridge/intel/i82801er/i82801er_sata.c [new file with mode: 0644] blob
src/southbridge/intel/i82801er/i82801er_smbus.c [new file with mode: 0644] blob
src/southbridge/intel/i82801er/i82801er_usb.c [new file with mode: 0644] blob
src/southbridge/intel/i82801er/i82801er_usb2.c [new file with mode: 0644] blob
src/southbridge/intel/i82870/82870.h [new file with mode: 0644] blob
src/southbridge/intel/i82870/Config.lb [new file with mode: 0644] blob
src/southbridge/intel/i82870/p64h2_ioapic.c [new file with mode: 0644] blob
src/southbridge/intel/i82870/p64h2_pci_parity.c [new file with mode: 0644] blob
src/southbridge/intel/i82870/p64h2_pcibridge.c [new file with mode: 0644] blob
src/superio/winbond/w83627hf/superio.c diff | blob | history
targets/tyan/s2735/Config.lb [new file with mode: 0644] blob
targets/tyan/s2735/VERSION [new file with mode: 0644] blob
targets/tyan/s2735/ns2735 [new file with mode: 0644] blob
my coreboot WIP stuff (asus m5a99x-evo board)