Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51
authorarch import user (historical) <svn@openbios.org>
Wed, 6 Jul 2005 17:17:25 +0000 (17:17 +0000)
committerarch import user (historical) <svn@openbios.org>
Wed, 6 Jul 2005 17:17:25 +0000 (17:17 +0000)
commit6ca7636c8f52560e732cdd5b1c7829cda5aa2bde
treecc45ae7c4dea6e2c5338f52b4314106bf07023be
parentb2ed53dd5669c2c3839633bd2b3b4af709a5b149
Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51
Creator:  Yinghai Lu <yhlu@tyan.com>

cache_as_ram for AMD and some intel

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
84 files changed:
src/arch/i386/include/arch/cpu.h
src/arch/i386/include/arch/hlt.h
src/arch/i386/include/arch/io.h
src/arch/i386/include/arch/romcc_io.h
src/arch/i386/init/crt0.S.lb
src/arch/i386/init/ldscript.lb
src/arch/i386/lib/Config.lb
src/arch/i386/lib/c_start.S
src/arch/i386/lib/console.c
src/arch/i386/lib/printk_init.c [new file with mode: 0644]
src/config/Config.lb
src/config/Options.lb
src/cpu/amd/car/cache_as_ram.inc [new file with mode: 0644]
src/cpu/amd/car/cache_as_ram.lds [new file with mode: 0644]
src/cpu/amd/car/cache_as_ram_post.c [new file with mode: 0644]
src/cpu/amd/car/copy_and_run.c [new file with mode: 0644]
src/cpu/amd/model_fxx/model_fxx_init.c
src/cpu/x86/car/cache_as_ram.inc [new file with mode: 0644]
src/cpu/x86/car/cache_as_ram.lds [new file with mode: 0644]
src/cpu/x86/car/cache_as_ram_post.c [new file with mode: 0644]
src/cpu/x86/car/copy_and_run.c [new file with mode: 0644]
src/cpu/x86/lapic/boot_cpu.c
src/devices/emulator/x86emu/ops.c
src/drivers/generic/debug/debug_dev.c
src/include/cpu/amd/mtrr.h
src/include/cpu/x86/bist.h
src/include/cpu/x86/cache.h
src/include/cpu/x86/msr.h
src/include/cpu/x86/mtrr.h
src/include/delay.h
src/lib/Config.lb
src/mainboard/Iwill/DK8S2/Options.lb
src/mainboard/Iwill/DK8X/Options.lb
src/mainboard/amd/quartet/Options.lb
src/mainboard/amd/serenade/Options.lb
src/mainboard/amd/solo/Options.lb
src/mainboard/arima/hdama/Options.lb
src/mainboard/ibm/e325/Options.lb
src/mainboard/island/aruma/Options.lb
src/mainboard/newisys/khepri/Options.lb
src/mainboard/tyan/s2735/Config.lb
src/mainboard/tyan/s2735/Options.lb
src/mainboard/tyan/s2735/auto.c
src/mainboard/tyan/s2735/cache_as_ram_auto.c [new file with mode: 0644]
src/mainboard/tyan/s2850/Options.lb
src/mainboard/tyan/s2875/Options.lb
src/mainboard/tyan/s2880/Options.lb
src/mainboard/tyan/s2881/Config.lb
src/mainboard/tyan/s2881/Options.lb
src/mainboard/tyan/s2881/cache_as_ram_auto.c [new file with mode: 0644]
src/mainboard/tyan/s2882/Config.lb
src/mainboard/tyan/s2882/Options.lb
src/mainboard/tyan/s2882/cache_as_ram_auto.c [new file with mode: 0644]
src/mainboard/tyan/s2885/Config.lb
src/mainboard/tyan/s2885/Options.lb
src/mainboard/tyan/s2885/cache_as_ram_auto.c [new file with mode: 0644]
src/mainboard/tyan/s2891/Config.lb
src/mainboard/tyan/s2891/Options.lb
src/mainboard/tyan/s2891/cache_as_ram_auto.c [new file with mode: 0644]
src/mainboard/tyan/s2892/Config.lb
src/mainboard/tyan/s2892/Options.lb
src/mainboard/tyan/s2892/cache_as_ram_auto.c [new file with mode: 0644]
src/mainboard/tyan/s2895/Config.lb
src/mainboard/tyan/s2895/Options.lb
src/mainboard/tyan/s2895/cache_as_ram_auto.c [new file with mode: 0644]
src/mainboard/tyan/s4880/Options.lb
src/mainboard/tyan/s4882/Config.lb
src/mainboard/tyan/s4882/Options.lb
src/mainboard/tyan/s4882/cache_as_ram_auto.c [new file with mode: 0644]
src/northbridge/amd/amdk8/coherent_ht.c
src/northbridge/amd/amdk8/debug.c
src/northbridge/amd/amdk8/incoherent_ht.c
src/northbridge/amd/amdk8/raminit.c
src/northbridge/amd/amdk8/setup_resource_map.c
src/northbridge/intel/e7501/Config.lb
src/northbridge/intel/e7501/debug.c
src/northbridge/intel/e7501/northbridge.c
src/northbridge/intel/e7501/raminit.c
src/pc80/Config.lb
src/pc80/serial.c
src/sdram/generic_sdram.c
src/southbridge/intel/i82801er/i82801er_early_smbus.c
targets/tyan/s2735/Config.lb
targets/tyan/s2735/VERSION