- 1.1.4
authorEric Biederman <ebiederm@xmission.com>
Tue, 2 Sep 2003 17:16:48 +0000 (17:16 +0000)
committerEric Biederman <ebiederm@xmission.com>
Tue, 2 Sep 2003 17:16:48 +0000 (17:16 +0000)
commit0ac6b41e70b2df365f8579c6e14214c42ab4c91b
tree40e26dbeec991f1df5e43da3e1ee9f25151b89d0
parente9a271e32c53076445ef70da8aec8201c82693ec
- 1.1.4
  Major restructuring of hypertransport handling.
  Major rewerite of superio/NSC/pc87360 as a proof of concept for handling superio resources dynamically
  Updates to hard_reset handling when resetting because of the need to change hypertransport link
    speeds and widths.
    (a) No longer assume the boot is good just because we get to a hard reset point.
    (b) Set a flag to indicate that the BIOS triggered the reset so we don't decrement the
       boot counter.
  Updates to arima/hdama mptable so it tracks the new bus numbers

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1097 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
17 files changed:
NEWS
src/config/Options.lb
src/devices/Config.lb
src/devices/hypertransport.c [new file with mode: 0644]
src/devices/pci_device.c
src/include/device/device.h
src/include/device/hypertransport.h [new file with mode: 0644]
src/mainboard/arima/hdama/Config.lb
src/mainboard/arima/hdama/mainboard.c
src/mainboard/arima/hdama/mptable.c
src/northbridge/amd/amdk8/Config.lb
src/northbridge/amd/amdk8/chip.h [new file with mode: 0644]
src/northbridge/amd/amdk8/misc_control.c [new file with mode: 0644]
src/northbridge/amd/amdk8/northbridge.c
src/northbridge/amd/amdk8/northbridge.h [new file with mode: 0644]
src/northbridge/amd/amdk8/reset_test.c
src/superio/NSC/pc87360/superio.c