projects / coreboot.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 971804e) | patch
Add sb800 spi support.
authorzbao <fishbaozi@gmail.com>
Fri, 23 Mar 2012 03:36:08 +0000 (11:36 +0800)
committerMarc Jones <marcj303@gmail.com>
Mon, 2 Apr 2012 18:35:03 +0000 (20:35 +0200)
commit01bd79ff697b4a6976e2b03ff15f4853fa561c0d
treef277f59e299dcdadb141616a230ee2d47d6666d4tree | snapshot
parent971804ed68347f4fe7ca985a3c924b28041a4079commit | diff
Add sb800 spi support.

It is for S3, storing the recovring data in the nonvolatile storage,
i.e., flash.

Change-Id: Ie9e4f42a80c93d92d2e442f0e833ce06d88294f9
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: zbao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/620
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
src/southbridge/amd/cimx/sb800/Makefile.inc diff | blob | history
src/southbridge/amd/cimx/sb800/SBPLATFORM.h diff | blob | history
src/southbridge/amd/cimx/sb800/spi.c [new file with mode: 0644] blob
src/southbridge/amd/cimx/sb800/spi.h [new file with mode: 0644] blob
my coreboot WIP stuff (asus m5a99x-evo board)