- Fix UDELAY options and HAVE_INIT_TIMER [kconfig]
authorPatrick Georgi <patrick.georgi@coresystems.de>
Mon, 4 Jan 2010 20:09:27 +0000 (20:09 +0000)
committerPatrick Georgi <patrick.georgi@coresystems.de>
Mon, 4 Jan 2010 20:09:27 +0000 (20:09 +0000)
commit1f807fd42f4c4d175c2af1357979fdf235f0be9a
tree4cb7b0ab245a5b14e1e15ff59ffa51e849a47f70
parentce56835a5cc2cb762ecba0d672a9d33fbfc2f7fd
- Fix UDELAY options and HAVE_INIT_TIMER [kconfig]
  (defaults to UDELAY_IO again, like newconfig)
- Use UDELAY_TSC on Via C7 [kconfig]
- Support Tinybootblock on Intel CPUs
- set XIP location correctly for Tinybootblock on Intel
- provide correct XIP location in Tinybootblock configuration
- Make kontron/986lcd-m use Tinybootblock
- Some kconfig fixes to kontron/986lcd-m [kconfig]

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4997 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
12 files changed:
src/Kconfig
src/arch/i386/Makefile.tinybootblock.inc
src/cpu/intel/model_106cx/cache_as_ram.inc
src/cpu/intel/model_106cx/cache_as_ram_disable.c
src/cpu/intel/model_6ex/cache_as_ram.inc
src/cpu/intel/model_6ex/cache_as_ram_disable.c
src/cpu/intel/model_6fx/cache_as_ram.inc
src/cpu/intel/model_6fx/cache_as_ram_disable.c
src/cpu/via/model_c7/Kconfig
src/cpu/x86/Kconfig
src/mainboard/kontron/986lcd-m/Kconfig
src/mainboard/kontron/986lcd-m/Makefile.inc